ELECTRICAL ENGINEERING DEPARTMENT

DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

ASSEMBLY LANGUAGE PROGRAMMING :

Logical, shift and rotate instruction using Keil µVision5

CLO2: Build the assembly language program to enable features of various peripherals in the
ARM processor. (P4)/CLS3a
DP5: Are encompassed by standards and/or documented codes of practice

NO REG. NO. NAME OF STUDENT TOTAL MARK

1 06DTK22F1033 MOHD NAZRI BIN ANWAR /100
2 06DTK22F1042 MOHD AMIRUL HAKIM BIN ABDULLAH /100
3 /100

PRACTICAL ASSESSMENT (60 Marks)

Un
Excellent Very Good Good Fair Marks Gained
Skills / Aspects satisfactory
5 4 3 2 1 S1 S2 S3 S4
Ability to generate a new project
based on a microprocessor using
assembler simulator
Ability to build target and solve error Highly Moderate Not Yet
Competent Incompetent
Ability to use the software to debug Competent Competent Competent
the program
Ability to use the simulator to
manipulate ARM processor
Total (20 marks)

Skills / Excellent Very Good Good Fair Un satisfactory Marks Gained

weight
Aspects
5 4 3 2 1 S1 S2 S3 S4
Demonstrate Demonstrate Demonstrate Demonstrate no Demonstrate no
Ability to complete considerable partial yet understanding
identify understanding understanding understanding of understanding of of the task. No
problem of the task. of the task. All the task. Most of the task. Less response / task 2
statement of Respond to all requirement of the requirement response / task not attempted.
the task requirement of the task of the task are not nearly
task. included included attempted.
Able to Able to predict Able to produce Able to produce Unable to
Ability to precisely and produce using inline using inline produce using
produce predict and using inline assembler to assembler to inline
using inline produce using assembler to perform task perform task assembler to 2
assembler to inline perform task after being perform task
perform task assembler to assisted
perform task
Able to produce Able to produce Able to produce Able to produce Unable to
Ability to
and explain and explain output according output according produce output
produce an
output output briefly to problem & to problem & according to
output
thoroughly according to question question after problem & 3
according to
according to problem & being assisted question
problem &
problem & question
question
question
Able to relate Able to relate Able to relate Able to relate Unable to relate
Ability to
theory to theory to theory to theory to theory to
relate theory
practical task practical task practical task practical task practical task 1
to practical
precisely and precisely after being
task
fluently. assisted
Total (40 marks)

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

REPORT ASSESSMENT (40 Marks)

No Activity Observation Marks
Activity 1 /5
1 Result
Activity 2 /15
2 Discussion /5
3 Question /10
4 Reflection /5
Total /20

Lecturer’s Comments:

Submit date : Return date :

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

CHAPTER : ASSEMBLY LANGUAGE PROGRAMMING

TOPIC : Logical, shift and rotate instruction using Keil µVision5

OUTCOMES : Upon completion the experiment, students should be able to:

1. Produce inline assembler in C to perform logical, shift and rotate instruction.
2. Familiarize in memory mapping and the changing in the data register’s contents.
3. Build the assembly language program to enable features of various peripherals in
the ARM processor (CLO2, PLO5)

EQUIPMENT : Personal Computer with ARM Keil µVision Microcontroller Development Kit (MDK)
software

THEORY:

LOGICAL INSTRUCTION
The Cortex-M processors support various instructions for logic operations such as AND, OR, exclusive
OR and so on that can be used to modify the contents of the general purpose registers. Like the
arithmetic instructions, the 16-bit versions of these instructions update the flags in APSR. If the “S” suffix
is not specified, the assembler will convert them into 32-bit instructions.

To use the 16-bit versions of these instructions, the operation must be between two registers with the
destination being one of the source registers. Also, the registers used must be low registers (R0-R7),
and the S suffix should be used (APSR update).

Cortex-M0 instruction
Operation Description Assembler
Logical AND ANDS Rd, Rd, Rm
Exclusive OR EORS Rd, Rd, Rm
OR ORRS Rd, Rd, Rm
Bit clear BICS Rd, Rd, Rm

SHIFT AND ROTATE INSTRUCTION

The Cortex-M architecture support various shift and rotate instructions. There are 5 variations of a shift
that are supported:
ASR #n (arithmetic shift right)
LSL #n (logical shift left)
LSR #n (logical shift right)
ROR #n (rotate right)
RRX #n (rotate right one bit with extend)

If the S suffix is used, these rotate and shift instructions also update the Carry flag in the APSR. If the
shift or rotate operation shifts the register position by multiple bits, the value of the carry flag C will be
the last bit that shifts out of the register.

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

You might wonder why there are rotate right instructions but no instructions for rotate left. Actually, a
rotate left operation can be replaced by a rotate right operation with a different rotate amount. For
example, a rotate left by 4 bits can be written as a rotate right by 28 bits. This gives you the same result
in the destination register (note that the C flag will be different from rotate left) and takes same amount
of time to execute.

To use the 16-bit version of these instructions, the registers used must be low registers (R0-R7), and the
S suffix should be used (APSR update). The RRX instruction is not available in 16-bit form.

Arithmetic shift right

ASR

Logical shift left

LSL

Logical shift right

LSR

Rotate right
ROR

Cortex-M0 instruction
Operation Description Assembler
Shift Logical shift left by immediate LSLS Rd, Rm, #<shift>
Logical shift left by register LSLS Rd, Rd, Rs
Logical shift right by immediate LSRS Rd, Rm, #<shift>
Logical shift right by register LSRS Rd, Rd, Rs
Arithmetic shift right ASRS Rd, Rm, #<shift>
Arithmetic shift right by register ASRS Rd, Rd, Rs
Rotate Rotate right by register RORS Rd, Rd, Rs

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

PROCEDURES:

Activity 2-1
1. Enter the following code ‘logical instruction’ in Figure 1 in the Keil µVision 5.
2. Save the file as activity2-1.s file
3. Compile and if there are errors, correct it and assemble the program again.
4. Observe changes in register value. Show the operation of logical manually and compare the
simulation result in table below.

; Always Start with Vector Table

; Vector Table Mapped to Address 0 at Reset

AREA RESET, DATA, READONLY

__Vectors
DCD 0x20084000 ; stack pointer value when stack is empty
DCD START
ALIGN

; The program
AREA MYCODE, CODE, READONLY
ENTRY

START
MOVS R0, #0x55 ; Set up parameters
MOVS R1, #0xAA
MOVS R2, #0x22
ANDS R0, R0, R1
EORS R0, R0, R1
ORRS R2, R2, R1
BICS R0, R0, R1
B START
END ; End of the program
Figure 1: Assembly code for “logical instruction”

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

Instruction Register Data Before Data After

MOVS R0, #0x55 R0 0x0000 0000 0x0000 0055
MOVS R1, #0xAA R1 0x0000 0000 0x0000 00AA
MOVS R2, #0x22 R2 0x0000 0000 0x0000 0022
Calculation : R0 x R1 = 0x0000 00AA

ANDS R0, R0, R1

RO 0x0000 0055 0x0000 00AA

Calculation : R0 – R1 = 0x0000 00AA

EORS R0, R0, R1

R0 0x0000 00AA 0x0000 00AA

Calculation : R1 + R2 = 0x0000 00AA

ORRS R2, R2, R1

R2 0x0000 0022 0x0000 00AA

Calculation : R0 & ( -R1) 0x0000 0000

BICS R0, R0, R1

R0 0x0000 00AA 0x0000 0000

(5 marks)

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

Activity 2-2
1. Enter the following code ‘shift and rotate instruction’ in Figure 2 in the Keil µVision 5.
2. Save the file as activity2-2.s file
3. Compile and if there are errors, correct it and assemble the program again.
4. Observe changes in register value. Show the operation of shift and rotate manually and compare the
simulation result in table 2.2 below.

; Always Start with Vector Table

; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY

__Vectors
DCD 0x20084000 ; stack pointer value when stack is empty
DCD START
ALIGN

; The program
AREA MYCODE, CODE, READONLY
ENTRY

START
MOVS R0, #0x55 ; Set up parameters
MOVS R1, #0xAA
MOVS R2, #0x02
LSLS R0, R0, #1
LSLS R1, R1, R2

MOVS R3, #12

MOVS R4, #24
MOVS R5, #1
LSRS R3, R3, #2
LSRS R4, R4, R5

MOVS R6, #0xff

MOVS R7, #0x02
ASRS R6, R6, #2
ASRS R6, R6, R7
RORS R7, R7, R2
B START
END ; End of the program

Figure 2: Assembly code for “shift and rotate instruction ”

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

Table 2.2a Logical shift left

Instruction Register Data Before Data After
MOVS R0, #0x55 R0 0x0000 0000 0x0000 0055
MOVS R1, #0xAA R1 0x0000 0000 0x0000 00AA
MOVS R2, #0x02 R2 0x0000 0000 0x0000 0002
Calculation : 0x0000 00AA = R0<<1

LSLS R0, R0, #1

R0 0x0000 0055 0x0000 00AA

Calculation : R1 << R2 = 0x000002A8

LSLS R1, R1, R2

R1 0x0000 00AA 0x0000 02A8

Table 2.2b Logical shift right

Instruction Register Data Before Data After
MOVS R3, #12 R3 0x0000 0000 0x0000 000C
MOVS R4, #24 R4 0x0000 0000 0x0000 0018
MOVS R5, #1 R5 0x0000 0000 0x0000 0001
Calculation : R3 >> R2 = 0x0000 0003

LSRS R3, R3, #2

R3 0x0000 000C 0x0000 0003

Calculation : R4 >> R5 = 0x0000 000C

LSRS R4, R4, R5

R4 0x0000 0018 0x0000 000C

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

Table 2.2c Arithmetic shift right and Rotate right

Instruction Register Data Before Data After
MOVS R6, #0xff R6 0x0000 0000 0x0000 00FF
MOVS R7, #0x02 R7 0x0000 0000 0x0000 0002
Calculation : R2 >>2=0x0000 003F

ASRS R6, R6, #2

R6 0x0000 00FF 0x0000 003F

Calculation : R6 >>R7
0x0000 000F

ASRS R6, R6, R7

R7 0x0000 003F 0x0000 000F

Calculation : R7 ROT BY R2

RORS R7, R7, R2

R7 0x0000 0002 0x8000 0000

(15 marks)

DISCUSSION:
1. Observe the result of this instruction:
MOVS R1, #0xAA
ASRS R1, R1, #0x55
Is this instruction valid or not? State the reason.

=Not valid, because the value of #0x55 cant use to number of shift
(2.5 marks)

2. From your observation, conclude the differences between LSLS R0, R0, #1 and LSRS R0, R0, R1.
LSLS R0, R0, #1 LSRS R0, R0, R1

-LSLS the value in register r0,shifted to the left by one bite - value in r0, shifted to left by numbers of bit R1

- Uses a registers and shift - uses 2 registers

(2.5 marks)

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

QUESTIONS : (ATTACH THE ANSWER IN THE LAB REPORT)

1. Insert comments on each side of the instruction in activity 2-1 and 2-2 to clarify the meaning
of each step.

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

ACTIVITY 2.2

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

(5 marks)

2. Write and execute a simple program using instruction below:

a. Insert 3 data register (R0,R2,R4) (any Hex Numbers)
b. Using logical instruction AND for R0 and R2,store at R0
c. Using logical instruction OR for R2 and R4, store at R4
d. Using logical instruction EOR for R4 and R0, store at R4
e. Show the answer (32 bit)

Page | 12 of 7 DEC30043_eff_June2019
 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

(5 marks)

REFLECION :
At the end of this practical work, we able to use assembler in c to perform logical, shift and
rotate instruction. We understand and know how the logical instruction and shift and rotate
instruction used in this practical to obtain the value or number. Moreover, we also familiarize
the memory mapping and the changing in the data register’s content. Then we also able to
build the assembly language program to enable features of various peripherals in the ARM
processor. We also understand the logical instruction such as AND, OR, EOR or BICS uses to
obtain the value in register .Last but not least, we all able the get the value of activity 2-1 and
2-2
(5 marks)

~ End of Practical 2 ~

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 ELECTRICAL ENGINEERING DEPARTMENT
DEC 30043
COURSE MICROPROCESSOR NO.
FUNDAMENTALS PRACTICAL:
2
PROGRAMME DTK 3

Prepared by: Checked by: Verified by:

Item Assessment Checklist YES NO Item Assessment Checklist YES NO

Consistent with: / Consistent with: /
 AST/CIST/CAT  AST/CIST/CAT
 Bloom'sTaxonomy /  Bloom'sTaxonomy /
Domain Domain
 Scheme Answer /  Scheme Answer
/

...................................
Fazny
Course Lecturer / NOOR FAZNYZAHUDA FUAD
Course Coordinator* PENSYARAH
POLITEKNIK PORT DICKSON
..................................................
..........................................
Course Coordinator /
Head of Programme /
Subject matter Expert*
Course Leader *
Date28.8.2023 Date:28.8..2023 Date:28.8.2023

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