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GEH-6721_Vol_III_BG

Mark* VIe and Mark VIeS Control Systems


Volume III: For GE Industrial Applications

Jan 2018

GE Internal
These instructions do not purport to cover all details or variations in equipment, nor to provide for every possible
contingency to be met during installation, operation, and maintenance. The information is supplied for informational
purposes only, and GE makes no warranty as to the accuracy of the information included herein. Changes, modifications,
and/or improvements to equipment and specifications are made periodically and these changes may or may not be reflected
herein. It is understood that GE may make changes, modifications, or improvements to the equipment referenced herein or to
the document itself at any time. This document is intended for trained personnel familiar with the GE products referenced
herein.
GE may have patents or pending patent applications covering subject matter in this document. The furnishing of this
document does not provide any license whatsoever to any of these patents.
GE Internal – This document is proprietary. It contains information that belongs to the General Electric Company and is
furnished to its customer solely to assist that customer in the installation, testing, operation, and/or maintenance of the
equipment described. This document or the information it contains shall not be reproduced in whole or in part or disclosed to
any third party without the express written consent of GE.
GE provides the following document and the information included therein as is and without warranty of any kind,
expressed or implied, including but not limited to any implied statutory warranty of merchantability or fitness for
particular purpose.
For further assistance or technical information, contact the nearest GE Sales or Service Office, or an authorized GE Sales
Representative.

Revised: Jan 2018


Issued: March 2009

© 2009 – 2018 General Electric Company.


___________________________________
* Indicates a trademark of General Electric Company and/or its subsidiaries.
All other trademarks are the property of their respective owners.

We would appreciate your feedback about our documentation.


Please send comments or suggestions to controls.doc@ge.com

GE Internal
Document Updates
Revision Location Description
Added content in the following sections for the Rate-based Overspeed (RBOS)
feature:
• Firmware Overspeed Trip: replaced the diagram Firmware Overspeed, and
added functionality
• Rate-based Overspeed Trip (RBOS): new section with functional description
PPRO
• Configuration Parameters: added RBOS parameters
• RBOS Parameter Restrictions: new section with restrictions
• Variables Vars-Speed: added RBOS variables
• Alarm 132: RBOS detection not supported alarm
• Shaft Speed Accel, Decel, Zero: added acceleration calculation

Updated content in the Thermocouple Inputs table for Cold Junction temperature

BG reading accuracy, including the following sections to accompany the table


specifications:
• Cold Junction Accuracy Scenarios provides details on three scenarios for SCSA
YSIL Thermocouple Inputs I/O configuration
• Cold Junction Internal or Remote Configuration informs the user of the option to
use either the internal Cold Junction sensor with the accuracy specification or
read the Cold Junction temperature from the controller using the System Output
variables, CJRemote_R,S,T

YSIL TCSA + WCSA Core Protection


Updated the TCSA Contact Input Specifications V dc values from 32 to 140 V dc in
Terminal Board TCSA Contact
the section
Inputs

Corrected the configurations listed as supported speed repeater outputs for TB2 of
YSIL Speed Repeater Outputs
WCSA
Corrected the Shipping and Storage temperature to -40 to 85°C (-40 to 185 °F) in the
YSIL
YSIL I/O Pack Specifications table

Corrected the Storage temperature to -40 to 85°C (-40 to 185 °F) in the YPRO
YPRO
BF Specifications table

TTURH#C, S1C TMR Primary


Updated the TTUR Specification table, the Number of Outputs specification, to
Turbine Protection Terminal Board,
include close and open values
Specifications

YSIL Added Output Bits

PPRO, YPRO, PPRA Updated the description for the LedDiags parameter.

UCSA Moved the information about this Mark VIe controller platform into GEH-6721_Vol_II

Moved the information about this Mark VI VME rack gateway to the Mark VIe controls
BE PCMI
into GEH-6830

YSIL Added the missing TripMode Parameter to the TCSA Contracts configuration.

PAMC Duplex can use either IONet port.

PPRA, PPRO, YPRO Updated the section, Hardware Overspeed Trip to include the Speed Pulse Counter

System Guide GEH-6721_Vol_III_BG 3


GE Internal
Location Description
YSIL Specific Alarms Updated the solutions for Alarm IDs 2458-2473, 2490 with instructions to unlatch

PTUR Updated the specification for Speed sensor accuracy

Updated the following regulator diagrams: Liquid Fuel, Position, Speed Ratio, and
PCAA
Liquid Fuel with Position

PPRA, PPRO, and YPRO Updated the figure Steam Turbine Trip Signals

TRES Updated the figure TRES Terminal Board, Trip Interlocks, and Trip Solenoids

Updated figure YPRO Speed Difference Detection, the parameter description for
YPRO
OS_Diff, and the figure YPRO Contract Input E-Stop

PPRO and PPRA Updated the figure Speed Difference Detection

BC YSIL Core Safety Protection Module New chapter added to provide details for the YSIL module

TREA_#A Updated the figure TREA_1A Trip Relays (PPRO, YPRO)

PPRA Updated the figure in the section Trip Input

PPRO Cycle-power after a hardware overspeed trip is no longer required

The following component’s specification was expanded to be -40 to 70°C for ambient
Various temperate rating: PCAAH1B, PCLAH1B, PPRAH1B, PPROH1B, PSVOH1B, and
PTURH1B

TPRO Updated the figure TPRO_#C Board Layout

PAMC Updated the figure Duplex Acoustic Monitoring

PPRO and YPRO Updated the figure in the section K25 Relay Algorithm

4 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
Safety Symbol Legend

Indicates a procedure or condition that, if not strictly observed, could result in


personal injury or death.
Warning

Indicates a procedure or condition that, if not strictly observed, could result in damage
to or destruction of equipment.

Caution

Indicates a procedure or condition that should be strictly followed to improve these


applications.

Attention

GEH-6721_Vol_III_BG System Guide 5


GE Internal
Control System Warnings

To prevent personal injury or damage to equipment, follow all equipment safety


procedures, Lockout Tagout (LOTO), and site safety procedures as indicated by
Employee Health and Safety (EHS) guidelines.
Warning

This equipment contains a potential hazard of electric shock, burn, or death. Only
personnel who are adequately trained and thoroughly familiar with the equipment
and the instructions should install, operate, or maintain this equipment.
Warning

Isolation of test equipment from the equipment under test presents potential electrical
hazards. If the test equipment cannot be grounded to the equipment under test, the
test equipment’s case must be shielded to prevent contact by personnel.

To minimize hazard of electrical shock or burn, approved grounding practices and


Warning procedures must be strictly followed.

To prevent personal injury or equipment damage caused by equipment malfunction,


only adequately trained personnel should modify any programmable machine.
Warning

Always ensure that applicable standards and regulations are followed and only
properly certified equipment is used as a critical component of a safety system. Never
assume that the Human-machine Interface (HMI) or the operator will close a safety
critical control loop.
Warning

6 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
Contents
1 PAMC Acoustic Monitoring Input Module .................................................................................. 9
1.1 PAMC Acoustic Monitoring Input (UCSA Processor).....................................................................................9
1.2 PAMC Specific Alarms........................................................................................................................... 28
1.3 SAMB and BAPA Acoustic Monitoring Input ............................................................................................. 33
2 PCAA Core Analog Module.......................................................................................................... 39
2.1 PCAA Core Analog I/O Pack ................................................................................................................... 39
2.2 PCAA Specific Alarms ........................................................................................................................... 85
2.3 TCAT Core Analog Terminal Board .......................................................................................................... 97
2.4 JGPA Ground and Power Board...............................................................................................................104
3 PCLA Core Analog Module — Aero .........................................................................................107
3.1 PCLA Core Analog I/O for Aero .............................................................................................................107
3.2 PCLA Specific Alarms ..........................................................................................................................128
3.3 SCLS Core Analog Terminal Board..........................................................................................................136
3.4 SCLT Core Analog Terminal Board..........................................................................................................148
4 PEFV Electric Fuel Valve Gateway...........................................................................................157
4.1 PEFV Electric Fuel Valve Gateway Pack...................................................................................................157
4.2 PEFV Specific Alarms...........................................................................................................................160
4.3 TEFV Electric Fuel Valve Terminal Board.................................................................................................161
5 PGEN Turbine Generator Monitor ............................................................................................163
5.1 PGEN Turbine-Generator Monitor I/O Pack...............................................................................................163
5.2 PGEN Specific Alarms ..........................................................................................................................173
5.3 TGNA Turbine-Generator Monitor Terminal Board .....................................................................................176
6 PPRA Emergency Turbine Protection.....................................................................................183
6.1 PPRA Emergency Turbine Protection I/O Pack...........................................................................................183
6.2 PPRA Specific Alarms...........................................................................................................................217
6.3 TREA and WREA Turbine Emergency Trip ...............................................................................................232
7 PPRO, YPRO Backup Turbine Protection ..............................................................................245
7.1 Mark VIe PPRO Backup Turbine Protection I/O Pack..................................................................................245
7.2 PPRO Specific Alarms...........................................................................................................................291
7.3 Mark VIeS YPRO Backup Turbine Protection I/O Pack ...............................................................................302
7.4 YPRO Specific Alarms ..........................................................................................................................339
7.5 TPRO_#C TMR Backup Protection Terminal Board....................................................................................347
7.6 SPROH#A, S1A Simplex Backup Protection Terminal Board........................................................................354
7.7 TREAH#A, S#A Aeroderivative Turbine Trip Board ...................................................................................359
7.8 TREGH#B, S#B Gas Turbine Trip Board ..................................................................................................369
7.9 TREL Large Steam Turbine Trip Board ....................................................................................................376
7.10 TRES Small Steam Turbine Trip Board.....................................................................................................381
8 PSCH Specialized Serial Communication..............................................................................387
8.1 PSCH Specialized Serial Communication I/O Pack .....................................................................................387
8.2 PSCH Specific Alarms...........................................................................................................................393
8.3 Simplex Serial Communication Input/Output (SSCA)..................................................................................397
9 PSVO Servo Control Module .....................................................................................................399
9.1 PSVO Servo Control I/O Pack.................................................................................................................399

GEH-6721_Vol_III_BG System Guide 7


GE Internal
9.2 PSVO Specific Alarms ..........................................................................................................................416
9.3 TSVC Servo Input/Output Terminal Board ................................................................................................430
10 PSVP Servo Control – Steam ..................................................................................................441
10.1 PSVP Servo Control I/O Pack for Steam ...................................................................................................441
10.2 PSVP Specific Alarms ...........................................................................................................................490
10.3 SSVP Servo Input/Output Terminal Board.................................................................................................502
11 PTUR, YTUR Turbine Specific Primary Trip.........................................................................513
11.1 Mark VIe PTUR Primary Turbine Protection I/O Pack .................................................................................513
11.2 PTUR Specific Alarms ..........................................................................................................................541
11.3 Mark VIeS YTUR Primary Turbine Protection I/O Pack...............................................................................548
11.4 YTUR Specific Alarms..........................................................................................................................573
11.5 TTURH#C, S1C TMR Primary Turbine Protection Terminal Board................................................................579
11.6 STURH#A Simplex Primary Turbine Protection Terminal Board ...................................................................586
11.7 TRPA_#A Aeroderivative Turbine Primary Trip Board ................................................................................596
11.8 TRPG_#B Gas Turbine Primary Trip Board ...............................................................................................609
11.9 TRPL Large Steam Turbine Primary Trip Board .........................................................................................615
11.10TRPS Small Steam Turbine Primary Trip Board ........................................................................................620
12 YSIL Core Safety Protection Module.....................................................................................625
12.1 YSIL Overview ....................................................................................................................................625
12.2 Mark VIeS YSIL Core Protection I/O Pack................................................................................................629
12.3 YSIL Specific Alarms ...........................................................................................................................647
12.4 TCSA + WCSA Core Protection Terminal Board ........................................................................................664
12.5 SCSA I/O Expansion Board....................................................................................................................687
13 Application-specific Functions ..............................................................................................697
13.1 Mark VIeS Safety Controller Black Channel ..............................................................................................697
13.2 Mark VIe PAIC Compressor Stall Detection ..............................................................................................697
13.3 PIOA ARCNET Interface Module ...........................................................................................................701
14 Remote Services ........................................................................................................................703
14.1 On-Site Monitor (OSM) .........................................................................................................................703
14.2 OnSite Support* Remote Services Gateway (RSG) .....................................................................................703
15 Legacy Equipment .....................................................................................................................705
15.1 UCCx Controllers .................................................................................................................................705
15.2 IONet Switches and SMF .......................................................................................................................723
15.3 PAMB Acoustic Monitoring ...................................................................................................................724
16 Replacement ...............................................................................................................................725
16.1 Replacement Precautions........................................................................................................................725

8 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
1 PAMC Acoustic Monitoring Input
Module
1.1 PAMC Acoustic Monitoring Input (UCSA Processor)
The Acoustic Monitoring Input PAMC supports combustion dynamics for heavy-duty gas turbines. The PAMC includes the
IS210BAPAH1A Analog Processor (BAPA) and the Acoustic Monitoring (SAMB) terminal board grouped together as an
application subassembly, and the IS220UCSAH1A standalone processor module.
The UCSA mounts as a standalone LAN module and serves as the PAMC processing engine. The UCSA was selected for
acoustic monitoring because it provides the additional processing capacity required for the fast Fourier transform (FFT)
analysis, sorting function, sensor diagnostics, and so forth. The UCSA accepts dynamic pressure data from the SAMB. The
analog signal is conditioned to remove dc bias and amplify ac content (to maximize resolution) before it is digitized by an
analog-to-digital (A/D) converter. A field programmable gate array (FPGA) sequences, digitizes, and filters the dynamic
pressure signals and controls the high-speed serial link (HSSL) protocol for the Ethernet link between the BAPA and the
UCSA.

Note Two versions of the Acoustic Monitoring system are offered (Simplex and Duplex).

Duplex Acoustic Monitoring System (323A4747WCP4) – The SAMB fans all 18 inputs to each BAPA. The BAPA 1 (left)
communicates with the UCSA connected to IONet R. The BAPA 2 (right) communicates with the UCSA connected to IONet
S. Either port (ENET1 or ENET2) works for IONet as long as it is configured correctly in the ToolboxST application. The
controller’s application code votes which PAMC data to use, based on the signal health.

CCCA
1

Acoustic Acoustic
CCCA
2

Monitoring Monitoring
CCCA
3

CCCA
4

Low - Noise
3

PWR PWR UCSA UCSA


Cable CCCA
5

ATTN ATTN
4

PWR BOO T PWR BOO T


CCCA
5
6

FLASH O NL FLASH ONL To


Pressure
LINK LINK DIAG DC DIAG DC
6

Sensor CCCA IONet


7

TxRx TxRx
Switches
7

CCCA
8

T/SL3 T/ SL3
8

CCCA
9

S/SL2 S/SL2
9

CDIS Constant Current


Charge Amp(s) R/SL1 R/ SL1
1
2

CCCA
1

ENET1 ENET1
3

CCCA
2

ENET2 ENET2
CCCA
3

Turbine Cable
5

USB USB
CCCA
4

Twisted
Combustor
6

COM CO M
CCCA &
5

(max. of 18)
7

Shield
CCCA
6

CCCA
7

IS 210BAPAH1A IS 210BAPAH1A
PAMC connects to CCCA
8

either a PCB-based IS210 SAMB


CCCA
9

CDIS CCCA or Encore-


based CCSA CDIS Constant Current
Charge A mp (s)
Mark VIe Duplex PAMC (323A 4747 WCP4)

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 9


GE Internal
Simplex Acoustic Monitoring System (323A4747WCP3) – Controller application code is not required to vote signals from
the PAMC. The PAMC connects to either a PCB-based CDIS CCCA or Encore-based CCSA.

1.1.1 Installation
Only a qualified GE technician shall install the PAMC signal space inputs. For the ToolboxST procedures to add the PAMC
I/O module and setup the IP address, refer to GEH-6700, the chapter Special I/O Functions.

1.1.2 Operation
The PAMC includes the following features.

• Signal conditioning for up to 18 combustion dynamic pressure inputs:


− GE Charge-Converter Signal Amplifier (CCSA) or PCB Piezotronics® Charge Amplifier for heavy-duty turbines are
supported
− Differential inputs and adjustable gains
− Fast synchronous-sampled A/D with 16x over-sampling
− FPGA pre-processor with finite impulse response (FIR) filters
− Open wire detection
• Analysis capability per channel:
− Windowed FFT analysis
− Rolling average per bin
− 50/60 Hz rejection filters
− Sort function providing peak pressure amplitude for six different frequency bands
− Maximum peak detect for each frequency band
− Average channel peak-to-peak amplitudes per frequency band
− Alarm detection if peak-to-peak amplitude exceeds configurable level for each frequency band
− List capture for all 18 channels if alarm is detected or user requests capture

10 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
1.1.2.1 UCSA Processor
The IS200UCSAH1A processor has the following features:

• High-speed processor with random access memory (RAM) and flash memory
• Two fully-independent 10/100 Ethernet ports with connectors Enet1 and Enet2 for connecting to the main controllers'
IONet ports.
• Three fully-independent high-speed serial link ports with connectors R/SL1, S/SL2, T/SL3. Only R/SL1 is used in the
PAMC for connecting to a IS210BAPAH1A analog processor board.
• One universal asynchronous receiver-transmitter (UART) type serial port with RJ-45 connector
• Hardware watchdog timer and reset circuit
• Status-indication LEDs
• Electronic ID
• CompactFlash® support
The UCSA connects to the BAPA through the R/SL1 high speed serial link (HSSL) interface. The PAMC is designed so that
the UCSA and the BAPA can be located in different locations (up to 100 meters of high speed serial link cable length). Each
module can be powered independently. At power up, the BAPA waits for the UCSA to initiate communications. After
communication is established, the application FPGA is programmed.
The processor application code contains the logic to allow a UCSA to operate on one or two IONet inputs. When using two
IONet inputs, both network paths are active at all times. A failure of either network does not disturb I/O pack operation and is
indicated through the working network connection. This arrangement is more tolerant of faults than a classic hot-backup
system in which the second port is only used after a primary port failure is detected. The Ethernet ports on the UCSA
auto-negotiate between 10 and 100 mbps speed, and between half-duplex and full-duplex operation.

1.1.2.2 Auto-Reconfiguration
Refer to GEH-6721_Vol_II, the chapter, Common Module Content, the section Auto-Reconfiguration.

When replacing a PAMC or PMVE, the Auto-Reconfiguration process will not


function properly unless the existing CompactFlash® board from the UCSA being
replaced is removed and installed into the new UCSA. If a new or blank
CompactFlash board is used, complete the procedure to setup the PAMC for IONet
Attention communication. Refer to GEH-6700, the chapter Special I/O Functions.

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 11


GE Internal
1.1.2.3 Acoustic Monitoring Firmware
The acoustic monitoring firmware supports 18 input channels. The main features are:

• RMS Broadband Calculation – Calculates the broadband root-mean-square (RMS) energy of the time-domain sampled
data in the frequency range of 0 to 5000 Hz. The output is the input of the RMS Scan Average.
• RMS Scan Average – Average multiple scans of broadband RMS values. A scan is defined by the amount of
time-domain sampled combustion data to calculate a windowed FFT of some defined length. The output is the system
input, SIGx (where x is the channel number), passed to the controller.
• Windowed FFT – Calculates the frequency domain peak-to-peak magnitude and bin frequency, based on time-domain
sampled combustion input data. The configuration defines the type of FFT window function used, the FFT length
(amount of input data collected for the calculation), and the sample frequency. The output feeds the Peak-to-Peak Scan
Average.
• Peak-to-Peak Scan Average – Provides a frequency domain peak-to-peak magnitude average per frequency bin, over
multiple scans. The configuration defines the number of scans used in the rolling average calculation. The output is the
input for the Six-Band Sort function.

• Six-Band Sort – Average frequency domain peak-to-peak data is sorted into six separate frequency bands, as displayed
in the following table.

Frequency Bands

Frequency Band Number Configuration Band Name


1 Low (Low)

2 Middle (Mid)

3 High (High)

4 Low Low (LoLo)

5 Trans (Trns)

6 Screech (Scrch)

12 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
The maximum of the average peak-to-peak magnitudes from each frequency band and its corresponding frequency bin are
selected and output as system inputs for the controller.

• Band n Average – Calculates the average peak-to-peak magnitude over all enabled healthy input channels, based on the
output of the Six-Band Sort.
• Band n Maximum – Calculates the maximum peak-to-peak magnitude over all input channels enabled, based on the
Six-Band Sort data. The six frequency band maximums are output for use by the controller.
• Band n Limit Check – A frequency band limit check based on the Band n Maximum output data.

Acoustic Monitoring Block Diagram

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 13


GE Internal
1.1.2.4 Acoustic Monitoring Parameters
The Low, Middle, High and Screech frequency bands are contiguous with common boundaries defined by the configuration
parameters: LowMid_BrkPt, MidHi_BrkPt and HiScrchBrkPt. The Low-Low and the Transverse frequency bands have
independent beginning and end points allowing only these two bands to overlap the contiguous frequency bands.
If Low-Low frequency band end point parameter, LowLowEndPt is not equal to the beginning point, Low_StrtPt of the Low
frequency band, then the Low-Low is permitted to overlap the Low, Middle, High and/or Screech frequency bands. A
combustion peak located in the overlap of the Low-Low and the Low frequency bands will be seen in both frequency bands.
If the configuration parameter, LowLowEndPt equals Low_StrtPt then Low-Low, Low, Middle, High and Screech are
considered contiguous frequency bands with no overlap.
The Transverse band overlaps the contiguous bands when the starting-point configuration parameter, Trns_StrtPt is not equal
to Scrch_EndPt. If the configuration parameter, Trns_Bnd_Enb = Disable, a combustion peak that overlaps both the Screech
and Transverse Frequency Band will be seen in both bands. If Trns_Band_Enb = Enable, the Transverse Band sorting
function will search for a combustion peak in the range defined by Trans_StrtPt and Trans_EndPt.
When the peak frequency is detected, there is a Screech sort keep out area described by the configuration parameter, T_
FilWidth. For example, if T_FilWidth = 40 Hz and the combustion peak found in the Transverse band is located at 1000 Hz,
then the Screech keepout area is from 960 to 1040 Hz. The Screech sorting function is permitted to search for a peak from
HiScrchBrkPt to 960 Hz and 1040 Hz to Scrch_EndPt. The Transverse band can be part of the contiguous frequency band
group if Trns_StrtPt equals Scrch_EndPt.

14 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 15
GE Internal
1.1.2.5 A/D Compensation
The A/D compensation function eliminates any gain or offset error due to initial component inconsistency. An
auto-calibration function runs each time the module is reset. The auto-calibration function compares each of the 18 analog
channels against a standard A/D channel. This A/D channel is calibrated using a standard high-precision voltage reference
and the A/D common.

1.1.2.6 Dynamic Pressure Probe to PAMC Signal Scaling


The signal flow from the dynamic pressure probe to the signal-space outputs (controller system inputs) involves the following
three steps:
1. Probe converts the combustion dynamic pressure in psi to a charge output in pico-coulombs
2. Either the Encore charge amplifier (CCSA) or the PCB constant-current charge amplifier (CCCA) converts the charge
output of the probe to a voltage in millivolts.

Note The CCSA output is 0 V dc and 0 V ac when the dynamic pressure is zero psi. The CCCA output is 12 V dc and 0 V ac
when the dynamic pressure is zero.

3. The PAMC measures the dc component of the signal and removes the dc portion of the signal before the digitization of
the dynamic pressure signal. PAMC offers an internal gain feature to improve the A/D resolution of the signal.
The configuration parameter, InputUse determines the scaling method used to convert the voltage input to useful Engineering
Units, for example psi. For InputUse = CCSA, Custom, and File, the configuration parameters used for input scaling are the
following:

• Low Input and High Input


• Low Value and High Value
In the following example, zero volts is equivalent to zero psi from the dynamic pressure probe. For a two point calibration,
assign Low_Input = 0 and Low_Value = 0. Next, the voltage output from the CCSA for a 5 psi peak input to the probe is equal
to the following:
PAMC Input Voltage(mVpeak-to-peak) = Dynamic Pressure(psipeak-to-peak) * ProbeSensitivity
(pico-coulombs/psi)*Charge Amp Sensitivity(mV/pico-coulomb)
PAMC Input Voltage(mV) = 10 psipeak-to-peak * 17 pico-coulombs/psi * 10 mV/pico-coulomb = 1700
mVpeak-to-peak
Assign the configuration parameters, High_Input = 1700 mVpeak-to-peak and High_Value = 10
psipeak-to-peak

The CCSA signal generator or the portable signal generator used to test the CCSA
charge inputs only provides a single-ended output and no differential output.
Therefore when the test signal is applied the CCSA, the charge amplifier outputs half
the output voltage as compared to the output when the probe’s differential signal is
Attention connected to the charge amplifier input.

For InputUse = PCB, the configuration parameters used are PCB_Probe_Gn and
PCB_Amp_Gn. In this example, the user would assign the following:
PCB_Probe_Gn = 17 pico-coulombs /psi
and
PCB_Amp_Gn = 10 mV/pico-coulomb
The PAMC will scale the outputs, Sigx in V rms and FFT outputs, FrqBx_PkAmpy in PSIpeak-to-peak where x is the frequency
band number 1 – 6 and y is the input channel number 1 – 18.

16 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
1.1.2.7 A/D Gain Adjust
The configuration parameter, Gain, controls the channel gain in the hardware. This parameter is defined for each channel.
This allows low-level signals to be amplified to provide better resolution in the A/D conversion hardware. The gain options
are 1x, 2x, 4x, and 8x. The channel control writes the gain setup to the FPGA input amplifier 4x and 2x gain control registers.
The signal level calculated by PAMC firmware does not change with the Gain parameter because the signal is divided by the
gain factor in the firmware, resulting in a net gain of 1 for the signal regardless of the gain factor used. The maximum
expected signal level should not exceed 10 V (saturation) after the gain is applied as indicated in the following table.

Rules for Selecting Gain Value

Gainx Maximum magnitude of input signal after dc bias is removed (volts)


1 10
2 5
4 2.5
8 1.25

If the configuration parameter, InputUse = PCB, set the parameter, Gain = 2.

Attention

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 17


GE Internal
The PAMC signal-conditioning gain is determined by using the following calculation:
PAMC A/D VoltageMAX = Pressure PeakMAX(psipeak) * Probe SensitivityMAX(pico-coulombs/psi)
* Charge Amplifier SensitivityMAX(mVpeak/pico-coulomb) * PAMC Gain(mV/mV) <= 8000 mVPEAK
where
Probe SensitivityMAX is the nominal sensitivity plus worst case variation,
Charge Amplifier SensitivityMAX (is the nominal charge amp gain with worst case variation added to the nominal,
PAMC Gain is the internal signal-conditioning gain, Gainx described above,
8000 mVPEAK is the 80% limit for the ±10 V VPEAK range for A/D.
Example:

Note The 1.2 is the ±20% range in the factory calibrated probe sensitivity and the 1.05 is the 5% range in the factory
calibrated charge amp sensitivity from nominal.

PAMC A/D VoltageMAX = 12.5 psipeak * 1.2 * 17 pico-coulombs / psi *


1.05 * 11.75 mV / pico-coulomb * 2 * 0.001 V/mV
= 6.29 voltpeak
PAMC A/D VoltageMAX <8000 mVPEAK. Therefore, this configuration is OK to use.

1.1.2.8 RMS Calculation and Rolling Average


The RMS calculation function performs an RMS calculation on the ac acoustic information sampled for a given scan. The
RMS is defined as follows:
rms_Chx = SQRT ( (AC_Input(0)**2 + AC_Input(1)**2 + … +
AC_Input(Buffer_Length)**2) / Buffer_Length)
Where x is the channel number.
The rolling average function provides a smoothing function to reduce the vibration in the signal.

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1.1.2.9 Capture Buffers
Two capture buffers are available, as follows:
Trip Capture Buffers - This function provides capture buffers that input internally calculated data, which is selected based
on a configuration parameter. The capture buffers can be configured (parameter NumEventScans) to capture up to 32 scans of
information for each of 18 channels. Parameter EventListSel can be used to configure the trip capture buffer to collect any one
of the following internal data:

• Time-domain sampled input data (in volts)


• Frequency-domain FFT peak-to-peak magnitude (in volts)
• FFT output data with transducer compensation (in volts)
• FFT output data with transducer compensation (in EU)
• Scan-averaged FFT output data with transducer compensation (in EU) (default)
Trip Capture Buffers are pre-triggered; meaning for a 32 scan FFT average, data is scanned 32 times before the triggered
event and none after the event. The triggered event is activated by the signal space input, TripCapReq. Running on the HMI
or OSM computer, AM Gateway software uploads the captured buffers to the computer on which the Gateway is running.

PAMC Acoustic Monitoring Diagnostic Support

User Capture Buffers - This function provides capture buffers that are only one scan in length (compared to the trip capture
with up to 32 scans). The user capture buffers can be configured using parameter OpListSel to collect any of the internal data
listed above for trip capture buffers. The AM Gateway software can upload these buffers. User capture buffers are activated
through the AM Gateway or other compatible applications. The diagram displayed above for trip capture buffers is the same
for user capture buffers except for the trigger source.

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 19


GE Internal
1.1.3 Specifications
Item Specification
Input channels 18 dynamic pressure inputs

Output channels 18 buffered outputs

Supported frame rates The PAMC monitors HDGT and LM combustion dynamics with needed frame
rate support at 25 and 100 Hz.

Gain adjustment options 1x, 2x, 4x, and 8x

Bias - minimum adjust -13.5 ±0.25 V dc

Bias - maximum adjust +13.5 ±0.25 V dc

Input accuracy from terminal point to inputs, ≤ 2.0 % of full scale = 10 V dc for Gain = 1x
SIGx (RMS calc) for passband = 0 to 5 kHz ≤ 2.0 % of full scale = 5 V dc for Gain = 2x
≤ 2.0 % of full scale = 2.5 V dc for Gain = 4x
≤ 2.0 % of full scale = 1.25 V dc for Gain = 8x
Input accuracy (dc + ac) from terminal point ≤ 0.5 % of full scale = 10 V dc for Gain = 1x
to peak-peak signal -space values through ≤ 0.5 % of full scale = 5 V dc for Gain = 2x
FFT analysis for passband = 0 to 3.2 kHz ≤ 0.5 % of full scale = 2.5 V dc for Gain = 4x
≤ 0.5 % of full scale = 1.25 V dc for Gain = 8x
Input accuracy (dc + ac) from terminal point ≤ 2.0 % of full scale = 10 V dc for Gain = 1x
to peak-peak signal -space values through ≤ 2.0 % of full scale = 5 V dc for Gain = 2x
FFT analysis for passband = 3.2 kHz to 5 ≤ 2.0 % of full scale = 2.5 V dc for Gain = 4x
kHz ≤ 2.0 % of full scale = 1.25 V dc for Gain = 8x
Input passband frequency 0 to 5 kHz
† Ambient rating for enclosure design 0 to 65°C (32 to 140 °F)

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

1.1.4 Diagnostics
The I/O module performs the following self-diagnostic tests:

• A power-up self test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the electronic ID information from the terminal board, acquisition board, and processor board ID to confirm
that the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set.
• Each input has sensor limit checking, open circuit detection, dc bias autonulling, and excessive dc bias detection. Alarms
are generated for these diagnostics.
Details of the individual diagnostics are available in the ToolboxST application. I/O block SYS_OUTPUTS, input RSTDIAG
can be used to direct all I/O modules to clear from the alarm queue all diagnostics in the normal healthy state.

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1.1.4.1 UCSA LEDs
• Power displays solid green when the internal 5 V supply is up and regulating. The PAMC converts the incoming 28 V dc
to 5 V dc. All other internal supplies are derived from the 5 V.
• Online displays solid green when the PAMC is online and running application code.
• Flash flashes amber when any flash device is being accessed. DC is not used in the PAMC application.
• Diag displays solid red when the PAMC has a diagnostic available. The diagnostic can be viewed and cleared using the
ToolboxST application.
• Link displays solid green if the Ethernet hardware interface on the PAMC has established a link with an Ethernet port.
• Act indicates packet traffic on an Ethernet interface. If traffic is low, this LED may flash but in most systems, it is on
solid.
• On displays solid green when the USB is active.
• Boot displays solid red or flashing red during the boot process.
The boot LED is lit continuously during the boot process unless an error is detected. If an error is detected, the LED flashes at
a 1 Hz frequency. While flashing, the LED is on for 500 ms and off for 500 ms. The number of flashes indicates the failed
state. After the flashing section, the LED turns off for three seconds. These are flashing codes:
1. Failed Serial Presence Detect (SPD) EEPROM
2. Failed to initialize DRAM or DRAM tests failed
3. Failed NOR flash file system check
4. Failed to load FPGA or PCI failed
5. CompactFlash device not found
6. Failed to start IDE driver
7. CompactFlash image not valid
If the CompactFlash image is valid but the runtime firmware has not been loaded, the boot LED flashes continuously at a 1
Hz rate. Once the firmware is loaded, the boot LED turns off.

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 21


GE Internal
1.1.5 Configuration

1.1.5.1 SAMB Level Configuration

Parameter Description (SAMB Level Configuration) Choices


BinReject This is the number of side bins to reject from the peak search in 0 to 6 (default: 3)
adjacent bands when a peak is detected near the band boundary. This
prevents the same peak from being detect in two adjacent bands. Zero
= no bins rejected

Config_Mode Defines the source of the currently active configuration. ToolboxST Toolbox only
allows only mode Toolbox as a selection. The remote gateway
configurator forces mode to tuning configurator without user control.

FFT_Length Defines the number of samples that are used in FFT calculation 1024, 2048, 4096, 8192,
16382, 32768
(default: 4096)

FFT_TF_SelA Boolean that selects the internal test file as the input to all acoustic HW_Input or File
monitoring channels instead of the actual analog input signals (default: HW_Input)

EventLstSel Defines the sample site for the event capture list: Avg_Out, Disable, FFT_
Disable: list not used Out, PSI_Out, Raw_Input,
FFT_Out: FFT output scaled in volts TC_Out (default: Avg_
TC_Out: FFT output after transducer compensation Out)
PSI_Out: FFT outputs scaled in PSI
Avg_Out: PSI_Out after averaging filter
Raw_Input: Input time domain data

HiB_Limit Defines the limit for the max peak-peak amplitude signal in the high 0 to 50 psi (default: 25)
frequency band

HiScrchBrkPt Defines the frequency boundary between the high and screech 0 to 5000 Hz (default: 500)
frequency bands

LoLoB_Limit Defines the limit for the max peak-peak amplitude signal in the low-low 0 to 50 psi (default: 50)
frequency band

LowB_Limit Defines the limit for the max peak-peak amplitude signal in the low 0 to 50 psi (default: 50)
frequency band

LowLow_EndPt Defines the ending frequency of the low-low frequency. The Low-Low 0 to 5000 Hz (default: 30)
Frequency Band can overlap any of the frequency bands if the following
condition is met: LowLow_EndPt /= Low_StrtPt. The Low-Low
Frequency Band can be placed before the Low Frequency Band by
setting LowLow_EndPt = Low_StrtPt. The later configuration option
allows the user to have contiguous bands from LowLow through the
Screech Band.
LowLowStrtPt Defines the starting frequency of the low-low frequency band 0 to 5000 Hz (default: 10)

LowMid_BrkPt Defines the frequency boundary between low and mid frequency bands 0 to 5000 Hz (default: 120)

Low_StrtPt Defines the starting frequency of the low band, refer to the parameter 0 to 5000 Hz (default: 30)
definition for LowLow_EndPt

MaxVoltCCSA Max sensor volts for a CCSA type sensor -30 to 30 V (default: 8.568)

MaxVoltCustm Max sensor volts for a custom type sensor -30 to 30 V (default: 5.25)

MaxVoltPCB Max sensor volts for a PCB type sensor -30 to 30 V (default: 20)

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Parameter Description (SAMB Level Configuration) Choices
MidB_Limit Defines the limit for the max peak-peak amplitude signal in the mid 0 to 50 psi (default: 50)
frequency band

MidHi_BrkPt Defines the frequency boundary between mid and high frequency bands 0 to 5000 Hz (default: 240)

MinVoltCCSA Minimum sensor volts for a CCSA type sensor -30 to 30 V (default: 8.568)

MinVoltCustm Minimum sensor volts for a custom type sensor -30 to 30 V (default: -5.25)

MinVoltPCB Minimum sensor volts for a PCB type sensor -30 to 30 V (default: -3.5)

NumEventScns Defines the number of scans an event buffer contains 1 to 100 scans (default:
32)
If the sample location is Raw_Input the max scan allowed is 1.

OpLstSel Defines sample site for spectrum on demand capture or diagnostic list: Avg_Out, Disable, FFT_
Disable: list not used Out, PSI_Out, Raw_Input,
Raw_Input: input time domain data TC_Out (default: Avg_
FFT_Out: FFT output scaled in volts Out)
TC_Out: FFT output after transducer compensation
PSI_Out: FFT outputs scaled in PSI
Avg_Out: PSI_Out after averaging filter

PL_Fil_Freq Defines the power line frequency that the notch filter removes from the 50_Hz, 60_Hz
spectral content of the FFT output (default: 60_Hz)

PL_Fil_Tol This is the power line frequency notch filter tolerance in per unit, for 0 to 1.0 (default: 0.1)
example 0.1=10%. A higher number de-sensitizes the filter so other
energy peaks near the power line frequency are also rejected.

PL_Fil_Width Defines the bandwidth of the power line notch filter. The bandwidth is ± 0 to 100 Hz (default: 0.5)
value centered about the configured power line frequency.

SampleRate Defines the FFT sample rate for all the acoustic monitoring channels 12,877 Hz only

ScanPrAvgFFT Number of scans per average in acoustic monitoring filtered FFT output 1 to 100 scans (default:
48)

ScanPrAvgRMS Number of scans per average in the RMS calculation 1 to 32 scans (default: 1)

SearchInAvg(1) – Selects whether the sort function for pk-pk amplitudes uses the present No average, Average
SearchInAvg(6) scan or an average value (default: Average)

Session_Time Scheduled time for temporary configuration mode. This time is forced to 0 only
zero in the ToolboxST entry. This value is set to the user-selected time in
the temporary gateway remote configurator.

ScrchB_Limit Defines the limit level for the maximum peak-peak amplitude signal in 0 to 50 psi (default: 50)
the screech frequency band

Scrch_EndPt Defines the ending frequency of the screech frequency band, refer to 0 to 5000 Hz (default:
the parameter description for Trns_StrtPt 3000)

T_FilWidth Width (±Hz) of the filter that excludes the transverse frequency FFT 0 to 100 Hz (default: 40)
coefficients and all FFT coefficients designated by this filter from the
screech band search, used only if Trns_Bnd_enb = enable

TMC_Gain(1) – Transducer mounting compensation gain to characterize gain response 0 to 30 (default: 1)


TMC_Gain(30)

TMC_Freq(1) – MC_ Frequency corresponding to the gain value entered 0 to 5000 Hz (default:
Freq(30) n*100)

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 23


GE Internal
Parameter Description (SAMB Level Configuration) Choices
TrnsB_Limit Defines the limit for the max peak-peak amplitude signal in the 0 to 50 psi (default: 50)
transverse frequency band

Trns_Bnd_Enb Enable and notch out frequencies around transverse band peak from Disable, Enable
screech band peak search. If transverse band is contiguous with the (default: Enable)
screech band, this is configuration is ignored. Bands other than the
screech are not affected by this function even if Trns_StrtPt and Trns_
EndPt overlap the other bands.

Trns_EndPt Defines the ending frequency of the transverse frequency band 0 to 5000 Hz (default:
1150)

Trns_StrtPt Defines the starting frequency of the transverse frequency band. The 0 to 5000 Hz (default: 950)
Transverse Frequency Band can overlap any of the frequency bands if
the following condition is met: Trns_StrtPt /= Scrch_EndPt. The
Transverse Frequency Band can be placed after the Screech Frequency
Band by setting Trns_StrPt = Scrch_EndPt. The later configuration
option allows the user to have contiguous bands from Low through the
Transverse Band which is now the highest frequency band. Refer to the
LowLow_EndPt configuration parameter definition if you desire all six
frequency bands contiguous. Note: The configuration parameter, Trns_
Bnd_Enb is a DON’T CARE when Trns_StrPt = Scrch_Endpt.

WindowSelect Selects windowing function for sampled data for Channel A and B: Rectangular
Hamming
Hanning
Triangular
Blackman
Blackman-Har(ris)
Flat Top

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GE Internal
1.1.5.2 SAMB Variable Definitions and Configuration

Sigx Analog input x – Card Point Point Edit (Input FLOAT)


Where x = 1 thr
18
Gain Analog input resolution adjustment to amplify signal before digital 1x, 2x, 4x, 8x (default: 8x)
conversion. Gain factor * (maximum signal peak voltage) must be less
than 10 V to prevent saturation.

Bias Dc bias voltage subtracted from the analog signal input for dc bias -13.5 to 13.5 (default: 0)
compensation. Only used when InputUse is custom or file.

Bias_Range Allowable deviation of dc bias used for dc bias diagnostics. Only used 0 to 10 (default: 1)
when InputUse is custom or file.

Can_Id Combustor can be wired to this terminal board signal. This normally 1 to 18 (default: 11)
corresponds to the signal number to avoid confusion; wire terminal
board signal 1 to can 1.

High_Input Defines point 2 X-axis value in mV for SAMB terminal point that is -10000 to 10000 (default:
used to calculate gain and offset for conversion to EU 170)

High_Value Defines point 2 Y-axis value in EU for SAMB terminal point that is Any positive real (default: 1)
used to calculate gain and offset for conversion from mV to EU

Selects the sensor type used on the signal. Unused (default), CCSA,
PCB, Custom, File

InputUse If the CCSA in JB1000 is used, set InputUse and the


terminal board jumpers to CCSA regardless of the
transducer manufacturer. Damage to the CCSA may
occur if the PCB jumper setting is used on the terminal
Caution board.

Low_Input Defines point 1 X-axis value in mV for SAMB terminal point that is -10000 to 10000
used to calculate gain and offset for conversion to EU

Low_Value Defines point 1 Y-axis value in EU for SAMB terminal point that is Any positive real (default: 0)
used to calculate gain and offset for the conversion from mV to EU

PCB_Probe_Gn PCB probe gain, pico-coulombs per psi 5 to 40


Used only if InputUse=PCB

PCB_AmpGain PCB amplifier gain, milli-volts per pico-coulomb 1 to 20


Used only if InputUse=PCB

PL_Fil_En Enables the power line notch filter Disable, Enable (default:
Disable)

DiagHighEnab Enables high input sensor limit diagnostics Disable, Enable (default:
Enable)

DiagLowEnab Enables low input sensor limit diagnostics Disable, Enable (default:
Enable)

BiasNullEnab Enables automatic dc bias nulling Disable, Enable (default:


Enable)

DiagOCChk Enables open sensor error diagnostic test Disable, Enable (default:
Enable)

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 25


GE Internal
Sigx Analog input x – Card Point Point Edit (Input FLOAT)
Where x = 1 thr
18
DiagBiasNull Enables excessive dc bias diagnostic test Disable, Enable (default:
Enable)

DiagSigSat Enables signal saturation diagnostic test Disable, Enable (default:


Enable)

1.1.5.3 SAMB Signal Definitions

Signal Description – Point Edit (Enter Signal Connection) Direction Type


L3DIAG_SAMB_R(S or T) Board Diagnostic active (non-voted signal) Input BIT

LINK_OK_SAMB_R(S or T) High speed serial link SL1 is communicating with BAPA Input BIT

ATTN_SAMB SAMB has an active alarm Input BIT

Test_Config PAMC is temporarily remotely configured Input BIT

Test_Mode Signals are from internal test sources, not from terminal board Input BIT

TripCapList A capture buffer triggered by TripCapReq is available Input BIT

UserCapList A capture buffer manually requested by a user is available Input BIT

Num_Of_Scans Scan (block of FFT data) number of this data (1 – 100) Input INTEGER

Num_Avg_Scns Number of scans (block of FFT data) averaged (1 – 100) Input INTEGER

Session_Tmr Time remaining for remote tuning session Input INTEGER

TripCapReq Request for trip capture buffer collection Output BIT

Can1_Health Combustor can 1 signal health Input BIT


↓ ↓

Can18_Health Combustor can 18 signal health Input BIT

FrqB1_LmtSet All cans, Low Band, Peak amplitude exceeds LowB_Limit Input BIT

FrqB2_LmtSet All cans, Mid Band, Peak amplitude exceeds MidB_Limit Input BIT

FrqB3_LmtSet All cans, Hi Band, Peak amplitude exceeds HiB_Limit Input BIT

FrqB4_LmtSet All cans, LoLo Band, Peak amplitude exceeds LoLoB_Limit Input BIT

FrqB5_LmtSet All cans, Transverse Band, Peak amplitude exceeds TrnsB_ Input BIT
Limit
FrqB6_LmtSet All cans, Screech Band, Peak amplitude exceeds ScrchB_Limit Input BIT

FrqBn_PkAmpm Peak amplitude detected in band n can m (PSI) Input Float


Where m=1-18 can number
n=1 for low band
n=2 for mid band
n=3 for hi band
n=4 for lolo band
n=5 for transverse band
n=6 for screech band

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GE Internal
Signal Description – Point Edit (Enter Signal Connection) Direction Type
FrqBn_PkHzm Peak frequency for the peak amplitude FrqBn_PkAmpm in can Input Float
m band n (Hz)

FrqBn_AmpMx Peak Amplitude detected in all cans in band n (PSI) Input Float
Where
n=1 for low band
n=2 for mid band
n=3 for hi band
n=4 for lolo band
n=5 for transverse band
n=6 for screech band
FrqBn_HzMx Peak frequency for the peak amplitude FrqBn_PkAmpMx Input Float
detected in all cans band n (Hz)

FrqBn_ChMx Can number for the peak amplitude FrqBn_PkAmpMx detected Input Float
in all cans band n
FrqBn_AmpAvg Average peak amplitude in all cans band n (PSI) Input Float

BAPA_Temptur BAPA module (plugged into terminal board) temperature (deg C) Input Float

LowLowStrtPt Starting frequency of Low-Low Band (Hz) Input Float

LowLow_EndPt Ending frequency of Low-Low Band (Hz) Input Float

Low_StrtPt Starting frequency of Low Band (Hz) Input Float

LowMid_BrkPt Breakpoint frequency between Low Band and Mid Band (Hz) Input Float

MidHi_BrkPt Breakpoint frequency between Mid Band and High Band (Hz) Input Float

HiScrchBrkPt Breakpoint between High and Screech Band (Hz) Input Float

Trns_StrtPt Starting frequency of Transverse Band (Hz) Input Float

Trns_EndPt Ending frequency of Transverse Band (Hz) Input Float

Scrch_EndPt Ending frequency of Screech Band (Hz) Input Float

FFT_Length Length of the FFT Buffer (samples) Input Float

Sample_Rate FFT Sample Rate (Hz) (Hz) Input Float

ScanPrAvgFFT Number of Scans Per Average in the FFT output Input Float

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 27


GE Internal
1.2 PAMC Specific Alarms
38
Description Flash disk error: Unable to revert to flash configuration after remote access

Possible Cause The permanent configuration data on PAMC is corrupted.

Solution

• Build and download the firmware and configuration to the PAMC.


• Replace the PAMC UCSA.

41-58
Description Sig [ ]: Open Circuit Test Failure

Possible Cause

• An open circuit for a specified terminal board signal has been detected.
• For PCB type charge amps, the terminal board signal could be shorted.

Solution

• Check the wiring and sensor.


• Replace the BAPA.
• Replace the terminal board.

61-78
Description Sig [ ]: Excessive DC Bias

Possible Cause

• Configuration does not match the sensor type.


• DC bias (DC offset) designated for the sensor type is outside the range detected for the sensor.

Solution

• Check the sensor type in the configuration parameter InputUse.


• Check the dc voltage on the signal. Refer to the PAMC documentation.

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81-98
Description Sig [ ]: Input Signal exceeds HW limit

Possible Cause The peak input voltage exceeds the HW limit for the input.

Solution

• Decrease the configuration parameter Gain for the designated signal.


• Check the sensor for issues.

101-118
Description Sig [ ]: Sensor Limit Exceeded

Possible Cause The peak input voltage exceeds the limit for the selected sensor type.

Solution

• Check the sensor type in the configuration parameter InputUse.


• Check the sensor for issues.

120
Description BAPA ADC Reference input calibration failure

Possible Cause The BAPA failed the calibration test when powered on.

Solution Replace the BAPA.

121-138
Description BAPA Chan [ ]: ADC calibration failure

Possible Cause The BAPA failed the calibration test when powered on.

Solution Replace the BAPA.

139-156
Description BAPA Chan [ ]: DAC calibration failure

Possible Cause the BAPA failed the calibration test when powered on.

Solution Replace the BAPA.

157-174
Description BAPA Chan [ ]: DC test failure

Possible Cause The BAPA failed the DC test during the manually invoked self-test.

Solution Replace the BAPA.

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 29


GE Internal
175-192
Description BAPA Chan [ ]: Analog gain test failure

Possible Cause The BAPA failed the gain test during the manually invoked self-test.

Solution Replace the BAPA.

193-210
Description BAPA Chan [ ]: AC FFT test failure

Possible Cause The BAPA failed the AC FFT test during the manually invoked self-test.

Solution Replace the BAPA.

212
Description HSSL Comm link [ ] Communication Failure, Code [ ]

Possible Cause The PAMC/UCSA cannot communicate with the remote acquisition hardware (terminal board and
BAPA) through the High-Speed Serial Link (HSSL) cable. The code indicates a specific failure type.
Common codes include:

• 51xxxxxx: Remote acquisition target returning bad id


• 52xxxxxx: Download to BAPA failed
• 53xxxxxx: Link loss detected
• 54xxxxxx: Receive packet error detected
• 55xxxxxx: Transmit packet error (excessive naks)
• 57xxxxxx: No data received from BAPA in 5 seconds

Solution

• Verify that the BAPA is connected to the SL1 connector on the PAMC UCSA.
• Check the HSSL cables. If a problem still exists, replace the PAMC UCSA module.
• Check the power on the BAPA.
• Replace the BAPA.

213
Description HSSL Comm link [ ] Initialization Failure

Possible Cause The PAMC UCSA cannot properly initialize the BAPA through the HSSL.

Solution

• Verify that the BAPA is connected to the appropriate HSSL connector on the PAMC UCSA.
• Check the HSSL cables. If a problem still exists, replace the PAMC UCSA module.
• Check the power on the BAPA.
• Replace the BAPA.

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GE Internal
214
Description HSSL Comm link [ ] Configuration Failure, Code [ ]

Possible Cause The PAMC UCSA interface to the HSSL failed to initialize properly.

Solution Replace the PAMC UCSA.

215
Description BAPA plugged into wrong SAMx connector on HSSL [ ]

Possible Cause The SAMB or SAMC connector that the BAPA is plugged into does not agree with HSSL connector
configured in the ToolboxST application.

Solution

• Verify that the HSSL cable is plugged into the PAMC UCSA SL1 connector.
• Verify that the HSSL cable is plugged into the correct BAPA.
• Verify that the SAMC/SAMB configured connections in the ToolboxST application match the BAPA connection to the
terminal board.

216
Description BICA (JA1) On Board power supply failure, expected [ ] V, read [ ] V

Possible Cause The BICA power supply failed.

Solution Replace the BICA plugged into the JA1 connector.

217
Description BICA (JB1) On Board power supply failure, expected [ ] V, read [ ] V

Possible Cause The BICA power supply failed.

Solution Replace the BICA plugged into the JB1 connector.

218
Description Bad power supply on connector P28 [ ](1=A,2=B,3=C) in charge amp junction box

Possible Cause There is no 28 volt power connected to the P28B or the P28C in the junction box.

Solution

• Parameter JuncBox is set for the wrong type.


• Verify the power supply connection to the P28B or the P28C in the junction box.
• Replace the power supply cable/connector.
• Replace the power supply.

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 31


GE Internal
219
Description Bad power supply on connector P28B or P28C in charge amplifier junction box

Possible Cause The junction box power supply is faulty.

Solution

• Parameter JuncBox is set for the wrong type.


• Verify the power supply connections to both the P28B and the P28C in the junction box.
• Replace the power supply cable/connector.
• Replace the power supply.

220
Description SAMC terminal board failure in charge amplifier junction box

Possible Cause The power supply status on the SAMC terminal board indicates an SAMC failure.

Solution Replace the SAMC in the junction box.

221
Description BICA (JA1) to BAPA communications error

Possible Cause The power supply status in the BICA is not being updated.

Solution

• Replace the BICA on the JA1 connector in the junction box.


• Replace the BAPA in the junction box.

222
Description BICA (JB1) to BAPA communications error

Possible Cause The power supply status in the BICA is not being updated.

Solution

• Replace the BICA on the JB1 connector in the junction box.


• Replace the BAPA in the junction box.

230-247
Description BAPA Chan [ ]: Anti alias rolloff test failure

Possible Cause The BAPA failed the anti-alias test during the manually invoked self-test.

Solution Replace the BAPA.

32 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
1.3 SAMB and BAPA Acoustic Monitoring Input
The Mark VIe Control Acoustic Monitoring (SAMB) terminal board is a duplex terminal board providing 18 inputs for the
Acoustic Monitoring System. The SAMB provides two terminal points per input channel for a maximum of 18 channels on
36 terminals. It also provides an additional 18 buffered outputs on 36 terminals to connect external instrumentation for
monitoring the ac voltage signal that represents the dynamic pressure signals from the combustor. SAMB includes passive
electromagnetic interference (EMI) filters to protect against very high frequency noise generated by external sources.
SAMB includes the following features:

• Eighteen signal interface channels for acoustic monitoring, supporting duplex configuration
• Channels 1 – 9 are configurable to support PCB Piezotronics constant-current charge amplifiers or charge converter
signal amplifier (CCSA) outputs. Sensor power for the PCB sensors is independent of the sensor power for channels 10 –
18.
• Channels 10 – 18 are configurable to support PCB Piezotronics constant-current charge amplifiers or CCSA outputs.
Sensor power for the PCB sensors is independent of the sensor power for channels 1 – 9.
• Eighteen buffered outputs providing ac signal content of the dynamic pressure signals without dc bias voltage
• Thirty-six Euro style box-type terminal blocks for the customer inputs
• Thirty-six Euro style box-type terminal blocks for the buffered outputs
• EMI protection for all inputs
• EMI filtered inputs fanned to the A and B slots

Note IS210BAPAH1A Analog Processor (BAPA) and the Acoustic Monitoring (SAMB) terminal board are grouped
together as an application subassembly.

1.3.1 Installation
The following figure displays the functionality of one of the 18 channels supported by the SAMB and the PAMC. The CCSA
voltage output or the PCB constant-current charge amplifiers and the buffered outputs are connected to the terminal blocks.
Refer to the SAMB Configuration section.

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 33


GE Internal
JA1/2 JB1/2

SIGx where x = 1-18 SIGx SIGx


P15a 3.6mA
S 221K P24b
CCSA PCB
150K
P28 a PCOM
RETx RETx RETx

BUFOUT1 BUFOUT 1

BUFOUT18 BUFOUT18

P28A P28B

BAPA(1) BAPA(2)

Voltage
P15X
P15 a , P28 a & P24 b Reg.
assignments per SIGx
PTC P1
x a b Voltage P28A
P24X1 P28X
1– 4 X1 X Reg.
5– 8 X2 X
9 – 12 Y1 Y
13 –18 Y2 Y Voltage
P24X2
Reg.

Jumper Configuration for SIGx PTC P2


where x= 1 -18 Voltage P28B
P24Y1 P28Y
Reg.
JPx pos. for JPx pos. for
PCB selection CCSA selection Voltage
CCSA P24Y2
CCSA Reg.
PCOM
Voltage
P15Y
PCB PCB Reg.

SAMB Acoustic Monitoring Terminal Board

Note Only a qualified GE field service technician should install the PAMC module.

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1.3.2 Operation
The SAMB inputs an ac voltage signal from the CCSA proportional to the dynamic pressure sensed by either an Endevco® or
PCB probe. SAMB also inputs the dynamic pressure directly from a PCB constant-current charge amplifier connected to a
PCB probe as an ac voltage proportional to the combustion dynamics riding on a dc bias voltage.
Each channel provides a 3.6 mA constant-current source that can be connected to SIGx (where x is the channel number) for
the PCB charge amplifiers. The jumper JPx (where x equals the channel number) is a two-pole jumper that controls the
constant-current power supply and whether RETx is tied to the power ground, PCOM. When JPx is in the CCSA position, the
constant-current is disabled and RETx is not tied to PCOM. When JPx is in the PCB position, the constant-current is
connected to SIGx, providing approximately 3.6 mA of current to power the PCB charge amplifier. The RETx line is tied to
PCOM to provide a return path for the constant-current.

1.3.2.1 BAPA Analog Processor


The BAPA analog processor includes the following features:

• Eighteen analog signal-conditioning channels


− Differential inputs
− Adjustable gains of 1x, 2x, 4x, and 8x
− Dc bias nulling
− Multiplexer to bypass signal input and apply test signal
− Anti-alias filters to support 5 kHz bandwidth
• Twenty-four A/D input channels
− Six channels per converter
− 16-bit converter
• Application FPGA
− A/D converter control
− D/A converter control
− Eighteen channels of FIR filtering
− Configuration registers
− HSSL control
• Boots FPGA with programmable read-only memory (PROM)
− Bootstrap function
− TX / RX mini-MACs
− PHY sync
• PHY0 and PHY1 physical Ethernet layers
• Power supplies
− P28 input
− P15 and N15 outputs
− P5 output
− 3.3 V, 2.5 V, and 1.2 V outputs

1.3.2.2 BAPA LEDs


The BAPA has the following LEDs:

• PWR displays solid green when 28 volt power is present.


• ATTN will display solid red for about a half second on power applied and will then go dark. If a valid serial link has been
established with the host UCSA, configuration will be downloaded to the BAPA and then the LED will display solid
green.
• Link displays solid green if the high speed serial link interface on the BAPA has established a proper link with a UCSA
serial port.
• Tx/Rx indicates packet traffic on the high speed serial link. This LED will flash green when this traffic is present.

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 35


GE Internal
1.3.3 Specifications
Item SAMB specification
Input channels 18 dynamic pressure inputs

Output channels 18 buffered outputs

Power inputs 2 P28 inputs, each with a 2-pin connector

Bias circuit P28 on each channel with < 0.2 % dc error


Dc output gain 1 ±0.5%

Allowable offset on outputs 30 mV ±10%

Output impedance 40 Ω ±50%

Test points 2 with > ±10 V dc range, < 0.5% error tolerance, and = 2.5 mV / count resolution

Size 14.3 cm high x 23.1 cm wide (5.625 in x 9.1 in)

Cooling Free air convection

Humidity 5 to 95% non-condensing

1.3.4 Diagnostics
The SAMB terminal board has its own ID device, which is interrogated by the PAMC. The board ID is coded into a read-only
chip containing the terminal board serial number, board type, revision number, and the JA4 or JB4 connector location. This
ID is checked as part of the power-up diagnostics.

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1.3.5 Configuration

1.3.5.1 Terminal Points


Use JP1-18 to select the interface configuration for the SAMB terminal point inputs. Use JPx = CCSA to connect a weak
pullup resistors to the SIGx and RETx lines. This configuration allows for an out of range voltage detection if an open-wire
occurs between the CCSA and SAMB. JPx = PCB when the PCB constant-current charge amplifier (CCCA) is connected to
the SAMB. The PCB configuration provides a 3.6 mA constant-current source to the PCB CCCA. The CCCA generates a
nominal 12 V dc bias voltage with a maximum ac peak of approximately ±5 Vpeak riding on top of the dc bias voltage.
Open-wire detection or CCCA hardware issues are detected by monitoring the bias voltage.

Terminal Channels JPx Position (Two-pole) Vendor Vendor Model Vendor I/O
Point Connection
SIGx 1– 18 CCSA: Disables constant GE Charge Converter CCSA OUT+
RETx current and does not tie Signal Amp OUT-
RETx to PCOM

SIGx 1 – 18 PCB: Enables constant PCB Piezotronics 682M57 Charge Amp Signal
RETx current and ties RETx to Ground
PCOM

PAMC Acoustic Monitoring Input Module GEH-6721_Vol_III_BG System Guide 37


GE Internal
1.3.5.2 Terminal Variables
Ch. Variable Signal Description Variable Signal Description
#
1 1 BUFOUT1 Buffered output, signal 2 SIG1 Dynamic pressure voltage, signal
3 BUFRET1 Buffered output, return 4 RET1 Dynamic pressure voltage, return

2 5 BUFOUT2 Buffered output, signal 6 SIG2 Dynamic pressure voltage, signal


7 BUFRET2 Buffered output, return 8 RET2 Dynamic pressure voltage, return

3 9 BUFOUT3 Buffered output, signal 10 SIG3 Dynamic pressure voltage, signal


11 BUFRET3 Buffered output, return 12 RET3 Dynamic pressure voltage, return

4 13 BUFOUT4 Buffered output, signal 14 SIG4 Dynamic pressure voltage, signal


15 BUFRET4 Buffered output, return 16 RET4 Dynamic pressure voltage, return

5 17 BUFOUT5 Buffered output, signal 18 SIG5 Dynamic pressure voltage, signal


19 BUFRET5 Buffered output, return 20 RET5 Dynamic pressure voltage, return

6 21 BUFOUT6 Buffered output, signal 22 SIG6 Dynamic pressure voltage, signal


23 BUFRET6 Buffered output, return 24 RET6 Dynamic pressure voltage, return

7 25 BUFOUT7 Buffered output, signal 26 SIG7 Dynamic pressure voltage, signal


27 BUFRET7 Buffered output, return 28 RET7 Dynamic pressure voltage, return

8 29 BUFOUT8 Buffered output, signal 30 SIG8 Dynamic pressure voltage, signal


31 BUFRET8 Buffered output, return 32 RET8 Dynamic pressure voltage, return

9 33 BUFOUT9 Buffered output, signal 34 SIG9 Dynamic pressure voltage, signal


35 BUFRET9 Buffered output, return 36 RET9 Dynamic pressure voltage, return

10 37 BUFOUT10 Buffered output, signal 38 SIG10 Dynamic pressure voltage, signal


39 BUFRET10 Buffered output, return 40 RET10 Dynamic pressure voltage, return

11 41 BUFOUT11 Buffered output, signal 42 SIG11 Dynamic pressure voltage, signal


43 BUFRET11 Buffered output, return 44 RET11 Dynamic pressure voltage, return

12 45 BUFOUT12 Buffered output, signal 46 SIG12 Dynamic pressure voltage, signal


47 BUFRET12 Buffered output, return 48 RET12 Dynamic pressure voltage, return

13 49 BUFOUT13 Buffered output, signal 50 SIG13 Dynamic pressure voltage, signal


51 BUFRET13 Buffered output, return 52 RET13 Dynamic pressure voltage, return

14 53 BUFOUT14 Buffered output, signal 54 SIG14 Dynamic pressure voltage, signal


55 BUFRET14 Buffered output, return 56 RET14 Dynamic pressure voltage, return

15 57 BUFOUT15 Buffered output, signal 58 SIG15 Dynamic pressure voltage, signal


59 BUFRET15 Buffered output, return 60 RET15 Dynamic pressure voltage, return

16 61 BUFOUT16 Buffered output, signal 62 SIG16 Dynamic pressure voltage, signal


63 BUFRET16 Buffered output, return 64 RET16 Dynamic pressure voltage, return

17 65 BUFOUT17 Buffered output, signal 66 SIG17 Dynamic pressure voltage, signal


67 BUFRET17 Buffered output, return 68 RET17 Dynamic pressure voltage, return

18 69 BUFOUT18 Buffered output, signal 70 SIG18 Dynamic pressure voltage, signal


71 BUFRET18 Buffered output, return 72 RET18 Dynamic pressure voltage, return

38 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
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2 PCAA Core Analog Module
2.1 PCAA Core Analog I/O Pack
The Core Analog PCAA and optional Core Analog TCAT terminal board provide a
large portion of the analog signal I/O required to operate a gas turbine. The PCAA and
TCAT provide thermocouple inputs, 4-20 mA current loop I/O, seismic inputs, Linear
Variable Differential Transformer (LVDT) excitation and inputs, pulse rate inputs, and
servo coil outputs. The PCAA can be applied in simplex, and TMR systems. A single
TCAT terminal board fans signal inputs to one or three connected PCAA modules. The
shield ground and 24 V field power terminals on an adjacent JGPA board supplement
the terminals on the PCAA and TCAT.

The PCAA contains a BPPx processor board, two application I/O boards, and a TCAS
terminal board. The complete module is regarded as the least replaceable unit. There is
no support provided to diagnose or replace the individual boards making up the module.

Input to the module is through dual RJ-45 Ethernet connectors and 28 V dc power
connector P5. Field device I/O is through 120 Euro style box-type terminal blocks on
the module edge. Power for a JGPA board is through connector P4. Module connection
to TCAT is through two 68-pin cables on connectors P1 and P2.

2.1.1 Compatibility
The PCAA includes one of the following compatible processor boards:

• The PCAAH1A contains a BPPB processor board.


• The PCAAH1B contains a functionally compatible BPPC that is supported with ControlST* software suite V04.04 and
later.

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 39


GE Internal
The following table defines the redundancy, hardware form, number of IONet connections, maximum frame rate, and TCAT
terminal board configurations that are permissible for the PCAA.

PCAA Hardware IONet Frame TCAT Comments


Quantity Form Connec- Rate Connections
tions
Simplex H1A Two 40 ms Zero or One TCAT Optional on Simplex applications

Simplex H1A One 10 ms Zero or One Only one IONet at 10 ms frame rates for H1A

Simplex H1B One or Two 10 ms Zero or One PCAAH1B supports 10 ms and dual networks

TMR H1A Two 40 ms One ** If configured as TMR pack dual network


(TPDN), PCAAH1A is limited to 40 ms.

TMR H1A One 10 ms One At 10 ms, PCAAH1A supports only 1 network


connection for TMR configurations.

TMR H1B One or Two 10 ms One ** If configured as TMR pack dual network
(TPDN) at 10 ms, all three modules must be
H1B.
** Normal TMR configurations (TPTN) will have one network per PCAA. TMR pack Dual network (TPDN) configurations will
have dual networks connected on the T PCAA. Refer to GEH-6271 Volume I, Chapter 2 System Architecture, the section
Redundancy Options, for more information.

2.1.1.1 Signals
The signals on the PCAA are separated into two groups. Signal inputs that can be fanned from a single input into a simplex or
TMR PCAA modules are routed through the TCAT terminal board. Signals that are dedicated to a single PCAA module are
wired to the terminals on PCAA. This creates the signal split displayed in the following table. It is possible to use PCAA
without TCAT if the fanned inputs are not required.

PCAA Terminals TCAT Terminals


# Signals Signal Type Screws/Signal # Signals Signal Type Screws/Signal

25 Thermocouples 2 12 Fanned seismic inputs 2

10 Analog 4-20 mA inputs 2 24 Fanned analog 4-20 mA inputs 2

2 Analog 4-20 mA or ±10 V in 2 12 24 V output power at 25 mA 1

2 Analog 4-20 mA outputs 2 3 Voting 4-20 mA outputs 2

1 ±12 V power output 2 12 Fanned LVDT Feedback 2

6 LVDT Excitation outputs 2 2 Fanned Mag. Pulse Rate Inputs 2


(servo flow meter)

6 Servo coil driver outputs 3 1 Common connection 1

1 Servo suicide relay input 2

2 TTL pulse inputs+power 4

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PCAA Core Analog

PCAA-TCAT Connection Diagram - Simplex (PCAA cover omitted to display board relationship)

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 41


GE Internal
PCAA-TCAT Connection Diagram - TMR (PCAA cover omitted to display board relationship)

2.1.2 Installation
➢ To install the PCAA module
1. Securely mount the PCAA module.
2. Connect the JGPA power connection to the P4 connector on PCAA.
3. Connect the PCAA module to an optional associated TCAT terminal board using two 68-pin cables on connectors P1 and
P2. Connectors on TCAT are paired by a network connection. PR1 and PR2 go to a PCAA connected to the R controller
network, PS1 and PS2 go to a PCAA connected to the S controller, and PT1 and PT2 go to a PCAA connected to the T
controller. It is important to fully seat the cable mounting screws, finger-tight only, into PCAA and TCAT to ensure
proper cable grounding. Failure to secure the cables may result in an inability of PCAA to read the electronic ID on
TCAT and may reduce the quality of other signals.

Note When removing 68-pin cables, ensure that the hex posts in the board-mounted connectors do not turn when backing
out the cable thumbscrews.

4. Plug in one or two Ethernet cables depending on the system configuration. When a single IONet connection is used, the
module operates correctly over either port. If dual connections are used, standard practice is to hook ENET1 to the
network associated with the R controller. However, the PCAA is not sensitive to Ethernet connections, and negotiates
proper operation over either port. If TMR PCAA modules are present, the network connection should match with the
connection made to TCAT. For example, the PCAA module with R IONet connection should have cables that go to the
TCAT PR1 and PR2 connectors.

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5. Check grounding of the JGPA shield wire terminals. In most applications, JGPA shield ground terminals are electrically
tied to the sheet metal the board is mounted on. The mounting then supplies the ground path for the terminals. In some
applications, it is required to define a shield ground that is independent of the mounting sheet metal. For these
applications, the JGPA is mounted using hardware that isolates the board from the sheet metal. In these applications, it is
important to provide a suitable ground wire between one or more JGPA terminals and the required shield ground
potential.
6. Apply power to the module through the P5 connector and check the power and Ethernet status indicator lights.
7. Use the ToolboxST* application to configure the PCAA as necessary. For more information, refer to GEH-6700,
ToolboxST User Guide for Mark VIe Control.

2.1.2.1 Connectors
• Connectors P1 and P2 provide cable connections to a TCAT terminal board.
• An RJ-45 Ethernet connector named ENET1 on the module side is the primary system interface.
• A second RJ-45 Ethernet connector named ENET2 on the module side is the redundant or secondary system interface.
• A 3-pin power connector P5 on the module is the input point for 28 V dc power for the module and terminal boards.
• A power connector P4 on the module provides 28 V dc power to a JGPA board located for wire shield termination.

Note The module operates from a power source that is applied directly to the module P5 connector, not through the normal
power connector located on the processor board.

2.1.2.2 Wiring
The PCAA module features 120 pluggable Euro style box-type terminal blocks. A JGPA board mounts adjacent to the PCAA
module and uses Euro style box-type terminal blocks to provide forty-eight shield termination points (green) plus twelve 24 V
dc output terminals (orange) for 4-20 mA transmitters. The Euro-style box terminals on TCAT accept conductors with the
following characteristics:

TCAT Conductors
Conductor Type Minimum Maximum
Conductor cross section solid 0.2 mm² 2.5 mm²
Conductor cross section stranded 0.2 mm² 2.5 mm²
Conductor cross section stranded, with ferrule without plastic sleeve 0.25 mm² 2.mm²

Conductor cross section stranded, with ferrule with plastic sleeve 0.25 mm² 2.5 mm²

Conductor cross section AWG/kcmil 24 AWG 12 AWG


2 conductors with same cross section, solid 0.2 mm² 1 mm²
2 conductors with same cross section, stranded 0.2 mm² 1.5 mm²
2 conductors with same cross section, stranded, ferrules without plastic sleeve 0.25 mm² 1 mm²

2 conductors with same cross section, stranded, TWIN ferrules with plastic sleeve 0.5 mm² 1.5 mm²

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 43


GE Internal
TCAS Screw Terminal Assignments

Name Function Name Function


1 TC1H Thermocouple1 3 TC2H Thermocouple2
2 TC1L 4 TC2L
5 TC3H Thermocouple3 7 TC4H Thermocouple4

6 TC3L 8 TC4L

9 TC5H Thermocouple5 11 TC6H Thermocouple6


10 TC5L 12 TC6L
13 TC7H Thermocouple7 15 TC8H Thermocouple8
14 TC7L 16 TC8L
17 TC9H Thermocouple9 19 TC10H Thermocouple10
18 TC9L 20 TC10L
21 TC11H Thermocouple11 23 TC12H Thermocouple12
22 TC11L 24 TC12L
25 TC13H Thermocouple13 27 TC14H Thermocouple14
26 TC13L 28 TC14L
29 TC15H Thermocouple15 31 TC16H Thermocouple16
30 TC15L 32 TC16L
33 TC17H Thermocouple17 35 TC18H Thermocouple18
34 TC17L 36 TC18L
37 TC19H Thermocouple19 39 TC20H Thermocouple20
38 TC19L 40 TC20L
41 TC21H Thermocouple21 43 TC22H Thermocouple22
42 TC21L 44 TC22L
45 TC23H Thermocouple23 47 TC24H Thermocouple24
46 TC23L 48 TC24L
49 TC25H Thermocouple25 51 TFH1 TTLpulserate input #1
50 TC25L 52 TFL1
55 TFH2 TTLpulserate input #2 53 TFPWR1
56 TFL2 54 TFL1
57 TFPWR2 59 ASIH1 Analog 4-20 mA input #1
58 TFL2 60 ASIL1
61 ASIH2 Analog 4-20 mA input #2 63 ASIH3 Analog 4-20 mA input #3
62 ASIL2 64 ASIL3
65 ASIH4 Analog 4-20 mA input #4 67 ASIH5 Analog 4-20 mA input #5
66 ASIL4 68 ASIL5
69 ASIH6 Analog 4-20 mA input #6 71 APWRP12 ±12 V power output
70 ASIL6 72 APWRN12

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TCAS Screw Terminal Assignments

Name Function Name Function


73 ASIH7 Analog 4-20 mA input #7 75 ASIH8 Analog 4-20 mA input #8
74 ASIL7 76 ASIL8
77 ASIH9 Analog 4-20 mA input #9 79 ASIH10 Analog 4-20 mA input #10
78 ASIL9 80 ASIL10
81 ASIH11 Analog 4-20 mA ±10 V input #11 83 ASIH12 Analog 4-20 mA ±10 V input #12
82 ASIL11 84 ASIL12 Note Odd-Even Terminal Grouping

85 ASOH1 Analog 4-20 mA Output #1 87 ASOH2 Analog 4-20 mA Output #2

86 ASOL1 88 ASOL2
89 SVO1L Servo Output #1 and #2. 95 SVO3L Servo Output #3 and #4.
90 SVO2L Note Odd-Even Terminal Grouping 96 SVO4L Note Odd-Even Terminal Grouping

91 SVO1H 97 SVO3H
92 SVO2H 98 SVO4H
93 SVO1X 99 SVO3X
94 SVO2X 100 SVO4X
101 SVO5L Servo Output #5 and #6. 107 SVRL1 Servo Suicide Relay Input
102 SVO6L Note Odd-Even Terminal Grouping 1 108 SVRL2
103 SVO5H 109 LVDTEXH1 LVDT Excitation Output #1
104 SVO6H 110 LVDTEXL1
105 SVO5X 111 LVDTEXH2 LVDT Excitation Output #2
106 SVO6X 112 LVDTEXL2
113 LVDTEXH3 LVDT Excitation Output #3 115 LVDTEXH4 LVDT Excitation Output #4
114 LVDTEXL3 116 LVDTEXL4
117 LVDTEXH5 LVDT Excitation Output #5 119 LVDTEXH6 LVDT Excitation Output #6

2.1.3 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Module Alarms

Note Auto-Reconfiguration is not available with the PCAA module.

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 45


GE Internal
2.1.3.1 Connectors
• Connectors P1 and P2 provide cable connections to a TCAT terminal board.
• An RJ-45 Ethernet connector named ENET1 on the module side is the primary system interface.
• A second RJ-45 Ethernet connector named ENET2 on the module side is the redundant or secondary system interface.
• A 3-pin power connector P5 on the module is the input point for 28 V dc power for the module and terminal boards.
• A power connector P4 on the module provides 28 V dc power to a JGPA board located for wire shield termination.

Note The module operates from a power source that is applied directly to the module P5 connector, not through the normal
power connector located on the processor board.

2.1.3.2 Module Design


The PCAA module consists of four separate circuit boards in a single physical assembly. The module is regarded as the least
replaceable unit because of the difficulty of isolating a failure to a single board. The module is not designed for replacement
of individual boards.

46 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
PCAA Board Relationship Diagram

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 47


GE Internal
2.1.3.3 BCAA and BCAB Analog Application Boards
The BCAA is the main printed circuit board in the PCAA module. This board provides the main ±15 V power and the
majority of the digital and analog interface to the processor board. In addition, this board provides the signal conditioning
required to interface 12 LVDT sensors, five 4-20 mA and six servo outputs, and two TTL flow sensors to the processor board.
The BCAB interface board provides the signal conditioning required to interface the thermocouples, 4-20 mA inputs, pulse
rate flow sensors and vibration inputs to the control electronics.

Note Inside the module cover the BCAA and BCAB boards provide power, analog signal conditioning, and analog/digital
conversion.

BCAA Block Diagram

48 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
BCAB Block Diagram

2.1.3.4 TCAS Terminal Board


The IS200TCAS terminal board provides the customer terminals and signal routing into the BCAA and BCAB boards. TCAS
accepts bulk 28 V control power through the P5 connector. It then provides the power through connector P4 to a JGPA board
in the input cable shield termination location. TCAS provides the P1 and P2 68 pin connectors for IS200TCAT terminal board
cables. Internal to the module the TCAS terminal board routes signals to connectors for the BCAA and BCAB analog
processing boards.

Note Refer to the table, TCAS Screw Terminal Assignments for more information.

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 49


GE Internal
2.1.3.5 Signal Response
For each signal type an accuracy specification is listed that includes all effects such as aging, temperature, power supply input
variation, and product variation. For each signal type a typical accuracy at 25ºC with mean and standard deviation is also
listed. This typical accuracy is similar to the accuracy that can be expected in normal operation while the specified accuracy is
an absolute worst case limit on the signal accuracy.

2.1.3.6 Thermocouples
PCAA supports the following thermocouple types and temperature ranges:

Type Range °F Range °C


E -60 to 1150 -51 to 621
J -60 to 1500 -51 to 816
K -60 to 2000 -51 to 1093
T -60 to 750 -51 to 399
S 0 to 3200 -17.78 to 1760

Note The units (°C or °F) are based on the ThermCplUnit settings. Refer to the Configuration, ThermCplUnit Parameter
section.

A single cold junction is provided with each PCAA module. The module accepts a controller backup cold junction value,
CJBackup, in the event a problem is detected with the local sensor. The PCAA may be configured to use a controller provided
remote cold junction value, CJRemote. All thermocouple inputs are biased with a dc voltage that will drive the temperature
signal full scale negative if an open wire occurs. Accuracy exceeds ±0.1% of full scale over the full specified operating
temperature of PCAA. Typical measured mean accuracy at 25ºC is ±0.01% with a standard deviation of 0.016%. Primary
source of temperature drift for thermocouple inputs is a precision calibration reference rated at 0.0008%/ºC worst case.

2.1.3.7 4-20 mA Inputs


PCAA meets the specification of ±0.25% for 4-20 mA inputs, ±0.5% for voltage inputs over the full PCAA operating
temperature range. Typical measured mean current input accuracy at 25ºC is ±0.05% with a standard deviation of 0.016%.
Primary source of temperature drift for analog inputs is a precision calibration reference rated at 0.0008%/ºC worst case.

Note Analog inputs 11 and 12 may also be configured as voltage inputs. In support of sensors on legacy systems a single
±12 V power supply output is provided on PCAA with rating of 50 mA.

All inputs have a jumper to select grounded or floating measurements. When the Open/GND jumper is in the Open position
the input accepts a maximum of 7 volts common mode relative to the PCAA ground. As a group, it is possible to specify an
upper and lower current level for a valid input. Each input may then be individually configured to produce a diagnostic when
current is outside the specified limits. Analog Inputs 11 and 12 are typically used as P2 pressure inputs for the Speed Ratio
Valve.

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2.1.3.8 4-20 mA Outputs
Typical measured mean accuracy at 25ºC is ±0.1% with standard deviation of 0.11%. The two outputs on PCAA behave as
typical simplex analog outputs. The three outputs on TCAT, when driven from triple PCAA modules, exhibit full fault
tolerance. An output failure on one of the three PCAA modules results in a very short disturbance to the output with full
recovery to the commanded value. All five analog outputs are provided with independent read-back of the output current and
an output relay. If incorrect operation of the output is detected, the relay is automatically opened to protect the connected
device against excessive output current. All analog output circuits have greater than 18 V output drive capability.

2.1.3.9 Seismic Inputs


TCAT seismic inputs are biased with a small dc current for open wire detection. Inputs go through a high-pass filter at 4 Hz
and low pass filter at 600 Hz. The filtered signal goes through an RMS conversion followed by a 1 Hz filter. The result is
sampled and used to perform a calculation to determine inches per second peak vibration. In parallel with the primary signal
path, the inputs are monitored for the presence of dc voltage to drive the annunciation of a failed or open sensor. PCAA meets
accuracy of ±2% over the full PCAA operating temperature range. Typical measured mean seismic input accuracy at 25ºC is
±0.02% with standard deviation of 0.25%.

2.1.3.10 LVDT
Each of six excitation outputs provides a 7 V rms, 3.2 kHz sine wave and is capable of driving 60 mA. Input sampling takes
place at 100 Hz. PCAA meets LVDT input voltage accuracy of ±1% over the full range of operating temperature and load
impedances. Typical measured mean accuracy at 25ºC is ±0.07% with standard deviation of 0.05%. Position feedback
accuracy in the PCAA is dominated by initial calibration quality and any drift experienced in the circuits after calibration. In
PCAA, drift is determined by the precision voltage reference used for internal circuit calibration, rated for 0.0008%/ºC worst
case temperature drift and almost no measurable aging.
LVDT signal conditioning on the PCAA uses the measured value of excitation voltage to correct for excitation changes. One
PCAA module may be providing excitation on an LVDT that is being read by all three PCAA modules in a TMR set.
Application blockware must be provided to pass the excitation voltage monitor inputs, ServoExcitMonitor_R,
ServoExcitMonitor_S, ServoExcitMonitor_T to the ExcMon_fromR and ExcMon_fromS and ExcMon_fromT outputs
through the Move block function.

2.1.3.11 Pulse Inputs


The Mark VIe control system uses shaft speed inputs on the PTUR and the PPRO, and flow inputs on the PSVO. The PCAA
is intended for use with the PTUR and the PPRO, so it does not include shaft speed inputs. The PCAA includes two TTL (5v
active) pulse rate inputs with output power. The TCAT has two fanned magnetic pulse rate inputs. All inputs are for flow
measurements associated with servo regulation and work up to 20,000 Hz.

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 51


GE Internal
2.1.3.12 Servo Outputs
Servo output features in the PCAA module include:

• Six output drivers capable of full scale output of 10 mA.


• Regulators run at 100 Hz
• Servo output accuracy ±3.5%
• Two of the six outputs can be tied to an output signal from a PPRO or PTUR, which removes output drivers and biases
the output closed if a trip occurs.
PCAA implements four regulator types. The Speed Ratio Valve (SRV) regulator in the PCAA is an enhanced version of the
SRV control in the Mark VI product. The PCAA provides support for both the outer P2 pressure loop and the inner position
loop. The PCAA can run both loops at 100 Hz compared to 200 Hz for the PSVO’s inner position loop and 25 Hz for the
controller’s outer P2 loop.
Output current range is fixed at 10 mA. PCAA meets a servo output accuracy of ±3.5% of full scale over the full range of
operating temperature and load impedance. Typical measured mean accuracy at 25ºC is ±0.5% with standard deviation of
0.07%.
To allow continuous movement of the servo system to avoid sticking, PCAA features adjustable amplitude dither with
frequency selected to be 50 Hz, 25 Hz, 16.67 Hz, 12.5 Hz, and 8.13 Hz.
The first two servo outputs are equipped with an output shut down relay. Terminals 107 and 108 must be disconnected for
servo 1 and 2 to be enabled. If terminals 107 and 108 are shorted together, the servo driver is disconnected from the output
terminals and a passive circuit biases the servo closed. This feature is used when it is required to include servo action in a
control protective response. The TREG K4CL relay is often used for this purpose in simplex systems. If protective action is
not needed on these servos, leave terminals 107 and 108 open. Servos three through six are not affected by the shutdown relay
action.

2.1.3.13 Calibrate Valve Function


The calibration of LVDTs associated with PSVO, PSVP, PCAA, or PMVE (MVRA or MVRF) servos is required when a new
terminal board is used on a system. The controller saves the barcode of the terminal board and compares it to the current
terminal board during reconfiguration load time. Any time a recalibration is saved, it updates the barcode name to the current
board.

Note Refer to the ToolboxST User Guide for Mark Controls Platform (GEH-6700), the chapter Special I/O Functions. the
section Calibrate Valve Function.

52 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
2.1.4 PCAA Specifications
Item PCAA Specification
Number of Inputs 25 thermocouple inputs
Ten 4-20 mA inputs
Two 4-20 mA or ±10 V configurable inputs
Two active pulse rate inputs
One servo coil suicide relay input – first two servo outputs

Number of Outputs PCAA I/O pack


Six servo coil driver outputs
Two 4-20 mA outputs
One ±12 V dc power output
Six LVDT excitation outputs

JGPA board
Twelve 24 V power outputs for 4-20 mA transmitters

Power supply input voltage 28 V dc ±5%

Size 33.02 cm high x 17.8 cm wide (13 in x 7 in)

Technology Surface-mount
† Ambient rating for enclosure design PCAAH1B is rated from -40 to 70ºC (-40 to 158 ºF)
PCAAH1A is rated from -30 to 65ºC (-22 to 149 ºF)

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 53


GE Internal
Signal Accuracy
Thermocouple inputs PCAA ±0.10% including all sources of error for a full scale range of
Type E, J, K, S and T are supported -13.8 to +45.5 mV
±0.06% typical at 25ºC

Analog 4-20 mA inputs PCAA and TCAT ±0.25% including all sources of error
±0.10% typical at 25ºC

Analog 0-10 V dc inputs PCAA ±0.50% including all sources of error


±0.20% typical at 25ºC

Pulse rate inputs TCAS 2-20 khz with accuracy of .05% of reading

Flow rate inputs TCAS 2-20 khz with accuracy of .05% of reading

Seismic inputs with a range of ± 1.5 V TCAT ±2.00% including all sources of error
peak ±0.90% typical at 25ºC

LVDT 0-7.07 V rms input TCAT ±1.00% including all sources of error
±0.25% typical at 25ºC

LVDT 0-7.07 V rms excitation monitor PCAA ±1.00% including all sources of error
input ±0.55% typical at 25ºC

LVDT excitation output PCAA 7 V ac RMS ±5.00% including all error sources, ±3.00% typical
at 25ºC
LVDT position calculation uses monitor 3.2 kHz output sine wave frequency.
value, not excitation output 60 mA output drive current capability.

Servo driver output, range of ± 10 mA PCAA ±3.50% including all sources of error
±0.70% typical at 25ºC

Analog 4-20 mA output PCAA and TCAT ±0.75% including all sources of error
±0.43% typical at 25ºC

24 V Power output JGPA and TCAT 24 V dc ±0.5% over current ranges of 0 to 25 mA.

54 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
2.1.5 Diagnostics
The module performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set
• As a group, the 4-20 mA analog inputs have a specified high and low current range for a valid signal. If a signal falls
outside the specified range, the signal health is declared to be bad.
• The analog input hardware includes precision reference voltages in each scan. Measured values are compared against
expected values, and are used to confirm the health of the analog to digital converter circuits. If the reference value does
not fall within a defined range, an alarm is generated to indicate a potential problem with signal accuracy.
• Analog output current is sensed on the terminal board using a small burden resistor. The pack conditions this signal and
compares it to the commanded current to confirm the health of the digital to analog converter circuits.
• The analog output suicide relay is continuously monitored for agreement between commanded state and feedback
indication.
• Thermocouple circuits are biased with a small dc current. If a thermocouple circuit opens, the temperature signal goes to
a full-scale negative reading.
• Seismic input circuits are biased with a small dc current. If a seismic sensor circuit opens, an alarm is generated and the
signal health is set to indicate a problem.
Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be individually
latched, and then reset with the RESET_DIA signal if they go healthy.

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 55


GE Internal
2.1.6 Configuration

2.1.6.1 Analog Input


The PCAA is able to interface to several different types of 4-20 mA transmitters. Each input has a jumper next to the
terminals that is used to determine if the return terminal is grounded or floating. The default position of the jumper is floating
or open. The JGPA board provides twelve 24 V dc terminals, one for each 4-20 mA transmitter input.

The last two 4-20 mA inputs on PCAA feature an additional jumper that removes the 250 Ω burden resistor for ±10 V dc
input applications. When the jumper is in the MA position, the input behaves the same as the first ten inputs. When the
jumper is in the VOLT position the burden resistor is removed and the input acts as a voltage input.

56 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
Analog Input Jumper Summary

Jumper Pos 1-2 Pos 2-3 Notes


JP1 OPEN GND Analog In 1

JP2 OPEN GND Analog In 2

JP3 OPEN GND Analog In 3

JP4 OPEN GND Analog In 4

JP5 OPEN GND Analog In 5

JP6 OPEN GND Analog In 6

JP7 OPEN GND Analog In 7

JP8 OPEN GND Analog In 8

JP9 OPEN GND Analog In 9

JP10 OPEN GND Analog In 10

JP11 OPEN GND Analog In 11

JP12 OPEN GND Analog In 12

JP13 MA VOLT Analog In 11

JP14 MA VOLT Analog In 12

2.1.6.2 Servo Output


Correct position selection for servo configuration jumpers are listed under each servo regulator type.

Jumper Pos 1-2 Pos 2-3 Notes


JP15 TMR Simplex Servo1 output select

JP16 TMR Simplex Servo2 output select

JP17 TMR Simplex Servo3 output select

JP18 TMR Simplex Servo4 output select

JP19 TMR Simplex Servo5 output select

JP20 TMR Simplex Servo6 output select

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 57


GE Internal
2.1.6.3 ThermCplUnit Parameter
The ThermCplUnit parameter affects the native units of the controller application variable. It is only indirectly related to the
tray icon and associated unit switching capability of the HMI. This parameter should not be used to switch the display units of
the HMI.

Do not change the ThermCplUnit parameter in the ToolboxST application because


these changes will require corresponding changes to application code and to the
Format Specification or units of the connected variable. This parameter modifies the
actual value sent to the controller as seen by application code. Application code that is
written to expect degrees Fahrenheit will not work correctly if this setting is changed.
Caution External devices, such as HMIs and Historians, may also be affected by changes to this
parameter.

2.1.6.4 Position Valve Servo System


The Position Valve Servo system is used to control the Gas Control Valves (GCV) on the fuel skids of heavy-duty gas
turbines and the Inlet Guide Vanes (IGV) on the compressor of the heavy-duties. Refer to the diagram Position Valve Servo
System.
GCV or guide vane position is fed back to the digital position regulator in the PCAA using LVDT sensors. The TCAS
terminal board provides the six LVDT excitation signal pairs: LVDTEXH1_R/LVDTEXL1_R through LVDTEXH6_
R/LVDTEXL6_R. These excitation outputs are connected to the primary-side of the LVDT position sensor. The primary-side
signal is a 3.2 kHz sine wave excitation with a 7.07 V RMS amplitude. The LVDT secondary-side signal amplitude is
proportional to the position change in the valve. The LVDT secondary-side is connected to one of the twelve TCAT terminal
board LVDT input signal pairs: LVDT1H/LVDT1L through LVDT12H/LVDT12L. The TCAT terminal board is used to fan
the LVDT signal pair to the TMR PCAA set: PCAA (R), PCAA (S) and PCAA (T) through cabling. The BCAA acquisition
board provides signal conditioning to convert the RMS voltage from the secondary-side of the LVDT to a dc equivalent signal
read by the processor through analog-to-digital (A/D) converters.
The PCAA firmware can run up to six independent digital servo regulators. Each loop is performed at a 100 Hz sample rate.
Details of the Position digital regulator are covered in the next section. The digital regulator output, ServoCurrentRef is
written to a digital-to-analog (D/A) converter. The negated output of the D/A is the current command for the analog current
regulator.
The BCAA acquisition board has six analog current regulators, one per digital servo regulator. All six analog current
regulators are rated for 10 mA only. Each current output provides an internal suicide protection relay controlled by the PCAA
firmware. Each of the six servo outputs supports either three-coil servos or two-coil servos and each provides a jumper on the
TCAS terminal board to configure the output.
The jumper is placed in the TMR position for the 3-coil servo and placed in the opposite position for the 2-coil servo. For
example, for the 3-coil servo using Servo output 1:

• TCAS SVO1H_R/SVO1L_R outputs are connected to coil 1. TCAS-R J15 is placed in the 1-2_TMR position.
• TCAS SVO1H_S/SVO1L_S outputs are connected to coil 2. TCAS-S JP15 is placed the 1-2_TMR position.
• TCAS SVO1H_T/SVO1L_T outputs are connected to coil 3. TCAS-T JP15 is placed in the 1-2_TMR position.
For the simplex 2-coil servo connection, TCAS SVO1H_R/SVO1L_R outputs are connected to coil 1 and SVO1X_
R/SVO1L_R outputs are connected to coil 2. TCAS-R JP15 is placed in the 2-3_Simplex position.
Servo outputs 1 and 2 also provide a means to externally suicide the outputs through the TCAS inputs SVRL1/2. For the
Mark VIe, the PPRO provides an external contact connected across SVRL1 and SVRL2. If the contact closes, the K1 relay is
energized and the servo output is isolated from the digital regulator control, providing a direct connection through a current
limiting resistor (15 mA fixed output), as long as the K1 relay is energized.

58 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
Position Valve Servo System

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 59


GE Internal
2.1.6.5 Digital Servo Regulator_Position
The digital Position regulator is a proportional regulator generating a servo current command proportional to the error signal,
the difference between the position reference from the controller and the valve position feedback. Refer to the diagram Digital
Servo Regulator_Position.
Three feedback options are supported: Single position feedback, dual position feedbacks or three position feedbacks.

• Setting PositionInput1 equal to one of the twelve LVDT inputs can configure the single position feedback option.
• The dual feedback option is selected when the configuration parameters, PositionInput1 and PositionInput2 are assigned
to different LVDT inputs.
• The three feedback option is enabled by setting each of the following configuration parameters to a unique LVDT input:
PositionInput1, PositionInput2 and PositionInput3.
Each of the enabled position inputs run through a Position Calculation function that converts the dc volts signal representing
RMS volts to a valve position in percent where 0% represents fully closed and 100% represents a fully open valve.
The Position Limit function’s input is the following based on the configuration:

• Equal to the Position Calculation output for a single position feedback.


• Equal to the maximum select from two Position Calculation outputs for the dual position input configuration.
• Equal to the median select for the three position input configuration. The Position Limit function checks the feedback
range of Reg#_Fdbk. The range defined in percent over nominal is configurable using the parameter, Fdbk_Suicide. The
suicide only works if it is enabled by EnabPosFbkSuic.
In the next figure, the proportional regulator error, is equal to the position reference command from the controller, Reg#Ref
minus the position feedback, Reg#_Fdbk. Proportional regulator error is multiplied by a composite gain defined by the
multiplication of the configuration parameter, RegGain and the controller output, Reg#_GainAdj. The product of the gain and
position error defines a current in percent. The amount of current required to negate the spring force used to close the valve if
the servo fails is compensated by the configuration parameter, RegNullBias. The controller system output, Reg#_NullCor is
used to correct the null bias value when one of the TMR servos is suicided. The resultant output from the proportional
position regulator is a current command in percent with the Monitor variable name, CurrentOutputCmd.
After the initial configuration setting is made for the position loop, the user calibrates the position valve feedbacks. This is
done by using ToolboxST to select the LVDT calibration mode and setting the controller output CalibEnab# equal to TRUE.
In the calibration mode, the user can use the servo output in the open-loop mode to force the valve to the fully closed position
and also to the fully open position. During the calibration mode, the PCAA assigns the RMS voltage that represents the open
and closed position to the configuration parameters for each LVDT that is used: MinVrms and MaxVrms. The user selects
Calibrate and Save to store the LVDT Excitation output voltage in the LVDT configurable parameter ExcitMonCal. The
excitation voltage is used to compensate for excitation voltage changes during runtime. The user must also verify that the
LVDT parameter ExcitSelect comes from the proper Excitation voltage source (R, S, or T).

60 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
I/O Configuration
PositionInput1 Reg_GainAdj_Enab
PositionInput 2 RegNullBias
RegType
PositionInput3 RegGain

LVDT1
Select 1 if PositionInput 1 only used.
LVDT2 Select 2 if PositionInput 1 & PositionInput 2 used. Reg#_GainAdj
LVDT3 Select 3 if PositionInput 1, PositionInput 2 & PositionInput 3 used. (%/%) (so)
LVDT4
LVDT5 Position1(%) 1
M Position1 Calc
LVDT6 (volts to %) 1
U
LVDT7 X
LVDT8 Reg#_Error (%)
LVDT9 (si) CalibEnab#(so)
LVDT10
Reg#_Ref (%) RegOutput
LVDT11 + Cmd(%)
(sso) +
LVDT12
+
LVDT1 +
Position 2 Position Note: Positive
M Maximum Limit RegOutputCmd (%)
Position2 Calc Select Check -
U (volts to %) Reg#_NullCor(%) generates negative current ,
X (so) neg . ServoOutput (%)
M
U opening the servo valve .
LVDT12
X Reg#_Fdbk(%)
(si)

Position2(%) 3
LVDT1 Median
Select
M Position3(%)
U Position3 Calc MinVrms(cfg)
X (volts to %) MaxVrms(cfg)
Note: Calculated for
LVDT12 Calibrate all three LVDTs
Function

RegCalMode (si)

ExcitMonCal (cfg)
Note : Calculated for all
three LVDTs

CalibEnab# (so)

Param_Name (cfg) - Servo config parameter (Toolbox view )


Signal_Name - signal from A/D in (no Toolbox view )
Variable_Name - internal vars to Servo (no Toolbox view )
* - indicates a detailed drawing with title per block name .
Input _Name (si) - Input to controller from Servo (Toolbox view ) MaxPosValue PositionMargin
Output _Name (so)- Output from controller to Servo (Toolbox view )
VarName - Name of Monitor Variable (Toolbox view ) MinPosValue
# = 1 to 6 (Regulator Number) I/O Configuration

Digital Servo Regulator - Position

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 61


GE Internal
2.1.6.6 Speed Ratio Valve Servo System
The Speed Ratio Valve Servo system is used to control the main fuel-feed Speed Ratio Valve (SRV) whose output feeds the
GCVs on the fuel skids of the heavy-duty gas turbines. The SRV control is a multi-loop servo. The P2 pressure provides the
outer loop feedback and the valve position provides the inner loop control. Refer to the diagram Speed Ratio Valve Servo
System.
The outer loop SRV pressure is fed back to the digital pressure loop in the PCAA using pressure sensors. These pressure
sensors have 4-20 mA outputs that connect to the dedicated TCAS SRV analog inputs: ASIH11/ASIL11 and/or
ASIH12/ASIL12.

Note The pressure inputs are not fanned, and redundant pressure inputs are connected to separate PCAA modules when the
SRV is configured as TMR.

The inner loop P2 valve position is fed back to the digital position loop in the PCAA using LVDT sensors. The LVDT
secondary-side is connected to one of the twelve TCAT terminal board LVDT input signal pairs: LVDT1H/LVDT1L through
LVDT12H/LVDT12L. The TCAT terminal board is used to fan the LVDT signal pair to the TMR PCAA set: PCAA (R),
PCAA (S) and PCAA (T) through cabling. The BCAA acquisition board provides signal conditioning to convert the RMS
voltage from the secondary-side of the LVDT to a dc equivalent signal read by the processor through analog-to-digital (A/D)
converters.
The PCAA firmware uses one of the six independent digital servo regulators. The SRV loop is run at a 100 Hz sample rate.
Details of the Speed Ratio Valve digital regulator are covered in the next section. The digital regulator output
CurrentOutputCmd is written to a digital-to-analog (D/A) converter. The output of the D/A is the current command for the
analog current regulator.

62 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
Speed Ratio Valve Servo System

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 63


GE Internal
2.1.6.7 Digital Servo Regulator – Speed Ratio
The digital Speed Ratio Valve regulator is a proportional plus integral (PI) outer regulator with an inner proportional position
regulator generating a servo current command. The SRV output is based on a multi-loop control using the P2 pressure
feedback for the outer loop and the valve position for the inner loop feedback. Refer to the diagram Digital Servo Regulator -
Speed Ratio.
The outer P2 pressure loop derives its pressure feedback from either a single pressure input or the maximum select of two
pressure inputs. For a single pressure input, the configuration parameter PressureInput1 is assigned to either AnalogInput11
or 12. For a dual pressure input, PressureInput1 is assigned to AnalogInput11 or 12 and PressureInput2 is assigned to
AnalogInput11 or 12. The Pressure Limit Check checks the range of the maximum select or the single feedback depending on
the configuration. If the pressure feedback, Reg#_Pressure is less than PresFdbkLoLim or Reg#_Pressure is greater than
PresFdbkHiLim then the pressure loop is assumed to be open loop and the SRV servo out will suicide if the
EnabPressureFbkSuic parameter is set to Enable.
The SRV pressure error, Reg#Ref minus Reg#Pressure has an integrator convergence error added to it. The objective of the
convergence error is to keep the PI controller between PCAA (R), PCAA (S) and PCAA (T) together. The PI output for (R, S
and T), Reg#_IntOut is read by the controller. The average error, Reg#_IntConv is calculated from the three inputs. Each SRV
regulator for R, S and T takes the average, subtracts its own PI output value from this, multiplies it by a gain value, K_Conv_
OuterReg to come up with the convergence error to move the integrator for PI R, S and T together. The PI proportional gain,
K_OuterReg and the integral time constant, Tau_OuterReg provide the PI adjustments. The clamping is controlled by the
parameters: HiLim_OuterReg and LowLim_OuterReg. The PI outer loop output, Reg#_IntOut is the position command for the
inner position loop.
The inner position loop supports two feedback options: Single position feedback and the maximum select of two position
feedbacks. Setting PositionInput1 equal to one of the twelve LVDT inputs can configure the single position feedback option.
The maximum select of two position feedbacks is selected when the configuration parameters, PositionInput1 and
PositionInput2 are assigned to different LVDT inputs.
Each of the position inputs enabled run through a Position Calculation function that converts the dc volts signal representing
RMS volts to a valve position in percent where 0% represents fully closed and 100% represents a fully open valve.
The Position Limit function’s input is the following based on the configuration: equal to the Position Calculation output for a
single position feedback or equal to the maximum select from two Position Calculation outputs for the dual position input
configuration. The Position Limit function checks the feedback range of Reg#_Fdbk. The range defined in percent over
nominal is configurable using the parameter, Fdbk_Suicide.
The proportional regulator error, Reg#_Error is equal to the position reference command from the controller, Reg#Ref minus
the position feedback, Reg#_Fdbk. Reg#_Error is multiplied by a composite gain defined by the multiplication of the
configuration parameter, RegGain and the controller output, Reg#_GainAdj. The product of the gain and position error
defines a current in percent. The amount of current required to negate the spring force used to close the valve if the servo fails
is compensated by the configuration parameter, RegNullBias. The controller system output, Reg#_NullCor is used to correct
the null bias value when one of the TMR servos suicides for some reason. The resultant output from the proportional position
regulator is a current command in percent with the Monitor variable name, CurrentOutputCmd.
After the initial configuration setting is made for the position loop, the user calibrates the position valve feedbacks. This is
done by using ToolboxST to select the LVDT calibration mode and setting the controller output CalibEnab# equal to TRUE.
In the calibration mode, the user can use the servo output in the open-loop mode to force the valve to the fully closed position
and also to the fully open position. During the calibration mode, the PCAA assigns the RMS voltage that represents the open
and closed position to the configuration parameters: MinVrms and MaxVrms. The user selects Calibrate and Save to store the
LVDT Excitation output voltage in the LVDT configurable parameter ExcitMonCal. The excitation voltage is used to
compensate for excitation voltage changes during runtime. The user must also verify that the LVDT parameter ExcitSelect
comes from the proper Excitation voltage source (R, S, or T).

64 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
I/O Configuration LowLim _OuterReg
Reg_Kadj_Enab RegNullBias
HiLim_OuterReg RegType Reg_GainAdj_Enab
PressureInput 2 K_Conv_OuterReg Tau_OuterReg RegGain
PressureInput 1 K_OuterReg

Reg#_Kadj Reg#_IntOut (%) Reg#_GainAdj


(%/%) (so) (si) (%/%) (so)
Reg#_IntConv +
(%) (so) 1
- Reg#_ByPass
(so) 1
OuterLoop CalibEnab# (so)
Err (%) OuterReg k(1+sT) Reg#_Error
+ + Err (%)
Reg#_Ref s (%) (si)
(so) + k = proportional gain, RegOutput
- T = Time constant of up-break + + + + Cmd(%)
Reg#_PosBiasFF
(%) (so)
- -
AnalogInput11 M Pressure 1(%) Note: Positive
U 1 Reg#_Pressure (%) RegOutput
Pressure (si) Cmd(%)
AnalogInput12 X M Reg#_NullCor
Pressure Max . 2U Limit generates
Select Reg#_Fdbk(%) (%) (so)
X Check negative
M (si) current , neg.
U 3 ServoOutpu t
X Pressure 2(%) Select 1 if PressureInput 1 only used . (%) opening
Select 2 if PressureInput 1 & PressureInput 2. the servo
Select 3 if PressureInput 2 only used . valve.
LVDT1
M Position1(%)
U Position1 Calc a
X Position(%) Position MinVrms(cfg)
LVDT12 Position M Limit MaxVrms(cfg)
Maximum bU Check Note : Calculated for
Select X both LVDTs

Position2 Calc c
Position2 (%) Calibrate ExcitMonCal (cfg)
LVDT1 Note : Calculated for
Function
Sel a if PositionInput 1 only. both LVDTs
M Sel b if PositionInput 1 and PositionInput 2 used.
U Sel c if PositionInput 2 only.
X

LVDT12
RegCalMode (si)

CalibEnab# (so)

Param_Name(cfg) - Servo config parameter(Toolbox view)


PositionInput1 Signal_Name - signal from A/D in (no Toolbox view)
PositionInput2 Variable _Name - internal vars to Servo (no Toolbox view)
MaxPosValue PositionMargin
* - indicates a detailed drawing with title per block name
.
Input_Name (si) - Input to controller from Servo(Toolbox view) MinPosValue
I/O Configuration Output_ Name (so)- Output from controller to Servo(Toolbox view)
I/O Configuration
VarName - Name of Monitor Variable(Toolbox view)

# = 1 to 6 (Regulator number)

Speed Ratio Valve Servo System

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GE Internal
2.1.6.8 Liquid Fuel Valve Servo System
The Liquid Fuel Servo system is used with gas turbines using the liquid fuel option. Refer to the diagram Liquid Fuel Valve
Servo System.
The flow rate is fed back to the digital flow rate regulator in the PCAA using Liquid Fuel flow meter with magnetic pickup
outputs. The flow meter output is connected to one of the two TCAT terminal board magnetic flow sensor input signal pairs:
MFI1H/MFI1L through MFI2H/MFI2L or two TCAS terminal board TTL flow sensor input signals: TFH1/L1 through
TFH2/L2. The TCAT terminal board is used to fan the magnetic input signal pair to the TMR PCAA set: PCAA (R), PCAA
(S) and PCAA (T) through cabling. The BCAA acquisition card provides signal conditioning to convert the variable
frequency, variable amplitude input to a digital pulse. The digital pulse from the magnetic flow sensor signal conditioning or
the TTL sensor conditioning feeds a counter used to determine the frequency of the pulse train from the flow meter.
The processor board uses one of the six independent digital servo regulators. The Liquid Fuel servo regulator is sampled at a
100 Hz rate. Details of the Liquid Fuel digital regulator are covered in the next section. The digital regulator output,
ServoCurrentRef is written to a digital-to-analog (D/A) converter. The output of the D/A is the current command for the
analog current regulator.
The BCAA acquisition board has six analog current regulators, one per digital servo regulator. All six analog current
regulators are rated for 10 mA only. Each current output provides an internal suicide protection relay controlled by the
processor board software. Each of the six servo outputs supports either three-coil servos or two-coil servos and each provides
a jumper on the TCAS terminal board to configure the output. The jumper is placed in the TMR position for the 3-coil servo
and placed in the Open position for the 2-coil servo. For the 3-coil servo using Servo output 1, TCAS SVO1H_R/SVO1L_R
outputs are connected to coil 1, TCAS SVO1H_S/SVO1L_S outputs are connected to coil 2, and TCAS SVO1H_T/SVO1L_
T outputs are connected to coil 3. For the simplex 2-coil servo connection, TCAS SVO1H_R/SVO1L_R outputs are
connected to coil 1 and TCAS SVO1X_R/SVO1L_R outputs are connected to coil 2.
Servo outputs 1 and 2 also provide a means to externally suicide the outputs through the TCAS inputs SVRL1/2. For the
Mark VIe control, the PPRO provides an external contact connected across SVRL1 and SVRL2. If the contact closes, the K1
relay is energized and the servo output is isolated from the digital regulator control, providing a direct connection through a
current limiting resistor (15 mA fixed output), as long as the K1 relay is energized.

66 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
Liquid Fuel Valve Servo System

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GE Internal
2.1.6.9 Digital Servo Regulator - Liquid Fuel
The Digital Liquid Fuel regulator is a proportional regulator generating a servo current command proportional to the error
signal, the difference between the Liquid Fuel flow rate reference from the controller and the flow rate feedback. Refer to the
diagram Digital Servo Regulator - Liquid Fuel.
Two flow rate feedback options are supported: Single flow rate feedback or the dual flow rate option. Setting FlowInput1
equal to one of the four flow rate inputs configures the single flow rate option. The dual feedback option is selected when the
configuration parameters, FlowInput1 and FlowInput2 are assigned to different flow inputs. Unlike the LVDT calibration
available for the position inputs, there is no ToolboxST calibration function for the flow inputs.
Each of the enabled flow rate inputs runs through a Flow Rate Calculation function that converts the revolutions per minute
frequency to a flow rate percentage where 0% represents no flow and 100% represents a rated flow.
The Flow Rate Limit Check’s input is the following based on the configuration: equal to the flow rate output for a single
feedback or equal to the maximum select from two flow rates. The Flow Rate Limit Check looks for the flow rate feedback,
Reg#_Fdbk to be out of range. The range is defined using configurable minimum and maximum flow limits in percent of
nominal. There is also a configurable delay that must be exceeded before a diagnostic alarm is generated. If the flow feedback
exceeds either flow limit for the defined delay the servo will suicide, if enabled.
The proportional regulator error, Reg#_Error is equal to the flow rate reference command from the controller, Reg#Ref minus
the flow rate feedback, Reg#_Fdbk. Reg#_Error is multiplied by the composite gain defined by the multiplication of the
configuration parameter, RegGain and the controller output, Reg#_GainAdj. The product of the gain and flow rate error
defines a current in percent. The amount of current required to negate the spring force used to close the valve if the servo fails
is compensated by the configuration parameter, RegNullBias. The controller system output, Reg#_NullCor is used to correct
the null bias value when one of the TMR servos suicides for some reason. The resultant output from the proportional position
regulator is a current command in percent with the Monitor variable name, CurrentOutputCmd.

68 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
Digital Servo Regulator - LiquidFuel
I/O Configuration
Reg_GainAdj_Enab
FlowInput1
PRScale FlowInput2 RegNullBias
RegType RegGain

Reg#_GainAdj
(%/%) (so)

FlowRate3 (si)
1

FlowRate1 (si)

Flow Calc Note: Positive


PR1 (rpm to %)
RegOutputCmd (%)
M Reg#_Ref(%) generates negative
Flow1(%) (so) current , neg .
U 1
Flow Calc X Reg#_Error(%) ServoOutput(%)
PR3 (rpm to %) opening the servo
(si)
valve.

Maximum M RegOutput
Select 2U Flow Rate + + + Cmd(%)
X Limit
Check - +

Flow Calc M
PR2 (rpm to %) Flow2(%)
U 3
X

Flow Calc Reg#_Fdbk(%) (si) Reg#_NullCor(%) (so)


PR4 (rpm to %) Select 1 if FlowInput 1 only used .
Select 2 if FlowInput 1 and FlowInput 2 used .
Select 3 if FlowInput 2 only used .
Param_Name(cfg) - Servo config parameter(ToolboxST view)
FlowRate2 (si) Signal_Name - signal from A/D in (no ToolboxST view)
Variable _Name - internal vars to Servo (no ToolboxST view)
* - indicates a detailed drawing with title per block name
.

FlowRate4 (si) Input_Name (si)- Input to controller from Servo(ToolboxST view)

Output_Name (so)- Output from controller to Servo(ToolboxST view)

VarName - Name of Monitor Variable(ToolboxST view)

# = 1 to 6 (Regulator number)

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GE Internal
2.1.6.10 Liquid Fuel Valve with Position Feedback Servo System
The Liquid Fuel Valve with Position Feedback Servo system is used with gas turbines using the liquid fuel option. The Liquid
Fuel Valve with Position Feedback is the multi-loop control system. The fuel flow rate is the feedback for the outer loop and
the valve position is the inner loop feedback. Refer to the diagram Liquid Fuel Valve with Position Feedback Servo System.
The flow rate is fed back to the digital flow rate regulator in the PCAA using Liquid Fuel flow meter with magnetic pickup
outputs. The flow meter output is connected to one of the two TCAT terminal board magnetic flow sensor input signal pairs:
MFI1H/MFI1L through MFI2H/MFI2L or one of the PCAA TTL flow sensor input signal pairs. The TCAT terminal board is
used to fan the magnetic input signal pair to the TMR PCAA set: PCAA (R), PCAA (S) and PCAA (T) through cabling. The
BCAA acquisition card provides signal conditioning to convert the variable frequency, variable amplitude input to a digital
pulse. The digital pulse feeds a counter used to determine the frequency of the pulse train from the flow meter.
The inner loop valve position is fed back to the digital position loop in the PCAA using Linear Variable Differential
Transformer (LVDT) sensors. The TCAS terminal board provides the six LVDT excitation signal pairs: LVDTEXH1_
R/LVDTEXL1_R through LVDTEXH6_R/LVDTL6_R. The primary-side signal is a 3.2 kHz sine wave excitation with a 7.07
V RMS amplitude. The LVDT secondary-side is connected to one of the twelve TCAT terminal board LVDT input signal
pairs: LVDT1H/LSVT1L through LVDT12H/LVDT12L. The TCAT terminal board is used to fan the LVDT signal pair to the
TMR PCAA set: PCAA (R), PCAA (S) and PCAA (T) through cabling. The BCAA acquisition board provides signal
conditioning to convert the RMS voltage from the secondary-side of the LVDT to a dc equivalent signal read by the processor
through analog-to-digital (A/D) converters.
The processor board will use one of the six independent digital servo regulators. The Liquid Fuel Valve with Position
Feedback servo regulator is sampled at a 100 Hz rate. Details of the Liquid Fuel Valve with Position Feedback digital
regulator are covered in the next section. The digital regulator output, ServoCurrentRef is written to a digital-to-analog (D/A)
converter. The output of the D/A is the current command for the analog current regulator.
The BCAA acquisition board has six analog current regulators with a 10 mA rating. Each current output provides an internal
suicide protection relay controlled by the PCAA firmware. Each of the six servo outputs supports either three-coil servos or
two-coil servos and each provides a jumper on the TCAS terminal board to configure the output. The jumper is placed in the
TMR position for the 3-coil servo and placed in the Open position for the 2-coil servo.
Servo outputs 1 and 2 also provide a means to externally suicide the outputs the TCAS inputs SVRL1/2. In the Mark VIe
control system, the PPRO provides an external contact connected across SVRL1 and SVRL2. If the contact closes, the K1
relay is energized and the servo output is isolated from the digital regulator control, providing a direct connection through a
current limiting resistor (15 mA fixed output), as long as the K1 relay is energized.

70 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
Liquid Fuel Valve with Position Feedback Servo System

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 71


GE Internal
2.1.6.11 Digital Servo Regulator – Liquid Fuel with Position
The Digital Liquid Fuel with Position regulator is a proportional plus integral (PI) outer flow rate regulator with an inner
proportional position regulator generating a servo current command. The Liquid Fuel with Position output is based on a
multi-loop control using the liquid fuel flow rate feedback for the outer loop and the valve position for the inner loop
feedback. Refer to the diagram Digital Servo Regulator - Liquid Fuel with Position.
The outer flow rate loop derives its feedback from either a single flow rate input or the maximum select of two flow rate
inputs. For a single flow rate input, the configuration parameter FlowInput1 is assigned to FlowRate1 through FlowRate4. For
the maximum select of two flow rates, the configuration parameter, FlowInput1 is equal to one of four flow rate feedbacks
and FlowInput2 is equal to a different one of the four flow feedbacks. The Flow Rate Limit Check checks the range of the
maximum select or the single feedback depending on the configuration. If the flow rate feedback, Reg#_FlowFdbk is less
than FlowFdbkLoLim or Reg#_PressureFlowFdbk is greater than FlowFdbkHiLim then the flow loop is assumed to be open
loop and the SRV servo out will suicide.
The flow rate error, Reg#Ref minus Reg#FlowFdbk has an integrator convergence error added to it. The objective of the
convergence error is to keep the PI controller between PCAA (R), PCAA (S) and PCAA (T) together. The PI output for (R, S
and T), Reg#_IntOut is read by the controller. The median selected value, Reg#_IntConv is calculated from the three inputs.
Each LFBV regulator for R, S, and T takes the average, subtracts its own PI output value from this, multiplies it by a gain
value, K_Conv_OuterReg to come up with the convergence error to move the integrator for PI R, S, and T together. The PI
proportional gain, K_OuterReg and the integral time constant, Tau_OuterReg provide the PI adjustments. The clamping is
controlled by the parameters: HiLim_OuterReg and LowLim_OuterReg. The PI outer loop output, Reg#_IntOut is the position
command for the inner position loop.
The inner position loop supports two feedback options: Single position feedback and the maximum select of two position
feedbacks. Setting PositionInput1 equal to one of the twelve LVDT inputs can configure the single position feedback option.
The maximum select of two position feedbacks is selected when the configuration parameters, PositionInput1 and
PositionInput2 are assigned to different LVDT inputs.
Each of the enabled position inputs run through a Position Calculation function that converts the dc volts signal representing
RMS volts to a valve position in percent where 0% represents fully closed and 100% represents a fully open valve. The valve
percent representation can also be configured for the opposite where 100% is equivalent to fully closed.
The Position Limit function’s input is the following based on the configuration: equal to the Position Calculation output for a
single position feedback or equal to the maximum select from two Position Calculation outputs for the dual position input
configuration. The Position Limit function checks the feedback range of Reg#_Fdbk. The range defined in percent over
nominal is configurable using the parameter, Fdbk_Suicide; if enabled.

72 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
The proportional regulator error, Reg#_Error is equal to the position reference command from the controller, Reg#Ref minus
the position feedback, Reg#_Fdbk. Reg#_Error is multiplied by a composite gain defined by the multiplication of the
configuration parameter, RegGain and the controller output, Reg#_GainAdj. The product of the gain and position error
defines a current in percent. The amount of current required to negate the spring force used to close the valve if the servo fails
is compensated by the configuration parameter, RegNullBias. The controller system output, Reg#_NullCor is used to correct
the null bias value when one of the TMR servos suicides for some reason. The resultant output from the proportional position
regulator is a current command in percent with the Monitor variable name, CurrentOutputCmd.
After the initial configuration setting is made for the position loop, the user calibrates the position valve feedbacks. This is
done by using ToolboxST to select the LVDT calibration mode and setting the controller output CalibEnab# equal to TRUE.
In the calibration mode, the user can use the servo output in the open-loop mode to force the valve to the fully closed position
and also to the fully open position. During the calibration mode, the PCAA assigns the RMS voltage that represents the open
and closed position to the configuration parameters: MinVrms and MaxVrms. The user selects Calibrate and Save to store the
LVDT Excitation output voltage in the LVDT configurable parameter ExcitMonCal. The excitation voltage is used to
compensate for excitation voltage changes during run time. The user must also verify that the LVDT parameter ExcitSelect
comes from the proper Excitation voltage source (R, S, or T).

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 73


GE Internal
Reg_Kadj_Enab LowLim_OuterReg
HiLim_OuterReg RegGain
Tau_OuterReg RegType RegNullBias
Reg_GainAdj_Enab
K_Conv_OuterReg K_OuterReg

Reg#_KAdj
(so) Reg#_IntOut
+ (%) (si )
Reg#_IntConv
(%) (so)
- 1 Reg#_GainAdj
(%/%) (so)
Reg#_ByPass
(so)
OuterLoop OuterReg
Err (%) Err (%) 1 CalibEnab# (so)
+ + k(1+sT)
sT
Reg#_Ref(%) (so) k = proportional gain, RegOutput
+ Reg#_Error (%) Cmd(%)
- T = Time constant of up-break Reg#_PosBiasFF + + (si) + +
(%) (so)
- +
Reg#_FlowFdbk
(%) (si) Reg#_NullCor(%) Note:
FlowRate1 (si) (so) Positive
FlowRate2 (si) M Flow1(%) RegOutputCmd
U 1 Reg#_Fdbk(%) (%) generates
FlowRate3 (si) X (si) negative current ,
neg.
FlowRate4 (si) M FlowRate ServoOutput (%)
Max
Select 2 U Limit opening the servo
X Check valve.

M
U 3
X Flow2(%)
MinVrms(cfg)
MaxVrms(cfg)
LVDT1 Select 1 if FlowInput 1 only used . Note: calculated for all
Select 2 if FlowInput 1 and FlowInput 2 used. three LVDTs
M Select 3 if FlowInput 2 only used .
U
X RegCalMode (si)
Position1(%) Calibrate
LVDT12 Position1 Calc Function
CalibEnab#
Position Position (%) Position (so)
LVDT1 Maximum Limit
Position2(%) Select Check ExcitMonCal (cfg)
M
U Position2 Calc Note : Calculated for all
LVDTs
X

LVDT12
Param_Name(cfg) - Servo config parameter(Toolbox view)
Signal_Name - signal from A/D in (no Toolbox view)
Variable _Name - internal vars to Servo(no Toolbox view)
* - indicates a detailed drawing with title per block name
.
Input_Name (si) - Input to controller from Servo(Toolbox view)
FlowInput1 MaxPosValue
Output_ Name (so) - Output from controller to Servo(Toolbox view) PositionMargin
PositionInput1
FlowInput2 VarName - Name of Monitor Variable(Toolbox view) MinPosValue
PositionInput 2
# = 1 to 6 (Regulator number)
I/O Configuration I/O Configuration

Digital Servo Regulator - LiqFuel_wPos

74 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
2.1.6.12 Parameters
Parameter Description Choices
Max_MA_Input Maximum MA for Healthy 4/20 ma Input 0 to 21.5 mA
Min_MA_Input Minimum MA for Healthy 4/20 ma Input 0 to 21.5 mA
LVDT_TMR_DiffLim TMR Input vote difference in % of range.If any of the TMR 0 to 200%
LVDTs are greater than or less than this difference from
the median value in percent, a diagnostic is generated on
the errant PCAA.

2.1.6.13 TCAS Analog Inputs


Input Description Choices
AnalogInput01_R,S,T First of 10 Simplex Analog inputs on the TCAS board - Variable edit (Input FLOAT)
board variable
InputType Type of Analog Input Unused, 4-20ma
Low_Input Input MA at Low Value -10 to 20
Low_Value Input Value in Engineering Units at Low MA -3.4082 e +38 to 3.4028 e +38
High_Input Input MA at High Value -10 to 20
High_Value Input Value in Engineering Units at High MA -3.4082 e +38 to 3.4028 e +38
DiagHighEnab Enable High Input Limit Diagnostic as specified in Enable, Disable
Parameters tab
DiagLowEnab Enable Low Input Limit Diagnostic as specified in Enable, Disable
Parameters tab
AnalogInput11_R,S,T Analog inputs 11, 12 Can be used as pressure inputs to Variable edit (Input FLOAT)
the servo Speed Ratio regulator
InputType Type of Analog Input Unused, 4-20ma, +/-10V, +/-5V
Low_Input Input MA (or Volts) at Low Value -10 to 20
Low_Value Input Value in Engineering Units at Low MA (or Volts) -3.4082 e +38 to 3.4028 e +38
High_Input Input MA (or Volts) at High Value -10 to 20
High_Value Input Value in Engineering Units at High MA (or Volts) -3.4082 e +38 to 3.4028 e +38
DiagHighEnab Enable High Input Limit Diagnostic as specified in Enable, Disable
Parameters tab
DiagLowEnab Enable Low Input Limit Diagnostic as specified in Enable, Disable
Parameters tab

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 75


GE Internal
2.1.6.14 TCAT Analog Inputs
Input Description Choices
AnalogInput13 First of 24 TMR (13-36) Analog inputs on the TCAT board Variable edit (Input FLOAT)
InputType Type of Analog Input Unused, 4-20 ma
Low_Input Input MA at Low Value -10 to 20
Low_Value Input Value in Engineering Units at Low MA -3.4082 e +38 to 3.4028 e +38
High_Input Input MA at High Value -10 to 20
High_Value Input Value in Engineering Units at High MA -3.4082 e +38 to 3.4028 e +38
DiagHighEnab Enable High Input Limit Diagnostic as specified in Enable, Disable
Parameters tab
DiagLowEnab Enable Low Input Limit Diagnostic as specified in Enable, Disable
Parameters tab
TMR_DiffLimit Diag Limit,TMR Input Vote Difference, in Percent of (High_ 0 to 200
Value - Low_Value)

2.1.6.15 Thermocouples
Input Description Choices
Thermocouple01_R,S,T First of 10 Simplex Analog inputs on the TCAS board - Variable edit (Input FLOAT)
board variable
ThermCplType Select thermocouples type or mV input. mV inputs are Unused, mV, E, J, K, S, T
primarily for maintenance, but can also be used for
custom remote CJ compensation. Standard remote CJ
compensation also available.
ThermCplUnit The ThermCplUnit parameter affects the native units of Deg_F, Deg_C
the controller application variable. It is only indirectly
related to the tray icon and associated unit switching
capability of the HMI. This parameter should not be used
to switch the display units of the HMI. Caution Do not
change the ThermCplUnit parameter in the ToolboxST
application because these changes will require
corresponding changes to application code and to the
Format Specifications or units of the connected variable.
This parameter modifies the actual value sent to the
controller as seen by application code. Application code
that is written to expect degrees Fahrenheit will not work
correctly if this setting is changed. External devices,
such as HMIs and Historians, may also be affected by
changes to this parameter.

76 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
2.1.6.16 Cold Junctions
Input Description Choices
ColdJunction_R,S,T Cold junction for TC 1-25 Variable edit (Input FLOAT)
ColdJuncType Select CJ Type Local, Remote
ColdJuncUnit Select CJ Display Unit Deg_F, Deg_C

2.1.6.17 Analog Outputs


Input Description Choices
AnalogOutput01_R,S,T First of 2 simplex Analog outputs on the TCAS terminal Variable edit (Output FLOAT)
board
AnalogOutput03 First of 3 TMR (3-5) Analog outputs on the TCAT Variable edit (Output FLOAT)
terminal board
Output_MA Type of output current, mA selection Unused, 0-20ma
Suicide_Enab Enable suicide for faulty output current (TMR only) Enable, Disable
Low_MA Output MA at Low Value 0 to 20 mA
Low_Value Output Value in Engineering Units at Low MA -3.4082 e +38 to 3.4028 e +38
High_MA Output MA at High Value 0 to 20 mA
High_Value Output Value in Engineering Units at High MA -3.4082 e +38 to 3.4028 e +38
TMR_SuicLimit This is the load sharing Margin for Suicide Threshold 0 to 20 mA
(mA), for TMR operation. It is the reference difference
for simplex operation.
If any of the three individual analog outputs exceeds
50% of the mA output plus this margin, the mA output is
allowed to suicide. Additionally, if reference command
and total current feedback are mismatching by this
threshold, a diagnostic will be generated.
OutputState Sets the mA output to a known value when the PCAA is PwrDownMode, HoldLastValue,
offline. PwrDownMode sets analog output to 0.0 mA. Output_Value
HoldLastVal holds the analog output at the last value in
engineering units received before the PCAA went
offline. Output_Value allows the user to specify the
offline value in engineering units.
Output_Value Pre-determined value for the outputs when OutputState Engineering Units
is set to Output_Value

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 77


GE Internal
2.1.6.18 Pulse Rates
Input Description Choices
FlowRate1 1 of two (1-2) magnetic pickup pulse inputs on the TCAT Variable edit (Input FLOAT)
terminal board
FlowRate3 1 of two (3-4) TTL pulse inputs on the TCAS terminal Variable edit (Input FLOAT)
board
PR_Enable Enables pulse rate input Enable, Disable
PRScale Scaling pulses/sec to Engineering units 0 to 1000
TMR_DiffLimit Diag Limit, TMR Input Vote Difference, in Engineering 0 to 20000
units

2.1.6.19 LVDTs
Input Description Choices
LVDT01 1 of 12 LVDT inputs on the TCAT terminal board Variable edit (Input FLOAT)
Enable LVDT Enable Enable, Disable
MinVrms Vrms at Min End Stop – Normally set by Auto-Calibrate 0 to 7.1
MinVrms Vrms at Max End Stop – Normally set by Auto-Calibrate 0 to 7.1
MinPosValue Position at Min End Stop in Eng Units -15 to 150
MaxPosValue Position at Max End Stop in Eng Units -15 to 150
PositionMargin Allowable range exceed error of position in percentage. If 1 to 10
the position exceeds the MaxPosValue or MinPosValue by
this percentage, an unhealthy status and a diagnostic is
generated.
ExcitSelect Excitation monitor selection. Select the Excitation monitor Unused, Excit_fromR, Excit_fromS,
signal conditioning command that is used by the LVDT. Excit_fromT
For instance, if the LVDT excitation comes from the S
TCAS, the setting would be Excit_FromS. If set to Unused,
the LVDT uses the local ServoExcitMonitor for signal
condition. To receive Excitation signal conditioning from
another (TMR) pack, the application blockware must be
provided to pass the excitation voltage monitor inputs
ServoExcitMonitor_R,S,T to the ExcMon_fromR,S,T
outputs through a Move block function.
ExcitMonCal Excitation monitor calculated value in Vrms. This is 1 to 10
normally populated during Auto-Calibrate and helps to
condition the LVDT signals against fluctuations in
Excitation voltage

78 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
2.1.6.20 Vibration
Input Description Choices
VibrationFbk01 1 of 12 Vibration feedback inputs on the TCAT terminal Variable edit (Input FLOAT)
board
SensorEnab VibrationFbk Enable Enable, Disable
Vib_Gain Vibration Gain in Vpk/Vipspk 0.04 to 0.5
SensorRes Sensor resistance ohms This resistance is used to 100 to 2000
calculate a specific minimum voltage working range. If the
sensor exceeds this limit, it is declared faulted. Generates
diagnostic and unhealthy.

2.1.6.21 Regulators
Input Description Choices
RegType Servo regulator algorithm type Unused, Position, SpeedRatio,
LiquidFuel, LiquidFuel_wPosition
RegGain Position loop gain in (% Current/Eng Unit). This adjusts -200 to 200 (FLOAT)
the regulator loop gain response. The higher this value,
the faster the servo valve responds. This rate is limited by
the valve slew rate.
RegNullBias Position loop Null Bias in %Current – Balances Servo -100 to 100 (FLOAT)
Spring Force. This force closes or opens the valve if the
power is lost. This parameter compensates to this force.
EnabCurSuic Current Suicide Enable If the Current Feedback Suicide is Disable, Enable
enabled and the following are True, the servo performs a
suicide. a) The difference between the commanded
current and the individual current feedback exceeds the
Curr_Suicide limit. b) for a period greater than ½ second.
EnabPosFbkSuic Position Feedback Suicide Enable If the Position Disable, Enable
Feedback Suicide is enabled and the following are True,
the servo performs a suicide. a) the position feedback
exceeds the position limits of either: MinPosValue - Fdbk_
Suicide MaxPosValue + Fdbk_Suicide b) for a period of
PosFailDelay in milliseconds.
EnabPressureFbkSuic Pressure Feedback Suicide Enable If the Pressure Disable, Enable
Feedback Suicide is enabled and the following is True, the
servo performs a suicide. a) the pressure feedback
exceeds the pressure limits of either: PresFbkLowLim
PresFbkHighLim b) for a period of PressureFailDelay in
ms
EnabFlowFbkSuic Flow feedback suicide enable If the flow feedback suicide Disable, Enable
is enabled and all the below is True, the servo performs a
suicide. a) the flow feedback exceeds the flow limits of
either: FlowFbkLowLim FlowFbkHighLim b) for a period of
FlowFailDelay in ms
Curr_Suicide Short servo output if current error exceeds this amount in 0 to 100 % (FLOAT)
percentage
Fdbk_Suicide Short servo output if position feedback error exceeds this 0 to 10 % (FLOAT)
amount in percentage

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 79


GE Internal
Input Description Choices
TMR_DiffLimit Diag limit, TMR input vote Difference, servo current in -15 to 150% (FLOAT)
engineering units The controller calculates the median
value of the three servo currents values. If any of the three
servo currents are greater than or less than this difference
in percent, a diagnostic is generated. This notifies the user
of a possible fault of that servo output.
DitherAmpl Dither in % current. Amplitude of the dither moves a valve 0 to 10 % (FLOAT)
from a fixed position and back again. This dithering is to
reduce breakaway torque if the valve sits in a fixed
position for an extended time.
DitherFreq Dither rate in Hertz. Rate at which dithering moves a valve Unused, 8_33 Hz, 12_5 Hz, 16_67 Hz,
from a fixed position and back again. This dithering is to 25 Hz, 50 Hz
reduce breakaway torque if the valve sits in a fixed
position for an extended time.
PositionInput1 Position input 1 selection Selected LVDT converted from LVDT01, LVDT02, LVDT03, LVDT04,
VRMS to a position by using the LVDT configuration. This LVDT05, LVDT06, LVDT07, LVDT08,
selection is valid for the following regulator types: Position, LVDT09, LVDT11, LVDT10, LVDT11,
SpeedRatio, LiquidFuel_wPosition. LVDT12, Unused
PositionInput2 Position input 2 selection Selected LVDT converted from LVDT01, LVDT02, LVDT03, LVDT04,
VRMS to a position by using the LVDT configuration. This LVDT05, LVDT06, LVDT07, LVDT08,
selection is valid for the following regulator types: Position, LVDT09, LVDT11, LVDT10, LVDT11,
SpeedRatio, LiquidFuel_wPosition. LVDT12, Unused
PositionInput3 Position input 3 selection Selected LVDT converted from LVDT01, LVDT02, LVDT03, LVDT04,
VRMS to a position by using the LVDT configuration. This LVDT05, LVDT06, LVDT07, LVDT08,
selection is valid for the following regulator types: Position, LVDT09, LVDT11, LVDT10, LVDT11,
SpeedRatio, LiquidFuel_wPosition. LVDT12, Unused
PressureInput1 Pressure input 1 selection Selected pressure input Unused, AnalogInput11, AnalogInput12
converted from mA to a position by the analog input
configuration. This selection is valid for the SpeedRatio
regulator type
PressureInput2 Pressure input 2 selection Selected pressure input Unused, AnalogInput11, AnalogInput12
converted from mA to a position by the analog input
configuration. This selection is valid for the SpeedRatio
regulator type
FlowInput1 Flow rate input 1 selection Selected pulse input converted Unused, FlowRate1, FlowRate2,
from a flow rate to a position using the pulse rate FlowRate3, FlowRate4
configuration. This selection is valid for following regulator
types: LiquidFuel, LiquidFuel_wPosition
FlowInput2 Flow rate input 2 selection Selected pulse input converted Unused, FlowRate1, FlowRate2,
from a flow rate to a position using the pulse rate FlowRate3, FlowRate4
configuration. This selection is valid for following regulator
types: LiquidFuel, LiquidFuel_wPosition
K_OuterReg Outer Regulator Gain -200 to 200 (FLOAT)
K_Conv_OuterReg Outer Regulator K_Conv -200 to 200 (FLOAT)
Tau_OuterReg Tau for Outer Regulator 0 to 10 (FLOAT)
LowLim_OuterReg Outer regulator low limit clamp -200 to 200 (FLOAT)
HiLim_OuterReg Outer regulator high limit clamp -200 to 200 (FLOAT)
PresFbkLowLim Pressure Feedback Low Limit If pressure feedback is -150 to 5000 (FLOAT)
lower than this limit, a diagnostic is generated. The servo
is suicided, if the EnabPressureFbkSuic is enabled.

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Input Description Choices
PresFbkHiLim Pressure Feedback High Limit If pressure feedback is -150 to 5000 (FLOAT)
higher than this limit a diagnostic is generated. The servo
is suicided, if the EnabPressureFbkSuic is enabled.
FlowFbkLowLim Flow Feedback Low Limit If Flow feedback is lower than -150 to 5000 (FLOAT)
this limit, a diagnostic is generated. The servo is suicided,
if the EnabFlowFbkSuic is enabled.
FlowFbkHiLim Flow Feedback High Limit If flow feedback is higher than -150 to 5000 (FLOAT)
this limit, a diagnostic is generated. The servo is suicided,
if the EnabFlowFbkSuic is enabled.
PosFailDelay Time delay (msec) before position feedback suicide is 0 to 10000 ms (FLOAT)
generated on a fault. This time delay keeps the firmware
from generating a suicide based on a transient condition.
PressFailDelay Time delay (msec) before pressure feedback suicide is 0 to 10000 ms (FLOAT)
generated on a fault This time delay keeps the firmware
from generating a suicide based on a transient condition.
FlowFailDelay Time delay (msec) before flow feedback suicide is 0 to 10000 ms (FLOAT)
generated on a fault. This time delay keeps the firmware
from generating a suicide based on a transient condition.
EnabRegGainAdj If enabled, RegGain will be adjusted according to the Enable, Disable
Reg_GainAdj setting in the Regulator Variables Tab. If
disabled, Reg_GainAdj is ignored and a value of 1 for
Reg_GainAdj will leave RegGain as entered in the
Regulators Tab.
EnabRegKAdj If enabled, K_OuterReg will be adjusted according to the Enable, Disable
Reg_KAdj setting in the Regulator Variables Tab. If
disabled, Reg_KAdj is ignored and a value of 1 for Reg_
KAdj will leave K_OuterReg as entered in the Regulators
Tab.

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GE Internal
2.1.6.22 Monitors
Input Description Choices
RegType Monitor regulator type selection. Allows monitoring of the Unused, Position, SpeedRatio,
regulator’s control feedback in percentage. The monitor LiquidFuel, LiquidFuel_wPosition
type must match the regulator type.
ServoNum Servo number used Select the servo feedback to be Servo01, Servo02, Servo03, Servo04,
monitored. Based upon the selected monitor RegType, Servo05, Servo06
only one of the MonVxx parameters is visible or
selectable.
MonVarPos Monitor variable selection for position regulator. Select Unused, Position1, Position2, Position3,
one of these to be monitored in percentage. RegOutputCmd, CurrentOutputCmd
MonVarLiqFuel Monitor variable selection for liquid fuel regulator. Select Unused, Flow1, Flow2, RegOutputCmd,
one of these to be monitored in percentage. CurrentOutputCmd
MonVarSpdRat Monitor variable selection for speed ratio regulator. Select Unused, Pressure1, Pressure2,
one of these to be monitored in percentage. Position, Position2, Position1,
OuterRegErr, OuterLoopErr,
RegOutputCmd, CurrentOutputCmd
MonVarLiqFuelPos Monitor variable selection for liquid fuel with position Unused, Position, Position1, Position2,
regulator. Select one of these to be monitored in Flow1, Flow2, OuterRegErr,
percentage. OuterLoopErr, RegOutputCmd,
CurrentOutputCmd

2.1.6.23 Variables
Variable Description Direction Type
L3DIAG_PCAA I/O diagnostic indication Input BIT
LINK_OK_PCAA I/O link okay indication Input BIT
ATTN_PCAA I/O Attention Indication Input BIT
PS18V_PCAA I/O 18 V Power Supply Indication Input BIT
PS28V_PCAA I/O 28 V Power Supply Indication Input BIT
IOPackTmpr I/O pack temperature Input FLOAT
RegCalMode Regulator calibration mode active Input BIT
CalibEnab1 Servo 1 Regulator Calibration Enable Output BIT
CalibEnab2 Servo 2 Regulator Calibration Enable Output BIT
CalibEnab3 Servo 3 Regulator Calibration Enable Output BIT
CalibEnab4 Servo 4 Regulator Calibration Enable Output BIT
CalibEnab5 Servo 5 Regulator Calibration Enable Output BIT
CalibEnab6 Servo 6 Regulator Calibration Enable Output BIT
Monitor1 Servo monitor 1 Input FLOAT
Monitor2 Servo monitor 2 Input FLOAT
CJRemote Cold Junction Remote value (deg F) Output FLOAT
CJBackup Cold Junction Backup value (deg F) Output FLOAT
ActivateCalibCmd Internally generated calibration signal. DO NOT connect variable Output BIT
to this signal.

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2.1.6.24 AO Feedbacks
Feedback Description Direction Type

AOutSuicide1_R,S,T Status of Suicide Relay for Output 1 Input FLOAT


AOutSuicide2_R,S,T Status of Suicide Relay for Output 2 Input FLOAT
AOutSuicide3 Status of Suicide Relay for Output 3 Input FLOAT
AOutSuicide4 Status of Suicide Relay for Output 4 Input FLOAT
AOutSuicide5 Status of Suicide Relay for Output 5 Input FLOAT
AOut1MA_R,S,T Feedback, Output Current, mA Input FLOAT
AOut2MA_R,S,T Feedback, Output Current, mA Input FLOAT
AOut3MA Total feedback, Output Current, mA Input FLOAT
AOut4MA Total feedback, Output Current, mA Input FLOAT
AOut5MA Total feedback, Output Current, mA Input FLOAT

2.1.6.25 Excitation Variables


Variable Description Direction Type

Excit_Mon1_R,S,T Excitation Ground Health Input BIT


Excit_Mon2_R,S,T Excitation Ground Health Input BIT
Excit_Mon3_R,S,T Excitation Ground Health Input BIT
Excit_Mon4_R,S,T Excitation Ground Health Input BIT
Excit_Mon5_R,S,T Excitation Ground Health Input BIT
Excit_Mon6_R,S,T Excitation Ground Health Input BIT
ServoExcitMonitor_R,S,T Servo Excitation Monitor (Vrms) Input FLOAT
ExcMon_fromR Excitation Monitor signal from R PCAA. For TMR applications, Output FLOAT
application code must be added to attach this signal to the
corresponding ServoExcitMonitor_R value through a Move block.
ExcMon_fromS Excitation Monitor signal from S PCAA. For TMR applications, Output FLOAT
application code must be added to attach this signal to the
corresponding ServoExcitMonitor_R value through a Move block.
ExcMon_fromT Excitation Monitor signal from T PCAA. For TMR applications, Output FLOAT
application code must be added to attach this signal to the
corresponding ServoExcitMonitor_R value through a Move block.

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GE Internal
2.1.6.26 Regulator Variables
Variable Description Direction Type

Reg#_Calibrated_R,S,T Regulator has been calibrated status Input BIT


Reg#_Suicide_R,S,T Regulator suicide status Input BIT
Reg#_SuicForce Regulator Suicide Force Output BIT
Reg#_ByPass Bypass Outer Regulator (SpeedRatio, LiqFuel_wPos) Output BIT
Reg#_Error Regulator Error Input FLOAT
Reg#_Fdbk Regulator Feedback Input FLOAT
Reg#_IntOut Outer Regulator Integrator Output (SpeedRatio, LiqFuel_wPos) Input FLOAT
Reg#_Pressure Regulator pressure feedback (SpeedRatio) Input FLOAT
Reg#_FlowFdbk Regulator flow feedback (LiqFuel_wPos) Input FLOAT
Reg#_Ref Regulator Reference Output FLOAT
Reg#_GainAdj Regulator Gain Adjust Output FLOAT
Reg#_NullCor Regulator Null Correction Output FLOAT
Reg#_Kadj Outer Regulator Gain Adjust (SpeedRatio, LiqFuel_wPos) Output FLOAT
Reg#_IntConv Outer Regulator Integrator Convergence (for TMR) (SpeedRatio, Output FLOAT
LiqFuel_wPos)
Reg#_PosBiasFF Position Bias Feedforward (SpeedRatio, LiqFuel_wPos) Output FLOAT

2.1.6.27 Servo Outputs


Outputs Description Direction Type
ServoOutput1 Servo Output Feedback (% current) Input FLOAT
ServoOutput2 Servo Output Feedback (% current) Input FLOAT
ServoOutput3 Servo Output Feedback (% current) Input FLOAT
ServoOutput4 Servo Output Feedback (% current) Input FLOAT
ServoOutput5 Servo Output Feedback (% current) Input FLOAT
ServoOutput6 Servo Output Feedback (% current) Input FLOAT

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2.2 PCAA Specific Alarms
The following alarms are specific to the PCAA I/O pack.

32
Description Unallowed VarIOCompatCode Change: Old - [ ]; New - [ ]

Possible Cause A .dll file (ToolboxST support file) has been installed that is incompatible with the firmware loaded on
the I/O processor.

Solution

• Confirm the correct installation of the ToolboxST application.


• Rebuild the application and download firmware, and the application code to the affected I/O pack.

33-67
Description Thermocouple [ ] Unhealthy

Possible Cause

• Thermocouple millivolt input on terminal board has exceeded the thermocouple range or hardware limit. Refer to the
PCAA help documentation for specified thermocouple ranges.
• The thermocouple is configured as the wrong type.
• The board has detected a thermocouple open, and has applied a bias to the circuit driving it to a large negative number, or
the TC is not connected, or a condition such as stray voltage or noise caused the input to exceed -63 mV.
• Stray voltage or noise has caused the input to exceed -63 mV.

Solution

• Check the field wiring, including shields. Check the installation of the PCAA on terminal board. The problem is usually
not a PCAA or terminal board failure if other thermocouples are working correctly.
• Check the thermocouple for an open circuit.
• Measure the incoming millivolt signal to verify that it does not exceed -63 mV.
• Verify that the thermocouple type matches the configuration.

PCAA Core Analog Module GEH-6721_Vol_III_BG System Guide 85


GE Internal
68
Description Cold Junction Unhealthy, Using Backup

Possible Cause The local cold junction signal from the TCAS terminal board is out of range. The normal range is -50 to
85°C (-58 to 185 °F).

Solution If the hardware is in the normal temperature range, a possible hardware failure of the cold junction sensor on the
TCAS board may have occurred. Replace the PCAA module.

69-80
Description Analog Input (TCAS) [ ] unhealthy

Possible Cause

• The excitation to the transducer is wrong or missing.


• The transducer may be faulty.
• The terminal board jumper settings do not match the ToolboxST configuration.
• The analog input current/voltage input is beyond the specified range.
• There may be an open or short-circuit on the input.

Solution

• Check the field wiring and connections to the indicated analog input channel.
• Check the field device for failure.
• Check the PCAA ground select jumper for the input.
• Verify that the inputs are in the operable range (3.0-21.5 mA,+/-5.25 V,+/-10.5 V).

81-104
Description Analog Input (TCAT) [ ] unhealthy

Possible Cause

• The excitation to the transducer is wrong or missing.


• The transducer may be faulty.
• The terminal board jumper settings do not match the ToolboxST configuration.
• The analog input current input is beyond the specified range.
• There may be an open or short-circuit on the input.

Solution

• Check the field wiring and the connections to the indicated analog input channel.
• Check the field device for failure.
• Check the PCAA ground select jumper for the input.
• Verify that the TCAT - PCAA cables are fully seated in connectors.
• Verify that the inputs are in the operable range (3.0-21.5 mA)

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105-116
Description Vibration Input for Seismic (Velocity) Sensor [ ] unhealthy

Possible Cause

• The transducer may be faulty.


• There may be an open circuit.
• The configuration for sensor resistance (Ohms) is incorrect.

Solution

• Check the field wiring, including the shields. The problem is usually not a PCAA or terminal board failure if other
vibration inputs are working correctly.
• Verify that the sensor resistance matches the configured sensor resistance.

117-122
Description LVDT Excitation [ ] Failed

Possible Cause

• There may be an excitation ground fault.


• There may be a field wiring issue or an LVDT sensor failure.
• There may be an internal hardware failure.

Solution

• Check the field wiring, including shields, for LVDT excitation output. The problem is usually not a PCAA or terminal
board failure if other LVDT excitation outputs are working correctly.
• Check the LVDT sensor.
• If the problem is a hardware failure, replace the PCAA.

123-134
Description LVDT [ ] Excitation voltage out of range

Possible Cause ExcitMonCal is set during servo regulator calibration, and is a nominal excitation value. If actual LVDT
excitation goes out of range (+/- 10% of ExcitMonCal), this alarm is generated.

• There may be a terminal board failure.

Solution

• Measure the excitation voltage, and verify against the configuration parameter.
• Check the LVDT sensor.
• Recalibrate the servo.
• Replace the PCAA.

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GE Internal
135-146
Description LVDT [ ] Position Out of Limit

Possible Cause

• There may be an issue with excitation to the LVDT, a faulty transducer, or an open or short-circuit.
• The LVDT input is out of range.
• The LVDT has not been calibrated.

Solution

• Check the field wiring, including the shields and the LVDT excitation. The problem is usually not a PCAA or terminal
board failure if other LVDT inputs are working correctly.
• Check the LVDT sensor.
• Calibrate the servo regulator with the proper LVDT.
• Verify the configuration limits: MinVrms and MaxVrms.
• Verify that the LVDT excitation terminal board connections match the configured excitation source specified in
ExcitSelect.
• Verify that PositionMargin is set to the proper value.

147-148
Description Invalid Monitor [ ] Configuration

Possible Cause

• The configuration for the selected servo and regulator type is invalid.

Solution

• Verify that the monitor regulator type matches the regulator type of the selected servo.
• Rebuild and download the configuration.

149
Description More than One Servo Requested for Calibration

Possible Cause

• The user has requested more than one servo calibration (only one servo can be calibrated at a given time).

Solution

• Check the variables in the Variables tab to verify that only one CalibEnab# for only one servo is set to True at a given
time.

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150
Description Calibration : Selected LVDT Max / Min Pos Limit Out of Range

Possible Cause Used to ensure that all selected LVDTs are scaled to the same units.

• The parameter MaxPosValue or MinPosValue for the selected LVDT configured in the regulator configuration is out of
range (+/-50%, encountered during calibration).

Solution

• Check the regulator configuration for the parameter PositionInput#1 for the particular servo.
• Check the parameters MaxPosValue and MinPosValue for the LVDT# selected input in PositionInput#1.
• The parameter MaxPosValue for LVDT input should be between 50% to 150%.
• The parameter MinPosValue for LVDT input should be between -50% to 50%.

151-154
Description FlowRate [ ] Input unhealthy

Possible Cause

• There may be a broken wire on the flow rate input.


• There may be a faulty sensor.

Solution

• Verify the field wiring, including shields. The problem is usually not a PCAA or terminal board failure if other flow rate
inputs are working correctly.
• Check the gap for the magnetic pickup sensor.
• For the TTL sensor, verify the power to the sensor and the gap.
• Replace the hardware.

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155-160
Description Servo [ ] Disabled: Configuration error

Possible Cause

• The servo position input is connected to an unused LVDT.


• The configuration for the position input is incorrect.
• The servo flow input is connected to an unused PR.
• The configuration for the flow input is incorrect.
• The servo pressure input is connected to an unused analog input.
• The configuration for the pressure input is incorrect.

Solution

• Check and correct, if necessary, the configuration parameters relating to the list of possible causes.
• Verify that the regulator inputs are connected to ENABLED sensor inputs in configuration.
• In the ToolboxST configuration, right-click the PCAA, then select the parameter Troubleshooting->Advanced
Diagnostics. Navigate through the PCAA Commands to the parameter Servos->Servo Cfg Error. Send the command to
the PCAA for a list of configuration errors that were detected in the servo regulator settings.

161-166
Description Servo [ ] Output Suicide Active

Possible Cause

• The servo position input is connected to an unused LVDT.


• The configuration for the position input is incorrect.
• The servo flow input is connected to an unused PR.
• The configuration for the flow input is incorrect.
• The servo pressure input is connected to an unused analog input.
• The configuration for the pressure input is incorrect.
• The regulator feedback is out of range.
• The servo current feedback differs from the servo current command.

Solution

• Check and correct, if necessary, the configuration parameters relating to the list of possible causes.
• Verify that the inputs are connected to used sensor inputs in the configuration.
• It is a LVDT feedback issue; check the position sensor connections.
• Verify the position sensor mechanical integrity to the valve.
• Check the wiring of the servo output loop for an open or short circuit.
• Check for a short or open servo coil.

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167-173
Description Pack internal reference voltage out of limits ([ ])

Possible Cause The calibration reference voltage is more than +/-5% from the expected value, which indicates a
hardware failure.

Solution

• Cycle power on the PCAA.


• Replace the PCAA.

174-180
Description Pack internal null voltage out of limits ([ ])

Possible Cause The null voltage is more than +/- 5% from the expected value which indicates a hardware failure.

Solution

• Cycle power on the PCAA.


• Replace the PCAA.

181-183
Description Analog Output [ ] Individual current fdbk unhealthy

Possible Cause

• The commanded output is beyond the range of the output.


• There may be a field wiring problem.
• There may be a field device problem.
• There is an open loop or too much resistance in the loop.
• There may be an I/O pack failure.
• There may be a terminal board failure.

Solution

• Verify that the commanded output is within the range of the output.
• Confirm the correct I/O pack 28 V input power.
• Check the field wiring and the device. The problem is usually not a PCAA or terminal board failure if other analog
outputs are working correctly.
• Replace the I/O pack.

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184-188
Description Analog Output [ ] Total current fdbk unhealthy

Possible Cause

• The commanded output is beyond the range of the output.


• There may be a field wiring problem.
• There may be a field device problem.
• There may be an open loop or too much resistance in the loop.

Solution

• Verify that the commanded output is within the range of the output.
• Confirm the correct I/O pack 28 V input power.
• Check the field wiring and the device.
• Check the PCAA- TCAT cables. The problem is usually not a PCAA or terminal board failure if other analog Inputs are
working correctly.
• Replace the I/O pack.

189-190
Description Analog Output (TCAS) [ ] 20 mA suicide active

Possible Cause

• There may be a field wiring problem.


• The connected device may have problems that are interfering with the current.
• There may be a hardware failure.

Solution

• Check the field wiring and the status of the connected device.
• If there is a hardware failure, replace the PCAA.

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191-193
Description Analog Output (TCAT) [ ] 20 mA suicide active

Possible Cause

• Review any additional diagnostics for possible causes.


• The TMR_SuicLimit parameter is set too low.
• There may be a field wiring problem.
• The command is beyond the range of the output.
• There may be a terminal board failure.

Solution

• Check the field wiring and the status of the connected device.
• Verify that the TCAT-PCAA cables are fully seated in the connectors.
• Verify that the value of the parameter TMR_SuicLimit is set correctly.
• Verify the field wiring connections.
• Verify that the commanded output is within output range.
• Replace the PCAA module.
• Replace the TCAT terminal board.

194-195
Description Analog Output (TCAS) [ ] Suicide relay non-functional

Possible Cause The analog output suicide relay command does not match the feedback.

• There may be a relay failure on the acquisition board.


• There may be a hardware failure.

Solution If there is a hardware failure, replace the PCAA.

196-198
Description Analog Output (TCAT) [ ] Suicide relay non-functional

Possible Cause The analog output suicide relay command does not match the feedback.

• There may be a relay failure on the acquisition board.


• There may be a hardware failure.

Solution If there is a hardware failure, replace the PCAA.

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GE Internal
199-204
Description Servo [ ] Position Feedback out of range

Possible Cause

• The LVDT position feedback is outside the specified range.

Solution

• Check the LVDT configuration settings.


• Calibrate the affected regulator.
• Check the field wiring.
• Check for a shorted or open-position sensor coil.
• Verify the mechanical integrity of the position sensor.
• Verify that the TCAT-PCAA cables are fully seated.

205-210
Description Servo [ ] Pressure Feedback out of range

Possible Cause

• The pressure feedback used in a servo regulator is outside the specified range.

Solution

• Check the source of the pressure signal, including the sensor, field wiring, and configuration.
• Verify the terminal board jumper settings for the analog inputs.

211-216
Description Servo [ ] Flow Feedback out of range

Possible Cause

• The flow feedback used in a servo regulator is outside the specified range.

Solution

• If the out-of-range flow input is connected to the parameter FlowRate3 or FlowRate4 (TTL Pulse input), check the
power to device, the field wiring, the sensor, and the configuration.
• If the out-of-range flow input is connected to the parameter FlowRate1 or FlowRate2 (Magnetic pickup), check the
device, the field wiring, the input configuration, and the TCAT-PCAA cables.
• Check the gap between the sensor and the flow wheel.

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217
Description TCAT Configuration and Hardware Mismatch

Possible Cause This diagnostic is only generated on power-up.

• The TCAT is configured in the ToolboxST application, but the terminal board is not connected.
• The TCAT is not configured in the ToolboxST application, but the terminal board is connected.

Solution

• Verify that the TCAT selection in the ToolboxST configuration matches the actual hardware.
• Verify that the P1 and P2 cable connections are not swapped.
• Verify the the TCAT terminal board P1 and P2 cable connections are screwed down, and all terminal boards are properly
grounded.
• Perform a power-down reset to clear.

218
Description TCAT Connector P1 and P2 Types Mismatch

Possible Cause The Type ( for example, R/R or S/S or T/T) of P1 and P2 connections between the TCAT and the TCAS
do not match. The Valid combinations are:

• P1(TCAS)-PR1(TCAT) & P2(TCAS)-PR2(TCAT)


• P1(TCAS)-PS1(TCAT), P2(TCAS)-PS2(TCAT)
• P1(TCAS)-PT1(TCAT), P2(TCAS)-PT2(TCAT)

Solution

• Check the ToolboxST configuration, as well as the TCAT terminal board P1 and P2 cable connections between the TCAS
and the TCAT.
• Verify that there is no Type (R/R,S/S,T/T) mismatch.

221
Description Calibration Mode Enabled

Possible Cause

• One of the CalibEnab# outputs is set to True.

Solution

• This alarm is active to annunciate that the board is in a special mode (the servo suicide protection has been disabled, and
the user needs to take special precautions).
• Set CalibEnab# to False.

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GE Internal
1050-1145
Description Logic Signal [ ] Voting Mismatch

Possible Cause N/A

Solution N/A

1146-1238
Description Input Signal [ ] Voting Mismatch, Local [ ], Voted [ ].

Possible Cause

• A voter disagreement was detected between the R, S and T controllers.

Solution Adjust the specified parameter below for each input type:

• If the input variable is AnalogInput[ ], adjust the TMR_DiffLimit.


• If the input variable is PulseInput[ ], adjust the TMR_DiffLimit.
• If the input signal is LVDT[ ], adjust the LVDT_TMR_DiffLimit on the Parameters tab.
• If the input variable is ServoOutput[ ]:
− Adjust the TMR_DiffLimit on the Regulators tab.
− Also check for a mismatch in the coil resistance between the R, S and T servo coils.
− Reg#_Gain is set too high for specified TMR_DiffLimit value.

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2.3 TCAT Core Analog Terminal Board
2.3.1 Functional Description
The Core Analog (TCAT) terminal board provides additional I/O terminals for the PCAA module. It handles input signals that
are fanned to one or three PCAA modules. Inputs include twelve seismic, twelve LVDT, twenty four 4-20 mA, and two
magnetic pulse rate inputs. An individual 24 V dc power source is included for all twenty four 4-20 mA inputs with half on
TCAT and half on an adjacent JGPA board. TCAT outputs consist of three 4-20 mA voted signals.
Field wire terminal points are provided by 120 pluggable Euro style box-type terminal blocks. Terminal grouping is a set of
48 terminals, a set of 24, and a second set of 48. A JGPA board adjacent to the TCAT field terminals provides twelve
additional 24 V dc outputs for 4-20 mA devices as well as shield wire terminals. Power to JGPA is supplied by TCAT
connector P3 or P4 and is the diode-or of power from the connected PCAA modules.
Pairs of 68 pin cables provide connection between TCAT and one or more PCAA modules. PR1 and PR2 go to a PCAA
connected to the R IONet. PS1 and PS2 go to a PCAA connected to the S IONet. PT1 and PT2 go to a PCAA connected to
the T IONet. TCAT provides an electronic ID on each cable connection. Cables are always used in pairs and PCAA uses the
electronic ID to confirm that correct TCAT cables are in place.

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GE Internal
TCAT Terminal Board

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2.3.2 Installation
TCAT with an underlying insulating plastic carrier mounts to a metal back base. Screws are located at the top and bottom of
the field terminals with a third screw approximately in the center of the board.

2.3.2.1 Wiring
The TCAT terminal board features 120 pluggable Euro style box-type terminal blocks. A JGPA board mounts adjacent to the
TCAT terminal board and uses Euro style box-type terminal blocks to provide forty-eight shield termination points plus
twelve 24 V dc output terminals for 4-20 mA transmitters. The Euro style box-type terminal blocks on TCAT accept
conductors with the following characteristics:

TCAT Terminal Conductor Size Range

Conductor Type Minimum Maximum


Conductor cross section solid 0.2 mm² 2.5 mm²
Conductor cross section stranded 0.2 mm² 2.5 mm²
Conductor cross section stranded, with ferrule without plastic sleeve 0.25 mm² 2.5 mm²

Conductor cross section stranded, with ferrule with plastic sleeve 0.25 mm² 2.5 mm²

Conductor cross section AWG/kcmil 24 AWG 12 AWG


2 conductors with same cross section, solid 0.2 mm² 1 mm²
2 conductors with same cross section, stranded 0.2 mm² 1.5 mm²
2 conductors with same cross section, stranded, ferrules without plastic sleeve 0.25 mm² 1 mm²

2 conductors with same cross section, stranded, TWIN ferrules with plastic sleeve 0.5 mm² 1.5 mm²

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GE Internal
TCAT Screw Terminal Assignments

# Name Function # Name Function


1 AFT1H Analog Fanned #1 3 AFT2H Analog Fanned #2

2 AFT1L 4 AFT2L
5 AFT3H Analog Fanned # 3 7 AFT4H Analog Fanned # 4

6 AFT3L 8 AFT4L
9 AFT5H Analog Fanned # 5 11 AFT6H Analog Fanned # 6

10 AFT5L 12 AFT6L
13 AFT7H Analog Fanned # 7 15 AFT8H Analog Fanned # 8

14 AFT7L 16 AFT8L
17 AFT9H Analog Fanned # 9 19 AFT10H Analog Fanned # 10

18 AFT9L 20 AFT10L
21 AFT11H Analog Fanned # 11 23 AFT12H Analog Fanned # 12

22 AFT11L 24 AFT12L
25 APWR13 24 V power 39 AFT13H Analog Fanned # 13

26 no connect 40 AFT13L
27 APWR14 41 AFT14H Analog Fanned # 14

28 APWR15 42 AFT14L
29 APWR16 43 AFT15H Analog Fanned # 15

30 APWR17 44 AFT15L
31 APWR18 45 AFT16H Analog Fanned # 16

32 APWR19 46 AFT16L
33 APWR20 24 V power output for 4-20 mA 47 AFT17H Analog Fanned # 17
input devices

34 APWR21 48 AFT17L
35 APWR22 49 AFT18H Analog Fanned # 18

36 APWR23 50 AFT18L
37 APWR24 51 AFT19H Analog Fanned # 19

38 PCOM Common 52 AFT19L


53 AFT20H Analog Fanned # 20 55 AFT21H Analog Fanned # 21

54 AFT20L 56 AFT21L
57 AFT22H Analog Fanned # 22 59 AFT23H Analog Fanned # 23

58 AFT22L 60 AFT23L
61 AFT24H Analog Fanned # 24 63 VFI1H Seismic Input # 1

62 AFT24L 64 VFI1L
65 VFI2H Seismic Input # 2 67 VFI3H Seismic Input # 3

66 VFI2L 68 VFI3L
69 VFI4H Seismic Input # 4 71 VFI5H Seismic Input # 5

70 VFI4L 72 VFI5L
73 VFI6H Seismic Input # 6 75 VFI7H Seismic Input # 7

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TCAT Screw Terminal Assignments (continued)

# Name Function # Name Function


74 VFI6L 76 VFI7L
77 VFI8H Seismic Input # 8 79 VFI9H Seismic Input # 9

78 VFI8L 80 VFI9L
81 VFI10H Seismic Input # 10 83 VFI11H Seismic Input # 11

82 VFI10L 84 VFI11L
85 VFI12H Seismic Input # 12 87 MFI1H Mag pickup flow input

86 VFI12L 88 MFI1L
89 MFI2H Mag pickup flow input 91 LVDTH1 LVDT Input # 1

90 MFI2L 92 LVDTL1
93 LVDTH2 LVDT Input # 2 95 LVDTH3 LVDT Input # 3

94 LVDTL2 96 LVDTL3
97 LVDTH4 LVDT Input # 4 99 LVDTH5 LVDT Input # 5

98 LVDTL4 100 LVDTL5


101 LVDTH6 LVDT Input # 6 103 LVDTH7 LVDT Input # 7

102 LVDTL6 104 LVDTL7


105 LVDTH8 LVDT Input # 8 107 LVDTH9 LVDT Input # 9

106 LVDTL8 108 LVDTL9


109 LVDTH10 LVDT Input # 10 111 LVDTH11 LVDT Input # 11

110 LVDTL10 112 LVDTL11


113 LVDTH12 LVDT Input # 12 115 ATOH3 TMR 4-20 mA

114 LVDTL12 116 ATOL3


117 ATOH4 TMR 4-20 mA 119 ATOH5 TMR 4-20 mA
118 ATOL4 120 ATOL5

2.3.3 Operation
TCAT provides fanning of input signals to one or more PCAA modules. This is done with high reliability passive circuits to
ensure reliability in redundant applications.
TCAT accepts 28 V dc power from connected PCAA modules. It then does a diode-or of the power sources to obtain
redundant power input for the 24 V dc outputs. Each 24 V output on TCAT is provided with an individual voltage regulator
that includes thermal shutdown for branch circuit protection.

Note An over current condition on one 24 V dc output will result in only that output being shut down. When the overload is
removed the terminal will return to 24 V dc.

TCAT accepts ±15 V dc power from connected PCAA modules. It then does a diode-or of the power sources to obtain
redundant power. The ±15 V dc power is then used internally to voltage bias the seismic inputs.

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2.3.4 Specifications
For details of the signals on TCAT, refer to the PCAA section, Specifications.

Item TCAT Specification


Number of inputs Twenty-four 4-20 mA signals.
Twelve seismic signals.
Twelve LVDT windings.
Two magnetic pulse rate flow signals.

Number of outputs Three 4-20 mA hardware voted analog outputs.


Twelve 24 V dc outputs with 25 mA capability.
Twelve 24 V dc additional outputs on JGPA with 25 mA capability.

Power supply voltage 28 V dc ±5% from one or more PCAA modules.


±15 V dc from one or more PCAA modules.
(both supplies routed through the cabling between PCAA and TCAT).

Pulse rate input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 66 mV p-p
12 kHz requires 1664 mV p-p
20 kHz requires 3200 mV p-p

Size 33.02 cm high x 17.8 cm wide (13 in x 7 in)

Technology Surface-mount

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2.3.5 Configuration

2.3.5.1 Analog Input


The TCAT is able to interface with several different types of 4-20 mA transmitters. Each input has a jumper next to the
terminals that is used to determine if the return terminal is grounded or floating. The default position of the jumper is floating
or open. The combination of TCAT + JGPA provides twenty-four 24 V dc terminals, one for each 4-20 mA transmitter input.

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2.4 JGPA Ground and Power Board
2.4.1 Functional Description
The PCAA core analog module and TCAT terminal board each provide twelve 4-20 mA inputs that are not provided with 24
V power for field devices. The Ground and Power (JGPA) board is a long narrow board that mounts adjacent to PCAA where
shield wires are terminated. JGPA provides shield wire terminal points that may be tied directly to the underlying functional
earth sheet metal or wired to a preferred grounding point. In this respect it is very similar to the JGND board offered as an
option with other Mark VIe terminal boards. JGPA also provides twelve individually regulated and protected 24 V field
device power outputs. Each output is sufficient to power a single 4-20 mA field device.
JGPA receives power from PCAA or TCAT through a 28 V power feed on connector P1. Power passes through twelve
regulators and is available on TB3 screws 1-12. TB3 uses terminals colored orange to set them apart from the terminals
provided for shield wire termination. Shield terminals are on TB1 and TB2 using twenty-four conventional green Euro style
box-type terminal blocks for each.

JGPA Terminal Board

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2.4.2 Installation
JGPA is installed adjacent to the terminals on PCAA and TCAT. Power is provided to JGPA through a cable from P1 to
PCAA or TCAT. JGPA mounts on a sheet metal bracket that is at ground potential. When mounted with conductive hardware
the ground path for JGPA shield wires is through the mounting bracket. If alternate shield wire grounding is desired the JGPA
may be mounted with non-conductive washers and hardware. With isolated mounting, ground is defined by one or more wires
from JGPA shield ground terminals to the desired ground location.
The terminals on JGPA have the following conductor capacities.

Conductor Type Minimum Maximum


Conductor cross section solid 0.2 mm² 2.5 mm²
Conductor cross section stranded 0.2 mm² 2.5 mm²
Conductor cross section stranded, with ferrule without plastic sleeve 0.25 mm² 2.5 mm²

Conductor cross section stranded, with ferrule with plastic sleeve 0.25 mm² 2.5 mm²

Conductor cross section AWG/kcmil 24 AWG 12 AWG


2 conductors with same cross section, solid 0.2 mm² 1 mm²
2 conductors with same cross section, stranded 0.2 mm² 1.5 mm²
2 conductors with same cross section, stranded, ferrules without plastic sleeve 0.25 mm² 1 mm²

2 conductors with same cross section, stranded, TWIN ferrules with plastic sleeve 0.5 mm² 1.5 mm²

2.4.3 Operation
JGPA provides regulated 24 V dc power to the twelve terminals of TB3. An over current condition on one 24 V dc output
results in only that output being shut down. When the overload is removed, the terminal returns to 24 V dc.

2.4.4 Specifications
Item JGPA Specification
Number of ground points 24 terminals on TB1 and 24 terminals on TB2. Ground points use green terminal housings.

Outputs 12 outputs at 24 V dc ±5%, 30 mA capability on TB3. Power outputs use orange terminal
housings.

Size 33 cm high x 3.2 cm wide (13 in x 1.25 in)

Technology Through hole

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Notes

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3 PCLA Core Analog Module — Aero
3.1 PCLA Core Analog I/O for Aero
The Core Analog I/O for aeroderivative gas turbines (PCLA) and associated Core
Analog (SCLS and SCLT) terminal boards provide a large portion of the analog signal
I/O required to operate an engine. PCLA and SCLT provide thermocouple inputs, RTD
inputs, voltage inputs, and 4-20 mA current loop inputs and outputs. PCLA can be
applied in simplex controller simplex I/O, dual controller simplex I/O, dual controller
TMR I/O and TMR controller TMR I/O control systems. A single SCLT terminal board
fans signal inputs to one or three connected PCLA(s).

PCLA provides the electrical interface between one or two Ethernet I/O networks and
the terminal board. Inside the PCLA module is a BCLA acquisition board and a BPPx
processor board. Input to the PCLA module is through dual RJ-45 Ethernet connectors
and a 28 V dc power connector P1.

Field device I/O is connected through 72 Euro style box-type terminal blocks on the
SCLS edge and is connected through 48 Euro style box-type terminal blocks on the
SCLT edge. Connection to SCLS is through 96-pin J3 and 48-pin J4 connectors on
SCLS. The connection between SCLS and SCLT is through one 68-pin cable on the J2
connector on SCLS, and the JR/JS/JT connector on SCLT.

3.1.1 Compatibility
The PCLA includes one of the following compatible processor boards.

• The PCLAH1A contains a BPPB processor board.


• The PCLAH1B contains a functionally compatible BPPC that is supported with ControlST* software suite V04.03 and
higher.
The PCLA module is fully compatible with other Mark VIe control system I/O packs and controllers. The PCLA module is
designed to run at frame rates of 10, 20, 40, 80, 160, 320 ms. PCLA supports frame rates, redundancy, and networking as
indicated in the following table.

PCLA IONet SCLT Comments


Quantity Connections Connections
Simplex 0 or 1 SCLT optional on simplex configurations. One or two IONets supported.

TMR 1 Normal TMR configurations (TPTN) will have one network per PCLA.
TMR pack Dual network (TPDN) configurations will have dual networks
1 or 2
connected on the T PCLA. Refer to GEH-6271, Mark VIe Control,
Volume I System Guide, Chapter 2 System Architecture, the section,
Redundancy Options.

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3.1.1.1 Hardware Options
The signals on TMR PCLAs are separated into two groups. Signal inputs that can be fanned from a single input into a TMR
PCLA are routed through the SCLT terminal board. Signals that are dedicated to a single TMR PCLA are wired to the
terminals on SCLS. This creates the signal split as indicated in the following table.

Note It is possible to use TMR PCLAs without SCLT if the fanned inputs are not required.It is possible to use TMR PCLAs
without SCLT if the fanned inputs are not required.

SCLS Terminals SCLT Terminals


# Signal Type Screws/ # Signal Type Screws/ Signal
Signals Signal Signals

8 Thermocouples 2 8 Fanned Thermocouples 2

4 Analog 4-20 mA inputs or ±10 4 4 Fanned Analog 4-20 mA inputs or 4


V inputs or ±5 V inputs ±10 V inputs or ±5 V inputs

8 RTD 3 6 TMR (Triple Modular Redundant) 2


Analog 4-20 mA outputs

1 Analog 4-20 mA outputs 2 1 Common connection 4

1 Common connection 6
NC (Not Connected) Screws 8

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PCLA Core Analog Module

28 V dc
power input

Ethernet
Terminals for Connectors
field devices

SCLT
Connectors

PCLA Module fitting


screws

SCLS Plates SCLS Base screws


4 corners

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Magnified View of Connectors

BCLA is the acquisition board. The processor board resides on BCLA. SCLS is the simplex terminal board.

PCLA Simplex with SCLS

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SCLT is the terminal board, which can be used either for simplex Input/Outputs or for fanned inputs, redundant outputs.
When the SCLT is used with a simplex PCLA module, the concept of fanning does not apply. Instead, the SCLT serves as a
simplex I/O expansion board as displayed in the following figure.

PCLA Simplex with SCLT for More I/O Channels

PCLA TMR with SCLT

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3.1.2 Installation
➢ To install the PCLA module
1. Securely mount the SCLS board with the help of four mounting holes at the four corners.
2. Directly plug the PCLA into the terminal board connectors J3 and J4.
3. Mechanically secure the pack using two-side mounting holes.
4. If SCLT is the part of configuration then the SCLT and a plastic insulator mount on a sheet metal carrier that then mounts
on a DIN-rail. Optionally, the SCLT and plastic insulator mounts on a sheet metal assembly and then bolts directly to a
cabinet.

Note Refer to the PCLA Core Analog figure in the section, Hardware Options.

5. Connect the SCLS to an optional associated SCLT terminal board using one 68-pin cable. The connection between SCLS
and SCLT is through one 68-pin cable on the J2 connector on SCLS and the JR/JS/JT connector on SCLT.
6. If using a simplex configuration, connect the JR connector on SCLT to the J2 connector on SCLS through the 68-pin
cable. If using a TMR configuration, connectors on SCLT are paired by a network connection. For example, JR1 connects
to the SCLS-PCLA through the R controller network, JS connects to the SCLS-PCLA through the S controller, and JT
connects to the SCLS-PCLA through the T controller. It is important to fully seat the cable mounting screws, finger-tight
only, into PCLA and SCLT to ensure proper cable grounding. Failure to secure the cables may result in an inability of
PCLA to read the electronic ID on SCLT and may reduce the quality of other signals.

Note When removing 68-pin cables, ensure that the hex posts in the board-mounted connectors do not turn when backing
out the cable thumbscrews.

7. Plug in one or two Ethernet cables depending on the system configuration. When a single IONet connection is used, the
module operates correctly over either port. If dual connections are used, standard practice is to hook ENET1 to the
network associated with the R controller. However, the PCLA is not sensitive to Ethernet connections, and negotiates
proper operation over either port. If TMR PCLA modules are present, the network connection should match with the
connection made to the SCLT. For example, the PCLA module with R IONet connection should have cables that go to the
SCLT JR connector.
8. Check grounding of the SCLS/SCLT shield wire terminals. In most applications, shield ground terminals are electrically
tied to the sheet metal the board is mounted on. The mounting then supplies the ground path for the terminals.
9. Apply power to the module through the P1 connector on PCLA and check the power and Ethernet status indicator lights.
10. Use the ToolboxST* application to configure the PCLA as necessary. Refer to GEH-6700, ToolboxST User Guide for
Mark VIe Control, for more information.

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3.1.3 Operation
The following features are common to the distributed I/O modules:

• Auto-Reconfiguration
• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Module Alarms

Note Refer to GEH-6721_Vol_II, the chapter Common I/O Module Functionality.

3.1.3.1 PCLA Connectors


• ENET1 is an RJ-45 Ethernet connector located on the side of PCLA, and used for IONet.
• ENET2 is a second RJ-45 Ethernet connector located on the side of PCLA, and used for IONet.
• P1 is a 3-pin power connector on PCLA for 28 V dc input power for the module and terminal boards.
• J2 is a connector on SCLS that provides cable connections to the SCLT terminal board.

3.1.3.2 Module Overview


The PCLA module consists of two separate circuit boards in a single physical assembly: a BCLA acquisition board and a
BPPx processor board. The BCLA is interfaced with an SCLS and an optional SCLT in simplex configuration. In TMR, one
SCLT is connected to three (SCLS-PCLA) sets. Typical block diagram of the PCLA along with the terminal boards is
displayed in the following figure.

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PCLA-SCLS-SCLT Block Diagram

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3.1.3.3 BCLA Analog Processing Board
Inside the module cover the BCLA board provides power, analog signal conditioning, and analog/digital conversion. BCLA is
the main printed circuit board in the PCLA module. This board provides the main ±15 V power and the majority of the digital
and analog interface to the processor board. In addition, this board provides the signal conditioning required to interface the
thermocouples, analog inputs, RTDs and the analog outputs.

3.1.3.4 Thermocouples
The PCLA supports E, J, K, S, and T types of thermocouples. Simplex inputs from field are terminated on SCLS. There are
eight simplex thermocouple inputs. TMR inputs from field are terminated on SCLT and then fanned out to three PCLA
modules. There are eight fanned (TMR) thermocouple inputs.
The PCLA input board accepts 16 (8 each from SCLS and SCLT) signals at mV levels from the thermocouples wired to the
terminal board. The thermocouple input section consists of differential multiplexers, amplifier gain stages, a main multiplexer,
and a 16-bit analog to digital converter that sends the digital data to the adjacent processor board. Each input has hardware
filters, and the converter samples at up to 120 Hz.
Thermocouples can be grounded or ungrounded. Thermocouples can be located up to 300 meters (984 feet) from the turbine
I/O cabinet with a maximum two-way cable resistance of 450 Ω. Linearization for individual thermocouple types is
performed by the PCLA.

PCLA TC Section
A single cold junction is provided with each SCLS board. Three cold junctions, one for each PCLA, are provided on SCLT.
The module accepts a controller backup cold junction value, CJBackup, in the event a problem is detected with the local
sensor. The PCLA may be configured to use a controller-provided remote cold junction value, CJRemote.
All thermocouple inputs are biased with a dc voltage that will drive the temperature signal full scale negative if an open wire
occurs. There is a configuration to report an open thermocouple as fail cold or fail hot. Measurement accuracy for
thermocouple is 0.1% full scale, or 53 uV excluding the cold junction reading.

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3.1.3.5 Thermocouple Limits
Thermocouple inputs support a full-scale input range of -16.0 mV to + 63.0 mV. The following table demonstrates typical
input voltages for different thermocouple types versus the minimum and maximum temperature range. The cold junction
temperature is assumed to range from -50 to 85°C (-58 to 185 °F).

Note The units (°C or °F) are based on the ThermCplUnit settings. Refer to the section, Configuration.

Thermocouple Type E J K S T
Low range, °F -60 -60 -60 0 -60

°C -51 -51 -51 -17.78 -51


mV at low range with reference at 70°C (158 °F) -7.174 -6.132 -4.779 -0.524 -4.764

High range, °F 1100 1400 2000 3200 750

°C 593 760 1093 1760 399


mV at high range with reference at 0°C (32 °F) 44.547 42.922 44.856 18.612 20.801

3.1.3.6 Analog Voltage or Current Inputs


±10 V voltage inputs
±5 V voltage inputs
4-20 mA current inputs
The inputs can be configured as current or voltage inputs using jumpers (JP#A) on SCLS or SCLT. The PCLA accepts input
voltage signals from the terminal board, four input channels from SCLS and four input channels form SCLT. The analog input
section consists of analog multiplexer blocks, several gain and scaling selections, and a 16-bit analog-to-digital converter.

PCLA Analog Input Section

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The inputs can be individually configured as ±5 V or ±10 V scale signals or 4-20 mA, depending on the input configuration.
The terminal board provides a 250 Ω burden resistor when configured for current inputs yielding a 5 V signal at 20 mA.
These analog input signals are first passed through a passive, low-pass filter network with a pole at 75.15 Hz. The
measurement accuracy offered by PCLA is 0.1% of the full scale over the operating temperature range.
The inputs can be configured as current or voltage inputs using jumpers (JP#A) on the terminal boards SCLA/SCLT. The
JP#A jumper removes the 250 Ω burden resistor for voltage input applications. Each input has one more jumper (JP#B) on the
board that is used to determine if the return terminal is grounded or floating.

3.1.3.7 RTD Inputs


The terminal board supplies a 1 mA dc multiplexed (not continuous) excitation current to each RTD. The eight RTDs can be
located up to 300 m (984 ft) from the turbine control cabinet with a maximum two-way cable resistance of 15 Ω. The
on-board noise suppression is provided on SCLS. The first two RTD channels (1 and 2) can be configured for either fast or
normal mode scanning. Channels 3 to 8 are only normal mode scan channels. Fast RTDs are scanned 25 times per second and
slow RTD channels are scanned four times per second using a time sample interval related to the power system frequency.
The processor performs linearization for the selection of RTD types. PCLA RTD signals are as follows.

RTD Signals on PCLA

Note The PCLA accepts eight 3-wire RTD inputs from the SCLS terminal board.

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The following table indicates the types of RTD used and the temperature ranges.

RTD Type Name/Standard Configuration Range °C Range °F


Name **
100 Ω platinum SAMA 100 PT100_SAMA -51 to 593 -60 to 1100
DIN 43760 PT100_DIN -51 to 852 -60 to 1566
IEC-751
MINCO_PD
MINCO_PE
PT100_DIN
MINCO_PA MINCO_PA -51 to 630 -60 to 1167
IPTS-68
PT100_PURE
MINCO_PB MINCO_PB -51 to 630 -60 to 1166
PT100_USIND
Rosemount 104 Rosemount 104 -51 to 630 -60 to 1166
120 Ω nickel MINCO_NA MINCO_NA -51 to 259 -60 to 499
N 120
200 Ω platinum PT 200 MINCO_PK -51 to 629 -60 to 1164
MINCO_PN MINCO_PN -51 to 629 -60 to 1164
** PCLA does not support the MINCO_CA and CU10 RTD types.

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3.1.3.8 Analog Current Outputs (0-20 mA)
The PCLA 0-20 mA analog outputs are capable of 18 V compliance voltages. A 14-bit Digital to Analog converter commands
a current reference to the current regulator loop in the PCLA that senses current both in the PCLA and on the terminal board.
In TMR mode, the three current regulators in each PCLA share the commanded current loads among themselves. Analog
output status feedbacks for each output include:

• Current reference voltage


• Individual current (output current sourced from within the PCLA)
• Total current (as sensed from the terminal board, summed current in TMR mode)

Note PCLA supports one simplex 0-20 mA output through SCLS and six 0-20 mA simplex/ TMR (voted) configurable set
of outputs through SCLT.

Analog Current Outputs


Each analog output circuit also includes a normally open mechanical relay to enable or disable operation of the output. The
relay is used to remove a failed output from a TMR system allowing the remaining two PCLAs to create the correct output
without interference from the failed circuit. When the output enable relay is de-activated, the output opens through the relay,
open-circuiting that PCLA's analog output from the customer load that is connected to the terminal board.
The mechanical relay’s second normally open contact is used as a status to indicate position of the relay to the control and
includes an LED. One amber LED per channel indicates the output enable relay status for each analog output. When the
enabled output of a particular channel is normal, the LED is turned on. If incorrect operation of the output is detected, the
relay is automatically opened to protect the connected device against excessive output current and the LED is turned off.

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3.1.3.9 Conditions for Operating the Output Enable Relay to De-energized State
The analog output enable relay is enabled only under the following conditions:
Condition 1:

• PCLA configuration must be TMR


• SuicEnable must be set to True from configuration
• Individual current feedback is greater than half of total current feedback plus TMR_DiffLimit set from the ToolboxST
application
Condition 2:

• PCLA configuration must be TMR


• SuicEnable must be set to True from configuration
• Percentage Difference in commanded AnalogOut value and Reference feedback by Full-scale Analog Output is greater
than D/A_ErrLimit set from the ToolboxST application.
The accuracy of the output is 0.5% of full scale and the maximum output load supported is 800 Ω.

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3.1.4 Specifications
The following table provides information specific to the PCLA module with the SCLS and SCLT terminal boards included.

Item PCLA Specification


Number of channels Simplex SCLS has 8 thermocouples, 4 analog inputs, 8 RTDs, 1 current output
SCLT (Simplex configuration) has 8 thermocouples, 4 analog inputs, 6 current outputs

Number of channels TMR SCLT (TMR configuration) has 8 thermocouples, 4 analog inputs, 6 current outputs

Power Supply Input voltage 28 V dc ±5% through P1 on PCLA

Power consumption 19.8 W maximum

Boards BCLA, SCLS, SCLT (optional), processor board

Fault detection Incorrect ID chip on each board


† Ambient rating for enclosure design PCLAH1B is rated from -40 to 70ºC (-40 to 158 ºF)
PCLAH1A is rated from -30 to 65 ºC (-22 to 149 ºF)
† Refer to GEH-6721_Vol_I, the chapter Technical Regulations, Standards, and Environments.
Technology Surface mount for all boards

Thermocouple

Number of channels 8 channels on SCLS, 8 channels on SCLT

Thermocouple types E, J, K, S, T thermocouples, and mV inputs

Span -16.0 mV to +63.0 mV

A/D converter resolution 16-bit A/D converter


Cold junction compensation Reference junction temperature measured

Cold junction temperature accuracy Over the Celsius operating range: 1.1°C
Over the Fahrenheit operating range: 2 °F

Measurement accuracy 53 µV (excluding cold junction reading). ±0.1% FS for simplex thermocouple inputs
Example: For type K, at 1000 °F, including cold junction contribution,
RSS error= 3 °F
74.2 µV (excluding cold junction reading). ±0.14% FS for fanned thermocouple inputs

Common mode rejection Ac common mode rejection 110 dB at 50/60 Hz, for balanced impedance input. Both hardware and
firmware filtering

Common mode voltage ±5 Volts

Normal mode rejection Rejection of 250 mV rms at 50/60 Hz, ±5%,


Both hardware and firmware filtering provides a total of 80 dB NMRR

Scan time All inputs are sampled at up to 120 times per second per input

Maximum lead resistance 450 Ω maximum two-way cable resistance, cable length up to 300 m (984 ft)

Fault detection High/low (hardware) limit check


Monitor readings from all thermocouples, cold junctions, calibration voltages, and calibration zero
readings

Analog Inputs

Number of channels 4 channels on SCLS, 4 channels on SCLT

Input span ±5 V dc, ±10 V dc, or 0-20 mA

Input span, transmitters 1 - 5 V dc across a precision resistor (usually 250 Ω)

A/D converter resolution 16-bit A/D converter


Scan time 8.33 ms for 60 Hz line frequency, 10 ms for 50 Hz line frequency

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Item PCLA Specification
Measurement accuracy 0.1% of full scale over the full operating temperature range

Noise suppression on inputs A hardware filter with cut off frequency at 76 Hz, single pole down break at 500 rad/sec. A software
filter, using a two-pole, low-pass filter, is configurable for: 0 Hz, .75 Hz, 1.5 Hz, 3 Hz, 6 Hz, 12 Hz

Common mode rejection Ac common mode rejection 60 dB at 60 Hz, with up to ±5 V common mode voltage.
Dc common mode rejection 80 dB with from -5 to +7 peak V common mode voltage

Common mode voltage range ±5 V (±2 V CMR for the ±10 V inputs)

Maximum lead resistance 15 W maximum two-way cable resistance, cable length up to 300 m (984 ft).

Outputs 24 V dc outputs rated at 21 mA each

RTD Inputs

Number of channels 8 simplex channels of 3-wire RTDs on SCLS

RTD types 100, and 200 Ω platinum


120 Ω nickel
Scan time Normal scan 250 ms (4 Hz)
Fast scan 40 ms (25 Hz)

Measurement accuracy 0.1% of full scale

Common mode rejection Ac common mode rejection 60 dB at 50/60 Hz,


Dc common mode rejection 80 dB

Common mode voltage range ±5 Volts

Normal mode rejection Rejection of up to 250 mV rms is 60 dB at 50/60 Hz system frequency for normal scan

Maximum lead resistance 15 Ω maximum two-way cable resistance

Fault detection High/low (hardware) limit check

Analog Outputs

Number of channels 1 simplex channel on SCLS, 6 simplex / TMR channels on SCLT

Accuracy 0.5% full scale with respect to the command

Load on output currents 800 Ω burden for 4-20 mA output

Compliance Voltage 18 V dc (based on output load value)

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3.1.5 Diagnostics
The PCLA performs the following self-diagnostic tests:

• A power up self test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware.
• Continuous monitoring of the internal power supplies for correct operation
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set.
• As a group, the 4-20 mA analog inputs have a specified high and low current range for a valid signal. If a signal falls
outside the specified range, the signal health is declared to be bad.
• The analog input hardware includes precision reference voltages in each scan. Measured values are compared against
expected values, and are used to confirm the health of the analog to digital converter circuits. If the reference value does
not fall within a defined range, an alarm is generated to indicate a potential problem with signal accuracy.
• Analog output current is sensed on the terminal board using a small burden resistor. PCLA conditions this signal and
compares it to the commanded current to confirm the health of the digital to analog converter circuits.
• The analog output enable relay is continuously monitored for agreement between commanded state and feedback
indication.
Thermocouple circuits are biased with a small dc current. If a thermocouple circuit opens, the temperature signal goes to a
full-scale negative reading. There is a configuration to report an open thermocouple as fail cold or fail hot.

• Each RTD type has hardware limit checking based on preset (non-configurable) high and low levels set near the ends of
the operating range. If this limit is exceeded, an alarm is generated to indicate a potential problem with the signal.
• The resistance of each RTD is checked and compared with the correct value. If the resistance is high or low, a fault is
created.
Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be individually
latched, and then reset with the RESET_DIA signal if they go healthy. Additional diagnostic information may be found in the
PCLA Diagnostic Alarms section.

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GE Internal
3.1.6 Configuration

3.1.6.1 Parameters
Parameter Description Choices
Min_MA_Input Minimum mA for Healthy 4-20 mA Input 0 to 21 mA

Max_MA_Input Maximum mA for Healthy 4-20 mA Input 0 to 21 mA

RTDRate Select Scan Rate For RTD 1 and 2 Fast, Slow


SysFreq System Frequency (used for noise rejection) 60 Hz, 50 Hz

3.1.6.2 SCLS Analog Inputs

Input Description Choices


AnalogIn1 First of 10 Analog Inputs – board variable. Variable edit (Input FLOAT)

Input Type Current or voltage input type Unused, 4-20 mA, ±5 V,


±10 V
Low_Input Value of current at the low end of scale -10 to 20

Low_Value Value of input in engineering units at low end of scale -3.4082 e + 038 to 3.4028
e + 038
High_Input Value of current at the high end of scale -10 to 20

High_Value Value of input in engineering units at high end of scale -3.4082 e + 038 to 3.4028
e + 038
Input _Filter Bandwidth of input signal filter Unused, 0.75, 1.5 Hz, 3
Hz, 6 Hz, 12 Hz
DiagHighEnab Enable high input limit Enable, disable

DiagLowEnab Enable low input limit Enable, disable

3.1.6.3 SCLT Analog Inputs


Input Description Choices
AnalogIn1 First of 10 Analog Inputs – board variable. Variable edit (Input FLOAT)
Input Type Current or voltage input type Unused, 4-20 mA, ±5 V, ±10 V
Low_Input Value of current at the low end of scale -10 to 10
Low_Value Value of input in engineering units at low end of scale -3.4082 e + 038 to 3.4028 e + 038
High_Input Value of current at the high end of scale -10 to 10
High_Value Value of input in engineering units at high end of scale -3.4082 e + 038 to 3.4028 e + 038
Input _Filter Bandwidth of input signal filter Unused, 0.75, 1.5 Hz, 3 Hz, 6 Hz,
12 Hz
TMR Diff Limit Difference limit for voted inputs in % of high-low values 0 to 100
DiagHighEnab Enable high input limit Enable, disable
DiagLowEnab Enable low input limit Enable, disable

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3.1.6.4 TC Inputs
Input Description Choices
ThermocoupleX_(R, S, or First of 8 thermocouples, point signal Variable Edit (Input FLOAT)
T)
where X = 01 to 08
ThermoCpl Type Select thermocouples type or mV input Unused, mV, E, J, K, S, T
mV inputs are primarily for maintenance, but can also be used for
custom remote CJ compensation. Standard remote CJ
compensation also available.
ThermCplHot Select Open TC to be reported Failed Hot Disable, Enable
ThermCplUnit The ThermCplUnit parameter affects the native units of the deg_F, deg_C
controller application variable. It is only indirectly related to the tray
icon and associated unit switching capability of the HMI. This
parameter should not be used to switch the display units of the HMI.

Do not change the ThermCplUnit parameter in the


ToolboxST application because these changes will
require corresponding changes to application code
and to the Format Specifications or units of the
connected variable. This parameter modifies the
actual value sent to the controller as seen by
application code. Application code that is written to
Caution expect degrees Fahrenheit will not work correctly if
this setting is changed. External devices, such as
HMIs and Historians, may also be affected by
changes to this parameter.

3.1.6.5 RTD Inputs


Input Description Choices
RTD Inputs 8 RTD’s, point signal Variable Edit (Input FLOAT)
RTD Type Select RTD type or ohms input Unused,
RTD linearization supported by RTD PT100_DIN, MINCO_PA,
MINCO_PB, MINCO_PK,
MINCO_PA, MINCO_NA, MINCO_
PN
OHMS, PT100_SAMA,
ROSEMONT_104
RTDUnit Select RTD Display Unit Deg °C or °F deg_F, deg_C

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GE Internal
3.1.6.6 CJ Inputs
Input Description Choices
ColdJunction_(R, S, or T) Cold junction for TC 1- 8 Variable Edit (Input FLOAT)
ColdJuncType Select CJ Type Local, Remote
ColdJuncUnit Select CJ Display Unit Deg °C or °F deg_F, deg_C
This value needs to match units of attached variable.
TMR_DiffLimt Diag Limit, TMR Input Vote Difference, in Eng Units 0 to 100

(SCLT only)

3.1.6.7 Analog Outputs


Output Description Choices
AnalogOut01_(R, S, or T) First of 7 analog outputs is simplex only - board variable Variable edit (Output FLOAT)
Output_MA Type of output current, mA selection Unused, 0-20 mA
Output_State State of the outputs when offline PwrDownMode
Hold Last Value
Output_Value
Output_Value Pre-determined value for the outputs
Low_MA Output mA at low value 0 to 20 mA
Low_Value Output in Engineering Units at low mA -3.4082 e + 038 to 3.4028 e + 038
High_MA Output mA at high value 0 to 20 mA
High_Value Output value in Engineering Units at high mA -3.4082 e + 038 to 3.4028 e + 038
Suicide_Enab Suicide for faulty output current, TMR only Enable, disable
TMR SuicLimit Suicide threshold for TMR operation 0 to 20 mA
D/A Err Limit Difference between D/A reference and output, in % for 0 to 100%
suicide, TMR only

3.1.6.8 Variables
Variable Description-Variable Edit (Enter Direction Type
Signal Connection)
L3DIAG_PCLA I/O diagnostic indication Input BIT
LINK_OK_PCLA I/O link okay indication Input BIT
ATTN_PCLA I/O Attention Indication Input BIT
PS18V_PCLA I/O 18 V Power Supply Indication Input BIT
PS28V_PCLA I/O 28 V Power Supply Indication Input BIT
I/O packTmpr I/O pack temperature Input FLOAT
CJRemote1 SCLS CJ Remote value (deg °F) Output FLOAT
CJBackup1 SCLS CJ Backup value (deg °F) Output FLOAT
CJRemote2 SCLT CJ Remote value (deg °F) Output FLOAT
CJBackup2 SCLT CJ Backup value (deg °F) Output FLOAT

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3.1.6.9 AO Feedbacks
Feedback Description-Variable Edit (Enter Direction Type
Signal Connection)
AOutSuicide1_R Status of Suicide Relay for Output 1 Input FLOAT
AoutSuicide2 Status of Suicide Relay for Output 2 Input FLOAT
AoutSuicide3 Status of Suicide Relay for Output 3 Input FLOAT
AoutSuicide4 Status of Suicide Relay for Output 4 Input FLOAT
AoutSuicide5 Status of Suicide Relay for Output 5 Input FLOAT
AoutSuicide6 Status of Suicide Relay for Output 6 Input FLOAT
AoutSuicide7 Status of Suicide Relay for Output 7 Input FLOAT
AOutFbk1_R Feedback, Output Current, mA Input FLOAT
AoutFbk2 Total feedback, Output Current, mA Input FLOAT
AoutFbk3 Total feedback, Output Current, mA Input FLOAT
AoutFbk4 Total feedback, Output Current, mA Input FLOAT
AoutFbk5 Total feedback, Output Current, mA Input FLOAT
AoutFbk6 Total feedback, Output Current, mA Input FLOAT
AoutFbk7 Total feedback, Output Current, mA Input FLOAT

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3.2 PCLA Specific Alarms
The following alarms are specific to the PCLA Core Analog Module - Aero

32

Note This alarm is obsolete.

Description Unallowed VarIOCompatCode Change: Old - [ ]; New - [ ]

Possible Cause There is a .dll file (ToolboxST support file) installed that is incompatible with the firmware loaded on the
PCLA.

Solution

• Confirm the correct installation of the ToolboxST application.


• Rebuild the application, then download the firmware and application code to the affected PCLA.

33-36
Description Analog Input (Simplex) [ ] unhealthy

Possible Cause

• Excitation to transducer wrong or missing


• Transducer faulty
• Terminal board jumper settings do not match ToolboxST configuration
• Analog input current/voltage input beyond specified range
• Open or short-circuit on input

Solution

• Check the field wiring and the connections to the indicated analog input channel.
• Check the field device for failure.
• Check the ground select jumper for the input.
• Verify that the inputs are in operable range (3.0-21.5 mA, ±5.25 V, ±10.5 V).
• Verify that the configuration matches the terminal board jumper settings for the indicated analog input channel.

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37-40
Description Analog Input (SCLT) [ ] unhealthy

Possible Cause

• Excitation to transducer wrong or missing


• Transducer faulty
• Analog input current/voltage input beyond specified range
• Terminal board jumper settings do not match ToolboxST configuration
• Open or short-circuit on input

Solution

• Check the field wiring and connections to the indicated analog input channel.
• Check the field device for failure.
• Check the ground select jumper for the input.
• Verify that the cable between the SCLT - PCLA module is fully seated in the connector.
• Verify that the inputs are in operable range (3.0-21.5 mA, ±5.25 V, ±10.5 V).
• Verify that the configuration matches the terminal board jumper settings for the indicated analog input channel.
• Replace the SCLT - PCLA cable.

41-46
Description Analog Output [ ] Individual current feedback unhealthy

Possible Cause

• Commanded output beyond range of output


• Field wiring problem
• Field device problem
• I/O pack or module failure
• Terminal board failure

Solution

• Verify that the commanded output is within the range of the output.
• Confirm the correct I/O pack or module 28 V input power.
• Check the field wiring and the device.
• Replace the I/O pack or module.

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47-53
Description Analog Output [ ] Total current feedback unhealthy

Possible Cause

• Commanded output beyond range of output


• Field wiring problem
• Field device problem
• Open loop or too much resistance in the loop

Solution

• Verify that the commanded output is within the range of the output.
• Confirm the correct I/O pack or module 28 V input power.
• Check the field wiring and the device.
• For the analog outputs 2 through 7, check the cable between the PCLA module and the SCLT.
• Replace the I/O pack or module.

54-60
Description Analog Output [ ] Internal reference current unhealthy

Possible Cause

• I/O pack or module failure

Solution

• Confirm the correct I/O pack or module 28 V input power.


• Replace the PCLA module.

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61
Description Analog Output (Simplex) [ ] 20 mA suicide active

Possible Cause

• Suicide parameter enabled on analog output


• Review any additional diagnostics for possible causes.
• Analog output current feedback too high (30 mA)
• Parameter TMR_SuicLimit set too low
• Field wiring problem
• Command is beyond range of output

Solution

• Verify that the value of the parameter TMR_SuicLimit is set correctly.


• Verify that the value of the parameter D/A_ErrLimit is set correctly.
• Verify that the commanded output is within output range.

62-67
Description Analog Output (SCLT) [ ] 20 mA suicide active

Possible Cause

• Suicide parameter enabled on analog output


• Review any additional diagnostics for possible causes.
• Analog output current feedback too high (30 mA)
• Parameter TMR_SuicLimit set too low
• Field wiring problem
• Command beyond range of output

Solution

• Verify that the value of the parameter TMR_SuicLimit is set correctly.


• Verify that the value of the parameter D/A_ErrLimit is set correctly.
• Verify that the commanded output is within output range.

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68
Description Analog Output (Simplex) [ ] Suicide relay non-functional

Possible Cause

• Analog output suicide relay command does not match feedback


• Relay failure on acquisition board
• There is a hardware failure.

Solution Replace the PCLA.

69-74
Description Analog Output (SCLT) [ ] Suicide relay non-functional

Possible Cause

• Analog output suicide relay command does not match feedback


• Relay failure on acquisition board
• Hardware failure

Solution Replace the PCLA.

75
Description I/O module internal reference voltage out of limits [ ]

Possible Cause

• Internal calibration of inputs uses internal reference voltage. This reference voltage is more than ±5% from the expected
value, and indicates a hardware failure.

Solution

• Check the ground quality through the mounting bolts.


• Cycle power on the PCLA.
• Replace the PCLA.

104
Description I/O module internal null voltage out of limits [ ]

Possible Cause

• Internal calibration of inputs uses internal null voltage. This null voltage is more than ±5% from the expected value,
which indicates a hardware failure.

Solution

• Check the ground quality through the mounting bolts.


• Cycle power on the PCLA.
• Replace the PCLA module.

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133-140
Description Thermocouple (Simplex) [ ] Unhealthy

Possible Cause

• Thermocouple millivolt input on terminal board exceeded thermocouple range or hardware limit. Refer to the PCLA
module help documentation for specified thermocouple ranges.
• Thermocouple configured as wrong type.
• Board detected thermocouple open and applied bias to circuit driving it to large negative number, or TC not connected, or
condition such as stray voltage or noise caused input to exceed -63 mV.

Solution

• Check field wiring including shields. Check installation of PCLA module on terminal board. Problem is usually not a
PCLA module or terminal board failure, if other thermocouples are working correctly.
• Check thermocouple for open circuit.
• Measure incoming millivolt signal and verify that it doesn't exceed -63 mV.
• Verify that the thermocouple type matches the configuration.

141-148
Description Thermocouple (SCLT) [ ] Unhealthy

Possible Cause

• Thermocouple millivolt input on terminal board exceeded thermocouple range or hardware limit. Refer to PCLA module
help documentation for specified thermocouple ranges.
• Thermocouple configured as wrong type
• Board detected thermocouple open and applied bias to circuit driving it to large negative number, or TC not connected, or
condition such as stray voltage or noise caused input to exceed -63 mV.

Solution

• Ensure cable between SCLT - PCLA module is fully seated in connector.


• Check field wiring including shields. Check installation of PCLA on terminal board. Problem is usually not a PCLA or
terminal board failure if other thermocouples are working correctly.
• Check thermocouple for open circuit.
• Measure incoming millivolt signal and verify that it doesn't exceed -63 mV.
• Verify that the thermocouple type matches the configuration.

149
Description Cold Junction (SCLS) Unhealthy, Using Backup

Possible Cause

• Local cold junction signal from SCLS terminal board out of range. The normal range is -50 to 85°C (-58 to 185 °F).
• Hardware failure of cold junction sensor

Solution

• If hardware is in the normal temperature range, replace the SCLS terminal board.
• Replace PCLA.

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150
Description Cold Junction (SCLT) Unhealthy, Using Backup

Possible Cause

• Local cold junction signal from SCLT terminal board out of range. The normal range is -50 to 85°C (-58 to 185 °F).
• Hardware failure of cold junction sensor

Solution

• Verify that the cable between the SCLT and PCLA is fully seated in the connector.
• If hardware is in the normal temperature range, replace the SCLT terminal board.

151-158
Description RTD [ ] Unhealthy

Possible Cause

• RTD wiring/cabling open or high impedance


• Open on connections to the terminal board
• RTD device failed
• PCLA module internal hardware problem
• Current source on PCLA for RTD faulty or measurement device failed
• Wrong type of RTD configured or selected by default
• High-resistance values created by high voltage and/or low current

Solution

• Check the field wiring for open circuit or high impedance.


• Verify the proper connections to the terminal board.
• Check the RTD for proper operation.
• Verify that the RTD type configuration matches the attached device type.
• Replace the PCLA.

159
Description SCLT Configuration & Hardware Mismatch

Possible Cause

• SCLT terminal board connected in hardware but not configured in ToolboxST application.
• In ToolboxST application, the PCLA configured with a SCLT terminal board, but SCLT not physically connected.
• Faulty cable between SCLT - PCLA module

Solution

• Verify that the PCLA configuration matches the hardware connected.


• Replace the cable.
• Replace the SCLT terminal board.
• Replace the SCLS terminal board.
• Replace the PCLA.

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160-191
Description Logic Signal [ ] Voting Mismatch

Possible Cause N/A

Solution N/A

192-211
Description Input Signal [ ] Voting Mismatch, Local=[ ], Voted=[ ]

Possible Cause Voter disagreement between R, S and T I/O packs or modules.

Solution Adjust the TMR threshold limit for the inputs causing the diagnostic or correct the cause of the difference.

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3.3 SCLS Core Analog Terminal Board
The Core Analog (SCLS) terminal board provides the terminal and signal routing into the BCLA board. Inputs include eight
thermocouple inputs, four analog inputs and eight RTD inputs. An individual 24 V dc power source is included for all four
4-20 mA inputs on SCLS. SCLS output channel consist of one 4-20 mA simplex output signal. Seventy-two pluggable Euro
style box-type terminal blocks provide field wire terminal points. Terminal grouping is three sets of 24 terminals each. SCLS
provides the J2 68 pin connectors for IS200SCLT terminal board cable.

Note PCLA supports one simplex 0-20 mA output through SCLS and six 0-20 mA simplex/ TMR (voted) configurable set
of outputs through SCLT.

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SCLS Terminal Board

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3.3.1 Installation
An I/O cable shield terminal is provided adjacent to the terminal blocks. Terminals 23, 24, 43, 44, 45, 46, 47, and 48 are NOT
Connected terminal points. Field device I/O is through 72 Euro style box-type terminal blocks on the SCLS edge and is
through 48 Euro style box-type terminal blocks on the SCLT edge. SCLS and SCLT accept conductors with the following
characteristics:
SCLS Terminal Conductor Size Range

Conductor type Minimum Maximum


Conductor cross section solid 0.2 mm2 2.5 mm2
Conductor cross section stranded 0.2 mm2 2.5 mm2
Conductor cross section stranded, with ferrule without plastic sleeve 0.25 mm2 2.5 mm2

Conductor cross section stranded, with ferrule with plastic sleeve 0.25 mm2 2.5 mm2

Conductor cross section AWG/kcmil 24 AWG 12 AWG


2 conductors with same cross section, solid 0.2 mm2 1 mm2

2 conductors with same cross section, stranded 0.2 mm2 1.5 mm2

2 conductors with same cross section, stranded, ferrules without plastic sleeve 0.25 mm2 1 mm2

2 conductors with same cross section, stranded, TWIN ferrules with plastic sleeve 0.5 mm2 1.5 mm2

Note Refer to the PCLA Core Analog Module - Aero, Installation section for more information.

SCLS Screw Terminal Assignments


Terminal number Signal Function
1 P24V1
2 20mA1
3 VDC1 Analog Input 1
4 RET1
5 P24V2
6 20mA2
7 VDC2 Analog Input 2
8 RET2
9 P24V3
10 20mA3
11 VDC3 Analog Input 3
12 RET3
13 P24V4
14 20mA4
15 VDC4 Analog Input 4
16 RET4
17 PCOM
18 PCOM
19 PCOM Common points
20 PCOM
21 OP1
22 OR1 4-20 mA output 1
23 NC
24 NC No Connect
25 TC 1H
26 TC 1L Thermocouple 1

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SCLS Screw Terminal Assignments (continued)
Terminal number Signal Function
27 TC 2H
28 TC 2L Thermocouple 2
29 TC 3H
30 TC 3L Thermocouple 3
31 TC 4H
32 TC 4L Thermocouple 4
33 TC 5H
34 TC 5L Thermocouple 5
35 TC 6H
36 TC 6L Thermocouple 6
37 TC 7H
38 TC 7L Thermocouple 7
39 TC 8H
40 TC 8L Thermocouple 8
41 PCOM
42 PCOM Common points
43 NC
44 NC
45 NC
46 NC Not connected
47 NC
48 NC
49 RTD EXC1
50 RTD SIG1 RTD 1
51 RTD RET1
52 RTD EXC2
53 RTD SIG2 RTD 2
54 RTD RET2
55 RTD EXC3
56 RTD SIG3 RTD 3
57 RTD RET3
58 RTD EXC4
59 RTD SIG4 RTD 4
60 RTD RET4
61 RTD EXC5
62 RTD SIG5 RTD 5
63 RTD RET5
64 RTD EXC6
65 RTD SIG6 RTD 6
66 RTD RET6
67 RTD EXC7
68 RTD SIG7 RTD 7
69 RTD RET7
70 RTD EXC8
71 RTD SIG8 RTD 8
72 RTD RET8

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3.3.2 Operation
The SCLS terminal board provides the customer terminals and signal routing into the BCLA board. SCLS provides the J2 68
pin connectors for IS200SCLT terminal board cable. Internal to the module the SCLS terminal board routes signals to
connectors for the BCLA analog processing board. Seventy-two pluggable Euro style box-type terminal blocks provide Field
wire terminal points. Terminal grouping is 3 sets of 24 terminals each.

SCLS Terminals
# Signals Signal Type Screws/Signal
8 Thermocouples 2

4 Analog 4-20 mA inputs or ±10 V Inputs or ±5 V inputs 4

8 RTD 3
1 Analog 4-20 mA outputs 2

1 Common connection 6
NC (Not Connected) Screws 8

3.3.2.1 Thermocouples
The PCLA supports E, J, K, S, and T types of thermocouples and mV inputs. Simplex inputs from field are terminated on
SCLS. There are eight simplex thermocouple inputs. Connect the thermocouple wires directly to the thermocouple I/O
terminal blocks as described in the table. These removable blocks are mounted on the terminal board and held down with two
screws.
The eight-thermocouple inputs can be grounded or ungrounded. They can be located up to 300 m (984 ft) from the turbine
control cabinet with a maximum two-way cable resistance of 450 Ω. SCLS terminal boards feature high-frequency noise
suppression and one cold junction reference device. The I/O processor performs the analog-to-digital conversion and the
linearization for individual thermocouple types.

Thermocouple Inputs and I/O Processor, Simplex

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3.3.2.2 Analog Voltage or Current Inputs
SCLS can accommodate four simplex analog voltage or current inputs. They can be located up to 300 m (984 ft) from the
turbine control cabinet with a maximum two-way cable resistance of 15 Ω. Connect the input and output wires directly to two
I/O terminal blocks mounted on the terminal board. Each block is held down with two screws. A shield terminal attachment
point is located adjacent to each terminal block.
SCLS can accommodate the following analog I/O types:

• Analog input, two-wire transmitter


• Analog input, three-wire transmitter
• Analog input, four-wire transmitter
• Analog input, externally powered transmitter
• Analog input, voltage ±5 V dc, ±10 V dc, current 4-20 mA

Analog Inputs

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3.3.2.3 Analog Voltage or Current Inputs Configurations
The SCLS is able to interface to several different types of 4-20 mA transmitters. SCLS board provides four 24 V dc terminals,
one for each 4-20 mA transmitter input. The inputs can be configured as current or voltage inputs using jumpers (JP#A). The
JP#A jumper removes the 250 Ω burden resistor for voltage input applications. The following configurations are supported:

Analog Input Configurations


Each input has a jumper (JP#B) on the board that is used to determine if the return terminal is grounded or floating. The
default position of the jumper is floating or open. With the noise suppression and filtering, the input ac CMR is 60 dB, and the
dc CMR is 80 dB.
Analog Input Jumper Summary

Channel Jumper Pos 1-2 Pos 2-3


Analog In 1 JP1A mA VDC

Analog In 2 JP2A mA VDC

Analog In 3 JP3A mA VDC

Analog In 4 JP4A mA VDC

Channel Jumper Pos 1-2 Pos 2-3


Analog In 1 JP1B GND OPEN

Analog In 2 JP2B GND OPEN

Analog In 3 JP3B GND OPEN

Analog In 4 JP4B GND OPEN

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3.3.2.4 RTD Inputs
SCLS can accommodate eight simplex 3-wire RTD inputs. The eight inputs feature group isolation from the grounding
system. Connect the wires for the eight RTDs directly to the terminal blocks on the SCLS board. A shield terminal strip
attached to chassis ground is located immediately to the left of each terminal block.

Note Refer to the PCLA Operation section, RTD Inputs.

For CE mark applications, double-shielded wire must be used. All shields must be
terminated at the shield terminal strip. Do not terminate shields located at the end
device.
Caution
The terminal board supplies a 1 mA dc multiplexed (not continuous) excitation current to each RTD. The eight RTDs can be
located up to 300 m (984 ft) from the turbine control cabinet with a maximum two-way cable resistance of 15 Ω. The
on-board noise suppression is provided on SCLS. The first two RTD channels (1 and 2) can be configured for either fast or
normal mode scanning. Channels 3 to 8 are only normal mode scan channels. Fast RTDs are scanned 25 times per second and
slow RTD channels are scanned 4 times in a second using a time sample interval related to the power system frequency.

Note RTD open and short circuits are detected by out-of-range values.

The processor performs linearization for the selection of RTD types. RTD open and short circuits are detected by out-of-range
values. RTD inputs are automatically calibrated using the filtered calibration source and null voltages. The RTD inputs and
signal processing are illustrated in the following figure.

SCLS RTD Section and Input Processor Board BCLA RTD Section

RTD Accuracy

RTD Type Accuracy at 400 ºF


120 Ω nickel 2 ºF
200 Ω platinum 2 ºF

100 Ω platinum 4 ºF

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3.3.2.5 Analog Output
SCLS supports one simplex analog (0-20 mA) output capable of 18 V compliance voltage. It can be located up to 300 m (984
ft) from the turbine control cabinet. Maximum load resistance supported is 800 Ω. Connect output wires directly to two I/O
terminal blocks mounted on the terminal board. Each block is held down with two screws. The output channel has noise
suppression circuitry to protect against surge and high frequency noise.

Analog Outputs

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3.3.3 Specifications
Item SCLS Specification
Number of channels 8 Thermocouples, 4 Analog inputs, 8 RTDs, 1 Current Output

Supply Input P28 Through P1 on PCLA

Interface With SCLT and BCLA


Fault detection Incorrect ID chip

Size 5.625 inch x 9.1 inch


Technology Surface mount

Thermocouple

Number of channels 8 channels on SCLS


Thermocouple types E, J, K, S, T thermocouples, and mV inputs

Span -16.0 mV to 63.0 mV

Cold junction compensation Reference junction temperature measured

Cold junction temperature Over the Celsius operating range: 1.1°C


accuracy Over the Fahrenheit operating range: 2 °F

Fault detection High/low (hardware) limit check


Monitor readings from all thermocouples, cold junctions, calibration voltages, and calibration
zero readings

Analog Inputs

Number of channels 4 Channels


Input span, transmitters 1 - 5 V dc across a precision resistor (usually 250 Ω)

Maximum lead resistance 15 Ω maximum two-way cable resistance, cable length up to 300 m (984 ft).

Outputs 24 V dc outputs rated at 21 mA each

RTD Inputs

Number of channels 8 Channels of 3-wire RTDs


RTD types 100, and 200 Ω platinum
120 Ω nickel
Maximum lead resistance 15 Ω maximum two-way cable resistance

Fault detection High/low (hardware) limit check

Analog Output

Number of channels 1 Channel


Load on output currents 800 Ω burden for 4-20 mA output

Compliance Voltage 18 V dc

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3.3.4 Diagnostics
Each terminal board connector has its own ID device that is interrogated by the I/O board. The board ID is coded into a
read-only chip containing the terminal board serial number, board type, revision number. If a mismatch is encountered, a
hardware incompatibility fault is created.

3.3.4.1 Thermocouples
Thermocouple circuits are biased with a small dc current. If a thermocouple circuit opens, the temperature signal goes to a
full-scale negative reading. There is a configuration to report an open thermocouple as fail cold or fail hot.

• Each RTD type has hardware limit checking based on preset (non-configurable) high and low levels set near the ends of
the operating range. If this limit is exceeded, an alarm is generated to indicate a potential problem with the signal.
• The resistance of each RTD is checked and compared with the correct value. If the resistance is high or low, a fault is
created.
Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be individually
latched, and then reset with the RESET_DIA signal if they go healthy. Additional diagnostic information may be found in the
PCLA Diagnostic Alarms section.

3.3.4.2 Analog Outputs


The board provides the voltage drop across a series resistor to indicate the output current. The I/O processor creates a
diagnostic alarm (fault) if the output goes unhealthy.

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3.3.5 Configuration
The SCLS is able to interface to several different types of 4-20 mA transmitters. SCLS board provides four 24 V dc terminals,
one for each 4-20 mA transmitter input. The inputs can be configured as current or voltage inputs using jumpers (JP#A). The
JP#A jumper removes the 250 Ω burden resistor for voltage input applications. The following configurations are supported:

Analog Input Configurations


Each input has a jumper (JP#B) on the board that is used to determine if the return terminal is grounded or floating. The
default position of the jumper is floating or open.

Analog Input Jumper Summary

Channel Jumper Pos 1-2 Pos 2-3


Analog In 1 JP1A mA VDC

Analog In 2 JP2A mA VDC

Analog In 3 JP3A mA VDC

Analog In 4 JP4A mA VDC

Channel Jumper Pos 1-2 Pos 2-3


Analog In 1 JP1B GND OPEN

Analog In 2 JP2B GND OPEN

Analog In 3 JP3B GND OPEN

Analog In 4 JP4B GND OPEN

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3.4 SCLT Core Analog Terminal Board
3.4.1 Functional Description
The Core Analog (SCLT) terminal board provides additional I/O terminals for the PCLA module. It handles input signals that
are fanned to one or three PCLA modules and also handles the voted output signals. Inputs include eight thermocouple inputs,
four analog voltage or current inputs, and six 4-20 mA outputs. An individual 24 V dc power source is included for all four
4-20 mA inputs on SCLT. Forty-eight pluggable Euro style box-type terminal blocks provide field wire terminal points. The
following table lists I/O supported by SCLT:

SCLT Terminals
# Signals Signal Type Screws/Signal

8 Fanned Thermocouples 2

4 Fanned Analog 4-20 mA inputs or ±10 V Inputs or ±5 V inputs 4

6 TMR (triple Modular Redundant) Analog 4-20 mA outputs 2

1 Common connection 4

SCLT supports simplex or TMR configurations. The connection diagrams for both the configurations are given below.

PCLA Diagram - Simplex board (PCLA cover omitted to display board relationship)

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PCLA-SCLT Connection Diagram - TMR Controller TMR I/O Configuration (PCLA Cover Omitted to Display Board
Relationship)

SCLT Terminal Board

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3.4.2 Installation
An I/O cable shield terminal is provided adjacent to the terminal blocks. Field device I/O is through 72 Euro style box-type
terminal blocks on the SCLS side and is through 48 Euro -style box terminals on the SCLT side. SCLS and SCLT accept
conductors with the following characteristics:

SCLT Terminal Conductor Size Range


Conductor type Minimum Maximum

Conductor cross section solid 0.2 mm2 2.5 mm2

Conductor cross section stranded 0.2 mm2 2.5 mm2


Conductor cross section stranded, with ferrule without plastic sleeve 0.25 mm2 2.5 mm2

Conductor cross section stranded, with ferrule with plastic sleeve 0.25 mm2 2.5 mm2

Conductor cross section AWG/kcmil 24 AWG 12 AWG


2 conductors with same cross section, solid 0.2 mm2 1 mm2

2 conductors with same cross section, stranded 0.2 mm2 1.5 mm2

2 conductors with same cross section, stranded, ferrules without plastic 0.25 mm2 1 mm2
sleeve
2 conductors with same cross section, stranded, TWIN ferrules with plastic 0.5 mm2 1.5 mm2
sleeve

Note Refer to the PCLA Core Analog Module - Aero Installation section for more information.

SCLT Screw Terminal Assignments


Terminal # Signal Function
1 TC 9H
Thermocouple 9
2 TC 9L
3 TC 10H
Thermocouple 10
4 TC 10L
5 TC 11H
Thermocouple 11
6 TC 11L
7 TC 12H
Thermocouple 12
8 TC 12L
9 TC 13H
Thermocouple 13
10 TC 13L
11 TC 14H
Thermocouple 14
12 TC 14L
13 TC 15H
Thermocouple 15
14 TC 15L
15 TC 16H
Thermocouple 16
16 TC 16L
17 PCOM
Common Points
18 PCOM
19 P24V5
20 20mA5
Analog Input 5
21 VDC5
22 RET5
23 P24V6
24 20mA6
Analog Input 6
25 VDC6
26 RET6

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SCLT Screw Terminal Assignments (continued)
Terminal # Signal Function
27 P24V7
28 20mA7
Analog Input 7
29 VDC7
30 RET7
31 P24V8
32 20mA8
Analog Input 8
33 VDC8
34 RET8
35 PCOM
Common points
36 PCOM
37 OP2
4-20 mA output 2
38 OR2
39 OP3
4-20 mA output 3
40 OR3
41 OP4
4-20 mA output 4
42 OR4
43 OP5
4-20 mA output 5
44 OR5
45 OP6
4-20 mA output 6
46 OR6
47 OP7
4-20 mA output 7
48 OR7

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3.4.3 Operation
SCLT provides fanning of input signals to one or more PCLA modules. This is done with high reliability passive circuits to
ensure reliability in redundant applications. SCLT accepts 28 V dc power from connected PCLA modules. The power supplies
from all PCLAs are connected through diodes (Diode-OR) to obtain redundant power input for the 24 V dc outputs. Each 24
V output on SCLT is provided with an individual voltage regulator that includes thermal shutdown for branch circuit
protection. The SCLT terminal board provides the customer terminals and 68 pin connectors for SCLS terminal board cable.
Forty-eight pluggable Euro style box-type terminal blocks provide Field wire terminal points.

Note An over current condition on one 24 V dc output will result in only that output being shut down. When the overload is
removed the terminal will return to 24 V dc.

3.4.3.1 Thermocouples
The PCLA supports E, J, K, S, and T types of thermocouples and mV inputs. Simplex/TMR inputs from field are ended on
SCLT based on the configuration. There are eight simplex thermocouple inputs. Connect the thermocouple wires directly to
the thermocouple I/O terminal blocks as described in the table. These removable blocks are mounted on the terminal board
and held down with two screws.
The 8-thermocouple inputs can be grounded or ungrounded. They can be located up to 300 m (984 ft) from the turbine control
cabinet with a maximum two-way cable resistance of 450 Ω. SCLT-SCLS terminal boards feature high-frequency noise
suppression and one cold junction reference device. The I/O processor performs the analog-to-digital conversion and the
linearization for individual thermocouple types.

3.4.3.2 Analog Voltage or Current Inputs


SCLT can accommodate four simplex / Fanned analog voltage or current inputs. They can be located up to 300 m (984 ft)
from the turbine control cabinet with a maximum two-way cable resistance of 15 Ω. Connect the input and output wires
directly to two I/O terminal blocks mounted on the terminal board. Each block is held down with two screws. A shield
terminal attachment point is located adjacent to each terminal block.
SCLT can accommodate the following analog I/O types:

• Analog input, two-wire transmitter


• Analog input, three-wire transmitter
• Analog input, four-wire transmitter
• Analog input, externally powered transmitter
• Analog input, voltage ±5 V dc, ±10 V dc, current 4-20 mA

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3.4.3.3 Analog Voltage or Current Inputs Configurations
The SCLT is able to interface to several different types of 4-20 mA transmitters. SCLT board provides four 24 V dc terminals,
one for each 4-20 mA transmitter input. The inputs can be configured as current or voltage inputs using jumpers (JP#A). The
JP#A jumper removes the 250 Ω burden resistor for voltage input applications. The following configurations are supported:

Analog Input Configurations


Each input has a jumper (JP#B) on the board that is used to determine if the return terminal is grounded or floating. The
default position of the jumper is floating or open. With the noise suppression and filtering, the input ac CMR is 60 dB, and the
dc CMR is 80 dB.
Analog Input Jumper Summary

Channel Jumper Pos 1-2 Pos 2-3


Analog In 5 JP5A mA VDC

Analog In 6 JP6A mA VDC

Analog In 7 JP7A mA VDC

Analog In 8 JP8A mA VDC

Channel Jumper Pos 1-2 Pos 2-3


Analog In 5 JP5B GND OPEN

Analog In 6 JP6B GND OPEN

Analog In 7 JP7B GND OPEN

Analog In 8 JP8B GND OPEN

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3.4.3.4 Analog Outputs
SCLT supports six simplex or voted analog (0-20 mA) outputs capable of 18 V compliance voltage. It can be located up to
300 m (984 ft) from the turbine control cabinet. Maximum load resistance supported is 800 Ω. Connect output wires directly
to two I/O terminal blocks mounted on the terminal board. Each block is held down with two screws. The output channels
have noise suppression circuitry to protect against surge and high frequency noise.

3.4.4 Specifications
Please refer to the signal specifications listed in the PCLA documentation for details of the signals on SCLT.

Item SCLT Specification


Number of channels 8 Thermocouples, 4 Analog inputs, 6 Current Outputs

Interface With SCLS and field wires


Fault detection Incorrect ID chip

Power supply voltage 28 V dc ±5% from one or more PCLA modules

Size 6.25 inch x 7 .00 inch


Technology Surface mount

Thermocouple

Number of channels 8 simplex or fanned channels on SCLT based on the configuration

Thermocouple types E, J, K, S, T thermocouples, and mV inputs

Span -16.0 mV to 63.0 mV

Cold junction compensation Reference junction temperature measured

Cold junction temperature accuracy Over the Celsius operating range: 1.1°C
Over the Fahrenheit operating range: 2 °F

Analog Inputs

Number of channels 4 simplex or fanned channels based on the configuration

Input span, transmitters 1 - 5 V dc across a precision resistor (usually 250 Ω)

Maximum lead resistance 15 Ω maximum two-way cable resistance, cable length up to 300 m (984 ft)

Outputs 24 V dc outputs rated at 21 mA each

Analog Outputs

Number of channels 6 simplex or voted channels based on the configuration

Load on output currents 800 Ω burden for 0-20 mA output

Compliance Voltage 18 V dc

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3.4.5 Diagnostics
Each cable connector on the terminal board has its own ID device that is interrogated by the I/O controller. The ID device is a
read-only chip coded with the terminal board serial number, board type, revision number, and the JR, JS, JT connector
location. A hardware incompatibility fault is created when the I/O controller reads this chip and a mismatch is encountered.

3.4.5.1 Thermocouples
Thermocouple circuits are biased with a small dc current. If a thermocouple circuit opens, the temperature signal goes to a
full-scale negative reading. There is a configuration to report an open thermocouple as fail cold or fail hot.
Each RTD type has hardware limit checking based on preset (non-configurable) high and low levels set near the ends of the
operating range. If this limit is exceeded, an alarm is generated to indicate a potential problem with the signal. The resistance
of each RTD is checked and compared with the correct value. If the resistance is high or low, a fault is created.

3.4.5.2 Analog Outputs


The board provides the voltage drop across a series resistor to indicate the output current. The I/O processor creates a
diagnostic alarm (fault) if any of the outputs go unhealthy.
The analog output enable relay is enabled only under following conditions:
Condition 1:

• PCLA configuration must be TMR.


• SuicEnable must be set to True from configuration.
• Individual current feedback is greater than half of total current feedback plus TMR_DiffLimit set from The ToolboxST
application.
Condition 2:

• PCLA configuration must be TMR.


• SuicEnable must be set to True from configuration.
• Percentage Difference in commanded Analogout value and Reference feedback by Full-scale Analog Output is greater
than D/A_ErrLimit set from The ToolboxST application.
The accuracy of the output is 0.5% of full scale and the maximum output load supported is 800 Ω.

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3.4.5.3 Analog Voltage or Current Inputs Configurations
The SCLT is able to interface to several different types of 4-20 mA transmitters. SCLT board provides four 24 V dc terminals,
one for each 4-20 mA transmitter input. The inputs can be configured as current or voltage inputs using jumpers (JP#A). The
JP#A jumper removes the 250 Ω burden resistor for voltage input applications. Following configurations are supported.

Each input has a jumper (JP#B) on the board that is used to determine if the return terminal is grounded or floating. The
default position of the jumper is floating or open.

Analog Input Jumper Summary

Channel Jumper Pos 1-2 Pos 2-3


Analog In 5 JP5A ma VDC

Analog In 6 JP6A ma VDC

Analog In 7 JP7A ma VDC

Analog In 8 JP8A ma VDC

Channel Jumper Pos 1-2 Pos 2-3


Analog In 5 JP5B GND OPEN

Analog In 6 JP6B GND OPEN

Analog In 7 JP7B GND OPEN

Analog In 8 JP8B GND OPEN

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4 PEFV Electric Fuel Valve Gateway
4.1 PEFV Electric Fuel Valve Gateway Pack
4.1.1 Functional Description
The Electric Fuel Valve Gateway (PEFV) is an Ethernet gateway between the Mark* VIe
control I/O Ethernet network and an electric fuel valve interface module. The module
communicates through the Ethernet Global Data (EGD). The fuel valve interface module
is called a Digital Valve Positioner (DVP). It is made by Woodward® Controls.

The PEFV contains a processor board common to the distributed I/O packs. One of the
dual RJ-45 Ethernet connectors connects to the I/O Ethernet network. The other RJ-45
Ethernet connector connects directly to the DVP. A 3-pin connector supplies power to
the I/O pack.

Infrared Port Not Used

PEFV Simplified Diagram

4.1.1.1 Compatibility

Terminal Board TEFVH1A


Control mode Simplex-yes Dual-yes TMR-yes

Note The PEFV can be configured as simplex, dual, or TMR. By design, the PEFV works specifically with the Woodward
Controls DVP. The DVP has three Ethernet connections and must use all three to function properly.

Control mode refers to the number of I/O packs used in a signal path:

• Simplex uses one I/O pack with one network connection on each pack.
• Dual uses two I/O packs with one network connections on each pack.
• TMR uses three I/O packs with one network connection on each pack.

PEFV Electric Fuel Valve Gateway GEH-6721_Vol_III_BG System Guide 157


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4.1.2 Installation
➢ To install the PEFV I/O pack
1. Securely mount the TEFVH1A terminal board.
2. Directly plug three PEFVs, for triple modular redundancy (TMR), into the terminal board connectors.
3. Mechanically secure the I/O pack(s) using the threaded inserts adjacent to the Ethernet ports. The inserts connect to a
mounting bracket specific to the terminal board type. The bracket should be adjusted so there is no right angle force
applied to the DC-37 pin connector between the I/O pack and the terminal board. This adjustment is required once during
the service life of the product.
4. Plug one Ethernet cable into the I/O Ethernet network. Connect the other Ethernet cable to the corresponding network
connector on the Woodward DVP. The pack will operate with connections made to either port. The pack must reboot if
the connections are modified. Standard practice is to connect ENET1 to the network associated with the I/O Ethernet
network.
5. Power is applied to the connector on the side of the pack. It is not necessary to insert the connector with power removed
from the cable. PEFV has inherent soft-start capability that controls current inrush on power application.
6. Use the ToolboxST* application to configure the I/O pack as necessary. Refer to GEH-6700 for more information.

4.1.3 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• Auto-reconfiguration
• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Module Alarms

4.1.3.1 Electric Fuel Valve Gateway Hardware


The PEFV links the Woodward DVP to the Mark VIe through the two network connections on the processor board. The
associated terminal board provides a unique board ID identifying PEFV to the Mark VIe control system. The terminal board
is not used for any I/O connections. Data from the Mark VIe controller goes to the PEFV through the Ethernet connection to
the I/O Ethernet network. Next, the data is passed to the DVP through the other Ethernet connection to the DVP. The IP
addresses for these networks must be configured correctly for the communication link to be valid.

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4.1.4 Specifications
Item PEFV Specification
Transmit time Data from Mark VIe is transmitted once per frame, up to 100 times per second.

Receive time Data from DVP is received asynchronously from the Woodward DVP at a rate up to 100 times
per second. This data is transmitted to the Mark VIe synchronous to the frame at the frame rate.
The PEFV will timeout in 50 ms.
Fault detection Ethernet link ok to/from DVP
Data link ok to and from DVP
EGD Packet diagnostics
IP configuration error

Size 8.26 cm high x 4.19 cm wide x 12.1 cm deep (3.25 in x 1.65 in x 4.78 in)

Technology Surface mount


†Ambient rating for Operating: -30 to 65ºC (-22 to 149 ºF)
enclosure design

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

4.1.5 Diagnostics
The I/O pack performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set.

4.1.6 Configuration
Parameter Description Selections
WGC_IP_Addr Valve Driver (DVP) IP addresses on TMR networks 192.168.128.20 (Default)
should identify defaults. Specify IP address
Note: IP address of R network given. For S and T networks, the
subnet is incremented by 1 and 2 respectively.
For example, the default R value is 192.168.128.20.
The S IP address is 192.168.129.20.
The T IP address is 192.168.130.20.
WGC_Subnet DVP network subnet mask 255.255.255.0 (Default)
Specify subnet mask.

Gateway_IP_Addr Gateway IP addresses on TMR should identify defaults (PEFV 192.168.128.1 (Default)
non-IONet IP address). Specify IP address
Follows the same conventions as WGC_IP_Addr for the S and T
network IP addresses

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4.2 PEFV Specific Alarms
The following alarms are specific to the PEFV I/O pack.

32
Description No Ethernet ports could be setup for WGC valve driver

Possible Cause

• Both Ethernet ports on the PEFV pack have already received an IP address through DHCP so the IP address for the
Woodward® Governor Controls DVP (WGC) driver network could not be assigned.
• Both ports may be connected to the IONET-EGD network.

Solution

• Verify that network connections are correct.


• Verify that no DHCP server exists on the network connected to the WGC driver.

33
Description Problem with the WGC valve driver Ethernet port

Possible Cause PEFV could not properly configure the Ethernet port.

Solution

• Re-download the base load and firmware to the I/O pack.


• Replace the I/O pack.

34
Description WGC valve driver communication error - packet mismatch

Possible Cause The received Ethernet Global data is incorrect.

Solution

• Verify that network addresses are configured correctly.


• Verify that the WGC_IP_Addr is set to the IP address of the DVP.
• Verify that the Gateway_IP_Addr is set to the IP address of the PEFV gateway port.

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35
Description Experiencing delay in reception of data from WGC valve driver

Possible Cause The PEFV has not received data from the Woodward Governor Controls DVP for five frames (50 ms).

Solution

• Verify that network connections between the PEFV and the Woodward DVP are correct.
• Check for faulty or loose network cables.

38
Description No communication with WGC valve driver

Possible Cause The PEFV has not received data from the Woodward Governor Controls DVP for three seconds.

Solution

• Verify that network connections between the PEFV and the Woodward DVP are correct.
• Verify that Woodward DVP power is on.
• Verify that Woodward DVP is sending data correctly.

39
Description Config Error - WGC and Gateway IP address subnet mismatch

Possible Cause The subnet of configured IP addresses WGC_IP_Addr and Gateway_IP_Addr do not match.

Solution

• Verify that the configured IP addresses WGC_IP_Addr and Gateway_IP_Addr are on the same subnet.
• Verify that WGC_Subnet is set correctly.

4.3 TEFV Electric Fuel Valve Terminal Board


The Electric Fuel Valve Terminal board (TEFVH1A), in this configuration, is used to mount the PEFV only. The connections
on the board are for electronic ID only. It uses no other connections. Visual diagnostics are provided through indicator LEDs
on the PEFV.

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Notes

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5 PGEN Turbine Generator Monitor
5.1 PGEN Turbine-Generator Monitor I/O Pack
The Mark* VIe control Turbine-Generator Monitor (PGEN) provides the electrical
interface between one I/O Ethernet network and the TGNA turbine-generator. The pack
contains a processor board common to the distributed I/O packs and an acquisition
board. The pack uses 3 analog channels to monitor turbine mechanical power from
voltage or 4-20 mA sensors. Each phase of generator armature current is monitored
using a current transformer input. The PGEN performs the power load unbalance (PLU)
function but it does not include the power calculations (kW, kVARS, KVA) or early
valve actuation logic.

Input to the I/O pack is through dual RJ-45 Ethernet connectors and a 3-pin power input.
The PGEN supports single Ethernet networks for simplex or TMR applications. Output
is through a DC-37 pin connector that connects directly with the associated terminal
board connector. Visual diagnostics are provided through indicator LEDs.

Infrared Port Not Used

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5.1.1 Compatibility
PGENH1A is compatible with the turbine-generator Terminal Board (TGNA). The following table describes the
compatibility:

Terminal Board TGNA


Control mode Simplex-yes Dual-no TMR-yes

Control mode refers to the number of I/O packs used in a signal path:

• Simplex uses one I/O pack with one network connection only
• TMR uses three I/O packs with one network connection on each I/O pack

5.1.2 Installation
➢ To install the PGEN I/O pack
1. Securely mount the desired terminal board.
2. Directly plug one PGEN I/O pack for simplex or three PGEN I/O packs for TMR into the terminal board connectors.
3. Mechanically secure the I/O pack(s) using the threaded studs adjacent to the Ethernet ports. The studs slide into a
mounting bracket specific to the terminal board type. The bracket location should be adjusted such that there is no right
angle force applied to the DC-37 pin connector between the I/O pack and the terminal board. The adjustment should only
be required once in the service life of the product.

Note The PGEN mounts directly to a Mark VIe control terminal board. TMR-capable terminal boards have three DC-37 pin
connectors, and can also be used in simplex mode if only one PGEN is installed. The PGEN directly supports all of these
connections.

4. Plug in one Ethernet cable only. The I/O pack operates over either port.

Note The ToolboxST* configuration of the PGEN does not allow the I/O pack to operate redundantly from the two Ethernet
inputs.

5. Apply power by plugging in the connector on the side of the I/O pack. It is not necessary to remove power from the cable
before plugging it in because the I/O pack has inherent soft-start capability that controls current inrush on power
application.
6. Use the ToolboxST* application to configure the I/O pack as necessary. Refer to GEH-6700 for more information.

5.1.2.1 Connectors
The PGEN contains the following connectors:

• A DC-37 pin connector on the underside of the I/O pack connects directly to the turbine generator terminal board. The
connector contains six input signals and an ID signal.
• An RJ-45 Ethernet connector named ENET1 on the side of the I/O pack is the primary system interface.

• A second RJ-45 Ethernet connector named ENET2 on the side of the I/O pack can be used as an alternate to ENET1.

Note The ToolboxST configuration does not allow the PGEN to operate from two Ethernet inputs simultaneously.

• A 3-pin power connector on the side of the I/O pack is for 28 V dc power to the PGEN module.

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5.1.3 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• Auto-reconfiguration
• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Module Alarms

5.1.3.1 Turbine-Generator Monitoring Hardware


The PGEN application-specific hardware consists of an analog filter acquisition board (BPAIH3). The analog filter
acquisition board provides the signal conditioning to center and amplify the signal to improve analog-to-digital resolution.
The PGEN accepts analog input signals from the terminal board for three mechanical power sensors and three CT currents.
The analog input section consists of an analog multiplexer block, several gain and scaling sections, and a 16-bit,
analog-to-digital converter (ADC).
The three analog mechanical power inputs can be individually configured as ±5 V, ±10 V, or 4-20 mA scaled signals,
depending on the input configuration. If configured as 4-20 mA signals, the three current inputs are brought through 250 Ω
burden resistors on the terminal board. This resistance generates a 5 V signal at 20 mA. The terminal board provides a 250 Ω
burden resistor when configured for current inputs yielding a 5 V signal at 20 mA. These analog input signals are first passed
through a passive, low pass filter network with a pole at 75.15 Hz. Voltage signal feedbacks from calibration voltages are also
sensed by the PGEN input section.

5.1.3.2 Power Load Unbalance Overspeed Control


The Power Load Unbalance (PLU) function monitors the difference between the per unit steam turbine power based on steam
pressure and the per unit generator power based on the generator current. A PLU event occurs when turbine per unit power is
40% greater than the generator power and the difference meets both a specified rate of change and a specified duration. When
a PLU event is sensed, the steam turbine control valves (CVs) and Intercept valves (IVs) are closed to reduce the power.
The PLU monitoring is performed by the PGEN I/O pack and the TGNA terminal board. The PLU function supports either a
TMR or Simplex configuration. The Mark VIe Digital Output PDOA I/O pack and the TRLY terminal board controls the
steam turbine CV and IV valves. The PGEN commands the state of the relays on the PDOA. The control of the relays in the
PDOA is enhanced by a peer-to-peer multicast packet that provides a fast communication path. The fast communication path
is in parallel with the normal pack-to-pack communication that is routed through the signal space using the controller to
transfer relay commands. The multicast path is only used for the initiating command to the relays.
PLU events that are detected in firmware generate logic signals PLU_IV_Event to energize IV relays and PLU_CV_Event to
energize CV relays. An additional relay communication paths is provided through PGEN signal space to allow controller
application code to control the CV and IV relays. Each relay has a configurable dropout time so that relays can be dropped out
in a staggered sequence. The actual dropout time may vary + one IONet frame time (typically 40 ms) due to the asynchronous
interaction of the IONet communications and PGEN PLU processing. The following Control Valve and Intercept Valve
Control Logic diagram depicts this logic.

Note When relays are configured as Test Only, the relay state can only be changed by the corresponding signal space out
logical RelayxTest, where x = relay number.

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Sample Logic for intercept Valves IV Permissive
To PDOA

PLU IV Event
PLU_Test_Active To PDOA Intercept
[C]
Dropout Valve1 Solenoid
IV_Trgr (SSO) Control
Delay
RelayUse =
TstOnly
IVT_ Enb (config)

RelayDropTim1 (config )
Ext_IV_ Trgr (SSO)

Ext_ IVT_Enb (config) Relay01_ Tst (SSO)

RelayUse =
TstOnly

Sample Logic for Control Valves

CV Permissive
To PDOA

PLU CV Event PLU_Test_Active


[D] To PDOA Control
Dropout Valve5 Solenoid
Delay Control
CV_Trgr (SSO) RelayUse =
TstOnly

CVT_Enb (config)
Relay Drop Tim5 (config)

Relay05 _Tst(SSO)

RelayUse =
TstOnly

Relay activation is blocked when signal space output PLU_Test is True, so the signal
space logicals PLU_Event and PLU_IV_Event can be forced True without activating
relays. This is a test mode designed for commissioning tests if needed and should not
be used during normal operation.
Attention

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5.1.4 Specifications
Item PGEN Specification
Input converter resolution 16-bit analog-to-digital converter

Common mode voltage range ±5 V (±2 V CMR for the ±10 V inputs)

Size 8.26 cm high x 4.19 cm wide x 12.1 cm deep (3.25 in x 1.65 in x 4.78 in)

†Ambient rating for enclosure -30 to 65ºC (-22 to 149 ºF)


design

Technology Surface mount

Number of channels TGNA: 6 inputs total consisting of


3 pressure inputs and 3 CT current inputs

Measure- Range (V dc + V ac) Noise Suppression Accuracy


ment

Analog Inputs

(channels 1-3) Pressure ±5 V dc 76 Hz single pole low 0.1% of full scale


±10 V dc pass
4-20 mA
All with 5% over range

Current Inputs

(CT channels 1-3) Current 0 to 1 A rms 507 Hz single pole 0.1% of full scale
0 to 5 A rms low pass
All with 100% over
range

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

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5.1.5 Diagnostics
The I/O pack performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set.
• Each analog or current input has hardware limit checking based on preset (configurable) high and low levels near the end
of the operating range. If this limit is exceeded, a logic signal is set to Unhealthy in signal space, then the unhealthy
signal is forced to zero volts or mA. The signal state returns to Healthy if the signal returns to its limits. If any signal is
unhealthy, logic signal L3DIAG-PGEN is set.
• Each input has system limit checking based on configurable high and low levels. These limits can be used to generate
alarms, to enable and disable, and as latching and non-latching.
• The analog input hardware includes precision reference voltages in each scan. Measured values are compared against
expected values and are used to confirm health of the analog to digital circuits.
Details of the individual diagnostics are available from the ToolboxST application. I/O block SYS_OUTPUTS, input
RSTDIAG can be used to direct all I/O modules to clear from the alarm queue all diagnostics in the normal healthy state.

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5.1.6 Configuration
The following information is extracted from the ToolboxST application represents a sample of the configuration information
for this board. Refer to the actual configuration file within the ToolboxST application for specific information.

Parameter Description Sections


PLU_Del_Enab Enable the PLU delay Enable, disable (default Enable)

IVT_Enab Enable the turbine control-driven IV trigger function Enable, disable (default Enable)

PLU_DiagEnab Enable voting disagreement diagnostic for PLU_Event Enable, disable (default Enable)

Ext_IVT_Enb Enable customer-driven IV trigger function Enable, disable (default Disable)

MechPwrInput Mech power through: TMR (median of 3), dual (max of DualXducer, Signal Space, TMRXducer,
first two), single Xducer, or signal space Xducer1, Xducer2

PLU_Unbal PLU unbalance threshold, percent 20 to 80 (default 40)

PLU_Delay PLU delay, seconds 0 to 0.5 (default 0)

PressRatg Reheat pressure equivalent to 100 % mech power 5 to 1500 (default 200)
(engineering units)

CurrentRatg Generator current equivalent to 100 % elect power (amps 1 to 2E6 (default 20000)
RMS)

PowerScale Scale factor that multiplies time per unit current to equate 0 to 2 (default 1.0)
generator power to per unit mechanical power

Min_MA_Input Minimum MA for healthy 4/20 mA Input 0 to 22.5 (default 4)

Max_MA_Input Maximum MA for healthy 4/20 mA Input 0 to 22.5 (default 20.40)

SystemFreq System frequency in Hz 60 Hz, 50 Hz (default 60 Hz)

CT_Primary Generator CT primary in amperes RMS 1 to 1.2E+06 Arms (default 20000)

CT_Secondary Generator CT secondary in amperes RMS (TGNA CT 1 to 5 Arms


input) 0 to 1 Arms (default: 0 to 5 Arms)

CVT_Enab Enable the turbine control-driven CV trigger function Enable, disable (default Disable)

SystemLimits Allows user to temporarily disable all system limit checks Enable, Disable (default Enable)
for testing purposes. Setting this parameter to Disable will
cause a diagnostic alarm to occur.

Note All other I/O configuration parameters are defined under the specific I/O pack or terminal board variables in the
following sections.

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5.1.6.1 PGEN Variable Definitions
Name Description Direction/Type
L3DIAG_PGEN PGEN diagnostics (Input non-voted Boolean-3 bits)
Cap1_Ready Capture buffer 1 ready for upload-not used (Input non-voted Boolean-3 bits)
Cap2_Ready Capture buffer 2 ready for upload-not used (Input non-voted Boolean-3 bits)
SysLim2analogInx Boolean set TRUE if System Limit 1 exceeded for analog input x (Input Boolean)
where x = 1 to 3 (Vgen has only 3, 4th TBD)
SysLim2AnalogInx Boolean set TRUE if system limit 2 exceeded for analog input x (Input Boolean)
where x = 1 to 3
SysLim1GenCTa Boolean set TRUE if system limit 1 exceeded for phase A (Input Boolean)
generator current
SysLim1GenCTb Boolean set TRUE if system limit 1 exceeded for phase B (Input Boolean)
generator current
SysLim1GenCTc Boolean set TRUE if system limit 1 exceeded for phase C (Input Boolean)
generator current
SysLim2GenCTa Boolean set TRUE if system limit 2 exceeded for phase A (Input Boolean)
generator current
SysLim2GenCTb Boolean set TRUE if system limit 2 exceeded for phase B (Input Boolean)
generator current
SysLim2GenCTc Boolean set TRUE if system limit 2 exceeded for phase C (Input Boolean)
generator current
PLU_Diff_Value Equal to the steam turbine per unit power based on the reheat (Input FLOAT)
pressure minus the generator per unit power (corrected by power
scale) based on generator current.
PLU_Event Boolean set TRUE if a PLU has occurred. (Input Boolean)
PLU_IV_Event Boolean set TRUE if a PLU intercept valve event has occurred. (Input Boolean)
PLU_Current Generator current (amps rms) scaled by power scale (Input Float)
SteamPressure Steam pressure (EUs) (Input Float)
CVPermissive Boolean set TRUE to leave CV relays de-energized (Input Boolean)
IVPermissive Boolean set TRUE to leave IV relays de-energized (Input Boolean)
Relay01Test to Solenoid 1 test (Output Boolean)
Relay12Test
PLUTst Boolean to command PLU test. (Output Boolean)
IV_Trgr Turbine control-driven IV trigger (Output Boolean)
Ext_IV_Trgr Customer-driven IV trigger (Output Boolean)
MechPower Mechanical power (percent) when configured through signal (Output Float)
space
CV_Trgr Control valve trigger (Output Boolean)

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5.1.6.2 IS200TGNA Variable Definitions
AnalogInputOx Analog input x - Board Point Point Edit (Input FLOAT)
where x = 1 through
3
InputUse Defines analog input as either as ±10 V, ±5 V, 4-20 ±5 V ±10 V 4-20 mA unused (Default
mA or unused. unused)
Low_Input Defines point 1 x-axis value in volts or mA for the 0 to 10 volts or -10 to 20 mA (Default 4.0)
TGNA terminal point used in calculating the gain and
offset for the conversion to engineering units.
High_Input Defines point 2 x-axis value in volts or mA for the 0 to 10 V or -10 to 20 mA (Default 20.0)
TGNA terminal point used in calculating the gain and
offset for the conversion to engineering units.
Low_Value Defines point 1 Y-axis value in engineering units for ±3.402820 E+38 EUs (Default 0.0)
the TGNA terminal point used in calculating the gain
and offset for the conversion from volts to EUs
High_Value Defines point 2 Y-axis value in engineering units for ±3.402820 E+38 EUs (Default 100.0)
the TGNA terminal point used in calculating the gain
and offset for the conversion from volts to EUs
InputFilter Filter bandwidth in Hz (pressure inputs) 0.75 Hz, 1.5 Hz, 3 Hz, 6 Hz, 2 Hz or unused
(Default 12 Hz)
SysLim1Enabl Enable system Limit 1 fault check Enable, disable (Default disable)
SysLim1Latch Latch system Limit 1 fault Latch, Not Latch (Default Latch)
SysLim1Type System Limit 1 check type ≥ or ≤ (Default ≤)
SysLimit1 System Limit 1 – EUs ±3.402820 E+38 EUs (Default 0.0)
SysLim2Enabl Enable system Limit 2 (same configuration as for Enable, disable (Default disable)
Limit 1)
SysLim2Latch Latch system Limit 2 fault Latch, Not Latch (Default Latch)
SysLim2Type System Limit 2 check type ≥ or ≤ (Default ≤)
SysLimit2 System Limit 2 – EUs ±3.402820 E+38 EUs (Default 0.0)
TMR_DiffLmt Difference limit for voted TMR inputs in percent 0 to 100 percent (Default 5)
DiagHighEnab Enable high input limit diag Enable, Disable (Default Enable)
DiagLowEnab Enable low input limit diag Enable, Disable (Default Enable)

GenCTInputOx Total generator line current x to neutral Point Edit (Input FLOAT)
where x = 1, 2, or 3 (amps rms) - Card Point
SysLim1Enabl Enable system limit 1 fault check Enable, Disable (Default Disable)
SysLim1Latch Latch system Limit 1 Fault Latch, Not Latch (Default Latch)
SysLim1Type System limit 1 check type ≥ or ≤ (Default ≥)
SysLimit1 System limit 1 – EUs ±3.402820 E+38 EUs (Default 0.0)
SysLim2Enabl Enable system limit 2 (same configuration as for limit Enable, Disable (Default Disable)
1)
SysLim2Latch Latch system limit 2 fault Latch, Not Latch (Default Latch)
SysLim2Type System limit 2 check Type ≥ or ≤ (Default ≤)
SysLimit2 System limit 2 – EUs ±3.402820 E+38 Eus (Default 0.0)
TMR_DiffLmt This is the difference limit for voted TMR inputs in ±3.402820 E+38 EUs (Default 100)
EUs. It is a unit specific, calculated setting.

This should be set to the recommended minimum of


10% of generator rated phase current in engineering
units.

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Relayx Solenoid x state - board point Boolean
where x = 1 through
12
RelayUse Defines relay type CV_FASV_Type (1-4): control valve
IV_FASV_Type (5-10): intercept valve
TstOnly : test driven
Unused
Spare CV_Fas_Type(11 only)
Spare IV_Fas_Type(12 only)
(Default Relay1 – CV 1)
(Default Relay2 – CV 2)
(Default Relay3 – CV 3)
(Default Relay4 – CV 4)
(Default Relay5 – IV 1)
(Default Relay6 – IV 2)
(Default Relay7 – IV 3)
(Default Relay8 – IV 4)
(Default Relay9 – IV 5)
(Default Relay10 – IV 6)
(Default Relay11 – Spare CV)
(Default Relay12 – Spare IV)
RelayDropTim Relay dropout time — actual dropout time can vary + 0.0 to 5.0 seconds
1 IONet frame time (typically 40 ms) due to the (Default Relay1 – 1.10)
asynchronous interaction of the IONet (Default Relay2 – 2.00)
communications and PGEN PLU processing (Default Relay3 – 3.00)
(Default Relay4 – 4.00)
(Default Relay5 – 0.35)
(Default Relay6 – 0.50)
(Default Relay7 – 0.75)
(Default Relay8 – 0.35)
(Default Relay9 – 0.75)
(Default Relay10 – 0.50)
(Default Relay11 – 0.00)
(Default Relay12 – 0.00)

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5.2 PGEN Specific Alarms
The following alarms are specific to the PGEN I/O pack.

32
Description Unallowed VarIOCompatCode Change: Old - [ ]; New - [ ]

Possible Cause The .dll for the installed PGEN is incompatible with the firmware loaded on the I/O processor.

Solution

• Confirm the correct installation of the PGEN distributed I/O pack.


• Rebuild the application, then download the firmware and the application code to the affected I/O pack.

33-35
Description Analog Input [ ] Unhealthy

Possible Cause The analog input 1-3 signal strength is outside the limits for the sensor type.

Solution

• For 4-20 mA analog inputs: Check the configuration parameters MaxMAInput and MinMAInput for proper values.
• For voltage analog inputs: the inputs voltage magnitude is greater than 9.24 V.
• Check the analog inputs 1-3 at the terminal points for in-range values.
• Replace the PGEN I/O pack or the TGNA terminal board if inputs are in range.

36-39
Description Generator Current Input [ ] Unhealthy

Possible Cause The CT input current exceeds the configured CT input by 200%.

Solution

• Check the configuration parameter CT_Secondary for the correct setting.


• Check the compatibility of the generator CT secondary output to the TGNA 1 or the 5 A connections.
• Check the CT input currents for currents exceeding 200% of the configured (5 or 1 A).
• Replace the PGEN I/O pack or the TGNA terminal board if the inputs are in range.

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40-46
Description Channel [ ] ADC Conversion Error

Possible Cause The analog-to-digital conversion for the specified input failed to complete.

Solution Replace the PGEN I/O pack.

47
Description ADC Conversion Not Completed

Possible Cause The analog-to-digital conversion of the terminal board signals failed to complete before the next
conversion cycle was scheduled to start.

Solution Replace the PGEN I/O pack.

51
Description Pack internal reference voltage out of limits

Possible Cause The calibration reference voltage is more than +/-5% from the expected value, which indicates a
hardware failure.

Solution

• Check the terminal board grounding for noise or poor connections.


• Cycle power on the I/O pack.
• Replace the I/O pack if the grounding is okay, and if the condition persists through a power cycle.

52
Description Pack internal null voltage out of limits

Possible Cause The null calibration voltage exceeds 150 mV, which indicates a hardware failure.

Solution

• Check terminal board grounding for noise or poor connections.


• Cycle power on the I/O pack.
• Replace the I/O pack if grounding OK and condition persists through a power cycle.

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53
Description Peer to Peer communication initialization failure

Possible Cause The peer-to-peer communication link between the PGEN and the PDOA failed to initialize.

Solution Replace the PGEN I/O pack.

54
Description FPGA Interrupt Time Out

Possible Cause Interrupt to read terminal board signals failed to occur at the designated time.

Solution Replace the PGEN I/O pack.

55
Description Logic Signal [ ] Voting Mismatch

Possible Cause N/A

Solution N/A

56-64
Description Input Signal [ ] Voting Mismatch, Local=[ ], Voted=[ ]

Possible Cause

• There is a voter disagreement between the R, S, and T I/O packs.


• The I/O pack is not seated on the terminal board correctly.

Solution

• Adjust the parameter TMR_DiffLimt or correct the cause of the difference.


• Re-seat the I/O pack to the terminal board.
• Replace the PGEN I/O pack.

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5.3 TGNA Turbine-Generator Monitor Terminal Board
The Turbine-Generator terminal board (TGNA) acts as a signal interface board for the PGEN I/O pack. The TGNA provides a
direct interface to three analog inputs for sensing turbine steam pressure and three current transformer (CT) feedbacks for
sensing generator current. The signals are passed on to the PGEN(s) through 37-pin connectors. The TGNA can be used for
either simplex or TMR applications. TMR applications fan the signal to three PGEN(s).
The three analog inputs are configurable to be 4-20 mA, ±5 V, or ±10 V inputs. There are two jumpers for each analog input.
One jumper is used to select either current (4-20 mA) or voltage feedback. The other jumper can optionally ground the return
path for the inputs.
The three CT inputs can be fed from 1 A or 5 A rated CT outputs. A separate terminal board point is provided for the two
different amp rated inputs. Configuration parameter CT_Secondary designates which terminal board points are used.

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Analog P28 V,<R >
TGNA
Inputs TB1
P 24 Vn Current P 28 V P28V ,<S>
Limiter JR 1
P28V ,<T>
ID
VDCn P28 V
Voltage I/P
JPx
IDCn 4 -20 mA Cur I/P

Retn 250ohms

JPy
Three of the above circuits
Open Ret ( n = 1,2,3 )(x=1, 3, 5) (y=2,4, 6)
JS1

CT current ID
P 28 V
Inputs

Cur_ A_5H 1 TB2 5 A:0. 0025 A IA 1


Cur_ A_5 L 2 TP2
IA 2 500 ohms
Cur_ A_1H 3 Phase A TP1 0.01%

Cur_ A_1 L 4
1A:0. 0025 A JT 1

ID
Cur_B_ 5H 1 P28V
TB3 5 A:0. 0025 A IB1
Cur_ B_5L 2 TP4
IB2 500 ohms
Cur_B_ 1H 3 Phase B TP3 0.01%

Cur_ B_1L 4
1A:0. 0025 A

Cur_C_ 5 H 1 TB4 5 A:0. 0025 A IC1


Cur_C_5 L 2 TP6

IC2 500 ohms


Cur_C_ 1H 3 Phase C TP5 0.01%

Cur_C_1L 4
1A:0. 0025 A

TGNA Circuits

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5.3.1 Installation
The TGNA accepts three analog inputs (voltage or current) and three CT inputs.
Analog input channels 1 through 3:

• Supports voltage or 4-20 mA current turbine pressure inputs


• Current-limited 24 V power supply per channel
• JP1 (3, 5) jumper for selecting current or voltage inputs
• JP2 (4, 6) configures the return as Open for true differential input or connects return to PCOM for a 24 V return.
Connect the analog pressure sensors to the variables identified in the table, Terminal Variable Definitions.
Voltage-output sensors should use VDCx and Retx as signal connection points. Jumper JP1 (3, 5) should be in the voltage I/P
position. JP2 (4, 6) should be in differential input position for differential feedback and in the Return to GND position for
sensors supplied with the 24 V output. Configuration parameter InputUse for the analog inputs should be set according to the
type of sensor being used, ±10 V, ±5 V, or 4-20 mA.
Current-based sensors should use IDCx and Retx as signal connection points. Jumper JP1 (3, 5) should be in the 4-20 mA I/P
position. JP2 (4, 6) should be in differential input position.
CT current Phase A, B, C

• Supports 0 to 1 A or 0 to 5 A CT secondary currents


• Separate terminal points for 0 to 1 A or 0 to 5 A CT secondary currents
Connect the secondary of the generator current CT sensors to the points identified in the table, Terminal Variable Definitions.
The CT sensors should use the pair of signal points corresponding to the secondary rating of the CT sensors, 1 A or 5 A. The
configuration parameter CT_Secondary should be set to the rating of the CT secondary.

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Generator Terminal Board TGNA

JT1
TB1 Analog Input Jumpers
x JP1 4-20 mA CUR I/P
x 1 P24V (1) VOLTAGE I/ P
P24 V(2) x 2
x 3 PCOM
PCOM x 4
x 5 VDC (1) JP2 RETURN TO GND
VDC(2) x 6
x 7 RET(1) DIFFERENTIAL IN
RET (2) x 8
x 9 IDC (1)
IDC(2) x 10 x 11 RET(1) JP3 4-20 mA CUR I/P
RET (2) x 12
x 13 P24V (3) VOLTAGE I/P
NC x 14 x 15 PCOM
NC x 16 x 17 JP4 RETURN TO GND
VDC (3)
NC x 18 x 19 RET(3) DIFFERENTIAL IN
NC x 20
x x 21 IDC (3) JS1
NC 22 JP5 4-20 mA CUR I/P
x 23 RET(3)
NC x 24 VOLTAGE I/P
x
JP6 RETURN TO GND
DIFFERENTIAL IN

Cur_ A_5 H x 1
Cur_A_5L x 2
x 3 TB 2
Cur_ A_1 H
Cur A Test
Cur_A_1L x 4 JR1
points

Cur_ B_5 H x 1
Cur_ B_5L x 2
x 3 TB 3
Cur_ B_1 H Cur B Test
Cur_ B_1L x 4 points

Cur_ C_5 H x 1
Cur_C_5L x 2
TB 4
Cur_ C_1 H x 3 Cur C Test
Cur_C_1L x 4 points

Terminal block 1 can be unplugged from terminal board for maintenance .


TB2, TB3 , TB4 are not removeable.

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Terminal Variable Definitions
CH # Point Signal Description
Analog 1 TB1-1 P24V1 +24 V output feed for pressure sensor

TB1-3 PCOM1 Power supply return for the P24 V

TB1-5 VDC1 Turbine pressure voltage, signal

TB1-7 Ret1 Turbine pressure voltage/current, return

TB1-9 IDC1 Turbine pressure 4-20 mA, signal

Analog 2 TB1-2 P24V2 +24 V output feed for pressure sensor

TB1-4 PCOM2 Power supply return for the P24 V

TB1-6 VDC2 Turbine pressure voltage, signal

TB1-8 Ret2 Turbine pressure voltage/current, return

TB1-10 IDC2 Turbine pressure 4-20 mA, signal

Analog 3 TB1-13 P24V3 +24 V output feed for pressure sensor

TB1-15 PCOM3 Power supply return for the P24 V

TB1-17 VDC3 Turbine pressure voltage, signal

TB1-19 Ret3 Turbine pressure voltage/current, return

TB1-21 IDC3 Turbine pressure 4-20 mA, signal

Phase A current TB2-1 CUR_A_5H 5 A CT current, high

TB2-2 CUR_A_5L 5 A CT current, low

TB2-3 CUR_A_1H 1 A CT current, high

TB2-4 CUR_A_1L 1 A CT current, low

Phase B current TB3-1 CUR_B_5H 5 A CT current, high

TB3-2 CUR_B_5L 5 A CT current, low

TB3-3 CUR_B_1H 1 A CT current, high

TB3-4 CUR_B_1L 1 A CT current, low

Phase C current TB4-1 CUR_C_5H 5 A CT current, high

TB4-2 CUR_C_5L 5 A CT current, low

TB4-3 CUR_C_1H 1 A CT current, high

TB4-4 CUR_C_1L 1 A CT current, low

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5.3.2 Operation
The PGEN monitors generator 3-phase current and turbine mechanical power to provide the PLU over-speed control for large
steam turbines. Test points are provided for all CT inputs to verify the phase in the field.
Three single-phase CT inputs are provided with a normal current range of 0 to 5 A continuous or 0 to 1 A continuous. The
CTs are magnetically isolated on TGNA. CTs connect to non-pluggable terminal blocks with captive lugs accepting up to #10
AWG wires. The total generator current is calculated from these inputs.
The three analog inputs accept 4-20 mA inputs or ±5, ±10 V dc inputs. A +24 V dc source is available for all three circuits
with individual current limits for each circuit. The 4-20 mA transducers can use the +24 V dc source from the turbine control
or a self-powered source. A jumper on TGNA selects between current and voltage inputs for each circuit. In a TMR system,
analog inputs fan out to the three I/O packs (PGEN). The 24 V dc power to the transducers comes from all three PGEN packs,
and is diode-shared on the TGNA.

Note High frequency and 50/60 Hz noise is reduced with an analog hardware filter.

5.3.3 Specifications
Item Specification
Inputs to TGNA and PGEN 3 one-phase generator CTs
3 analog inputs (4-20 mA, ±5, ±10 V dc)

Generator current inputs Normal current range is 0 to 5 A with over-range to 10 A or


0 to 1 A with over-range to 2 A
Nominal frequency 50/60 Hz with range of interest 45 to 66 Hz
Magnetic isolation to 1,500 V rms
Input accuracy 0.5% of full scale (5 A or 1 A) with resolution of 0.1% FS
Input burden less than 0.5 Ω per circuit

Analog inputs Current inputs: 4-20 mA


Voltage inputs: ±5 V dc or ±10 V dc
Transducers can be up to 300 m (984 ft) from the control cabinet with a two-way cable
resistance of 15 Ω.
Input burden resistor on TGNA is 250 Ω.
Jumper selection of single ended or self powered inputs
Jumper selection of voltage or current inputs
Analog Input Filter: Breaks at 72 and 500 rad/sec
Ac common mode rejection (CMR) 60 dB
Dc common mode rejection (CMR) 80 dB

Conversion accuracy Sampling type 16-bit A/D converter, 14 bit resolution


Accuracy 0.1% overall

Frame rate 720 or 600 Hz


Calculated values Total current
Mechanical power

Size 33.02 cm high x 10.16 cm wide (13 in x 4 in)

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5.3.4 Diagnostics
Diagnostic tests are made on the terminal board as follows:

• The TGNA provides out of sensor limits checks for each Turbine-Generator input. The PGEN creates a diagnostic alarm
(fault) if any one of the inputs has an out-of-range voltage/current.
• Each cable connector on the terminal board has its own ID device that is interrogated by the PGEN. The ID device is a
read-only chip coded with the terminal board serial number, board type, revision number, and the JR, JS, JT connector
location. When this chip is read by the PGEN and a mismatch is encountered, a hardware incompatibility fault is created.

5.3.5 Configuration
The terminal board is configured with jumpers. For location of these jumpers, refer to the installation diagram. The jumper
choices are as follows:

• Jumpers JP1, JP3, and JP5 select either current (4-20 mA) input or voltage input
• Jumpers JP2, JP4, and JP6 select whether the return is connected to common (Return to GND) or is left open (differential
input)
The following diagrams illustrate connections for common analog inputs.
All other configuration for PGEN is done from the ToolboxST. For the location of these jumpers, refer to the installation
diagram.

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6 PPRA Emergency Turbine Protection
6.1 PPRA Emergency Turbine Protection I/O Pack
The Emergency Turbine Protection I/O packs (PPRA) and associated TREA terminal
board provide an independent backup overspeed protection system. They also provide
an independent watchdog function for the primary control and isolated trip contact
inputs. A protection system consists of three triple modular redundant (TMR) PPRA I/O
packs mounted to a TREA terminal board that has a WREA.

The PPRA supports six speed inputs fanned to three protection I/O packs in the
following two configurations:

• Two speed sensors on each of three shafts


• Three speed sensors on each of two shafts.
The PPRAS1B is the only version that supports different grouping of speed inputs. The
PPRA accepts six speed signals (configured as three sets of two speed inputs, or two
sets of three speed inputs) for firmware overspeed, acceleration, deceleration, and a
hardware implemented overspeed protection. It monitors the operation of the primary
control. The PPRA monitors the status and operation of the TREA trip board through a
comprehensive set of feedback signals. If a problem is detected, the PPRA will trip the
backup trip relays on the TREA board and activate a trip on the primary control.

The Mark VIe control is designed with a primary and backup trip protection systems
that interact at the trip terminal board level. Primary protection is provided with the
Turbine Primary I/O pack (PTUR) operating a primary trip board (typically TRPA)
when paired with PPRA/TREA. Backup protection is provided with PPRA mounted on
a TREA terminal board. The PPRA is fully independent of and unaffected by the
turbine primary protection.

6.1.1 Compatibility
There are currently three versions of the PPRA I/O pack and each contain a functionally compatible BPPx processor board:

• The PPRAH1A contains a BPPB processor board.


• The PPRAS1A contains a BPPB processor board.
• The PPRAS1B contains a functionally compatible BPPC processor board that is supported in the ControlST* software
suite V04.07 and later. Refer to GEI-100709, Mark VIe Control PPROS1B and PPRAS1x Functional Safety Instruction
Guide for proper safety loop operation and restrictions.
The PPRAS1A and S1B are IEC 61508 certified versions for use in IEC 61511 certified safety loops. The PPRAS1A or S1B
with TREAS#A and WREAS1A are the safety certified versions.
The PPRA mounts directly on TREA, and with TREA it is required to have the WREA option board mounted on the PPRA
application specific circuit board Option Header connector. The PPRA mounted on TREA with WREA will only function
correctly with three PPRA I/O packs. Single and dual pack operation is not possible.

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TREA
PPRA

DC-62
JZ1
Trip relays,
PPRA
Estop,
Overspeed

DC-62
JY1
PPRA
WR EA

DC-62
JX1

Only PPRAS1A and PPRAS1B I/O packs mounted on TREAS1A terminal boards can
be configured for SIL applications.

Attention

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6.1.2 Installation
➢ To install the PPRA I/O pack
1. Securely mount the TREA terminal board.
2. Directly plug three PPRA I/O packs into the TREA.
3. Slide the threaded posts on PPRA, located on each side of the Ethernet ports, into the slots on the terminal board
mounting-bracket. Adjust the bracket location so the DC-62 pin connector on PPRA and the terminal board fit together
securely. Tighten the mounting bracket. The adjustment should only be required once in the service life of the product.
Securely tighten the nuts on the threaded posts locking PPRA in place.
4. Plug in one or two Ethernet cables depending on the controller and network redundancy. PPRA is not sensitive to
Ethernet connections and selects the proper operation over either port.
5. Apply power by plugging in the power connector on the side of the module. The I/O module has inherent soft-start
capability that controls current levels upon application.
6. Use the ToolboxST* application to configure the module as necessary.

6.1.2.1 Controller and Network Redundancy


In systems with a single controller, the controller R network should be connected to the PPRA on the JX1 connector, the S
network should be connected to PPRA on the JY1 connector, and the T network should be connected to the PPRA on the JZ1
connector. All three networks are coming from the single controller. PPRA applications do not support dual network
connections for all three PPRAs. In a redundant system there is no additional system reliability gained by adding network
connections to the first two PPRAs with dual controllers or any of the three PPRAs with TMR controllers.
In systems with dual controllers, the controller R network should be connected to the PPRA on the JX1 connector, the S
network should be connected to PPRA on the JY1 connector, and both the R and S networks should be connected to the
PPRA on the JZ1 connector.
In systems with three controllers, the R network should be connected to the PPRA on the JX1 connector, the S network
should be connected to PPRA on the JY1 connector, and the T network should be connected to the PPRA on the JZ1
connector.

6.1.3 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• Auto-reconfiguration
• BPPx Processor
• Processor LEDs
• Power Management
• ID Line

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6.1.3.1 Connectors
• A DC-62 pin connector on the underside of the PPRA I/O pack connects directly to the terminal board. The connector
contains the signals needed to sense inputs and operate a trip terminal board.
• An RJ-45 Ethernet connector named ENET1 on the side of the pack is the primary IONET-EGD connection.
• A second RJ-45 Ethernet connector named ENET2 on the side of the pack is the redundant or IONET-EGD connection
used on dual network configurations.
• A 3-pin power connector on the side of the pack is for 28 V dc power for the pack and terminal board.

Note The TREA trip terminal board plus WREA features contact trip inputs. The power for those contacts is provided
through a separate terminal board connector, not from the 28 V dc power source.

6.1.3.2 Application Hardware


The PPRA I/O pack has an internal application specific circuit board that contains the hardware needed for the emergency trip
function. The application board connects between the processor and the TREA terminal board and is common between PPRA
and PPRO I/O packs. The application board has an option card header that connects to a PPRA-specific option card. The
following diagram displays the functions of the application board.

To Processor
Board

To Processor
Board

PPRA Application Specific Circuit Board


In the PPRA not all of the signal conditioning is used. The option card connected to the internal header adds support for three
additional pulse rate input channels and support for the speed pulse rate repeater outputs.
All boards within the pack contain electronic ID parts that are read during power application. A similar part located with each
terminal board connector allows the processor to confirm correct matching of the I/O pack to the terminal board and to report
board revision status to the system level control.

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6.1.3.3 Protective Functions
The PPRA performs the following protective functions in a mix of hardware, programmable logic, and firmware. In the
following diagram, standard symbols for time delay contacts have been used:

In the following diagrams, a standard has been used to indicate signal origin and flow.

• Signal names that end with (SS) are created within PPRA and the data flow is out to the controller through signal space.
• Signal names that end with SS are created in the controller and the data flow is into PPRA through signal space.
• Signal names that end with (IO) are created within PPRA and the data flow is out to the hardware.
• Signal names that end with IO indicate the signal is a hardware input into PPRA.
• Signal names that end with anything containing CFG are part of the PPRA configuration. In this case an attempt has been
made to indicate what area of the PPRA configuration contains the variable.
• When J3 is referenced in a CFG, it refers to the connection point for the trip relay board, TREA, and the corresponding
configuration values.
• The combination IO (SS) indicates a signal that comes from the hardware inputs to PPRA, and is then sent out to the
controller as part of signal space.
If there is no special ending on a signal name, then the signal is used internal to PPRA and is not part of the hardware or
signal-space data movement. This signal is not available or visible to applications, but it is needed to adequately describe the
I/O pack's operation.

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6.1.3.4 Direct/Conditional Discrete Input Trip
PPRA supports the four isolated discrete contact input trip signals provided on the TREA+WREA board. In the following
figure, the direct / conditional determination is implemented in firmware while Contact # and L5Cont #_Trip are in hardware
logic. When configured for direct trip, the firmware is not in the trip path. When configured for conditional trip, the firmware
determines the communication health (displayed as network_keepalive) and populates the programmable logic with the
conditional signal from signal space. If the controller communication is lost, the default will permit any conditional trip.

Note The contact inputs include an 8 ms contact de-bounce filter to protect against false trips.

A
Network_ keepalive A >= B
B L3SS_ Comm, (SS)
3

Trip #_Inhbt, SS L3SS_Comm, (SS) Inhbt #_Fdbk , (SS)


A
Trip_Mode, CFG (J3,Contact #) A=B
B Cont #_ TrEnab,(SS)
Direct , CNST
A
A =B
B
Conditional, CNST Trip #_EnCon,(SS)

Contact #, (IO) Cont #_ TrEnab


L5 Cont #_Trip, (SS)
CONTACT #
TRIP
Trip #_EnCon Inhbt #_Fdbk, SS

L5Cont #_Trip, (SS) L86MR, SS

Note: The contact circuit in this diagram is duplicated4 times. To obtain the correct signal name,
replace the symbol # with the numbers 1-4. Signal names without# appear only once for all 4
circuits (L3SS_COMM, L86MR).

PPRA Contact Input Trips

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The resulting contact trip signals are combined into a single contact trip summary, L5Cont_Trip.

Contact Input Trip Signal Concentration

6.1.3.5 Trip Input


PPRA monitors a trip input signal that is present on the TREA board and uses it to cross trip the main control in the event the
trip input is activated. It is also used within the pack logic as part of the trip relay output command. The relays are not
required to close if the trip input signal is present. The main control counterpart is also present. If the main control votes to
trip, it can also cross-trip the corresponding PPRA.

HwTripin, IO J3 = TREA EstopEnab , CFG KESTOP1_Fdbk , (SS)

KESTOP1_Fdbk , (SS) J3 = TREA EstopEnab , CFG L5ESTOP1, (SS)

TRIP
L5ESTOP1, (SS) L86MR, SS
Contact Input Trip Input

Note There are several inversions in the hardware signal path, but the end result is that KESTOP#_Fdbk is only a 1 when
E-Stop is energized. Therefore, 1 = OK.

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6.1.3.6 PPRA Speed Input High Select
When PRGrouping is set to ThreeGroups, PPRA speed inputs are expected to be in pairs on each shaft with up to three shafts
possible (other combinations of speed inputs are not permitted). The following table displays the TREA input screw pairs for
the primary (PulseRate_A) and secondary (PulseRate_B) speed signals, signal space (SS).

TREA Input Screw Pair (TB#) Speed Variable High-selected value


PR1H_X (43) – PR1L_X (44) PR1_Spd (SS) PulseRate1 (SS) (Shaft 1)

PR4H (25) – PR4L (26) PR4_Spd (SS)

PR2H_X (45) – PR2L_X (46) PR2_Spd (SS) PulseRate2 (SS) (Shaft 2)

PR5H (27) – PR5L (28) PR5_Spd (SS)

PR3H_X (47) – PR3L_X (48) PR3_Spd (SS) PulseRate3 (SS) (Shaft 3)

PR6H (29) – PR6L (30) PR6_Spd (SS)

Configuration of the speed inputs is done at the PulseRate1-3 level. PPRA then applies the PulseRate1 configuration values to
both PR1_Spd and PR4_Spd. This ensures that the two inputs that go through a high select are configured the same.
Paired speed inputs should be the same value during normal operation. Protection for excessive difference between the two
inputs is provided. The difference is calculated and compared to a configurable threshold, Dual_DiffLimit (default 25 rpm). If
the difference exceeds the threshold a diagnostic alarm is created, Dual speed sensors mismatch.

PR1_Spd, IO (SS)
A

|A -B| A Latched Alarm-


Dual speed sensor mismatch
PR4_Spd, IO (SS) Dual_DiffLimit1, A>B
B
CFG (PulseRate1)
B

A
High PulseRate1, IO (SS)
Select
B

Shaft Speed High Select, Difference Alarm


The high select diagram displays the overspeed names used for the first of three pulse rate inputs. The same figure is repeated
for PulseRate2 and 3. For all variables where the number 1 displays, simply substitute a 2 or 3 for the 1 to get the signal
name.

Note Speed inputs are sensitive to the mV level. To avoid speed difference diagnostics, unused speed input screw pairs
should be electrically tied together.

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6.1.3.7 PPRA Speed Input Median Select
When PRGrouping is set to TwoGroups, PPRA speed inputs are expected to be in groups of three with up to two shafts
possible (other combinations of speed inputs are not permitted). The following table displays the TREA input screw sets for
the speed signals, signal space (SS).

TREA Input Screw Pair (TB#) Speed Variable Mid-Select value


PR1H_X(43) - PR1L_X(44) PR1_Spd (SS) PulseRate1(SS) (Shaft 1)

PR2H_X(45) - PR2L_X(46) PR2_Spd (SS)

PR4H(25) - PR4L(26) PR4_Spd (SS)

PR3H_X(47) - PR3L_X(48) PR3_Spd (SS) PulseRate2(SS) (Shaft 2)

PR5H(27) - PR5L(28) PR5_Spd (SS)

PR6H(29) - PR6L(30) PR6_Spd (SS)

N/A N/A PulseRate3(SS)

Configuration of the speed inputs is done at the PulseRate1-2 level. PPRA then applies the PulseRate1 configuration values to
PR1_Spd, PR2_Spd, and PR4_Spd. This ensures that the three inputs that go through the median select are configured the
same.
Grouped speed inputs should be the same value during normal operation. Protection for excessive difference between any two
inputs in a group is provided. The difference is calculated and compared to a configurable threshold, Dual_DiffLimit (default
25 rpm). If the difference of any one speed in a group from the voted median value exceeds the threshold, a diagnostic alarm
is generated (Dual speed sensors mismatch).

A
| A- B| A Latched Alarm-
Dual_ DiffLimit1, Dual speed sensor mismatch PR1_Spd
PR1_Spd, IO (SS) B A >B
CFG (PulseRate1)
B

PR1_Spd, IO (SS)
A A
|A- B| A Latched Alarm-
PR2_Spd, IO (SS) B Dual_DiffLimit1, Dual speed sensor mismatch PR2_Spd
PR2_Spd, IO (SS) Median AB
B Select CFG (PulseRate1)
B

PR4_Spd, IO (SS) A
C
|A-B | A Latched Alarm-
Dual_DiffLimit1, Dual speed sensor mismatch PR4_Spd
PR4_Spd, IO (SS) B AB
CFG (PulseRate1)
B

PulseRate1, IO (SS)
Shaft Speed Median Select, Difference Alarm

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6.1.3.8 Firmware Overspeed Trip
Firmware overspeed protection is performed on the three values that come out of the high speed select. Although the
established standard for naming these three inputs is HP, IP, and LP, the three inputs are free to be applied as needed in a
system design. The following pulse rate variables are displayed using a # symbol. Replace the # with 1 for HP, 2 for LP, or 3
for IP.

OS1_ Setpoint,SS
RPM A |A|
A-B A A
OS1_SP_ CfgEr
OS _ Setpoint, CFG (J5,PulseRate #) A>B
B 1 RPM System Alarm, if the two setpoints
RPM B do not agree
A
MIN
B

OS _Stpt_PR # OS _Setpoint_ PR #

A A
A+B zero
MULT A
0.04
B MIN B
OS_Tst_Delta, CFG (J5,PulseRate #)
B
RPM
OfflineOS # tst, SS
OnlineOS # tst, SS

PulseRate #, IO
A
OS1
A>=B
OS_ Setpoint _ PR #
B

OS#_SP_CfgEr L5 CFG #_ Trip


PR #_Zero

OS# HW_ SP_ CfgEr

L5 CFG #_Trip L86 MR, SS

OS1_ Trip
OS1
Overspeed
Trip
OS1_Trip L86MR,SS

Firmware Overspeed Trip

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Firmware Overspeed Trip functions include:

• Fault on overspeed threshold match failure between config and signal space values when speed is zero
• Pick the lower threshold from config or signal space
• Provide a mechanism to zero the threshold for online overspeed test
• Provide a mechanism to modify the threshold for offline overspeed test, bounded to limit increases to the threshold to
104%

Note Use a negative OS_Tst_Delta value to reduce the threshold during testing.

• Compare the threshold to the calculated speed and latch overspeed

6.1.3.9 PPRA Hardware Overspeed Trip


The following figure displays the overspeed names used for the first of three pulse rate input groupings. The configuration,
alarms, and latched trip are performed for the pair of inputs: PR1_Spd and PR4_Spd. A detected overspeed on either PR1_
Spd or PR4_Spd will latch as OS1HW_Trip. The same groupings are repeated for pairs PR2_Spd, PR5_Spd, and PR3_Spd,
PR6_Spd. The pulse rate variables are displayed using a # symbol. Replace the # with 1 for HP, 2 for LP, or 3 for IP.

OSHW_ Setpoint #, SS
A
Generate an alarm if the hardware is
|A- B| A different than the firmware trip
OSHW _ Setpoint ,CFG OS # HW_ SP_ CfgEr ( SS)
B A> B
(PulseRate #)
1RPM
B
OS_ Setpoint Generate an alarm if the hardware
A setpoint changes after power - on
HW Value
OS # HW_ SP_ Pend ( SS)
| A- B|

PulseRate #,
A
HWIO
A> =B

B OS # HW

Hardware
Overspeed
OS# HW OS # HW _Trip Trip
( SS )

OS # HW _Trip, ( SS) L 86MRX

Speed#Updating
Hardware Overspeed Trip, HP Shaft

Note Refer to the section, Shaft Speed Accel, Decel, and Zero for the definition of Speed#Updating

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Hardware Overspeed Trip functions include:

• Load the independent hardware overspeed set point only when the PPRA pack re-boots or has power cycled
• Generate an alarm when the hardware config set point is >1 Hz different from the value passed through signal space from
the application configuration
• Generate an alarm and signal space Boolean logic change when the setpoint in config fails to match the value stored in
the hardware
• Implement speed calculation and the trip logic entirely inside programmable logic
• Overspeed response time will be < 20 ms at trip speed
• Hardware overspeed response in less than three rotations of the shaft (typically less than 60 ms at normal operating
speeds)
• Hardware overspeed is implemented for each of the six speed inputs. The configuration and trip indication is done using
the same groupings identified for firmware overspeed
For a PRGrouping of TwoGroups, the configuration, alarms, and latched trip are performed for the group of inputs: PR1_Spd,
PR2_Spd, and PR4_Spd. A detected overspeed on either PR1_Spd, PR2_Spd, or PR4_Spd will latch as OS1HW_Trip. The
same figure is repeated for the second grouping of PR3_Spd, PR5_Spd, and PR6_Spd. In the signal name for all variables, the
number 1 can replaced by a 2, as applicable.

Note There is no separate enable or disable signal for this Overspeed protection. The disable signal is created by setting a
high overspeed point value. The calculated speed will never reach the value needed to trigger OS1HW.

The actual hardware implementation depends on two configuration items:

• OSHW_Setpoint specifies the overspeed trip level in RPM


• PRScale determines the number of speed sensor pulses per revolution used to convert pulse rate into RPM for both
hardware and firmware overspeed value
The hardware implementation requires two adjacent revolutions exceeding the OSHW _Setpoint to trip the system. When a
trip is present, the setting of OSHW _Setpoint is reduced by a small amount in the hardware to provide a clean trip signal.
Because there are set limits to the time integration used in the hardware detector, the minimum RPM setting for the OSHW
_Setpoint is approximately four RPM.

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6.1.3.10 LP Shaft Locked Detection
There is another protection function in addition to the overspeed protection displayed on the preceding page. It generates a
signal in the event the first pulse rate signal is above minimum speed, and the second pulse rate signal is still at zero.

PR1_MIN PR2_Zero, (SS)


LockRotorByp , SS LPShaftLock , (SS)
LPShaftLock , (SS) L86MR, SS

6.1.3.11 E-Stop
The I/O pack monitors the E-Stop trip signal that is present on the TREG or TREA terminal boards and uses it to cross trip
the main control in the event E-Stop is invoked. It is also used within the pack logic as part of the trip relay output command.
The relays are not required to close if the E-Stop signal is present. The main control counterpart is also present. If the main
control votes to trip, it can also cross-trip the corresponding I/O pack.

J3= TREA TRIPENAB, CFG

Hw Estop1 , IO KESTOP1_ Fdbk , ( SS)

J3= TREG
KESTOP1_ Fdbk , ( SS) L5 ESTOP1 , (SS)

ESTOP1
TRIP

L5 ESTOP1 , (SS) L86MR , SS


Contact Input E-Stop

Note There are several inversions in the hardware signal path, but the end result is that KESTOP#_Fdbk is only a 1 when
E-Stop is energized. Therefore, 1 = OK. The TREL and TRES terminal boards do not have E-Stop capability because it is on
the primary trip boards TRPL and TRPS.

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6.1.3.12 Speed Difference Detection
There should never be a reason why the speed calculated by the I/O pack is significantly different from the speed calculated
by the main control. Speed difference detection looks at the difference in magnitude between pulse rate 1 from both the pack
and the main control. If the difference is greater than the set threshold for three successive samples, a SpeedDifTrip is latched.
If the main control recovers for 60 seconds, the trip is removed. This allows the main control to recover with subsequent
re-arming of the backup protection.

IO Frame Rate

Speed 1 , SS
A -0
Z A
PulseRate1 |A - B | A
(RPM) , IO -1 Speed 1_ Diff
A >B Z B (A & B & C)
B OS_Diff, CFG (%) Rated RPM_TA,
100
* CFG (RPM) B -2
Z C

PulseRate 1 ( Hz) , IO
A
Shaft Turning
A >B
75 Hz
B
1 Second Delay
SpeedDifEn , Card CFG
Enable
SpeedDiff _ Trip
Speed 1_ Diff Enable

SpeedDiff _ Trip L 86 MR , SS Speed 1_ Diff


Close immediately , 60 sec delay on opening Speed
Difference
Trip

When configured for dual controller, additional logic is added so that separate speed inputs from the two controllers come into
the I/O pack. This trip logic acts as if both controllers have a speed error, but continues to run if one controller has a valid
speed signal.

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6.1.3.13 Maximum Speed Hold
The I/O pack provides a maximum speed hold function that resets when:

• Using the command PR_Max_RST (from signal space)


• PR1_Zero changes to false when the shaft first starts turning
Output values are PR1_Max, PR2_Max, and PR3_Max. These signals are used to determine the maximum speed obtained
while running or after stopping a turbine.

6.1.3.14 Overspeed Test Logic, Steam Turbine


The signal OnLineOS1Tst is used for PulseRate1, OnLineOS2Tst is used for PulseRate2, and OnLineOS3Tst is used for
PulseRate3. In the following figure, there is another signal, Online OS1X, which initiates an online overspeed test for
PulseRate1. This signal also creates a 1.5 second reset pulse when removed.

Online Overspeed Test Logic

6.1.3.15 Speed State Boolean Values


The I/O pack has detection for zero speed from a set point with 1 RPM hysteresis. The I/O pack calculates a minimum speed
signal from a set point. The rate of change of speed from a set point is calculated resulting in a selectable acceleration trip. A
deceleration trip is then determined from a fixed 100% / second rate.

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GE Internal
6.1.3.16 Shaft Speed Accel, Decel and Zero
The I/O pack has detection for zero speed from a set point with 1 RPM hysteresis. The I/O pack calculates a minimum speed
signal from a set point. The rate of change of speed from a set point is calculated, resulting in a selectable acceleration trip. A
deceleration trip is then determined from a fixed 100% / second rate.
The acceleration for a given pulse rate (PR#_Accel) is calculated by computing two adjacent shaft speeds over a period of
AccelCalType ms each by computing change in pulse counts, and then computing the difference in these speeds divided by
AccelCalType ms to get the acceleration of the shaft.
In the following figures, pulse rate variables are displayed using a # symbol. Replace the # with 1 for HP, 2 for LP, or 3 for IP.
This figure is the same for PulseRate1, 2, and 3. Simply replace the 1 with a 2 or 3 to get the signal name. The contact, PR#_
Min, in the Acc1_Trip is only present for PR2 (PR2_Min) and PR3 (PR3_Min). It is not used for PR1.

PR_Zero
Hyst
1

0
PulseRate #, IO 0 RPM
(RPM) CFG

A
Zero_Speed, CFG A<B
(PulseRate #) PR#_Zero
B
(SS)
A
A+B
1 RPM
B PR #_Zero
A
A>B
Min_Speed, PR#_Min
CFG(PulseRate #) B

Speed State Boolean Values

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The pulse rate inputs have special detection for loss of signal, and special filtering to remove input noise from nearly
stationary shaft speeds.

PulseRate #, IO

Speed Wheel Pulse


Detected Window Speed #Updating
Speed
Inactive Counter Updating
Based on last speed Normally
(Maximum 24
seconds )

(Pulse Rates in Hz ) A Shaft # Turning


Allow Accel /
A > B
Decel Trip
75 Hz
B

1 Second Delay

1 **


Speed # Updating Shaft # Turning Decel #Trip Loss of
Pulse Rate

Decel #Trip †
can only be reset when
Speed #Updating becomes True
(pulses are able to be seen ) or
** 1 = Normal Operation after the I/O pack is rebooted
Pulse Rate Conditioning

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GE Internal
Decel#Trip
PulseRate#
(RPM)
A PR#_DEC

(From GearSpeed) A OR
Speed#Updating
A<B B
-100%/SEC**
S
B
(Der)
Shaft#Turning

%/Sec A PR#_ACC
0 %/Sec

A AND

A>B B
Acc_Setpoint, CFG (J5, PulseRate#)
B

PR#_DEC Dec#_Trip, (SS)

Dec#_Trip L86MR,SS

Acc_Trip, CFG (J5, PulseRate#)

Enable Acc#_Trip, (SS)


PR#_ACC PR#_MIN **
Acc#_TrEnab

HP, IP and LP Shaft Accel Decel Trip Logic


Acc#_Trip L86MR,SS
Note: PR#_MIN is not used on ACC1_Trip.
PR2_Min is used on ACC2_Trip and
PR3_Min is used on ACC3_Trip.

**Note: Where 100% is defined as the OS Setpoint.

Shaft Speed Accel, Decel and Zero

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6.1.3.17 Trip Anticipate Function
Steam turbine applications provide a speed trip that uses a live set point from signal space. This overspeed trip is vigorously
changed as a function of turbine load. This function does the following:

• Input set point is OS1_TATrpSp from signal space. Input rated RPM is specified by RatedRPM_TA as part of the I/O
pack configuration. Function test request input is TrpAntcptTst from signal space.
• If (OS1_TATrpSP is < 103.5% OR > 116% of RatedRPM_TA) then TA_Spd_Sp (the local set point value) = 106% of
RatedRPM_TA and TA_StptLoss (Signal space) is true and alarm L30TA is declared. Otherwise, TA_Spd_Sp = OS1_
TATrpSP.
• If TrpAntcptTst is true, decrease the current value of TA_Spd_Sp by 1RPM / second. Set the minimum value of
RatedRPM_TA to 94%. If TrpAntcptTst is false, the value of TA_Spd_Sp from above is immediately used.
• If PulseRate1 (Speed input 1 from the pulse rate input) > TA_Spd_Sp the internal value Trp_Anticptr is set properly.
• If the I/O pack is configured for steam turbine application (internal value SteamTurbOnly), then TA_Trip (signal space)
equals the value of Trp_Anticptr.

Note The I/O pack mounted on a TREA does not toggle the relays for trip anticipate function.

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GE Internal
6.1.3.18 Solenoid Voltage / Power Sense
The I/O pack provides three comparator voltage inputs used to monitor solenoid power or solenoid voltage depending on the
trip card that is connected. SOL1_Vfdbk (SS), SOL2_Vfdbk (SS), and SOL3_Vfdbk (SS) are generated from the input
signals.

6.1.3.19 Main Control Watchdog


A standard control watchdog function is provided by the I/O pack. In this function, a value from a Device Heartbeat
(DEVICE_HB) block is passed from the main controller to the I/O pack each data frame. If the I/O pack stops detecting the
value from the main controller, a counter is incremented and, after five data frames, leads to a trip. If the main controller
recovers for 60 seconds, the trip is removed, allowing for the recovery of the main controller with subsequent re-arming of the
backup protection. The recovery function is provided for typical activities such as cycling power on a controller to perform
maintenance.
While the controller is offline, the I/O pack associated with that controller will vote to trip. When the controller returns to
operation, the I/O pack will remove the vote to trip. The watchdog offers monitoring of two main controllers in the event both
Ethernet ports are connected. When configured for two controllers, having one controller active is sufficient to prevent a trip.

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6.1.3.20 Stale Speed Detection
The I/O pack provides an additional main control watchdog function that is based on a live speed signal. The protection works
as follows: If the pack PulseRate1 is determined to be zero speed the protection is turned off. If above zero speed, the pack
looks at the value of Speed1 from the main control. If the most recent Speed1 value exactly matches the Speed1 value from
the last data frame then a counter is incremented. If the counter reaches a threshold then a stale speed trip is declared and
latched. If speeds are different the counter is cleared.

Although Speed_1, SS is available as a connected variable, it should not be forced. It


can cause the protection to trip the system if enabled.

Attention
This protection is based on the knowledge that a live speed signal always dithers or moves some small amount. If the speed
values being read by PPRO from the controller are not changing (dithering), there is loss of speed signal integrity from the
controller. If the main control recovers for 60 seconds, the trip is removed allowing for the recovery of the main control with
subsequent re-arming of the backup protection. The protection offers monitoring of two main controls in the event both
Ethernet ports are connected. When configured for two controls, having one control satisfy the test is sufficient to prevent a
trip.

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GE Internal
6.1.3.21 Main Control Ethernet Monitor
The main control provides time synchronization across the distributed control elements. The time synchronization is tied
tightly into the time at which traffic occurs on a given controller's IONet. The I/O pack provides monitoring of this service to
ensure it is working correctly. Gross errors in time synchronization are detected by the pack through a number of different
means, and if problems persist, the I/O pack will vote to trip. Once the trip is latched, if the problem goes away for 60 seconds
the trip shall be reset (this assumes the control recovers from the problem and is back on line). The monitor will offer
monitoring of two main controls in the event both Ethernet ports are connected. When configured for two controls, having
one control sequencing correctly is sufficient to prevent a trip.
In the following diagram, the detection has been simplified to display monitoring of an Ethernet frame number as the means
for determining a problem is present.

Sync Frame Count Monitor

6.1.3.22 Trip Signal Logic


The different trip signals are combined into a composite signal that is used in the relay output logic. The following figure
specifies how the signals are combined. This function is partitioned between firmware and programmable logic. The path to
trip through hardware overspeed is done completely in hardware so that a firmware malfunction cannot defeat the protection.
The same is true of the contact input trip signals when they are configured for direct trip.
There are differences between steam turbine protection and other protection. A composite signal SteamTurbOnly is created
for ease of use:

LargeSteam **

MediumSteam **

** A number of contacts depend on


SmallSteam **
the value of Turbine _Type, CFG.

SteamTurbOnly
Steam Turbine Trip Signals

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Dec1_Trip
OS1_Trip

Acc1_Trip PulseRate1
L5CFG1_Trip Trips

Dec2_Trip
OS2_Trip 1
GT_2Shaft
PulseRate2
Trips
Acc2_Trip
L5CFG2_Trip LM_2Shaft1

1
LPShaftLock LM_3Shaft ComposTrip1,
(SS)
Dec3_Trip
OS3_Trip PulseRate3
1 Trips
LM_3Shaftf
Acc3_Trip
L5CFG3_Trip

L5Cont_Trip
SpeedDiff_Trip System
Cross_Trip, SS Trips

StaleSpdTrip
ContWdogTrip
FrameSyncTrip

2
Sil_Diag_Trip
1 1
LM_2Shaft LM_3Shaft PR1_Zero
Zero
Speed
1 Special
HPZeroSpdByp SteamTurbOnly
LMTripZEnable, CFG Case
SS
L3Z

Hardware
OS1HW_Trip Overspeed
OS2HW_Trip
OS3HW_Trip
1
Notes: CFG values.
2
This trip is generated if a PulseRate signal is broken (such as in the case of no
signal) and SilMode is set to enabled, or if a hardware issue is detected
regardless of SilMode. There will be an accompanying diagnostic generated to
designate the actual cause of the trip.
Trip Combine - All Signals (SS) unless Marked

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GE Internal
6.1.3.23 Watchdog Trip Function
Hardware in the I/O pack monitors local firmware operation, providing a watchdog trip function if the firmware malfunctions.
The operation of this watchdog does not display in the normal sequencing figures. The I/O pack hardware is designed to be in
a fail-safe or trip mode if it is not properly configured and operating. This means that with power off, while starting up, when
in a hardware reset, or otherwise not online, the I/O pack will vote to trip. If the I/O pack watchdog acts, it resets the hardware
thereby generating a vote to trip.
The processor board used inside the I/O pack has hardware features that allow it to differentiate between a reset caused by the
watchdog hardware and a reset caused by cycling of power. This information is available from the pack after it restarts. In the
event that an I/O pack votes to trip due to a reset, it is then possible to determine if a watchdog reset or a cycling of control
power caused the event.

6.1.3.24 Trip Relay Outputs


PPRA provides drivers for three emergency trip relay commands, and provides monitoring for three status feedback signals.
Trip is a combination of firmware trip and direct trip implemented in programmable logic.

In
FPGA
TestETR 1 ComposTrip1 ETR1_Enab L5ESTOP1(SS) ETR1 (IO)
SS (SS) CFG, K1_Fdbk Trip Relay,
Energize to Run,
TA_TRIP_ENABL1**
CFG (PPRA)

In
FPGA
TestETR 2 ComposTrip1 ETR2_Enab L5ESTOP1(SS) ETR2 (IO)
SS (SS) CFG, K2_Fdbk Trip Relay,
Energize to Run,
TA_TRIP_ENABL2**
CFG (PPRA)

L97EOST_ONLZ

In
FPGA
ComposTrip1 TestETR 3 ETR3_Enab L5ESTOP1(SS) ETR3 (IO)
(SS) SS CFG, K3_Fdbk Trip Relay,
Energize to Run,
TA_TRIP_ENABL3**
CFG (PPRA)
Note ** Parameter set to Disable and is not configurable.

Trip and Economizing Relay Outputs

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6.1.4 Specifications
Item PPRA Specification
Speed input quantity Six input signals provided

Speed input range Pulse rate frequency range 2 Hz to 20 kHz

Speed input accuracy Pulse rate accuracy 0.05% of reading

Speed input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 28 mV p-p
Speed input sensitivity is such that turning gear 20 kHz requires 300 mV p-p
speed may be observed on a typical turbine
application.

Frame Rate 100 Hz maximum


Size 8.26 cm High x 4.19 cm Wide x 12.1 cm Deep (3.25 in x 1.65 in x 4.78 in)

Technology Surface-mount
† Ambient rating for enclosure design PPRAS1B is rated from -40 to 70ºC (-40 to 158 ºF)
PPRAS1A and PPRAH1A are rated from -30 to 65ºC (-22 to 149 ºF)

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

6.1.5 Diagnostics
The I/O pack performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the analog feedback currents
• A comparison between the commanded state of each relay drive and the feedback from the commanded output circuit
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set.
A failed power-up self-test is indicated by solid red lighting of the power and attention LEDs. Failure to verify the electronic
ID will result in a communication failure. Failures of the other tests will result in a generated diagnostic alarm.
Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be individually
latched, and then reset with the RSTDIAG if they become inactive.

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GE Internal
6.1.5.1 PPRA Trip Status
Six additional LEDs located on the left side of the faceplate are used for trip status. All six LEDs stay off until all hardware
application is complete. The LEDs indicate trip status of the PPRA as follows:
RUN is green any time the I/O pack has energized the emergency trip relays. RUN turns red any time the I/O pack has
removed power from the emergency trip relays, voting to trip.
ESTP is green when the E-STOP input (if applicable) is in the run state. ESTP turns red any time E-STOP is invoked to
prevent pick up of the emergency trip relays. If the chosen trip terminal board doesn't support E-STOP then the LED defaults
to green.
OSPD turns red any time the I/O pack votes to trip in response to a detected overspeed condition on any of the three speed
inputs. OSPD is green when an overspeed condition is not present or latched.
WDOG turns red when any of the following PPRA trip functions are enabled and active:

• Control Watch dog


• Speed Difference Detection
• Stale Speed Detection
• Frame Sync Monitor
WDOG turns green to indicate that the trip status of any of these features has been cleared.
SIL is green when configured for SIL 2 or SIL 3 safety functionality. When configured for SIL 3 if an internal fault is
detected, it turns red. PPRAS1A and S1B with TREAS1A and WREAS1A are required for SIL functionality.

Note The SIL and KREA LEDs are only labeled on the PPRAS1A, but are also present on the H1A version.

KREA is green when power is detected on the KREA sub-module in the I/O pack.
During normal PPRA operation, all six application LEDs display green. An additional feature, rotating LEDs, can be
configured for the PPRA. Using this feature, only one LED is turned on at a time and walked up and down the six LEDs
creating a synchronized motion. The walking is regulated by the controller IONet and synchronized across a set of three I/O
packs. This provides a quick visual indication of the system time synchronization status.

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6.1.6 Configuration
The following subsections (Parameters, Pulse Rate, Contacts, E-Stop, ETR Relays, Variables, and so forth) define the choices
within the tabs of the ToolboxST configuration.

6.1.6.1 Parameters
Parameter Description Choices
TurbineType Turbine Type and Trip Solenoid Configuration Unused, GT_1Shaft, LM_
3Shaft, MediumSteam,
SmallSteam,GT_2Shaft, Stag_
GT_1Sh,Stag_GT_2Sh, LM_
2Shaft
LMTripZEnabl On LM machine, when no PR on Z,Enable a vote for Trip Disable, Enable

SpeedDifEn Enable Trip on Speed Difference between Controller and Disable, Enable
PPRA
StaleSpdEn Enable Trip on Speed from Controller Freezing Disable, Enable

RotateLeds Rotate the Status LEDs if all status are OK Disable, Enable
LedDiags Disable, Enable

LedDiags is
Disabled by
default.
Attention

When enabled, generates a diagnostic alarm when Trip


LEDs are lit. Refer to the section, Diagnostics, PPRA Trip
Status for more information on LED operation.

SilMode Perform additional SIL diagnostic and trip checks Not_SIL, SIL_2,SIL_3

PRGrouping Whether the six speed inputs are grouped as 3 groups of ThreeGroups, TwoGroups
two (three shafts) or 2 groups of three (two shafts)

RatedRPM_TA Rated RPM, used for Trip Anticipater and for Speed Diff 0 to 20,000
Protection
AccelCalTime Select Acceleration Calculation Time (milliseconds) 10 to 100

OS_Diff Absolute Speed Difference in Percent For Trip Threshold 0 to 10

HwSpdDiff Sensitivity How quickly a trip is caused when the speed differs within Normal, High, Low
a group

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GE Internal
6.1.6.2 Pulse Rate
Parameter Description Choices
PRType Selects the type of Pulse Rate Input, (For Proper Resolution) Unused, Speed, Flow,
Speed_LM, Speed_High

PRScale Pulses per Revolution (outputs RPM) 0 to 1,000

OSHW_Setpoint Hardware Overspeed Trip Setpoint in RPM 0 to 20,000

OS_Setpoint Overspeed Trip Setpoint in RPM 0 to 20,000

OS_Tst_Delta Off Line Overspeed Test Setpoint Delta in RPM -2,000 to 2,000

Zero_Speed Zero Speed for this Shaft in RPM (1 RPM hysteresis), 0 RPM 0 to 20,000
sets PR#_Zero always false

Min_Speed Min Speed for this Shaft in RPM 0 to 20,000

Accel_Trip Enable Acceleration Trip Disable, Enable

Acc_Setpoint Acceleration Trip Setpoint in RPM / Sec 0 to 20,000

TMR_DiffLimt Diag Limit,TMR Input Vote Difference, in Eng Units 0 to 20,000

Dual_DiffLimit Diag Limit,Dual speed sensor, in Eng Units 0 to 20,000

6.1.6.3 Contacts
Parameter Description Choices

ContactInput ContactInput Used, Unused

SeqOfEvents Record Contact transitions in Sequence of Events Enable, Disable

DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable

TripMode TripMode Enable, Disable

6.1.6.4 E-Stop (Used on TREA)


Parameter Description Choices

EstopEnab Enable E-Stop Detection on TREA Enable, Disable

DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable

6.1.6.5 ETR Relays


Parameter Description Choices

RelayOutput Relay Signal Used, Unused

DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable

DiagSolEnab Enable Solenoid Voltage Diagnostic Enable, Disable

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6.1.6.6 Variables PPRA
Variable Description Direction Type
L3DIAG_PPRA_R,_S, and _T I/O Diagnostic Indication Input BOOL

LINK_OK_PPRA_R,_S, and _T I/O Link Okay Indication Input BOOL

ATTN_PPRA_R,_S, and _T I/O Attention Indication Input BOOL

PS18V_PPRA_R,_S, and _T I/O 18 V Power Supply Indication Input BOOL

PS28V_PPRA_R,_S, and _T I/O 28 V Power Supply Indication Input BOOL

IOPackTmpr_R,_S, and _T I/O Pack Temperature (deg °F) AnalogInput REAL

K1FLT K1 Shorted Contact Fault Input BOOL

K2FLT K2 Shorted Contact Fault Input BOOL

K3FLT K3 Shorted Contact Fault Input BOOL

Repeater_flt1 RS-232 Speed repeater fault for PR4_Spd Input BOOL

Repeater_flt2 RS-232 Speed repeater fault for PR5_Spd Input BOOL

Repeater_flt3 RS-232 Speed repeater fault for PR6_Spd Input BOOL

SilModErr Sil Mode Configuration modification after going On Input BOOL


Line
EstopModErr E-Stop Configuration modification after going On Line Input BOOL

TA_StptLoss L30TA Input BOOL

GT_1Shaft Config – Gas Turb,1 Shaft Enabled Input BOOL

GT_2Shaft Config – Gas Turb,2 Shaft Enabled Input BOOL

LM_2Shaft Config – LM Turb,2 Shaft Enabled Input BOOL

LM_3Shaft Config – LM Turb,3 Shaft Enabled Input BOOL

MediumSteam Config – Medium Steam Enabled Input BOOL

SmallSteam Config – Small Steam Enabled Input BOOL

Stag_GT_1Sh Config – Stag 1 Shaft, Enabled Input BOOL

Stag_GT_2Sh Config – Stag 2 Shaft, Enabled Input BOOL

L3SS_Comm Communication Status - OK = True Input BOOL

LokdRotorByp LL97LR_BYP - Locked Rotor Bypass Output BOOL

HPZeroSpdByp L97ZSC_BYP - HP Zero Speed Check Bypass Output BOOL

Speed1 Shaft Speed 1 in RPM AnalogOutput REAL

ContWdog Controller Watchdog Counter Output DINT

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GE Internal
6.1.6.7 Variables Contacts
Variable Contact Variable Description Direction Type
Contact1 Contact Input 1 Input BOOL

Contact2 Contact Input 2 Input BOOL

Contact3 Contact Input 3 Input BOOL

Contact4 Contact Input 4 Input BOOL

6.1.6.8 Variables E-Stop

Variable Description Direction Type


KESTOP1_Fdbk ESTOP1,inverse sense,True = Run Input BOOL

6.1.6.9 Variables ETR Relays

Variable Description Direction Type


K1_Fdbk L4ETR1_FB, Trip Relay 1 Feedback Input BOOL

K2_Fdbk L4ETR2_FB, Trip Relay 2 Feedback Input BOOL

K3_Fdbk L4ETR3_FB, Trip Relay 3 Feedback Input BOOL

6.1.6.10 Variables Fanned-PR


Variable Description Direction Type
Fan_Spd_Fbk Fanned Speed Signal Feedback: Fanned = Jumpers Input BOOL
Closed

6.1.6.11 Variables Pulse Rate


Variable Description Direction Type
PulseRate1 HP speed AnalogInput REAL

PulseRate2 LP speed AnalogInput REAL

PulseRate3 IP speed AnalogInput REAL

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6.1.6.12 Variables Vars-CI
Variable Description Direction Type
Cont1_TrEnab Config – Contact 1 Trip Enabled – Direct Input BOOL

Cont2_TrEnab Config – Contact 2 Trip Enabled – Direct Input BOOL

Cont3_TrEnab Config – Contact 3 Trip Enabled – Direct Input BOOL

Cont4_TrEnab Config – Contact 4 Trip Enabled – Direct Input BOOL

Inhbt1_Fdbk Trip Inhibit Signal Feedback for Contact 1 Input BOOL

Inhbt2_Fdbk Trip Inhibit Signal Feedback for Contact 2 Input BOOL

Inhbt3_Fdbk Trip Inhibit Signal Feedback for Contact 3 Input BOOL

Inhbt4_Fdbk Trip Inhibit Signal Feedback for Contact 4 Input BOOL

Trip1_EnCon Contact 1 Trip Enabled – Conditional Input BOOL

Trip2_EnCon Contact 2 Trip Enabled – Conditional Input BOOL

Trip3_EnCon Contact 3 Trip Enabled – Conditional Input BOOL

Trip4_EnCon Contact 4 Trip Enabled – Conditional Input BOOL

Trip1_Inhbt Contact 1 Trip Inhibit Output BOOL

Trip2_Inhbt Contact 2 Trip Inhibit Output BOOL

Trip3_Inhbt Contact 3 Trip Inhibit Output BOOL

Trip4_Inhbt Contact 4 Trip Inhibit Output BOOL

6.1.6.13 Variables Vars-Relay

Variable Description Direction Type


K1_FdbkNV_R, S, T Non Voted L4ETR1_FB, Trip Relay 1 Feedback Input BOOL

K2_FdbkNV_R, S, T Non Voted L4ETR2_FB, Trip Relay 2 Feedback Input BOOL

K3_FdbkNV_R, S, T Non Voted L4ETR3_FB, Trip Relay 3 Feedback Input BOOL

ETR1_Enab Config – ETR1 Relay Enabled Input BOOL

ETR2_Enab Config – ETR2 Relay Enabled Input BOOL

ETR3_Enab Config – ETR3 Relay Enabled Input BOOL

PTR1 L20PTR1 - Primary Trip Relay CMD versus Voltage - a Output BOOL
Mismatch Diagnostic Monitor

PTR2 L20PTR2 - Primary Trip Relay CMD versus Voltage - a Output BOOL
Mismatch Diagnostic Monitor

PTR3 L20PTR3 - Primary Trip Relay CMD versus Voltage - a Output BOOL
Mismatch Diagnostic Monitor

TestETR1 L97ETR1 - ETR1 test, True de-energizes relay Output BOOL

TestETR2 L97ETR2 - ETR2 test, True de-energizes relay Output BOOL

TestETR3 L97ETR3 - ETR3 test, True de-energizes relay Output BOOL

PPRA Emergency Turbine Protection GEH-6721_Vol_III_BG System Guide 213


GE Internal
6.1.6.14 Variables Vars-Speed

Variable Vars-Speed Variable Description Direction Type


Acc1_TrEnab Config – Accel 1 Trip Enabled Input BOOL

Acc2_TrEnab Config – Accel 2 Trip Enabled Input BOOL

Acc3_TrEnab Config – Accel 3 Trip Enabled Input BOOL

OS1HW_SP_Pend Hardware HP overspeed setpoint changed after power Input BOOL


up

OS2HW_SP_Pend Hardware LP overspeed setpoint changed after power Input BOOL


up

OS3HW_SP_Pend Hardware IP overspeed setpoint changed after power Input BOOL


up

OS1HW_SP_CfgErr Hardware HP Overspd Setpoint Config Mismatch Error Input BOOL

OS2HW_SP_CfgErr Hardware LP Overspd Setpoint Config Mismatch Error Input BOOL

OS3HW_SP_CfgErr Hardware IP Overspd Setpoint Config Mismatch Error Input BOOL

OS1_SP_CfgEr HP Overspd Setpoint Config Mismatch Error Input BOOL

OS2_SP_CfgEr LP Overspd Setpoint Config Mismatch Error Input BOOL

OS3_SP_CfgEr IP Overspd Setpoint Config Mismatch Error Input BOOL

PR1_Accel HP Accel in RPM/SEC AnalogInput REAL

PR2_Accel LP Accel in RPM/SEC AnalogInput REAL

PR3_Accel IP Accel in RPM/SEC AnalogInput REAL

PR1_Max HP Max Speed since last Zero Speed in RPM AnalogInput REAL

PR2_Max LP Max Speed since last Zero Speed in RPM AnalogInput REAL

PR3_Max IP Max Speed since last Zero Speed in RPM AnalogInput REAL

PR1_Spd PR1 - Speed sensor 1 (1A if three or two groups, see AnalogInput REAL
PRGrouping parameter)

PR2_Spd PR2 - Speed sensor 2 (2A if three groups, 1B if two AnalogInput REAL
groups, see PRGrouping parameter)

PR3_Spd PR3 - Speed sensor 3 (3A if three groups, 2A if two AnalogInput REAL
groups, see PRGrouping parameter)

PR4_Spd PR4 - Speed sensor 4 (1B if three groups, 1C if two AnalogInput REAL
groups, see PRGrouping parameter)

PR5_Spd PR5 - Speed sensor 5 (2B if three or two groups, see AnalogInput REAL
PRGrouping parameter)

PR6_Spd PR6 - Speed sensor 6 (3B if three groups, 2C if two AnalogInput REAL
groups, see PRGrouping parameter)

OnLineOS1Tst L97HP_TST1 - On Line HP Overspeed Test Output BOOL

OnLineOS2Tst L97LP_TST1 - On Line LP Overspeed Test Output BOOL

OnLineOS3Tst L97IP_TST1 - On Line IP Overspeed Test Output BOOL

OffLineOS1Tst L97HP_TST2 - Off Line HP Overspeed Test Output BOOL

OffLineOS2Tst L97LP_TST2 - Off Line LP Overspeed Test Output BOOL

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Variable Vars-Speed Variable Description Direction Type
OffLineOS3Tst L97IP_TST2 - Off Line IP Overspeed Test Output BOOL

PR_Max_Rst Max Speed Reset Output BOOL

OnLineOS1X L43EOST_ONL - On Line HP Overspeed Test,with auto Output BOOL


reset
OS1_Setpoint HP Overspeed Setpoint in RPM AnalogOutput REAL

OS2_Setpoint LP Overspeed Setpoint in RPM AnalogOutput REAL

OS3_Setpoint IP Overspeed Setpoint in RPM AnalogOutput REAL

OS1_TATrpSp PR1 Overspeed Trip Setpoint in RPM for Trip Anticipate AnalogOutput REAL
Fn
OSHW_Setpoint1 HP Overspeed Setpoint in RPM AnalogOutput REAL

OSHW_Setpoint2 LP Overspeed Setpoint in RPM AnalogOutput REAL

OSHW_Setpoint3 IP Overspeed Setpoint in RPM AnalogOutput REAL

6.1.6.15 Variables Vars-Trip

Variable Vars-Trip Variable Description Direction Type


ComposTrip1 Composite Trip 1 Input BOOL

WatchDog_Trip Enhanced diag - Watch Dog trip Input BOOL

StaleSpeed_Trip Enhanced diag - Stale Speed trip Input BOOL

SpeedDiff_Trip Enhanced diag - Speed Difference trip Input BOOL

FrameMon_Flt Enhanced diag - Frame Monitor Fault Input BOOL

Sil_Diag_Trip SIL Diagnostic Trip Input BOOL

PR1_Zero L14HP_ZE - HP shaft at zero speed Input BOOL

PR2_Zero L14LP_ZE - LP shaft at zero speed Input BOOL

PR3_Zero L14IP_ZE - IP shaft at zero speed Input BOOL

OS1_Trip L12HP_TP - HP overspeed trip Input BOOL

OS2_Trip L12LP_TP - LP overspeed trip Input BOOL

OS3_Trip L12IP_TP - IP overspeed trip Input BOOL

Dec1_Trip L12HP_DEC - HP de-acceleration trip Input BOOL

Can only be reset when pulses are able to be seen on


speed input or after the I/O pack is rebooted.

Dec2_Trip L12LP_DEC - LP de-acceleration trip Input BOOL

Can only be reset when pulses are able to be seen on


speed input or after the I/O pack is rebooted.

Dec3_Trip L12IP_DEC - IP de-acceleration trip Input BOOL

Can only be reset when pulses are able to be seen on


speed input or after the I/O pack is rebooted.

Acc1_Trip L12HP_ACC - HP acceleration trip Input BOOL

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Variable Vars-Trip Variable Description Direction Type
Acc2_Trip L12LP_ACC - LP acceleration trip Input BOOL

Acc3_Trip L12IP_ACC - IP acceleration trip Input BOOL

DualCfgErr Dual sensor cfg mismatch - SIL 3 will trip in 1 hour Input BOOL

OS1HW_Trip L12HP_HTP - HP Hardware detected overspeed trip Input BOOL

OS2HW_Trip L12LP_HTP - LP Hardware detected overspeed trip Input BOOL

OS3HW_Trip L12IP_HTP - IP Hardware detected overspeed trip Input BOOL

HW_Spd1_diff HW speed diff PR1 detected - SIL 3 will trip in 1 hour Input BOOL

HW_Spd2_diff HW speed diff PR2 detected - SIL 3 will trip in 1 hour Input BOOL

HW_Spd3_diff HW speed diff PR3 detected - SIL 3 will trip in 1 hour Input BOOL

L5CFG1_Trip HP Config Trip Input BOOL

L5CFG2_Trip LP Config Trip Input BOOL

L5CFG3_Trip IP Config Trip Input BOOL

L5CFG3_Trip E-STOP1 Trip Input BOOL

L5Cont1_Trip Contact 1 Trip Input BOOL

L5Cont2_Trip Contact 2 Trip Input BOOL

L5Cont3_Trip Contact 3 Trip Input BOOL

L5Cont4_Trip Contact 4 Trip Input BOOL

LPShaftLock LP Shaft Locked Input BOOL

Cross_Trip L4Z_XTRP - Control Cross Trip Output BOOL

6.1.6.16 Variables VSen


Variable Description Direction Type
VSen1 Voltage Sensor 1 Feedback Input BOOL

VSen2 Voltage Sensor 2 Feedback Input BOOL

VSen3 Voltage Sensor 3 - Power Monitor Feedback Input BOOL

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6.2 PPRA Specific Alarms
The following alarms are specific to the PPRA I/O pack.

40
Description Contact Excitation Voltage Test Failure

Possible Cause Voltage for the contact inputs on the trip board is not within published limits.

Solution Check source of contact excitation voltage applied to trip board.

50
Description Main Terminal Board Mismatch

Possible Cause

• The terminal board that was selected in the ToolboxST configuration does not match the actual board found by the PPRA.
• The WREA daughterboard has not been attached to the TREA.

Solution

• Change the ToolboxST configuration to use the correct board.


• Replace the terminal board to match the board selected in the ToolboxST configuration.
• Verify that the WREA is seated correctly on the TREA.

51
Description TREA board mismatch - remain offline

Possible Cause The TREA hardware grouping is not compatible with the Sil Capable IS200PPRAS1A I/O pack. The
PPRA will not go online in this state.

Solution

• Verify that you are using a IS220PPRAS1A module attached to a TREA SxA/WREA SxA terminal board.
• Either use a SIL capable terminal board or replace the PPRA with an IS200PPRAH1A.

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52
Description Grouped speed inputs require fanned speed input jumpers to be in place

Possible Cause The JP1 and JP2 jumpers are not set to fan the speed signals to all three packs. This is required for
grouped speed inputs.

Solution Remove the WREA daughterboard, and set the jumpers to the correct position.

53
Description WREA - Repeater status fault 1/4

Possible Cause The speed repeater output does not match the input speed signal.

• One of the speed sensors is not connected.


• The pins on the cable are shorted.
• The RS-232/RS-485 chip is not functioning.

Solution

• Verify the pins and connections on the cable.


• Verify the connection of both speed sensors.
• Replace the WREA daughterboard.

54
Description WREA - Repeater status fault 2/5

Possible Cause The speed repeater output does not match the input speed signal.

• One of the speed sensors is not connected.


• The pins on the cable are shorted.
• The RS-232/RS-485 chip is not functioning.

Solution

• Verify the pins and connections on the cable.


• Verify the connection of both speed sensors.
• Replace the WREA daughterboard.

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55
Description WREA - Repeater status fault 3/6

Possible Cause The speed repeater output does not match the input speed signal.

• One of the speed sensors is not connected.


• The pins on the cable are shorted.
• The RS-232/RS-485 chip is not functioning.

Solution

• Verify the pins and connections on the cable.


• Verify the connection of both speed sensors.
• Replace the WREA daughterboard.

56
Description Dual speed sensors mismatch: PR 1=[ ], PR 4=[ ]

Possible Cause The dual speed sensors are reporting speeds that differ by more than the configured Dual_DiffLimit
value.

Solution

• Verify that the Dual_DiffLimit value is set correctly. Note that the value is given in engineering units.
• Verify the connection and correct operation of the speed sensors.

57
Description Dual speed sensors mismatch: PR 2=[ ], PR 5=[ ]

Possible Cause The dual speed sensors are reporting speeds that differ by more than the configured Dual_DiffLimit
value.

Solution

• Verify that the Dual_DiffLimit value is set correctly. Note that the value is given in engineering units.
• Verify the connection and correct operation of the speed sensors.

58
Description Dual speed sensors mismatch: PR 3=[ ], PR 6=[ ]

Possible Cause The dual speed sensors are reporting speeds that differ by more than the configured Dual_DiffLimit
value.

Solution

• Verify that the Dual_DiffLimit value is set correctly. Note that the value is given in engineering units.
• Verify the connection and correct operation of the speed sensors.

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59
Description Internal power supply failure - P5 power for WREA

Possible Cause The PPRA internal 5 V power supply is unhealthy, causing either a faulty PPRA or TREA+WREA
terminal board.

Solution

• If all three PPRAs are reporting the problem, replace the TREA+WREA terminal board.
• If only one pack is reporting the problem, replace the PPRA.

60
Description Internal power supply failure - P15 power for WREA

Possible Cause The PPRA internal 15 V power supply is unhealthy, causing either a faulty PPRA or TREA+WREA
terminal board.

Solution

• If all three PPRAs are reporting the problem, replace the TREA+WREA terminal board.
• If only one pack is reporting the problem, replace the PPRA.

61
Description Internal power supply failure - N15 power for WREA

Possible Cause The PPRA internal -15 V power supply is unhealthy causing either a faulty PPRA or TREA+WREA
terminal board.

Solution

• If all three PPRAs are reporting the problem, replace the TREA+WREA terminal board.
• If only one pack is reporting the problem, replace the PPRA.

62-64
Description Hardware speed mismatch: PR[ ], PR[ ]

Possible Cause The FPGA detected differences between speed sensors. SIL3 systems will be tripped in one hour.

Solution

• SIL 3 systems will trip the emergency trip relays one hour after this condition has been detected.
• Check the connection and correct the operation of the speed sensors.

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65
Description Configuration changed after power up - running with old configuration

Possible Cause The following configuration parameters may not change after going online:

• EstopEnab
• SILMode
• PRType cannot go from/to Unused
• PRScale
• Contact Input TripMode/Used/Unused
• PRGrouping
• SpdDiffSensitivity

Note This restriction is in place even if SilMode is set to Not_Sil due to hardware restrictions in the PPRA.

Solution

• Check if the listed parameters have been changed inadvertently. Refer to the error log. From the ToolboxST application,
right-click IOPack and select Troubleshooting, Advanced Diagnostics, and Error Log.
• Set the parameters to their original state and download them to the PPRA if they have been changed inadvertently.
• Remove power from the I/O pack to get the hardware to accept the new values if changes are required.

66
Description PPRA is not SIL compatible - remain offline

Possible Cause One or more of the PPRA(s) are not SIL compatible. The PPRA module will not go online in this
condition.

Solution

• Verify that the BPPB or BPPC, BPRO, KREA, TREA, and WREA are all S board revision types. Replace all H board
revisions with their S board revisions.
• Change the SilMode parameter to Not_SIL.

69-71
Description Trip Relay (ETR) Driver [ ] does not match commanded state

Possible Cause The driver output of the I/O pack for Emergency Trip Relay 1 (K1), ETR2 (K2), or ETR3 (K3) does not
match the commanded state. This indicates that the I/O pack does not see the relay command going out the DC-62 connector
into the expected terminating impedance on the trip board.

Solution

• Check the I/O pack connector seating on the terminal board.


• Check the trip board cable seating (if not TREA) and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

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72-74
Description Econ Relay Driver [ ] does not match commanded state

Possible Cause The driver output of the I/O pack for Economizing Relay KE1, KE2, or KE3 does not match the
commanded state. This indicates that the I/O pack does not see the relay command going out the DC-62 connector into the
expected terminating impedance on the trip board.

Solution

• Check the I/O pack connector seating on terminal board.


• Check the trip board cable seating and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

75
Description Servo Clamp Relay Driver does not match commanded state

Possible Cause The driver output of I/O pack for K4CL does not match the commanded state. This indicates that I/O
pack does not see the relay command going out the DC-62 connector into the expected terminating impedance on the trip
board.

Solution

• Check the I/O pack connector seating on terminal board.


• Check the trip board cable seating and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

76
Description K25A Relay (synch check) Driver does not match commanded state

Possible Cause The driver output of I/O pack for K25A does not match the commanded state. This indicates that I/O
pack does not see the relay command going out the DC-62 connector into the expected terminating impedance on the trip
board.

Solution

• Check the I/O pack connector seating on terminal board.


• Check the trip board cable seating and the cable integrity.
• One at a time, replace the following: the emergency trip board cable, the trip terminal board, the terminal board hosting
the I/O pack, and the I/O pack.

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83-85
Description Trip Relay (ETR) Contact [ ] does not match commanded state

Possible Cause

• Relay feedback from Emergency Trip Relay ETR1 (K1), ETR2 (K2), or ETR3 (K3) does not match the commanded
state. This indicates that the relay feedback from the trip board does not agree with the commanded state.
• Solenoid power is not applied to the trip board.

Solution

• Check the trip board relays, as well as the cable from trip board to main terminal board (if not TREA).
• Check that solenoid power is applied to the terminal board.

86-88
Description Econ Relay Contact [ ] does not match commanded state

Possible Cause The relay feedback from Economizing Relay 1 (KE1), KE2, or KE3 does not match the commanded
state. This indicates that the relay feedback from the trip board does not agree with the commanded state.

Solution Check the trip board relays, as well as the cable from trip board to main terminal board.

89
Description Servo Clamp Relay Contact does not match commanded state

Possible Cause The relay feedback from K4CL does not match the commanded state. This indicates that the relay
feedback from the trip board does not agree with the commanded state.

Solution

• Check the I/O pack connector seating on the terminal board.


• Check the trip board cable seating and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

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90
Description K25A Relay Coil Feedback does not match commanded state

Possible Cause The relay feedback from K25A does not match the commanded state. This indicates that the relay
feedback from the trip board does not agree with the commanded state. Relay feedback is taken after hardware command
voting on the trip terminal board has occurred; therefore, a probable cause is that one I/O pack is not commanding the same
state as the other two I/O packs.

Solution

• Confirm that the TMR packs are commanding the same state for K25A.
• Check the I/O pack connector seating on the terminal board.
• Check the trip board cable seating and the cable integrity.
• One at a time, replace the following: the emergency trip board cable, the trip terminal board, the terminal board hosting
the I/O pack, and the I/O pack.

97
Description Solenoid Power Source is missing

Possible Cause Solenoid power monitoring provided by the trip board indicates the absence of power.

Solution

• Check the source of solenoid power.


• Confirm that the wiring between the trip boards is correct.

99-101
Description Solenoid Voltage [ ] does not match commanded state

Possible Cause

• The solenoid voltage associated with K1-K3 does not match the commanded state.
• K1-K3 are closed, but no voltage is detected on the solenoid.
• Solenoid voltage was removed through another means while the I/O pack expects to detect its presence.
• The ETR state associated with this PPRA is being out voted by the other two PPRAs.

Solution

• Review the system-level trip circuit wiring and confirm the voltage should be present if the I/O pack energizes the
associated trip relay.
• From the ToolboxST application, verify that the variables (typically L20PTR#) which drive the Primary Trip Relays
(PTRs) in the PTUR are correctly assigned to the PPRO or PPRA Variables tab (PTR1, PTR2, and PTR3).
• Check the pre-voted values for ComposTrip1 under the Vars-Trip tab to verify that all three PPRAs have the same status.
If the current PPRA differs from the others, check the pre-vote status of other variables under this tab to determine the
exact cause of the composite trip, and correct the condition.

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105
Description TREL/S, Solenoid Power, Bus A, Absent

Possible Cause TRES/TREL solenoid power A is absent. Solenoid power does not match the solenoid state for longer
than 40 milliseconds.

Solution

• Check power applied to the trip board.


• Check the field wiring.
• Check the solenoid.
• Replace the terminal board.

106
Description TREL/S, Solenoid Power, Bus B, Absent

Possible Cause TRES/TREL solenoid power B is absent. The solenoid power does not match the solenoid state for
longer than 40 milliseconds.

Solution

• Check power applied to the trip board.


• Check the field wiring.
• Check the solenoid.
• Replace the terminal board.

107
Description TREL/S, Solenoid Power, Bus C, Absent

Possible Cause TRES/TREL solenoid power C is absent. The solenoid power does not match The solenoid state for
longer than 40 milliseconds.

Solution

• Check power applied to the trip board.


• Check the field wiring.
• Check the solenoid.
• Replace the terminal board.

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6.2.1 108
Description Control Watchdog Protection Activated

Possible Cause An alarm indicates that the ContWdog variable has not changed for five consecutive frames. The alarm
clears if changes are seen for 60 seconds.

Solution

• Verify that the ContWdog is connected to the output of a device_hb block and that the block is located in a task which is
run at frame rate.
• Verify that the output signal from the block is changing at least once a frame.

6.2.2 109
Description Speed Difference Protection Activated

Possible Cause This alarm only occurs if the parameter SpeedDifEnable has been enabled. An alarm indicates that the
difference between the output signal Speed1 and the first I/O pack pulse rate speed is larger than the percentage OS_DIFF for
more than three consecutive frames. The percentage is based off of the parameter RatedRPM_TA. The alarm clears if the
difference is within limits for 60 seconds for more than three consecutive frames.

Solution Verify that the Speed1 signal is set up correctly in the ToolboxST and that the source of the signal reflects the
primary (PTUR/YTUR) pulse rate speed.

6.2.3 110
Description Stale Speed Protection Activated

Possible Cause The speed trip protection may be stale. This alarm can only occur if the parameter StaleSpdEn has been
enabled. An alarm indicates that the variable Speed1 has not changed for 100 consecutive frames. The alarm clears if the
speed dithers for 60 seconds.

Solution Verify that the Speed1 signal is set up correctly in the ToolboxST configuration, and that the source of the signal
reflects the primary (PTUR/YTUR) pulse rate speed.

6.2.4 111
Description Frame Sync Monitor Protection Activated

Possible Cause This alarm indicates that the communication with the controller was lost for at least five consecutive
frames after the I/O pack was online. The alarm clears if the frame synch is established for at least 60 seconds.

Solution Verify that the IONet is healthy. This indicates that the I/O pack is not synchronized with the Mark VIe
start-of-frame signal.

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112-114
Description Overspeed [ ] firmware setpoint configuration error

Possible Cause There is a firmware overspeed limit mismatch between IO signal space limit and the configuration.
The current configuration file downloaded from the ToolboxST application has a different over-speed limit than the IO signal
OS[ ]_Setpoint.

Solution Change the output signal designated in OS[ ] _Setpoint (Vars-Speed tab) to match the configuration value OS_
Setpoint (Pulse Rate tab).

115-117
Description Overspeed [ ] hardware setpoint configuration error

Possible Cause There is a hardware over-speed limit mismatch between IO signal space limit and the configuration. The
current configuration file downloaded from the ToolboxST application has a different over-speed limit than the IO signal
OSHW_Setpoint[ ].

Solution Change the output signal designated in OSHW_ Setpoint [ ] (Vars-Speed tab) to match the configuration value
in OSHW_Setpoint (Pulse Rate tab).

118-120
Description Overspeed [ ] hardware setpoint changed after power up

Possible Cause

• This alarm always occurs when Pulse Rate [ ] HWOS_Setpoint is changed and downloaded to the I/O pack after the
turbine has started.
• It can also change if PRScale is changed to a decimal value and downloaded to the I/O pack after the turbine has started.

Solution

• Confirm that the limit or scale change is correct.


• Restart the I/O pack to force the hardware overspeed to re-initialize the limit.

121
Description TREA - K1 solid state relay shorted

Possible Cause The TREA provides voltage-based detection of relays that remain in the energized position in the six
voting contacts used to provide K1. Zero voltage has been detected on one or more contacts of K1 when voltage should be
present.

Solution Replace the TREA.

122
Description TREA - K2 solid state relay shorted

Possible Cause TREA provides voltage based detection of relays that remain in the energized position in the six voting
contacts used to provide K2. Zero voltage has been deleted on one or more contacts of K2 when voltage should be present.

Solution Replace the TREA.

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123
Description LED - Turbine RUN Permissives Lost

Possible Cause The RUN LED is lit red on the I/O pack because one of the RUN permissives for the turbine has been
lost. The LedDiags parameter must be set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiag parameter.


• From the Vars-Trip tab, identify the condition that caused the trip.
• The condition leading to a trip condition must be cleared, and a master reset issued.

124
Description LED - Overspeed fault detected

Possible Cause The Overspeed LED is lit on the pack because of a detected Trip condition. The LedDiag parameter
must be set to True to get this alarm.

Solution

• Verify the configuration of the LedDiag parameter.


• The condition leading to a trip condition must be cleared, and a master reset issued.

125
Description LED - Estop detected

Possible Cause The E-Stop LED is lit on the pack because of a detected E-Stop signal. The LedDiag parameter must be
set to True to get this alarm.

Solution

• Verify the configuration of the LedDiag parameter.


• Remove the E-Stop condition and issue a master reset.

126
Description LED - SIL3 trip pending

Possible Cause The SIL trip pending LED is lit on the I/O pack because a hardware speed difference has been detected
between two redundant sensors. The emergency trip relays (ETR) will fire one hour after the condition has been detected.

Solution

• SIL 3 systems will fire the ETR one hour after this condition has been detected. After resolving the issue, cycle power to
the I/O pack to reset this alarm.
• Power down the I/O pack and determine the source of the sensor discrepancy.

127
Description WREA - K3 solid state relay shorted

Possible Cause WREA provides voltage based detection of "stuck-on" relays in the six voting contacts used to provide
K3. Zero voltage has been deleted on one or more contacts of K3 when voltage should be present.

Solution Replace the WREA.

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128
Description Tripped - Missing pulse rate signal

Note This diagnostic is generated from hardware detection that is only available on BPPC-based I/O packs. BPPB-based I/O
packs will not detect this condition the same way.

Possible Cause No speed input detected on a speed sensor due to the following reasons:

• Broken wire
• Sensor malfunction
• Signal conditioning malfunction

Solution

• Check the terminal connections for the speed sensor.


• Check the speed sensor gap.

129
Description Processor hardware error detected (Error Code:[ ])

Possible Cause Hardware error detected by the FPGA due to the following reasons:

• Error code 1: FPGA program changed during runtime, possibly one-time event
• Error code 2: clock oscillator error

Note These conditions cause a trip that can only be cleared with a power cycle.

Solution

• Restart the I/O pack.


• Download the firmware of the I/O pack.
• If the problem persists, replace the I/O pack.

130
Description Invalid configuration detected

Possible Cause The configuration is not supported due to the following reasons:

• TREA not selected


• TRES/L is selected
• QC Mode enabled
• Configured as a Large Steam turbine

Note These conditions cause a trip that can only be cleared by changing the configuration and restarting the I/O pack.

Solution Change the configuration to be valid.

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131-136
Description Speed sensor mismatch for PulseRate [ ]: PR[ ]_Spd [ ]

Possible Cause A speed sensor is reporting speeds that differ by more than the configured Dual_DiffLimit value from
the voted PulseRate value.

Solution

• Verify that the Dual_DiffLimit value is set correctly (value is given in engineering units).
• Check the connection and correct the operation of the speed sensors.

137-143
Description Hardware speed sensor mismatch PR[ ], PR[ ]

Possible Cause The FPGA detected an excessive difference between speed sensors, and the SilMode parameter is set to
SIL2 or SIL3. If SilMode is set to SIL3, then the system will trip in 1 hour.

Solution

• SIL 3 systems will trip the emergency trip relays one hour after this condition has been detected.
• Verify the connection and correct the operation of the speed sensors.
• If speed sensors appear to match but diagnostic is still active, reduce speed to less than 50% of the HW_OS_Setpoint
to reset the diagnostic and trip condition.

144
Description PRGrouping of two groups is not supported by this module

Possible Cause The configuration has PRGrouping set to TwoGroups and is trying to run on an H1A/S1A. This
configuration is not supported.

Solution Change PRGrouping to ThreeGroups or change the H1A/S1A module to an H1B/S1B module.

145
Description HwSpdDiffSensitivity setting invalid for this module

Possible Cause HwSpdDiffSensitivity is either Low or High. Only Normal is supported for H1A/S1A modules.

Solution Either change HwSpdDiffSensitivity to Normal or change the H1A/S1A module to an H1B/S1B module.

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224-239
Description Input Signal [ ] Voting Mismatch, Local=[ ], Voted=[ ]

Possible Cause A problem exists with a status input between the R, S, and T I/O packs and one of the following:

• Device
• Connections to the terminal board
• Terminal board

Solution

• Adjust the TMR threshold limit or correct the cause of the difference.
• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and the networking.
• Check the I/O pack mounting on terminal board.
• Verify the operation of the device generating the specified signal.
• Verify the terminal board wiring and connections.
• Replace the I/O pack.

1064-1255
Description Logic Signal [ ] Voting Mismatch

Possible Cause A problem exists with a status input between the R, S, and T I/O packs and one of the following:

• Device
• Connections to the terminal board
• Terminal board

Solution

• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and the networking.
• Check the I/O pack mounting on the terminal board.
• Verify the operation of the device generating the specified signal.
• Verify the terminal board wiring and connections.
• Replace the I/O pack.

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6.3 TREA and WREA Turbine Emergency Trip
6.3.1 Functional Description
The Aeroderivative Turbine Emergency Trip (TREA) terminal board combined with the WREA is used with PPRA I/O packs
as part of the Mark* VIe control system. The inputs and outputs are as follows:

• Customer input terminals provided through two 24-point pluggable barrier terminal blocks (H1A or S1A) or 48 pluggable
Euro style box-type terminal blocks (H3A or S3A).
• Six fanned passive pulse rate devices (up to three shafts with two sensors each) sensing a toothed wheel to measure the
turbine speed.
• Three 24 V dc TMR voted solid-state output contacts to trip the system:
− TREAH1A or H3A plus WREAH1A
− TREAS1A or S3A plus WREAS1A
• Four 24-125 V dc voltage detection circuits for monitoring trip string.
• Four 24 V dc WREAH1A or WREAS1A contact inputs provide additional hardware or conditional trip inputs. Wetting
power is supplied through the JH1 connector on WREA.
• One speed repeater output for each of the six speed inputs reproduces the speed pulse rate signals using an RS–232 or
RS–422 transmitter.
TREA plus WREA requires three PPRA I/O packs for correct operation.

In 240 V ac applications, do not inadvertently cross-connect the 240 V ac and the dc


voltages. The peak voltage will exceed the Transorb rating, resulting in a failure.

Most ac supplies operate with a grounded neutral, and if an inadvertent connection


between the 125 V dc and the ac voltage is created, the sum of the ac peak voltage and
the 125 V dc is applied to Transorbs connected between dc and ground. However, in
Caution 120 V ac applications, the Transorb rating can withstand the peak voltage without
causing a failure.

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TREA Aeroderivative Turbine Terminal Board

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WREA

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6.3.2 Installation
The WREA is factory installed and mounted to the TREA terminal board. Should the board have to be removed to service the
TREA fanning jumpers, perform the following procedure to replace the WREA.

➢ To install the WREA


1. Align the two connectors on the WREA with those on the TREA. When viewing the WREA the bottom of the board is
considered to be the end with the row of configuration jumpers. The connectors are keyed such that they will only mate
when aligned properly.
2. Once the two boards are aligned, seat the connection by firmly pressing on the four screw heads that surround the
connector. The WREA is considered fully mounted when it cannot be pushed any farther.

6.3.2.1 TREA/WREA Terminal Board Wiring


For H1 and S1 board variants, voltage detection, trip contact inputs, and relay outputs are wired to the I/O terminal blocks
TB1. Passive pulse rate pick-ups are wired to TB2. Each block is held down with two screws and has 24 terminals accepting
up to #12 AWG wires. A shield termination strip attached to chassis ground is located immediately to the left of each terminal
block.
For H3 and S3 board variants, voltage detection, trip contact inputs, and relay outputs are wired to the I/O box terminals at the
top of the board. Passive pulse rate pick-ups are wired to the lower terminals. All terminals plug into a header on the TREA
board and accept up to a single #12 AWG wire.

When used with WREA, the TREA must be configured for fanning of the X section
pulse rate pickups to the Y and Z PPRAs. This is done by placing the jumpers on the
P1 and P2 pin pairs.
Caution

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In the following table, the speed inputs called PR1_Y through PR3_Z are grayed out. While the signal paths are present as
documented for use with PPRO I/O packs they are not used and should not be connected when PPRA I/O packs are used.

TREA/WREA Terminal Board Wiring

Pin Signal Name Pin Signal Name


1 K1_PDC 2 K1_NDC

3 K2_PDC 4 K2_NDC

5 SOL1_A 6 SOL1_B

7 SOL2_A 8 SOL2_B

9 PWR_A 10 PWR_B

11 TRP_A 12 TRP_B

13 K3_PDC 14 K3_NDC

15 PWET 16 TRP1L
17 PWET 18 TRP2L
19 PCOM 20 PCOM
21 PWET 22 TRP3L
23 PWET 24 TRP4L
25 PR4H 26 PR4L
27 PR5H 28 PR5L
29 PR6H 30 PR6L
31 PR1H_Z 32 PR1L_Z

33 PR2H_Z 34 PR2L_Z

35 PR3H_Z 36 PR3L_Z

37 PR1H_Y 38 PR1L_Y

39 PR2H_Y 40 PR2L_Y

41 PR3H_Y 42 PR3L_Y

43 PR1H_X 44 PR1L_X

45 PR2H_X 46 PR2L_X

47 PR3H_X 48 PR3L_X

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6.3.2.2 Contact Outputs

The contact outputs are polarity sensitive. Wire the circuit carefully to avoid
damaging the relays. There is no contact or solenoid suppression, user must add
external solenoid suppression to avoid damaging the relays and their contacts.
Caution
A voltage detection circuit is included on TREA and WREA that is able to detect a shorted relay when voltage is present
across the open contact set.

Connection to TREA Contact Output

6.3.2.3 Trip Input


• The Trip input is configurable in PPRA to either be required or bypass the signal. When enabled the Trip input works
through a hardware path on PPRA and does not act through PPRA firmware. When enabled the Trip input must be
powered for the trip relays to close.
• The Trip input must be connected to a CLEAN dc source battery or filtered (< 5% ripple) rectified ac.
• There must be a minimum of 18 V dc at the Trip inputs for proper operation. The current required was kept low to
minimize drop on long cable runs.
• As the Trip input is very fast < 5 ms and the output relay contacts are also fast (< 1 ms), best wiring practices should be
utilized to avoid misoperation. Use twisted-pair cable when possible and avoid running with ac wiring.

6.3.2.4 Contact Inputs


• Wetting power is supplied through the JH1 connector on WREA with the following pin connections: Pin 1 is positive
wetting voltage, Pin 2 is ground, and Pin 3 is negative or return wetting voltage.
• Each contact input has two associated screw terminals on TREA. Odd numbered terminals identified as PWET are
directly connected to the JH1 pin 1 input power. Even numbered terminals identified as TRP1L through TRP4L lead to
individual voltage detectors that share a return path to JH1 Pin 3. Because all PWET terminals are connected together it
is permissible to use a single wire from PWET to a set of remote contacts and then use individual return wires to the
TRP_L inputs.

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6.3.2.5 Speed Repeater Outputs
Each speed repeater output may be configured to provide either RS–232 or RS–485 signal levels. RS–232 provides a bipolar
signal that crosses through zero as is required by many speed inputs. It is recommended that RS–232 repeater outputs be
limited in wiring length to 10 meters and go to equipment that is grounded at the same potential as TREA / WREA. RS–485
provides a balanced differential signal that is more suitable for long distance transmissions. It is recommended that RS–485
repeater outputs be limited in wiring length to 500 meters. Wire type and termination should comply with published RS–485
standards.
The repeater outputs are grouped together on the J3 connector located on WREA. The outputs are arranged to provide a signal
ground and chassis ground pin pair between each active signal pair. This makes it possible to ground the individual shields of
twisted shielded pair cable and reduces any chance of signal cross talk. The diagram indicates the J3 pin assignments when
looking into the connector.

13 NO CONNECT
25
12 CHASSIS Shield
Yellow SPD6_N 24
11 SPD6 _P Black
23
10 CHASSIS Shield
Brown SPD5_N 22
9 SPD5 _P Black
21
8 CHASSIS Shield
Blue SPD4_N 20
7 SPD4_P Black
19
6 CHASSIS Shield
Green SPD3_N 18
5 SPD3_P Black
17
4 CHASSIS Shield
White SPD2_N 16
3 SPD2_P Black
15
2 CHASSIS Shield
RED SPD1_N 14
1 SPD1_P Black

WREA-J3 Connector

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Speed repeater outputs from the WREA-J3 connector are wired to a transition module ALH#5747.2 through a special 25 pin
cable, 259B2434AEPxx, where xx is the cable length in feet. It transmits the six sets of speed signals through six sets of
individually shielded, twisted pair wires. The six sets of signals connect pin to pin as displayed in the WREA-J3 connector
pin assignment drawing.
The shields from each wire pair also connect the chassis connections pin to pin, from the WREA-J3 Sub-D connector to the
transition module connector. Signal and chassis connection point numbers carry through from the transition module Sub-D
connector to the corresponding points on the box type terminal board. The cable also has an overall shield terminated on the
Sub-D connector shells at each end the cable. That shield ties to the chassis ground on the WREA board.
The shield wires at the final connection point for the cables should be left un-terminated and properly protected/sheathed to
prevent shorting.

6.3.3 Operation
The TREA board is designed to use three PPRA I/O packs mounted directly on it. The TREA / WREA / PPRA assembly then
forms a self-contained emergency trip function. TREAH1A, S1A, H3A, and S3A plus WREA will only function correctly
with three PPRA I/O packs. Single and dual pack operation is not possible. The Trip Anticipate test function does not toggle
the ETR relays on the TREA.

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6.3.3.1 Speed Inputs
Speed inputs are associated with specific shafts. The PRGrouping parameter allows the user to select between two speed
inputs in three groups (three shafts) or three speed inputs in two groups (two shafts). For three groups, the PR1_X and PR4
speed inputs must be wired to the two speed sensors on the first shaft. The PR2_X and PR5 speed inputs must be wired to the
two speed sensors on the second shaft, if present. The PR3_X and PR6 speed inputs must be wired to the two speed sensors
on the third shaft, if present. If two groups are selected for PRGrouping, PR1_X, PR2_X, and PR4 must be wired to the three
speed sensors on the first shaft and PR3_X, PR5, and PR6 must be wired to the three speed sensors on the second shaft.
PulseRate3 must remain unused.
JP1 and JP2 must be placed on the TREA to take the first three speed inputs (those for the X pack) and fan them to the Y and
Z packs. When JP1 and JP2 are in place, the terminal board points for Y and Z speed inputs become no-connects and should
not be used. As a check, a jumper position feedback signal is provided by TREA. If the jumpers are not in place, a PPRA
alarm will be generated.

6.3.3.2 Trip Input


The TREA includes a Trip input function. This consists of an optically isolated input circuit designed for a dc input in the
range of 24 V to 125 V nominal. When energized, the circuit enables coil drive power in the X, Y, and Z relay circuits through
independent hardware paths.

The response time of this circuit of less than five ms plus the response time of the trip relays of less than one ms yields very
fast response. Trip input status is monitored by PPRA firmware, but the action to remove trip relay coil power is a hardware
path in PPRA. It is possible to configure PPRA to turn off the Trip input function.

6.3.3.3 Direct/Conditional Discrete Input Trip


TREA / WREA provides four discrete group isolated contact input trip signals to the PPRA I/O packs. The transition
threshold of the contacts tracks 50% of the applied wetting voltage. Approximately 1% voltage hysteresis is applied to
transitions. A filter with nominal 4 ms delay, max 5 ms is present. PPRA monitors wetting voltage on JH1 and generates an
alarm at voltages below approximately 40% of nominal voltage.

6.3.3.4 Voltage Monitors


The trip relays on TREA may be freely located anywhere in a trip string. Because the trip string circuit is not fixed, there are
three general-purpose isolated voltage sensor inputs on TREA. These can be used to monitor any points in the trip system and
drive the voltage status into the system controller where action can be taken. Typical use of these inputs may be to sense the
power supply voltage for the two trip strings (PWR) and to sense the solenoid voltage of the device being driven by the relays
(SOL1, SOL2). This set of applications is used in the wording of the board symbol, but the sensors may be freely applied to
best serve the application.

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6.3.3.5 Speed Repeaters
There are six speed repeater circuits on WREA. Each repeater is associated with a specific speed input signal and may be
configured for RS–232 or RS–485 signal levels on the output. The speed repeater is driven by an internal signal after speed
input pulse detection has taken place. While the speed sensor input signal may span a wide range of amplitude as speed is
changed the repeater output maintains constant output amplitude through all pulse rates.
The speed repeaters do add some latency to the speed signal. In addition to copper transmission latencies, the repeater
circuitry will add between 1.5 and 2.0 usecs of edge to edge latency. The variation is due to pulse rate input channel (pulse
rate 1-3 vs. 4-6) and repeater configuration (RS–232 vs RS–485).

6.3.3.6 Trip Relays


The trip relays are made using sets of six individual form A devices arranged in a voting pattern. Any two controllers that
vote to close will establish a conduction path through the set. Because detection of a shorted relay is important to preserve
tripping reliability, there is a sensing circuit applied to each of the sets of relays.
When the relays are commanded to open, and voltage is present across the relays, the circuit will detect if one or more relays
are shorted. This signal goes to the PPRA I/O pack to create an alarm. The TREA sensing circuit uses the relay commands
from all three packs to avoid a false indication in the event that one PPRA I/O pack votes to close the relay while the other
two PPRA I/O packs vote to open. The voting arrangement is displayed in the following TREA diagram.

Contacts are polarity-sensitive. External voltage suppression must be used.

Caution

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TREA and WREA Trip Boards

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6.3.4 Specifications
Item TREA Specification
Number of inputs 6 passive (magnetic) speed pickups
3 voltage detection circuits
1 E-STOP/TRP input
4 contact inputs

Number of outputs 3 trip contacts


6 speed repeater drivers

Contact ratings NEMA class F.

IS200TREAH1A, H3A, SIA, S3A Voltage: 28 V dc max

plus WREAH1A, SIA Max. Current 10 A dc at 40ºC (104 ºF) maximum (Trip Relays 1 and 2)
de-rate current linearly to 7 A dc at 65ºC (149 ºF) maximum.
Max. Current 5 A dc at 40ºC (104 ºF) maximum (Trip Relay 3)
No de-rating necessary at 65°C (149 ºF) as traces are limiting factor.

Voltage detection inputs Min/max input voltage rating: 16/140 V dc max pk


Current Loading (Max leakage): 3 mA
Detection delay (max): 60 ms
Voltage isolation: Optically isolated: 2500 V rms isolation, for one min.
Surge/Spike rating: 1000 V pk for 8.3 ms

ESTOP/TRP detection Input Voltage: 24-125 V dc ±10% (18/140 V pk Min/Max)


Loading (max): 12 mA (5 typical)
Delay (max): 5 ms (<1 typical)

Contact input voltage WREAH1A, S1A – nominal 24 V dc input

Contact input threshold Tracks 50% of wetting voltage applied to JH1 connector. Hysteresis of 1% applied
to transitions. Filter delay of 4 ms nominal, 5 ms maximum.

MPU pulse rate range 2 Hz to 20 kHz

MPU pulse rate accuracy 0.05% of reading

Speed input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 28 mV p-p
Speed input sensitivity is such that turning 20 kHz requires 300 mV p-p
gear speed may be observed on a typical
turbine application.

Size 33.0 cm high x 17.8 cm, wide (13 in x 7 in)

Technology Surface mount

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6.3.5 Diagnostics
Diagnostic tests are made on the terminal board:

• Feedback from the shorted contact detector is checked, if a shorted relay is detected an alarm will be created.
• Feedback from speed pickup fanning jumpers is checked; if there is a mismatch between intention and actual position, an
alarm is created.
• Each speed repeater output has a receiver circuit that monitors the output. If the output signal does not closely match the
required speed signal an alarm is generated. This diagnostic protects against shorted repeater outputs or repeater output
drive failure.
• If any one of the above signals goes unhealthy, a composite diagnostic alarm xxDIAG_PPRA occurs. The diagnostic
signals can be individually latched and then reset with the RESET_DIA signal if they go healthy.
• Terminal board connectors have their own ID device that is interrogated by the I/O pack. The ID device is a read-only
chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read
by PPRA and a mismatch is encountered, a hardware incompatibility fault is created.
• Wetting power presence.

6.3.6 Configuration
TREA jumpers P1 and P2 select the fanning of the X channel speed inputs to the Y and Z PPRA I/O packs. PPRA operation
with TREA and WREA requires that these jumpers be in place.
WREA jumpers JP1 through JP12 are used to configure output behavior of the six speed repeater output circuits. The jumpers
are located at the bottom of WREA in the same order as displayed in the following diagram.

Jumpers JP1 through JP6 are used to select between RS–232 signal level (default) and RS–485 signal level on the repeater
output. JP1 through JP6 configure the repeater outputs for PR1 through PR6.
Jumpers JP7 through JP12 default to the PR1 through PR6 positions and should remain in these positions when used with
PPRA.

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7 PPRO, YPRO Backup Turbine
Protection
7.1 Mark VIe PPRO Backup Turbine Protection I/O Pack
The Backup Turbine Protection (PPRO) I/O pack and associated terminal boards provide
an independent backup overspeed protection system with a backup check for generator
synchronization to a utility bus. They also provide an independent watchdog function for
the primary control. A typical protection system consists of three triple modular
redundant (TMR) PPRO I/O packs mounted to a separate simplex protection (SPRO)
terminal board or three PPROs mounted on a TMR TPROH#C terminal board. A cable,
with DC-37 pin connectors on each end, connects each SPRO or TPROH#C to the
designated emergency trip board:

• TREG: Gas Turbine Emergency Trip Terminal Board


• TREL: Large Steam Turbine Emergency Trip Terminal Board
• TRES: Small/Medium Steam Turbine Emergency Trip Terminal Board
An alternate arrangement puts three PPRO I/O packs directly on TREA for a single-board
TMR protection system. The PPRO has an Ethernet connection for IONet
communications with the control modules.

The Mark* VIe control is designed with a primary and backup trip system that interacts at
the trip terminal board level. Primary protection is provided with the Turbine Primary I/O
pack (PTUR) operating a primary trip board (TRPG, TRPL, TRPS, TRPA). Backup
protection is provided with the PPRO I/O pack operating a backup trip board (TREG,
TREL, TRES, TREA).

The PPRO accepts three speed signals for overspeed protection functions, including basic
overspeed, acceleration, deceleration, and a hardware implemented overspeed. The I/O
pack monitors the operation of the primary control and can monitor the primary speed as
a sign of normal operation. The PPRO monitors the status and operation of the selected
trip board through a comprehensive set of feedback signals. If a problem is detected, the
PPRO activates the backup trip relays on the trip board and activates a trip on the primary
control. The I/O pack is fully independent of and unaffected by the primary control
operation.

A maximum of three trip solenoids can be connected between the primary and emergency
trip terminal boards. Connecting a solenoid between the boards isolates the power on both
sides of the solenoid as well as visibility of solenoid voltage as a system feedback. The
primary/emergency trip boards TRPG/TREG, TRPL/TREL, and TRPS/TRES are
designed to operate as a pair and use cabling between the boards for system connections.
The TRPA and TREA are designed with no pairing required and can be used
independently of each other. When TRPA and TREA are paired, they function the same
as other board pairs.

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7.1.1 Compatibility
The PPRO I/O pack includes one of the following compatible BPPx processor boards:

• The PPROH1A contains a BPPB processor board.


• The PPROS1B contains a functionally compatible BPPC processor board that is supported in the ControlST* software
suite V04.07 and later.
The PPROS1B is an IEC 61508 certified version for use in IEC 61511 certified safety loops. The safety-certified I/O pack,
trip board, and terminal board combinations are as follows:

• PPROS1B, TPROS#C, TREGS1B, 125 V dc


• PPROS1B, TPROS#C, TREGS2B, 24 V dc
• PPROS1B, TPROS#C, TREGS3B, 125 V dc, TMR, special 28 V power JX1
• PPROS1B, TPROS#C, TREGS4B, 125 V dc , TMR, special 28 V Power JY1
• PPROS1B, TPROS#C, TREGS4B, 125 V dc , TMR, special 28 V Power JZ1

Note Refer to the Mark VIe Control PPROS1B and PPRAS1x Functional Safety Instruction Guide (GEI-100709).

The PPRO I/O pack mounts directly to the SPRO, TPROS#C, TPROH#C, or TREA. When mounted on the SPRO or TPRO,
it is cable-compatible to the TREG, TREL, or TRES trip board.

Trip Board Compatibility


Board1 TMR Simplex Output Output E-Stop Input Input Economy
Contacts, Contacts, Contacts, Contacts, Resistor
125 V dc 24 V dc 125 V dc 24 V dc
TREG_1B Yes No Yes Yes Yes Yes No Yes
TREG_2B Yes No Yes Yes Yes No Yes Yes
TREG_3B2 Yes No Yes Yes Yes Yes No Yes
TREG_4B2 Yes No Yes Yes Yes Yes No Yes
TREG_5B2 Yes No Yes Yes Yes Yes No Yes
TRELH1A Yes No Yes Yes No Yes No No
TRELH2A Yes No Yes Yes No No Yes No
TRESH1A Yes Yes Yes Yes No Yes No No
TRESH2A Yes Yes Yes Yes No No Yes No
TREAH1A Yes No No Yes Yes No No No
TREAH2A Yes No Yes No Yes No No No
TREAH3A3 Yes No No Yes Yes No No No
TREAH4A3 Yes No Yes No Yes No No No
TREAS1A3 Yes No Yes No Yes No No No
TREAS2A 3 Yes No Yes No Yes No No No
TREAS3A3 Yes No Yes No Yes No No No
TREAS4A3 Yes No Yes No Yes No No No
1 Underscore ( _ ) indicates the TREG board version may be H or S.

2 The TREG_3A, 4A, and 5A versions are the same as the 1A except that power is provided by JX1, JY1, or JZ1.

3 TREA_#A and _#A are the same as _1A and _2A only Euro versions.

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7.1.1.1 Simplex Main Control
Simplex backup protection is supported by the Mark VIe control trip board TRES. One PPRO network port resides on the
controller IONet.
TMR backup protection is supported by all Mark VIe control backup trip boards, TREG, TREL, TREA, and TRES. In this
configuration, each I/O pack is connected to a separate (R,S,T) controller network.

7.1.1.2 Dual Main Control


Simplex backup protection is supported by the Mark VIe control trip board TRES. When used in this configuration, the first
network connection is to the R controller. The second network connection is to the S controller. The PPRO is then responsible
for monitoring the operation of both controllers. The PPRO supports two options: the pack trips if either controller
malfunctions or if both controllers malfunction.
TMR backup protection is supported by all Mark VIe control backup trip boards, TREG, TREL, TREA, and TRES. This
configuration uses the dual controller TMR output standard network connection. The first PPRO has one network port
connected to the R controller network. The second I/O pack has one network port connected to the S controller network. The
third pack has one network port connected to the R controller network and one network port connected to the S controller
network. The third PPRO monitors the operation of both controllers. The I/O pack activates a trips if either controller
malfunctions or both controllers malfunction.

7.1.1.3 Triple Main Control


TMR backup protection is supported when operating with a TMR main control (two out of three running). All Mark VIe
control backup trip boards (TREG, TREL, TREA, and TRES) support this configuration. The normal network configuration
connects the first PPRO I/O pack to the R network, the second PPRO to the S network, and the third PPRO to the T network.
PPRO TMR applications do not support dual network connections for all three PPROs. In a redundant system there is no
additional system reliability gained by adding network connections to the first two PPROs with dual controllers or any of the
three PPROs with TMR controllers. The additional connections simply reduce mean time between failures (MTBF) without
increasing mean time between forced outages (MTBFO).

Note Simplex backup protection is not supported. One PPRO cannot monitor the health of all three main controls and trip on
loss of a single main control. Therefore, one of the fundamental protection features cannot be met with a single I/O pack.

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7.1.2 Installation
The PPRO I/O pack mounts directly to the SPRO, TPROS#C, TPROH#C, or TREA. When mounted on the SPRO or
TPROH#C, cables with DC-37 pin connectors on both ends are required between the SPRO or TPROH#C and the selected
trip terminal board.

➢ To install the PPRO I/O pack


1. Securely mount the SPRO, TPROH#C, or TREA terminal board. Mount the selected trip terminal board if SPRO or
TPRO is used.
2. Connect the cable with DC-37 pin connectors on each end between the SPRO or TPRO and the selected trip terminal
board (if TREA is not used).
3. Directly plug one PPRO into each SPRO, or three PPROs into the TREA or TPRO.
4. Slide the threaded posts on PPRO, located on each side of the Ethernet ports, into the slots on the terminal board
mounting bracket. Adjust the bracket location so the DC-62 pin connector on PPRO and the terminal board fit together
securely. Tighten the mounting bracket. The adjustment should only be required once in the service life of the product.
Securely tighten the nuts on the threaded posts locking PPRO in place.
5. Plug in one or two Ethernet cables depending on the system configuration. The PPRO module is not sensitive to Ethernet
connections and selects the proper operation over either port.
6. Apply power to the module by plugging in the power connector on the side of the module. The I/O module has inherent
soft-start capability that controls current levels upon application.
7. Use the ToolboxST* application to configure the module as necessary. For more information, refer to GEH-6700,
ToolboxST User Guide for Mark VIe Control.

7.1.3 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• Auto-reconfiguration
• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Module Alarms

7.1.3.1 Overspeed Protection


Turbine overspeed protection is available in three levels; control, primary, and emergency. Control protection comes through
closed loop speed control using the fuel/steam valves. Primary overspeed protection is provided by the controller. The TTUR
terminal board and PTUR I/O pack bring in a shaft speed signal to each controller where the median signal is selected. If the
controller determines a trip condition, it sends the trip signal to the TRPG terminal board through the PTUR I/O board. The
three PTUR outputs are 2/3 voted in three relay voting circuits (one for each trip solenoid) and power is removed from the
solenoids. The following figure displays the primary and emergency levels of protection.

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Primary and Emergency Overspeed Protection

Emergency overspeed protection is provided by the independent triple redundant PPRO protection system displayed in the
preceding figure. This uses three shaft speed signals from magnetic pickups (MPU), one for each protection module. These
are brought into SPRO, a terminal board dedicated to the protection system.
Each PPRO independently determines when to trip, and the signals are passed to the TREG terminal board. TREG operates in
a similar way to TRPG, voting the three trip signals in relay circuits and removing power from the trip solenoids. This system
contains no software voting, making the three PPRO modules completely independent. The only link between PPRO and the
other parts of the control system is the IONet cable, which transmits status information.
Additional protection for simplex systems is provided by the protection module through the Servo Terminal Board, TSVC.
Plug J1 on TREG is wired to plug JD1 on TSVC, and if this is energized, relay K1 disconnects the servo output current and
applies a bias to force the control valve closed.

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7.1.3.2 Application-specific Hardware
The I/O pack has an internal, application-specific circuit board (BPRO) that contains the hardware needed for the turbine
backup trip function. The application board connects between the processor and either the SPRO, TPRO, or TREA terminal
board. The application board has provisions for additional hardware expansion options that can be added through a dedicated
header.

3 Pulse Rate ID Chip


Input
Conditioning
To I / O Pack

2 PT Input
12 Digital Signal Processor
Inputs, E-Stop
7 Isolated
Contact Inputs
8 Relay
DC - 6 2

Command
Outputs Processor

Pass Through to Local Power


Option Supplies
Option Header

BPRO Application Board

7.1.3.3 Protective Functions


The I/O pack performs the following protective functions in a mix of hardware, programmable logic, and firmware. In the
following diagram, standard symbols for time delay contacts have been used:

In the following diagrams, a standard has been used to indicate signal origin and flow.

• Signal names that end with (SS) are created within the I/O pack and the data flow is out to the controller through signal
space.
• Signal names that end with SS are created in the controller and the data flow is into the I/O pack through signal space.
• Signal names that end with (IO) are created within the I/O pack and the data flow is out to the hardware.
• Signal names that end with IO indicate the signal is a hardware input into the I/O pack.
• Signal names that end with anything containing CFG are part of the I/O pack configuration. In this case an attempt has
been made to indicate what area of the I/O pack configuration contains the variable.
• When J3 is referenced in a CFG, it refers to the connection point for the turbine backup trip relay board, and the
corresponding configuration values.
• The combination IO (SS) indicates a signal that comes from the hardware inputs to the I/O pack, and is then sent out to
the controller as part of signal space.
If there is no special ending on a signal name, then the signal is used internal to the I/O pack and is not part of the hardware or
signal-space data movement. This signal is not available or visible to applications, but it is needed to adequately describe the
I/O pack’s operation.

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7.1.3.4 Direct/Conditional Discrete Input Trip
The I/O pack supports the seven isolated discrete contact input trip signals provided on the backup turbine trip board. In the
following figure, the direct / conditional determination is implemented in firmware while Contact#, and L5Cont#_Trip are in
hardware logic. When configured for direct trip, the firmware is not in the trip path. When configured for conditional trip, the
firmware determines the communication health (displayed as network_keepalive) and populates the programmable logic with
the conditional signal from signal space. If the controller communication is lost, the default will permit any conditional trip.

Note The contact inputs include an 8 ms contact de-bounce filter to protect against false trips.

A
network _keepalive
A>=B
B L3SS_Comm, (SS)
3

Trip#_Inhbt , SS L3SS_Comm, (SS) Inhbt#_Fdbk , (SS)


A
Trip_Mode , CFG (J3, Contact #)
A=B
B Cont#_TrEnab , (SS)
Direct, CNST
A
A=B
B
Conditional , CNST Trip#_EnCon, (SS)

Contact #, (IO) Cont#_TrEnab L5Cont#_Trip, (SS)


Includes 8 mSec
CONTACT#
digital filter on close ,
no delay on open TRIP
Trip#_EnCon Inhbt#_Fdbk , SS

L5Cont#_Trip , (SS) L86MR, SS

Note: The contact circuit in this diagram is duplicated 7 times. To obtain the correct signal name,
replace the symbol # with the numbers 1-7. Signal names without # appear only once for all 7
circuits (L3SS_COMM, L86MR).

Contact Input Trips

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The resulting contact trip signals are combined into a single contact trip summary, L5Cont_Trip.

Contact Input Trip Signal Concentration

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7.1.3.5 Firmware Overspeed Trip
Firmware overspeed protection is performed on the three values that come out of the high speed select. Although the
established standard for naming these three inputs is HP, IP, and LP, the three inputs are free to be applied as needed in a
system design.

Note The following pulse rate variables are displayed using a # symbol. Replace the # with 1 for HP, 2 for LP, or 3 for IP.

Firmware Overspeed

Firmware Overspeed Trip functions include:

• Fault on overspeed threshold match failure between config and signal space values when speed is zero
• Pick the lower threshold from config or signal space
• Provide a mechanism to zero the threshold for online overspeed test
• Provide a mechanism to modify the threshold for offline overspeed test, bounded to limit increases to the threshold to
104%
• Provide a mechanism to modify the threshold based upon current computed acceleration (Rate-based Overspeed feature).
Refer to the section Rate-Based Overspeed Trip (RBOS).

Note Use a negative OS_Tst_Delta value to reduce the threshold during testing.

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• Compare the threshold to the calculated speed and latch overspeed
• Active firmware overspeed setpoint (OS_Setpoint_PR#) is available as an input signal

Rate-based Overspeed Trip (RBOS)

Note Rate-based Overspeed is only supported on PPROS1B. RBOS cannot be enabled if a PPROH1A I/O pack is
configured.

The Rate-based Overspeed (RBOS) function is an optional feature that is implemented for each shaft independently. It enables
the PPRO to modify the firmware overspeed threshold trip setpoint in real-time based upon the current acceleration of the
shaft. The purpose of the RBOS feature is to specify an overspeed setpoint profile that lowers the firmware overspeed setpoint
dynamically as the shaft acceleration increases. The user has the ability to enable or disable the RBOS feature on a per-shaft
basis, and can specify the response curve per shaft. There is also a Test mode that allows the user to insert a test acceleration
input to the function.
The core of the RBOS feature is a user-specified overspeed setpoint profile composed of five acceleration and overspeed
setpoint breakpoints. These breakpoints define a response curve, with the X-axis as acceleration in RPM/s, and the Y-axis as
Overspeed setpoint in RPM. The RBOS feature interpolates between these breakpoints to provide an RBOS-driven overspeed
setpoint given an input acceleration. The following diagram illustrates this overspeed setpoint profile.

RBOS Overspeed Setpoint Profile

As shown in the Firmware Overspeed diagram, some simple logic chooses which acceleration to use in the RBOS feature. If
the RBOS#_TestEnable is True, then the RBOS#_Accel_Test is used as Accel input for RBOS, unless the actual acceleration
(PR#_Accel) is greater.
The chosen acceleration is fed into the overspeed setpoint profile and a calculated RBOS#_Setpoint is provided. If the
acceleration is less than RBOS#_AccelSetpt1 or greater than RBOS#_AccelSetpt5, the RBOS#_Setpoint is clamped to be
equal to RBOS#_OSSetpt1 or RBOS#_OSSetpt5 respectively. Thus, the overspeed setpoint profile does not extrapolate past
the setpoint range, but instead clamps the output.
Once the RBOS overspeed setpoint profile has calculated a RBOS#_Setpoint, the result is minimum-selected against the
firmware overspeed output from the rest of the firmware overspeed logic if the RBOS feature is enabled (RBOS#_Enab). This
final selected overspeed setpoint (OS_Setpoint_PR#) is compared against the PulseRate# shaft speed to drive an overspeed
trip. It is also available to the user in signal space as OS#_Setpoint_Fbk.

Note Refer to the section Parameters for details on configuration parameters for the RBOS feature, and the section
Variables Vars-Speed for details on RBOS I/O signals.

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7.1.3.6 Hardware Overspeed Trip
The following pulse rate variables are displayed using a # symbol. Replace the # with 1 for HP, 2 for LP, or 3 for IP. OSHW_
Setpoint only goes into the hardware at I/O pack startup.

OSHW_ Setpoint #, SS
A
Generate an alarm if the hardware is
|A- B| A different than the firmware trip
OSHW _ Setpoint ,CFG OS # HW_ SP_ CfgEr ( SS)
B A> B
(PulseRate #)
1RPM
B
OS_ Setpoint Generate an alarm if the hardware
A setpoint changes after power - on
HW Value
OS # HW_ SP_ Pend ( SS)
| A- B|

PulseRate #,
A
HWIO
A> =B

B OS # HW

Hardware
Overspeed
OS# HW OS # HW _Trip Trip
( SS )

OS # HW _Trip, ( SS) L 86MRX

Speed#Updating
Hardware Overspeed Trip, HP Shaft

Note Refer to the section Shaft Speed Accel, Decel, and Zero for the definition of Speed#Updating.

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Hardware Overspeed Trip functions include:

• Load the independent hardware overspeed set point only when the I/O pack restarts or is power cycled
• Generate an alarm when the hardware configuration set point is >1 Hz different from the value passed through signal
space from the application configuration

Note Hardware overspeed detection involves two rotations of the shaft to determine an overspeed condition.

• Generate an alarm and signal space Boolean when the set point in configuration fails to match the value stored in the
hardware

• Implement speed calculation and the trip logic entirely inside programmable logic
• Overspeed trip response typically less than 60 ms at normal operating speeds

Note There is no separate enable or disable signal for this overspeed protection. The disable signal is created by setting a
high overspeed point value. The calculated speed will never reach the value needed to trigger OS1HW.

The actual hardware implementation depends on two configuration items:

• OSHW_Setpoint specifies the overspeed trip level in RPM.


• PRScale determines the number of speed sensor pulses per revolution used to convert pulse rate into RPM for both
hardware and firmware overspeed value.
The hardware implementation requires two adjacent revolutions exceeding the OSHW_Setpoint to trip the system. When a
trip is present, the setting of OSHW_Setpoint is reduced by a small amount in the hardware to provide a clean trip signal. Due
to this reduction, speed must be reduced well below the overspeed threshold before a reset may take place. Because there are
set limits to the time integration used in the hardware detector, the minimum RPM setting for the OSHW_Setpoint is
approximately four RPM.

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7.1.3.7 LP Shaft Locked Detection
This is another protection function that is in addition to the overspeed protection. LP Shaft Locked Detection generates a
signal if the first pulse rate signal is above minimum speed, and the second pulse rate signal is still at zero.

PR1_MIN PR2_Zero, (SS)

LockRotorByp, SS LPShaftLock, (SS)

LPShaftLock, (SS) L86MR, SS

LP Shaft Locked Detection

7.1.3.8 E-Stop
The I/O pack monitors the E-Stop trip signal that is present on the TREG or TREA terminal boards and uses it to cross trip
the main control in the event E-Stop is invoked. It is also used within the pack logic as part of the trip relay output command.
The relays are not required to close if the E-Stop signal is present. The main control counterpart is also present. If the main
control votes to trip, it can also cross-trip the corresponding I/O pack.

J3= TREA TRIPENAB, CFG

Hw Estop1 , IO KESTOP1_ Fdbk , ( SS)

J3= TREG
KESTOP1_ Fdbk , ( SS) L5 ESTOP1 , (SS)

ESTOP1
TRIP

L5 ESTOP1 , (SS) L86MR , SS


Contact Input E-Stop

Note There are several inversions in the hardware signal path, but the end result is that KESTOP#_Fdbk is only a 1 when
E-Stop is energized. Therefore, 1 = OK. The TREL and TRES terminal boards do not have E-Stop capability because it is on
the primary trip boards TRPL and TRPS.

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7.1.3.9 Speed Difference Detection
There should never be a reason why the speed calculated by the I/O pack is significantly different from the speed calculated
by the main control. Speed difference detection looks at the difference in magnitude between pulse rate 1 from both the pack
and the main control. If the difference is greater than the set threshold for three successive samples, a SpeedDifTrip is latched.
If the main control recovers for 60 seconds, the trip is removed. This allows the main control to recover with subsequent
re-arming of the backup protection.

IO Frame Rate

Speed 1 , SS
A -0
Z A
PulseRate1 |A - B | A
(RPM) , IO -1 Speed 1_ Diff
A >B Z B (A & B & C)
B OS_Diff, CFG (%) Rated RPM_TA,
100
* CFG (RPM) B -2
Z C

PulseRate 1 ( Hz) , IO
A
Shaft Turning
A >B
75 Hz
B
1 Second Delay
SpeedDifEn , Card CFG
Enable
SpeedDiff _ Trip
Speed 1_ Diff Enable

SpeedDiff _ Trip L 86 MR , SS Speed 1_ Diff


Close immediately , 60 sec delay on opening Speed
Difference
Trip

When configured for dual controller, additional logic is added so that separate speed inputs from the two controllers come into
the I/O pack. This trip logic acts as if both controllers have a speed error, but continues to run if one controller has a valid
speed signal.

7.1.3.10 Maximum Speed Hold


The I/O pack provides a maximum speed hold function that resets when:

• Using the command PR_Max_RST (from signal space)


• PR1_Zero changes to false when the shaft first starts turning
Output values are PR1_Max, PR2_Max, and PR3_Max. These signals are used to determine the maximum speed obtained
while running or after stopping a turbine.

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7.1.3.11 Overspeed Test Logic, Steam Turbine
The signal OnLineOS1Tst is used for PulseRate1, OnLineOS2Tst is used for PulseRate2, and OnLineOS3Tst is used for
PulseRate3. In the following figure, there is another signal, Online OS1X, which initiates an online overspeed test for
PulseRate1. This signal also creates a 1.5 second reset pulse when removed.

Online Overspeed Test Logic

Note If the K4CL relay is enabled during an online Overspeed test, use the OnlineOS1X option and not the OnlineOS1Tst.
This will avoid an unwanted K4CL activation.

7.1.3.12 Speed State Boolean Values


The I/O pack has detection for zero speed from a set point with 1 RPM hysteresis. The I/O pack calculates a minimum speed
signal from a set point. The rate of change of speed from a set point is calculated resulting in a selectable acceleration trip. A
deceleration trip is then determined from a fixed 100% / second rate.

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7.1.3.13 Shaft Speed Accel, Decel and Zero
The I/O pack has detection for zero speed from a set point with 1 RPM hysteresis. The I/O pack calculates a minimum speed
signal from a set point. The rate of change of speed from a set point is calculated, resulting in a selectable acceleration trip. A
deceleration trip is then determined from a fixed 100% / second rate.
The acceleration for a given pulse rate (PR#_Accel) is calculated by computing two adjacent shaft speeds over a period of
AccelCalType ms each by computing change in pulse counts, and then computing the difference in these speeds divided by
AccelCalType ms to get the acceleration of the shaft.
In the following figures, pulse rate variables are displayed using a # symbol. Replace the # with 1 for HP, 2 for LP, or 3 for IP.
This figure is the same for PulseRate1, 2, and 3. Simply replace the 1 with a 2 or 3 to get the signal name. The contact, PR#_
Min, in the Acc1_Trip is only present for PR2 (PR2_Min) and PR3 (PR3_Min). It is not used for PR1.

PR_Zero
Hyst
1

0
PulseRate #, IO 0 RPM
(RPM) CFG

A
Zero_Speed, CFG A<B
(PulseRate #) PR#_Zero
B
(SS)
A
A+B
1 RPM
B PR #_Zero
A
A>B
Min_Speed, PR#_Min
CFG(PulseRate #) B

Speed State Boolean Values

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The pulse rate inputs have special detection for loss of signal, and special filtering to remove input noise from nearly
stationary shaft speeds.

PulseRate #, IO

Speed Wheel Pulse


Detected Window Speed #Updating
Speed
Inactive Counter Updating
Based on last speed Normally
(Maximum 24
seconds )

(Pulse Rates in Hz ) A Shaft # Turning


Allow Accel /
A > B
Decel Trip
75 Hz
B

1 Second Delay

1 **


Speed # Updating Shaft # Turning Decel #Trip Loss of
Pulse Rate

Decel #Trip †
can only be reset when
Speed #Updating becomes True
(pulses are able to be seen ) or
** 1 = Normal Operation after the I/O pack is rebooted
Pulse Rate Conditioning

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Decel#Trip
PulseRate#
(RPM)
A PR#_DEC

(From GearSpeed) A OR
Speed#Updating
A<B B
-100%/SEC**
S
B
(Der)
Shaft#Turning

%/Sec A PR#_ACC
0 %/Sec

A AND

A>B B
Acc_Setpoint, CFG (J5, PulseRate#)
B

PR#_DEC Dec#_Trip, (SS)

Dec#_Trip L86MR,SS

Acc_Trip, CFG (J5, PulseRate#)

Enable Acc#_Trip, (SS)


PR#_ACC PR#_MIN **
Acc#_TrEnab

HP, IP and LP Shaft Accel Decel Trip Logic


Acc#_Trip L86MR,SS
Note: PR#_MIN is not used on ACC1_Trip.
PR2_Min is used on ACC2_Trip and
PR3_Min is used on ACC3_Trip.

**Note: Where 100% is defined as the OS Setpoint.

Shaft Speed Accel, Decel and Zero

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7.1.3.14 Trip Anticipate Function
Steam turbine applications provide a speed trip that uses a live set point from signal space. This overspeed trip is vigorously
changed as a function of turbine load. This function does the following:

• Input set point is OS1_TATrpSp from signal space. Input rated RPM is specified by RatedRPM_TA as part of the I/O
pack configuration. Function test request input is TrpAntcptTst from signal space.
• If (OS1_TATrpSP is < 103.5% OR > 116% of RatedRPM_TA) then TA_Spd_Sp (the local set point value) = 106% of
RatedRPM_TA and TA_StptLoss (Signal space) is true and alarm L30TA is declared. Otherwise, TA_Spd_Sp = OS1_
TATrpSP.
• If TrpAntcptTst is true, decrease the current value of TA_Spd_Sp by 1RPM / second. Set the minimum value of
RatedRPM_TA to 94%. If TrpAntcptTst is false, the value of TA_Spd_Sp from above is immediately used.
• If PulseRate1 (Speed input 1 from the pulse rate input) > TA_Spd_Sp the internal value Trp_Anticptr is set properly.
• If the I/O pack is configured for steam turbine application (internal value SteamTurbOnly), then TA_Trip (signal space)
equals the value of Trp_Anticptr.

Note The I/O pack mounted on a TREA does not toggle the relays for trip anticipate function.

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7.1.3.15 Solenoid Voltage / Power Sense
The I/O pack provides three comparator voltage inputs used to monitor solenoid power or solenoid voltage depending on the
trip card that is connected. SOL1_Vfdbk (SS), SOL2_Vfdbk (SS), and SOL3_Vfdbk (SS) are generated from the input
signals.

7.1.3.16 Main Control Watchdog


A standard control watchdog function is provided by the I/O pack. In this function, a value from a Device Heartbeat
(DEVICE_HB) block is passed from the main controller to the I/O pack each data frame. If the I/O pack stops detecting the
value from the main controller, a counter is incremented and, after five data frames, leads to a trip. If the main controller
recovers for 60 seconds, the trip is removed, allowing for the recovery of the main controller with subsequent re-arming of the
backup protection. The recovery function is provided for typical activities such as cycling power on a controller to perform
maintenance.
While the controller is offline, the I/O pack associated with that controller will vote to trip. When the controller returns to
operation, the I/O pack will remove the vote to trip. The watchdog offers monitoring of two main controllers in the event both
Ethernet ports are connected. When configured for two controllers, having one controller active is sufficient to prevent a trip.

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7.1.3.17 Stale Speed Detection
The I/O pack provides an additional main control watchdog function that is based on a live speed signal. The protection works
as follows: If the pack PulseRate1 is determined to be zero speed the protection is turned off. If above zero speed, the pack
looks at the value of Speed1 from the main control. If the most recent Speed1 value exactly matches the Speed1 value from
the last data frame then a counter is incremented. If the counter reaches a threshold then a stale speed trip is declared and
latched. If speeds are different the counter is cleared.

Although Speed_1, SS is available as a connected variable, it should not be forced. It


can cause the protection to trip the system if enabled.

Attention
This protection is based on the knowledge that a live speed signal always dithers or moves some small amount. If the speed
values being read by PPRO from the controller are not changing (dithering), there is loss of speed signal integrity from the
controller. If the main control recovers for 60 seconds, the trip is removed allowing for the recovery of the main control with
subsequent re-arming of the backup protection. The protection offers monitoring of two main controls in the event both
Ethernet ports are connected. When configured for two controls, having one control satisfy the test is sufficient to prevent a
trip.

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7.1.3.18 Main Control Ethernet Monitor
The main control provides time synchronization across the distributed control elements. The time synchronization is tied
tightly into the time at which traffic occurs on a given controller's IONet. The I/O pack provides monitoring of this service to
ensure it is working correctly. Gross errors in time synchronization are detected by the pack through a number of different
means, and if problems persist, the I/O pack will vote to trip. Once the trip is latched, if the problem goes away for 60 seconds
the trip shall be reset (this assumes the control recovers from the problem and is back on line). The monitor will offer
monitoring of two main controls in the event both Ethernet ports are connected. When configured for two controls, having
one control sequencing correctly is sufficient to prevent a trip.
In the following diagram, the detection has been simplified to display monitoring of an Ethernet frame number as the means
for determining a problem is present.

Sync Frame Count Monitor

7.1.3.19 Trip Signal Logic


The different trip signals are combined into a composite signal that is used in the relay output logic. The following figure
specifies how the signals are combined. This function is partitioned between firmware and programmable logic. The path to
trip through hardware overspeed is done completely in hardware so that a firmware malfunction cannot defeat the protection.
The same is true of the contact input trip signals when they are configured for direct trip.
There are differences between steam turbine protection and other protection. A composite signal SteamTurbOnly is created
for ease of use:

LargeSteam **

MediumSteam **

** A number of contacts depend on


SmallSteam **
the value of Turbine _Type, CFG.

SteamTurbOnly
Steam Turbine Trip Signals

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Dec1_Trip
OS1_Trip

Acc1_Trip PulseRate1
L5CFG1_Trip Trips

Dec2_Trip
OS2_Trip 1
GT_2Shaft
PulseRate2
Trips
Acc2_Trip
L5CFG2_Trip LM_2Shaft1

1
LPShaftLock LM_3Shaft ComposTrip1,
(SS)
Dec3_Trip
OS3_Trip PulseRate3
1 Trips
LM_3Shaftf
Acc3_Trip
L5CFG3_Trip

L5Cont_Trip
SpeedDiff_Trip System
Cross_Trip, SS Trips

StaleSpdTrip
ContWdogTrip
FrameSyncTrip

2
Sil_Diag_Trip
1 1
LM_2Shaft LM_3Shaft PR1_Zero
Zero
Speed
1 Special
HPZeroSpdByp SteamTurbOnly
LMTripZEnable, CFG Case
SS
L3Z

Hardware
OS1HW_Trip Overspeed
OS2HW_Trip
OS3HW_Trip
1
Notes: CFG values.
2
This trip is generated if a PulseRate signal is broken (such as in the case of no
signal) and SilMode is set to enabled, or if a hardware issue is detected
regardless of SilMode. There will be an accompanying diagnostic generated to
designate the actual cause of the trip.
Trip Combine - All Signals (SS) unless Marked

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7.1.3.20 Watchdog Trip Function
Hardware in the I/O pack monitors local firmware operation, providing a watchdog trip function if the firmware malfunctions.
The operation of this watchdog does not display in the normal sequencing figures. The I/O pack hardware is designed to be in
a fail-safe or trip mode if it is not properly configured and operating. This means that with power off, while starting up, when
in a hardware reset, or otherwise not online, the I/O pack will vote to trip. If the I/O pack watchdog acts, it resets the hardware
thereby generating a vote to trip.
The processor board used inside the I/O pack has hardware features that allow it to differentiate between a reset caused by the
watchdog hardware and a reset caused by cycling of power. This information is available from the pack after it restarts. In the
event that an I/O pack votes to trip due to a reset, it is then possible to determine if a watchdog reset or a cycling of control
power caused the event.

7.1.3.21 Backup Synchronizing Check


The Mark VIeS YPRO or Mark VIe PPRO provides two PT inputs and performs a backup synchronizing check. The TPRO
has fanned PT inputs. The SPRO does not use fanned PT inputs because there are three direct PT paths.

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Generator Synchronizing with TPRO

TTUR Cont’d
P28
TTURH 1C R PTUR PR3 K25P
Cont’d K25 K25A
P3
T
Generator, +0.3 Hz Cont’d 2/3 2/3
Slip RD RD S
PT secondary, 17 P3 (0.25 Hz) P125/24 V dc
PR 3
nomin. 115 V ac +0.12 Hz 01 From JR 4
18 (0.1 Hz) 03
(75 to 130 V ac),
Phase
45 to 66 Hz +10 Deg K25P
Fan out Gen lag Gen lead CB_ Volts_OK 04
connection PS3 02
Bus,
19 to S Auto Synch K25
PT secondary, L52Ga
nomin. 115 V ac Algorithm CB_K25P_PU 05
20 L52G
(75 to 130 V ac), PT3 06
S PTUR K25A
45 to 66 V Hz JT4 52Gb
to T CB_K25_PU 07
T PTUR
JS4
CB_K25A_PU Breaker
Close
Coil
08
JR4

N125 /24 V dc

JT1
Generator,
PT secondary, 1 JS1 TRPG / TRPL / TRPS
nomin. 115 V ac
(75 to 130 V ac), 2 JR1
45 to 66 Hz Fan out
Bus, connection J2
3
PT secondary,
nomin. 115 V ac
4 J2
(75 to 130 V ac),
45 to 66 V Hz
TREG / TREL / TRES

R PPRO K25A
2/3
TPRO
TPROH1C Relay
Sync Check RD
Slip Algorithm Driver
JR1 JX1 JX1
+0.3 Hz

-10 Deg +10 Deg Phase


-0.3 Hz

JS1 JY1 JY1

S PPRO

JT1 JZ1 JZ1

T PPRO

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GE Internal
Generator Synchronizing with SPRO
TTUR
P28 Cont’d
TTUR R YTUR PR3
P3 K 25 P
Cont’d K25 K25 A
Cont’d
+0.3 Hz T
2 /3 2/ 3
Generator Slip (0.25Hz) RD RD S P125 /24 V dc
PT secondary 17 PR3 P3
Nomin . 115 V ac +0. 12 Hz
18 (0.1Hz) 01 From JR 4 03
( 75 to 130 V ac ) Phase Volt K 25P
45 to 66 Hz Fan out + 10 Deg
connection PS3 Gen lag 02 CB_ s _OK 04
Bus Gen lead
19 to S L 52 Ga K 25
PT secondary Auto Synch CB_K25P_PU
nomin. 115 V ac Algorithm 05
20 L52 G
( 75 to 130 V ac) PT 3 K 25 A 06
S Y TUR JT 4 52 Gb
45 to 66 Hz to T CB_K25_PU 07
T Y TUR
JS 4
CB_K25A_PU Breaker
Close
Coil
08
JR4
N 125 /24 V dc

JT1

JS1 TRPG
JR1

J2

J2

JA 3 JX1
K25 A
2/3
Relay
RD
Driver
Generator R SPRO
PT secondary 1 R YPRO
Nomin. 115 V ac
( 75 to 130 V ac ) 2 Sync Check
45 to 66 Hz Slip Algorithm
Fan out +0.3 Hz
Bus 3 connection JA1
PT secondary Phase
-10 Deg +10 Deg TREG
Nomin .115 V ac 4
( 75 to 130 V ac ) -0.3 Hz
45 to 66 Hz
JY 1
JA3
Generator 1 S SPRO
PT secondary
Nomin. 115 V ac
( 75 to 130 V ac ) 2
45 to 66 Hz Fan out
3 connection
Bus
PT secondary S YPRO
Nomin. 115 V ac 4
JA1
( 75 to 130 V ac )
45 to 66 Hz

Generator JA 3 JZ 1
1 T SPRO
PT secondary
Nomin . 115 V ac
( 75 to 130 V ac ) 2
45 to 66 Hz Fan out
Bus 3 connection
PT secondary T YPRO
Nomin. 115 V ac 4
( 75 to 130 V ac ) JA1
45 to 66 Hz

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7.1.3.22 K25A Sync Check Function
The K25A sync check function is based on phase lock loop techniques. The PPRO or YPRO performs the calculations for this
function with interfaces to the breaker close circuit located on the TTUR board (not TPRO or SPRO). Its basic function is to
monitor two Potential Transformer (PT) inputs, and to calculate generator and bus voltage amplitudes and frequencies, phase,
and slip.
When it is armed (enabled) from the application code, and when the calculations determine that the input variables are within
the requirements, the relay K25A will be energized. The above limits are configurable. The algorithm uses the phase lock loop
technique to derive the above input variables, and has a bypass function to provide dead bus closures. The window in this
algorithm is the current window, not the projected window (as used on the auto sync function), therefore it does not include
anticipation. Limit checks are performed against adjustable constants as follows:

• Generator under-voltage
• Bus under-voltage
• Voltage error
• Frequency error (slip), with a maximum recommended value of 0.5 Hz, typically set to 0.27 Hz
• Phase error with a maximum rotational value of 30°, typically set to 10°.

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GE Internal
The sync check arms logic to enable the function and provides bypass logic for dead bus closure. The following sync window
is based on typical settings.

Typical Sync Window


The PPRO or YPRO provides a command to monitor feedback for the K25A sync relay and K25A coil. The feedback is
named K25A_Fdbk, (SS).

Sync Check and K25A Sync Relay Command


The Sync Check will allow the breaker to close with negative slip. The window is configurable for phase and slip.
The following diagnostics relating to the auto sync function are generated by the PPRO or YPRO:

• K25A Relay (sync check) Driver mismatch requested state. This means the PPRO or YPRO cannot establish a current
path to the TREx terminal board.
• K25A Relay (sync check) Coil trouble, cabling to P28 V on TTUR. This means the K25A relay is not functional; it could
be due to an open circuit between the TREx and the TTUR terminal boards or to a missing P28 V source on the TTUR
terminal board.

272 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
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7.1.3.23 K25A Relay Algorithm
The following figure displays the logic for K25A Relay from the Mark VIeS YPRO, which is the same as from the Mark VIe
PPRO.

Signal Space, Outputs;


Algorithm Inputs
YPRO Config
SynchCheck used/ unused
SystemFreq
FreqDiff
TurbRPM
PhaseDiff
Slip L3_Window
* ReferFreq PR_Std +0. 3 Hz

+ 10 Deg
Phase Signal Space, inputs;
PR1/PR2 Algorithm Outputs
Gen Lag Gen Lead
SPRO
DriveFreq
1 center freq BusFreq
Generator, Phase Lock Loop GenFreq
PT secondary 2 Phase, Slip, Freq, GenVoltsDiff
Amplitude GenFreqDiff
3 GenPhaseDiff
Calculations
Bus,
PT secondary 4
L25A_Command
A
GenVoltsDiff OR
A
|A|<B B

VoltageDiff 2.8 B
GenVolts
A L3_GenVolts
A> B
6.9 B
GenVoltage
BusVolts
A
A> B
L3_BusVolts A
6.9 B
BusVoltage B
C
AND A L25A _ Command
SynCk_Perm D OR
E B

TREG
SynCk_ByPass A TTUR
B Dead Bus TRPG
AND Y TUR
L3_GenVolts C
D
L3_BusVolts NOT K25A
RD

Note *ReferFreq is a configuration parameter, used to make a selection of the variable that is used to establish the center
frequency of the Phase Lock Loop. It allows a choice between:
• PR_Std
– Using PulseRate1 speed input on a single shaft applications
– Using PulseRate2 on all multiple shaft applications
• SgSpace uses DriveFreq (the generator frequency in Hz) from signal space (application code). SgSpace is used when
PR_Std is not applicable.

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GE Internal
7.1.3.24 Servo Suicide Relay Command
The I/O pack provides a command to a servo suicide relay, and provides coil-monitoring feedback named K4CL_Fdbk, (SS).
This signal is typically used in a simplex control of a gas turbine system where it is highly desirable for the pack emergency
protection to have a hardware path to close the fuel valves. It is also used in simplex steam turbines to close the steam valves.

Servo Suicide Relay Command

Note If the K4CL relay is enabled during an online Overspeed test, use the OnlineOS1X option and not the OnlineOS1Tst.
This will avoid an unwanted K4CL activation.

7.1.3.25 Trip and Economizing Relay Outputs


The I/O pack provides drivers for three emergency trip relay commands, and provides monitoring for three status feedback
signals. Trip is a combination of firmware trip and direct trip implemented in programmable logic. The pack contains drivers
for three economizing relay commands and monitoring for three status feedback signals. Economizing relays are used when it
is desirable to introduce some series resistance in a solenoid coil path to reduce current once the solenoid is picked up.

Note YPROs or PPROs mounted on TREA terminal boards have TA_Trip_Enab# set by default to Disable and this
parameter is not configurable.

The reset signal applied to this function is not edge triggered. A continuously applied reset can result in output cycling in the
presence of an intermittent trip signal. The duration of the reset should only be sufficient to allow the reset to complete and
should not be maintained. Logic for the economizing relay drivers is a time-delayed copy of the emergency trip relays as
displayed in the following figure.

274 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
In
FPGA
TA_Trip, (SS) TestETR1 ComposTrip1 ETR1_Enab L5ESTOP1(SS) ETR1 (IO)
SS (SS) CFG, K1_Fdbk Trip Relay,
Energize to Run
TA_Trip_Enabl1 TRES, TREL Used
CFG (PPRO) In
Firmware
ETR1 SOL1_Vfdbk KE1_Enab TD_KE1
IO (SS) CFG, KE1_Fdbk In
2 Second Delay on Firmware
Pickup KE1 (IO)
Economizing Relay,
TD_KE1
Energize to Econ

In
FPGA
TA_Trip(SS) TestETR2 ComposTrip1 ETR2_Enab L5ESTOP1(SS) ETR2 (IO)
SS (SS) CFG, K2_Fdbk Trip Relay,
Energize to Run
TA_Trip_Enabl2 TRES, TREL Used
CFG (PPRO)
In
Firmware
ETR2 SOL2_Vfdbk KE2_Enab TD_KE2
IO (SS) CFG, KE2_Fdbk In
2 Second Delay on Firmware
Pickup KE2 (IO)
TD_KE2 Economizing Relay,
Energize to Econ

L97EOST_ONLZ Large Steam


CFG
In
FPGA
TA_Trip(SS) ComposTrip1 TestETR 3 ETR3_Enab L5ESTOP1(SS) ETR3 (IO)
(SS) SS CFG, K3_Fdbk Trip Relay,
Energize to Run
TA_Trip_Enabl3 TRES, TREL Used
CFG (PPRO) In
Firmware
ETR3 SOL3_Vfdbk KE3_Enab TD_KE3
IO (SS) CFG, KE3_Fdbk
In
2 Second Delay on Firmware
Pickup KE3 (IO)
Economizing Relay,
TD_KE3
Energize to Econ,
Note: TREL and TRES do not have economizing relays so the KE1, KE2, and KE3 drivers are
not used when those boards are configured. Estop is only on TREG so it is bypassed when
driving ETR1-3 with TREL and TRES.

Trip and Economizing Relay Outputs

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GE Internal
7.1.4 Specifications
Item PPRO Specification
Speed Input Quantity Three input signals provided
Speed input Range Pulse rate frequency range 2 Hz to 20 kHz
Speed Input Accuracy Pulse rate accuracy 0.05% of reading
Speed Input Sensitivity
Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 27 mV p-p (TREA, SPRO, TPRO)
Speed input sensitivity is such that
20 kHz requires 294 mV p-p (TREA)
turning gear speed may be observed on
20 kHz requires 276 mV p-p (SPRO, TPRO)
a typical turbine application.
Input voltage range 75 to 127 V rms. Loading less than 3 VA.
Generator and Bus Voltage Inputs
Frequency accuracy 0.05% over 45 to 66 Hz range.
Frame Rate 100 Hz maximum
Pulse Duration Limitation Trip contact input can only be detected if the pulse contact is greater than 8 ms.
Size 8.26 cm high x 4.19 cm wide (3.25 in x 1.65 in x 4.78 in)
Technology Surface-mount
PPROS1B is rated from -40 to 70ºC (-40 to 158 ºF)

PPROH1A is rated from -30 to 65ºC (-22 to 149 ºF)
Ambient rating for enclosure design
† Refer to GEH-6721_Vol_I, the chapter Technical Regulations, Standards, and

Environments.
Vibration
Universal Building Code (UBC) – Seismic Code section 2312 Zone 4 with operation
Seismic
without trip
Bellcore GR-63-CORE Issue 1, 1995 0.5 g, 5-100 Hz, 10 min. per octave, 1
Shipping (by road) sweep/axis x 3 axes, ~ 42 min./axis
3 shocks of 15 g, 2 ms impulse each repeated for all axes
1.0 g horizontal. 0.5 g vertical at 15 to 120 Hz
Operating at site
IEC 60721-3-2

276 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
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Agency Approvals

Type Standards
UL 508A Safety Standard Industrial Control Equipment
CSA 22.2 No. 14 Industrial Control Equipment
Safety
EN 61010-1 Safety of Electrical Equipment, Industrial Machines (Low Voltage
Directive)
UL 796 Printed Circuit Boards
UL recognized Board manufacturer
Printed Wire Board Assemblies
ANSI IPC guidelines
ANSI IPC/EIA guidelines
EN 61000-4-2 Electrostatic Discharge Susceptibility
EN 6100 4-3 (ENV 50140) Radiated RF Immunity
EN 61000-6-2 Generic Immunity Industrial Environment
EN 61000-4-4 Electrical Fast Transient Susceptibility
Electromagnetic Compatibility (EMC)
EN 61000-4-5 Surge Immunity
EN 61000-4-6 Conducted RF Immunity
EN 55011 Radiated and Conducted RF Emissions
ANSI/IEEE C37.90.1 Surge

7.1.5 Diagnostics
The I/O pack performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the analog feedback currents
• A comparison between the commanded state of each relay drive and the feedback from the commanded output circuit
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set
Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be individually
latched, and then reset with the RESET_DIA signal if they go health.

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7.1.5.1 PPRO Trip Status
During normal I/O pack operation, all six trip application LEDs display green. An additional feature, rotating LEDs, can be
configured for the I/O pack. Using this feature, only one LED is turned on at a time, and walked up and down the six LEDs
creating a synchronized motion. The walking is regulated by the controller IONet, and synchronized across a set of three I/O
packs. This provides a quick visual indication of the system time synchronization status. There are six LEDs on the front left
side of the I/O pack to indicate trip status. All six LEDs stay off until the I/O pack is completely online.
RUN is green any time the I/O pack has energized the emergency trip relays. RUN turns red any time the I/O pack has
removed power from the emergency trip relays, voting to trip.
ESTP is green when the ESTOP input (if applicable) is in the run state. ESTP turns red any time ESTOP is invoked to
prevent pick up of the emergency trip relays. If the selected trip terminal board does not support ESTOP, then the LED
defaults to green.
OSPD turns red any time the I/O pack votes to trip in response to a detected overspeed condition on any of the three speed
inputs. OSPD is green when an overspeed condition is not present or latched.

Note WDOG turns green to indicate that the trip status of any of these features has been cleared.

WDOG turns red when any of the following I/O pack trip functions are enabled and active:

• Control Watchdog
• Speed Difference Detection
• Stale Speed Detection
• Frame Sync Monitor
SYNC is green when generator and bus voltage is synchronized and matched in amplitude. SYNC turns red when the I/O
pack determines that ac bus and generator bus voltage does not satisfy the synchronization requirements, and synchronization
has been requested by the system.
OPT is reserved for options that expand the capabilities of the I/O pack. The default display is green.

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7.1.6 Configuration
The following subsections (Parameters, Pulse Rate, PT, K25A, and so forth) define the choices within the tabs of the
ToolboxST configuration.

7.1.6.1 Parameters
Parameter Description Choices
Unused, GT_1Shaft, LM_3Shaft,
MediumSteam, SmallSteam,GT_2Shaft,
TurbineType Turbine Type and Trip Solenoid configuration
Stag_GT_1Sh,Stag_GT_2Sh,
LargeSteam, LM_2Shaft
On LM machine, when no PR on Z,Enable a vote for
LMTripZEnabl Disable, Enable
trip
TA_Trp_Enab1 Steam, enable trip anticipate on ETR1 † Disable, Enable
TA_Trp_Enab2 Steam, enable trip anticipate on ETR2 † Disable, Enable
TA_Trp_Enab3 Steam, enable trip anticipate on ETR3 † Disable, Enable
StaleSpdEn Enable trip on speed from controller freezing Disable, Enable
Enable trip on speed difference between controller
SpeedDifEn Disable, Enable
and PPRO
When using TREL/TRES, sol power, bus A, diagnostic
DiagSolPwrA Disable, Enable
enable
When using TREL/TRES, sol power, bus B, diagnostic
DiagSolPwrB Disable, Enable
enable
When using TREL/TRES, sol power, bus C, diagnostic
DiagSolPwrC Disable, Enable
enable
RotateLeds Rotate the status LEDs if all status are OK Disable, Enable

LedDiags is
disabled by
default.
LedDiags Attention Disable, Enable

When enabled, generates a diagnostic alarm when


Trip LEDs are lit. Refer to the section, Diagnostics,
PPRO Trip Status for more information on LED
operation.
SilMode Perform additional SIL diagnostic and trip checks Disable, Enable
Rated RPM, used for trip anticipater and for speed diff
RatedRPM_TA 0 to 20,000
protection
AccelCalType Select acceleration calculation time (milliseconds) 10 to 100
OS_Diff Absolute speed difference in percent for trip threshold 0 to 10
RBOS1_Enab HP Rate-based Overspeed enable Disable, Enable
‡ RBOS1_AccelSetptn, HP Rate-based Overspeed acceleration setpoint n,
0 to 20,000
n=1-5 RPM/s
‡ RBOS1_OSSetptn, n=
HP Rate-based Overspeed setpoint n, RPM 0 to 20,000
1-5
RBOS2_Enab LP Rate-based Overspeed enable Disable, Enable
‡RBOS2_AccelSetptn, LP Rate-based Overspeed acceleration setpoint n,
0 to 20,000
n=1-5 RPM/s

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GE Internal
Parameter Description Choices
‡RBOS2_OSSetptn, n=
LP Rate-based Overspeed setpoint n, RPM 0 to 20,000
1-5
RBOS3_Enab IP Rate-based Overspeed enable Disable, Enable
‡ RBOS3_AccelSetptn, IP Rate-based Overspeed acceleration setpoint n,
0 to 20,000
n=1-5 RPM/s
‡ RBOS3_OSSetptn, n=
IP Rate-based Overspeed setpoint n, RPM 0 to 20,000
1-5
† PPROs mounted on TREA terminal boards have TA_Trp_Enab# set by default to Disable and this parameter is not

configurable.
‡ RBOS setpoints have restrictions in their relative values. Refer to the section RBOS Parameter Restrictions for further

details.

7.1.6.2 RBOS Parameter Restrictions


The following restrictions apply to the relative values of RBOS setpoints (within a given shaft):
1. RBOS#_AccelSetpts must increase in value by at least 0.1 RPM/s (RBOS1_AccelSetpt2 must be 0.1 RPM/s or greater
than RBOS1_AccelSetpt1). This prevents an infinite slope calculation in the overspeed setpoint profile.
2. RBOS#_OSSetpts must be either equal to or less than the previous entry (RBOS1_OSSetpt2 must be less than or equal to
RBOS1_OSSetpt1). This ensures the functionality of the RBOS feature in that as Acceleration increases the RBOS
overspeed setpoint either stays the same or decreases, but never increases.
These restrictions are enforced by the build in ToolboxST, with errors that provide help to the user to identify the issues in
their configuration.

7.1.6.3 Pulse Rate (Used on SPRO, TPRO, TREA)


Parameter Pulse Rate Description Choices
PRType Selects the type of Pulse Rate Input, (For Proper Unused,Speed,Flow,Speed_LM,Speed_
Resolution) High
PRScale Pulses per Revolution (outputs RPM) 0 to 1,000
OSHW_Setpoint Hardware Overspeed Trip Setpoint in RPM 0 to 20,000
OS_Setpoint Overspeed Trip Setpoint in RPM 0 to 20,000
OS_Tst_Delta Off Line Overspeed Test Setpoint Delta in RPM -2,000 to 2,000
Zero_Speed Zero Speed for this Shaft in RPM (1 RPM hysteresis), 0 to 20,000
0 RPM sets PR#_Zero always false
Min_Speed Min Speed for this Shaft in RPM 0 to 20,000
Accel_Trip Enable Acceleration Trip Disable, Enable
Acc_Setpoint Acceleration Trip Setpoint in RPM / Sec 0 to 20,000
TMR_DiffLimt Diag Limit,TMR Input Vote Difference, in Eng Units 0 to 20,000

7.1.6.4 PT (Used on TPRO, SPRO)


Parameter Description Choices
PT_Input PT primary in Eng Units (kv or percent) for PT_Output 1 to 1000
PT_Output PT Output in Volts rms for PT_Input - typically 115 0 to 150
TMR_DiffLimt Diag Limit,TMR Input Vote Difference, in Eng Units 1 to 1000

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7.1.6.5 K25A (Used on TREG, TRES, TREL)
Parameter K25A Description Choices
SynchCheck Synch Check Relay K25A Used Used, Unused
DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable
SystemFreq System Frequency in hz 50 Hz, 60 Hz
ReferFreq Select Freq Refer for PLL, PR_Std input (If single PR_Std or SgSpace
shaft PR1, otherwise PR2) or from Signal Space
TurbRPM Rated RPM, Load Turbine 0 to 20,000
VoltageDiff Maximum Voltage Diff in Eng Units (kv or percent) for 1 to 1000
Synchronizing
FreqDiff Maximum Frequency Difference in hz for 0 to 0.5
Synchronizing
PhaseDiff Maximum Phase Difference in degrees for 0 to 30
Synchronizing
GenVoltage Allowable Minimum Gen Voltage,Eng Units (kv or 1 to 1000
percent) for Synchronizing. Typically 50% of rated
BusVoltage Allowable Minimum Bus Voltage,Eng Units (kv or 1 to 1000
percent) for Synchronizing. Typically 50% of rated

7.1.6.6 Contacts (Used on TREG, TRES, TREL)


Parameter Description Choices
ContactInput ContactInput Used, Unused
SeqOfEvents Record Contact transitions in Sequence of Events Enable, Disable
DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable
TripMode TripMode Enable, Disable

7.1.6.7 E-Stop (Used on TREG)


Parameter Description Choices
DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable

7.1.6.8 E-Stop (Used on TREA)


Parameter Description Choices
EstopEnab Enable E-Stop Detection on TREA card Enable, Disable
DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable

7.1.6.9 Econ Relays (Used on TREG)


Parameter Description Choices
Signal Relay Signal Used, Unused
DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable

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GE Internal
7.1.6.10 K4CL (Used on TREG, TRES, TREL)
Parameter Description Choices
Signal Relay Signal Used, Unused
DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable

7.1.6.11 ETR Relays (Used on TREA, TREG, TRES, TREL)


Parameter Description Choices
RelayOutput Relay Signal Used, Unused
DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable
DiagSolEnab Enable Solenoid Voltage Diagnostic Enable, Disable

7.1.6.12 Variables PPRO


Variable PPRO Variable Description Direction Type Terminal Boards
L3DIAG_PPRO_R,S,T I/O Diagnostic Indication Input BOOL
LINK_OK_PPRO_R,S,T I/O Link Okay Indication Input BOOL
ATTN_PPRO_R,_S, and _T I/O Attention Indication Input BOOL
All
PS18V_PPRO_R,_S, and _T I/O 18 V Power Supply Indication Input BOOL
PS28V_PPRO_R,_S, and _T I/O 28 V Power Supply Indication Input BOOL
IOPackTmpr_R,_S, and _T I/O Pack Temperature (deg °F) AnalogInput REAL
K1FLT K1 Shorted Contact Fault Input BOOL
TREA
K2FLT K2 Shorted Contact Fault Input BOOL
SilModErr Sil Mode Configuration Input BOOL
modification after going On Line
EstopModErr E-Stop Configuration Input BOOL
modification after going On Line
TA_StptLoss L30TA Input BOOL
GT_1Shaft Config – Gas Turb,1 Shaft Input BOOL
Enabled
GT_2Shaft Config – Gas Turb,2 Shaft Input BOOL
Enabled
LM_2Shaft Config – LM Turb,2 Shaft Input BOOL
Enabled
LM_3Shaft Config – LM Turb,3 Shaft Input BOOL
Enabled All
LargeSteam Config – Large Steam 1, Enabled Input BOOL
MediumSteam Config – Medium Steam Enabled Input BOOL
SmallSteam Config – Small Steam Enabled Input BOOL
Stag_GT_1Sh Config – Stag 1 Shaft, Enabled Input BOOL
Stag_GT_2Sh Config – Stag 2 Shaft, Enabled Input BOOL
L3SS_Comm Communication Status - OK = Input BOOL
True
LokdRotorByp LL97LR_BYP - Locked Rotor Output BOOL
Bypass
HPZeroSpdByp L97ZSC_BYP - HP Zero Speed Output BOOL
Check Bypass

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Variable PPRO Variable Description Direction Type Terminal Boards
DriveFreq RefrFreq - Drive (Gen) Freq (Hz), AnalogOutput REAL TPRO, SPRO
used for non standard drive
config
Speed1 Shaft Speed 1 in RPM AnalogOutput REAL
All
ContWdog Controller Watchdog Counter Output DINT

7.1.6.13 Variables Contacts


Variable Contact Variable Direction Type Terminal Boards
Description
Contact1 Contact Input 1 Input BOOL TREG, TRES, TREL
Contact2 Contact Input 2 Input BOOL TREG, TRES, TREL
Contact3 Contact Input 3 Input BOOL TREG, TRES, TREL
Contact4 Contact Input 4 Input BOOL TREG, TRES, TREL
Contact5 Contact Input 5 Input BOOL TREG, TRES, TREL
Contact6 Contact Input 6 Input BOOL TREG, TRES, TREL
Contact7 Contact Input 7 Input BOOL TREG, TRES, TREL

7.1.6.14 Variables Econ Relays


Variable Econ Relay Variable Direction Type Terminal Boards
Description
KE1_Fdbk Current Economizing Relay for Input BOOL TREG
Trip Solenoid 1
KE2_Fdbk Current Economizing Relay for Input BOOL TREG
Trip Solenoid 2
KE3_Fdbk Current Economizing Relay for Input BOOL TREG
Trip Solenoid 3

7.1.6.15 Variables E-Stop


Variable E-Stop Variable Description Direction Type Terminal Boards
ESTOP1,inverse sense,K4 relay,
True = Run

A SOE is generated for this


KESTOP1_Fdbk Input BOOL TREG
variable, requiring the attachment
of an application variable to this
signal. Otherwise, a build warning
is generated.
ESTOP1,inverse sense,True =
Run

A SOE is generated for this


KESTOP1_Fdbk Input BOOL TREA
variable, requiring the attachment
of an application variable to this
signal. Otherwise, a build warning
is generated.

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GE Internal
7.1.6.16 Variables ETR Relays
Variable ETR Relay Variable Direction Type Terminal Boards
Description
K1_Fdbk L4ETR1_FB, Trip Relay 1 Input BOOL TREA, TREG, TRES,
Feedback TREL
K2_Fdbk L4ETR2_FB, Trip Relay 2 Input BOOL TREA, TREG, TRES,
Feedback TREL
K3_Fdbk L4ETR3_FB, Trip Relay 3 Input BOOL TREG, TRES, TREL
Feedback

7.1.6.17 Variables Fanned-PR


Variable Description Direction Type Terminal Boards
Fan_Spd_Fbk Fanned Speed Signal Feedback Input BOOL TREA
:- Fanned = Jumpers Closed

7.1.6.18 Variables K25A


Variable Description Direction Type Terminal Boards
K25A_Fdbk Synch Check Relay Input BOOL TREG, TRES, TREL

When this is set to False, the


generator and bus potential
transformer (PT) live values are
disabled.

7.1.6.19 Variables K4CL


Variable Description Direction Type Terminal Boards
K4CL_Fdbk Drive Control Valve Servos Input BOOL TREG, TREL, TRES
Closed

7.1.6.20 Variables PT
Variable Description Direction Type Terminal Boards
BusPT_KVolts Kilo-Volts RMS (Active only if AnalogInput REAL TPRO, SPRO
K25A is Enabled)
GenPT_KVolts Kilo-Volts RMS (Active only if AnalogInput REAL TPRO, SPRO
K25A is Enabled)

7.1.6.21 Variables Pulse Rate


Variable Description Direction Type Terminal Boards
PulseRate1 HP speed AnalogInput REAL TPRO, SPRO,TREA
PulseRate2 LP speed AnalogInput REAL TPRO, SPRO,TREA
PulseRate3 IP speed AnalogInput REAL TPRO, SPRO,TREA

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7.1.6.22 Variables Vars-CI
Variable Vars-CI Variable Description Direction Type Terminal Boards
Cont1_TrEnab Config – Contact 1 Trip Enabled – Input BOOL TREG, TRES, TREL
Direct
Cont2_TrEnab Config – Contact 2 Trip Enabled – Input BOOL TREG, TRES, TREL
Direct
Cont3_TrEnab Config – Contact 3 Trip Enabled – Input BOOL TREG, TRES, TREL
Direct
Cont4_TrEnab Config – Contact 4 Trip Enabled – Input BOOL TREG, TRES, TREL
Direct
Cont5_TrEnab Config – Contact 5 Trip Enabled – Input BOOL TREG, TRES, TREL
Direct
Cont6_TrEnab Config – Contact 6 Trip Enabled – Input BOOL TREG, TRES, TREL
Direct
Cont7_TrEnab Config – Contact 7 Trip Enabled – Input BOOL TREG, TRES, TREL
Direct
Inhbt1_Fdbk Trip Inhibit Signal Feedback for Input BOOL TREG, TRES, TREL
Contact 1
Inhbt2_Fdbk Trip Inhibit Signal Feedback for Input BOOL TREG, TRES, TREL
Contact 2
Inhbt3_Fdbk Trip Inhibit Signal Feedback for Input BOOL TREG, TRES, TREL
Contact 3
Inhbt4_Fdbk Trip Inhibit Signal Feedback for Input BOOL TREG, TRES, TREL
Contact 4
Inhbt5_Fdbk Trip Inhibit Signal Feedback for Input BOOL TREG, TRES, TREL
Contact 5
Inhbt6_Fdbk Trip Inhibit Signal Feedback for Input BOOL TREG, TRES, TREL
Contact 6
Inhbt7_Fdbk Trip Inhibit Signal Feedback for Input BOOL TREG, TRES, TREL
Contact 7
Trip1_EnCon Contact 1 Trip Enabled – Input BOOL TREG, TRES, TREL
Conditional
Trip2_EnCon Contact 2 Trip Enabled – Input BOOL TREG, TRES, TREL
Conditional
Trip3_EnCon Contact 3 Trip Enabled – Input BOOL TREG, TRES, TREL
Conditional
Trip4_EnCon Contact 4 Trip Enabled – Input BOOL TREG, TRES, TREL
Conditional
Trip5_EnCon Contact 5 Trip Enabled – Input BOOL TREG, TRES, TREL
Conditional
Trip6_EnCon Contact 6 Trip Enabled – Input BOOL TREG, TRES, TREL
Conditional
Trip7_EnCon Contact 7 Trip Enabled – Input BOOL TREG, TRES, TREL
Conditional
Trip1_Inhbt Contact 1 Trip Inhibit Output BOOL TREG, TRES, TREL
Trip2_Inhbt Contact 2 Trip Inhibit Output BOOL TREG, TRES, TREL
Trip3_Inhbt Contact 3 Trip Inhibit Output BOOL TREG, TRES, TREL
Trip4_Inhbt Contact 4 Trip Inhibit Output BOOL TREG, TRES, TREL
Trip5_Inhbt Contact 5 Trip Inhibit Output BOOL TREG, TRES, TREL
Trip6_Inhbt Contact 6 Trip Inhibit Output BOOL TREG, TRES, TREL
Trip7_Inhbt Contact 7 Trip Inhibit Output BOOL TREG, TRES, TREL

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7.1.6.23 Variables Vars-Relay
Variable Vars-Relay Variable Direction Type Terminal Boards
Description
K1_FdbkNV_R,S,T Non Voted L4ETR1_FB, Trip Input BOOL
Relay 1 Feedback
All
K2_FdbkNV_R,S,T Non Voted L4ETR2_FB, Trip Input BOOL
Relay 2 Feedback
K3_FdbkNV_R,S,T Non Voted L4ETR3_FB, Trip Input BOOL TREG, TRES, TREL
Relay 3 Feedback
SOL1_Vfdbk When TREG,Trip Solenoid 1 Input BOOL TREG
Voltage
SOL2_Vfdbk When TREG,Trip Solenoid 2 Input BOOL TREG
Voltage
SOL3_Vfdbk When TREG,Trip Solenoid 3 Input BOOL TREG
Voltage
ETR1_Enab Config – ETR1 Relay Enabled Input BOOL
All
ETR2_Enab Config – ETR2 Relay Enabled Input BOOL
ETR3_Enab Config – ETR3 Relay Enabled Input BOOL TREG, TRES, TREL
KE1_Enab Config – Economizing Relay 1 Input BOOL TREG
Enabled
KE2_Enab Config – Economizing Relay 2 Input BOOL TREG
Enabled
KE3_Enab Config – Economizing Relay 3 Input BOOL TREG
Enabled
K4CL_Enab Config – Servo Clamp Relay Input BOOL TREG, TRES, TREL
Enabled
K25A_Enab Config – Synch Check Relay Input BOOL TREG, TRES, TREL
Enabled
PTR1 L20PTR1 - Primary Trip Relay Output BOOL
CMD vs. Voltage - a Mismatch
Diagnostic Monitor
All
PTR2 L20PTR2 - Primary Trip Relay Output BOOL
CMD vs. Voltage - a Mismatch
Diagnostic Monitor
PTR3 L20PTR3 - Primary Trip Relay Output BOOL TREG, TRES, TREL
CMD vs. Voltage - a Mismatch
Diagnostic Monitor
TestETR1 L97ETR1 - ETR1 test, True Output BOOL
deenergizes relay
All
TestETR2 L97ETR2 - ETR2 test, True Output BOOL
deenergizes relay
TestETR3 L97ETR3 - ETR3 test, True Output BOOL TREG, TRES, TREL
deenergizes relay

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7.1.6.24 Variables Vars-Speed
Vars-Speed Variable Terminal Boards
Variable Direction Type
Description
Acc1_TrEnab Config – Accel 1 Trip Enabled Input BOOL
Acc2_TrEnab Config – Accel 2 Trip Enabled Input BOOL
Acc3_TrEnab Config – Accel 3 Trip Enabled Input BOOL
Hardware HP overspeed setpoint
OS1HW_SP_Pend Input BOOL
changed after power up
Hardware LP overspeed setpoint
OS2HW_SP_Pend Input BOOL
changed after power up
Hardware IP overspeed setpoint
OS3HW_SP_Pend Input BOOL
changed after power up
Hardware HP Overspd Setpoint
OS1HW_SP_CfgErr Input BOOL
Config Mismatch Error
Hardware LP Overspd Setpoint
OS2HW_SP_CfgErr Input BOOL
Config Mismatch Error
Hardware IP Overspd Setpoint
OS3HW_SP_CfgErr Input BOOL
Config Mismatch Error
HP Overspd Setpoint Config
OS1_SP_CfgEr Input BOOL
Mismatch Error
LP Overspd Setpoint Config
OS2_SP_CfgEr Input BOOL
Mismatch Error
IP Overspd Setpoint Config
OS3_SP_CfgEr Input BOOL
Mismatch Error
PR1_Accel HP Accel in RPM/SEC AnalogInput REAL
PR2_Accel LP Accel in RPM/SEC AnalogInput REAL
PR3_Accel IP Accel in RPM/SEC AnalogInput REAL
All
HP Max Speed since last Zero
PR1_Max AnalogInput REAL
Speed in RPM
LP Max Speed since last Zero
PR2_Max AnalogInput REAL
Speed in RPM
IP Max Speed since last Zero
PR3_Max AnalogInput REAL
Speed in RPM
Current firmware overspeed
OS1_Setpoint_Fbk AnalogInput REAL
setpoint for HP shaft in RPM
Current firmware overspeed
OS2_Setpoint_Fbk AnalogInput REAL
setpoint for LP shaft in RPM
Current firmware overspeed
OS3_Setpoint_Fbk AnalogInput REAL
setpoint for IP shaft in RPM
L97HP_TST1 - On Line HP
OnLineOS1Tst Output BOOL
Overspeed Test
L97LP_TST1 - On Line LP
OnLineOS2Tst Output BOOL
Overspeed Test
L97IP_TST1 - On Line IP
OnLineOS3Tst Output BOOL
Overspeed Test
L97HP_TST2 - Off Line HP
OffLineOS1Tst Output BOOL
Overspeed Test
L97LP_TST2 - Off Line LP
OffLineOS2Tst Output BOOL
Overspeed Test
L97IP_TST2 - Off Line IP
OffLineOS3Tst Output BOOL
Overspeed Test

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Vars-Speed Variable Terminal Boards
Variable Direction Type
Description
TrpAntcptTst L97A_TST - Trip Anticipate Test Output BOOL TREG, TRES, TREL
PR_Max_Rst Max Speed Reset Output BOOL
L43EOST_ONL - Online HP
OnLineOS1X Output BOOL
Overspeed Test,with auto reset
Enable Test Mode for RBOS
feature for HP. RBOS1_Accel_
RBOS1_TestEnable Output BOOL
Test will be used as Accel input to
RBOS.
Enable Test Mode for RBOS
feature for LP. RBOS2_Accel_
RBOS2_TestEnable Output BOOL
Test will be used as Accel input to
RBOS.
Enable Test Mode for RBOS
feature for IP. RBOS3_Accel_Test
RBOS3_TestEnable Output BOOL
will be used as Accel input to
RBOS.
All
OS1_Setpoint HP Overspeed Setpoint in RPM AnalogOutput REAL
OS2_Setpoint LP Overspeed Setpoint in RPM AnalogOutput REAL
OS3_Setpoint IP Overspeed Setpoint in RPM AnalogOutput REAL
PR1 Overspeed Trip Setpoint in
OS1_TATrpSp AnalogOutput REAL
RPM for Trip Anticipate Fn
OSHW_Setpoint1 HP Overspeed Setpoint in RPM AnalogOutput REAL
OSHW_Setpoint2 LP Overspeed Setpoint in RPM AnalogOutput REAL
OSHW_Setpoint3 IP Overspeed Setpoint in RPM AnalogOutput REAL
Test Accel signal for RBOS
RBOS1_Accel_Test AnalogOutput REAL
feature for HP shaft, RPM/s
Test Accel signal for RBOS
RBOS2_Accel_Test AnalogOutput REAL
feature for LP shaft, RPM/s
Test Accel signal for RBOS
RBOS3_Accel_Test AnalogOutput REAL
feature for IP shaft, RPM/s

7.1.6.25 Variables Vars-Sync


Variable Vars-Sync Variable Direction Type Terminal Boards
Description
L25A_Cmd L25A Breaker Close Pulse Input BOOL TPRO, SPRO
BusFreq SFL2 hz AnalogInput REAL TPRO, SPRO
GenFreq DF2 hz AnalogInput REAL TPRO, SPRO
GenVoltsDiff DV_ERR KiloVolts rms - Gen Low AnalogInput REAL TPRO, SPRO
is Negative
GenFreqDiff SFDIFF2 Slip hz - Gen Slow is AnalogInput REAL TPRO, SPRO
Negative
GenPhaseDiff SSDIFF2 Phase degrees - Gen AnalogInput REAL TPRO, SPRO
Lag is Negative
SynCk_Perm L25A_PERM - Sync Check Output BOOL TPRO, SPRO
Permissive
SynCk_ByPass L25A_BYPASS - Sync Check Output BOOL TPRO, SPRO
ByPass

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7.1.6.26 Variables Vars-Trip
Variable Vars-Trip Variable Direction Type Terminal Boards
Description
ComposTrip1 Composite Trip 1 Input BOOL
WatchDog_Trip Enhanced diag - Watch Dog trip Input BOOL
StaleSpeed_Trip Enhanced diag - Stale Speed trip Input BOOL
SpeedDiff_Trip Enhanced diag - Speed Input BOOL
Difference trip
FrameMon_Flt Enhanced diag - Frame Monitor Input BOOL
Fault
Sil_Diag_Trip SIL Diagnostic Trip Input BOOL
PR1_Zero L14HP_ZE - HP shaft at zero Input BOOL
speed
PR2_Zero L14LP_ZE - LP shaft at zero Input BOOL
speed
PR3_Zero L14IP_ZE - IP shaft at zero speed Input BOOL
OS1_Trip L12HP_TP - HP overspeed trip Input BOOL
OS2_Trip L12LP_TP - LP overspeed trip Input BOOL
OS3_Trip L12IP_TP - IP overspeed trip Input BOOL
Dec1_Trip L12HP_DEC - HP Input BOOL
de-acceleration trip
All
Can only be reset when pulses are
able to be seen on speed input or
after the I/O pack is rebooted.
Dec2_Trip L12LP_DEC - LP de-acceleration Input BOOL
trip

Can only be reset when pulses are


able to be seen on speed input or
after the I/O pack is rebooted.
Dec3_Trip L12IP_DEC - IP de-acceleration Input BOOL
trip

Can only be reset when pulses are


able to be seen on speed input or
after the I/O pack is rebooted.
Acc1_Trip L12HP_ACC - HP acceleration Input BOOL
trip
Acc2_Trip L12LP_ACC - LP acceleration trip Input BOOL
Acc3_Trip L12IP_ACC - IP acceleration trip Input BOOL
TA_Trip Trip Anticipate Trip,L12TA_TP Input BOOL TREG, TRES, TREL

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GE Internal
Variable Vars-Trip Variable Direction Type Terminal Boards
Description
OS1HW_Trip L12HP_HTP - HP Hardware Input BOOL
detected overspeed trip
OS2HW_Trip L12LP_HTP - LP Hardware Input BOOL
detected overspeed trip
OS3HW_Trip L12IP_HTP - IP Hardware Input BOOL All
detected overspeed trip
L5CFG1_Trip HP Config Trip Input BOOL
L5CFG2_Trip LP Config Trip Input BOOL
L5CFG3_Trip IP Config Trip Input BOOL
L5ESTOP1 ESTOP1 Trip Input BOOL TREG, TREA
L5Cont1_Trip Contact 1 Trip Input BOOL TREG, TRES, TREL
L5Cont2_Trip Contact 2 Trip Input BOOL TREG, TRES, TREL
L5Cont3_Trip Contact 3 Trip Input BOOL TREG, TRES, TREL
L5Cont4_Trip Contact 4 Trip Input BOOL TREG, TRES, TREL
L5Cont5_Trip Contact 5 Trip Input BOOL TREG, TRES, TREL
L5Cont6_Trip Contact 6 Trip Input BOOL TREG, TRES, TREL
L5Cont7_Trip Contact 7 Trip Input BOOL TREG, TRES, TREL
LPShaftLock LP Shaft Locked Input BOOL
All
Cross_Trip L4Z_XTRP - Control Cross Trip Output BOOL

7.1.6.27 Variables VSen


Variable VSen Variable Description Direction Type Terminal Boards
VSen1 Voltage Sensor 1 Feedback Input BOOL TREA
VSen2 Voltage Sensor 2 Feedback Input BOOL TREA
VSen3 Voltage Sensor 3 - Power Monitor Input BOOL TREA
Feedback

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7.2 PPRO Specific Alarms
The following alarms are specific to the PPRO I/O pack.

40
Description Contact Excitation Voltage Test Failure

Possible Cause Voltage for the contact inputs on the trip board is not within published limits.

Solution Check source of contact excitation voltage applied to trip board.

50
Description Main Terminal Board Mismatch

Possible Cause The terminal board configured in the ToolboxST application does not match the actual hardware.

Solution Verify that the ToolboxST configuration matches the actual hardware. Build and download the configuration to
the I/O pack.

51
Description Trip Board Mismatch

Possible Cause The trip board configured in the ToolboxST application does not match the actual trip board hardware.

Solution Verify that the ToolboxST configuration matches the actual hardware. Build and download the configuration to
the I/O pack.

69-71
Description Trip Relay (ETR) Driver [ ] does not match commanded state

Possible Cause The driver output of the I/O pack for Emergency Trip Relay 1 (K1), ETR2 (K2), or ETR3 (K3) does not
match the commanded state. This indicates that the I/O pack does not see the relay command going out the DC-62 connector
into the expected terminating impedance on the trip board.

Solution

• Check the I/O pack connector seating on the terminal board.


• Check the trip board cable seating (if not TREA) and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

72-74
Description Econ Relay Driver [ ] does not match commanded state

Possible Cause The driver output of the I/O pack for Economizing Relay KE1, KE2, or KE3 does not match the
commanded state. This indicates that the I/O pack does not see the relay command going out the DC-62 connector into the
expected terminating impedance on the trip board.

Solution

• Check the I/O pack connector seating on terminal board.


• Check the trip board cable seating and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

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GE Internal
75
Description Servo Clamp Relay Driver does not match commanded state

Possible Cause The driver output of I/O pack for K4CL does not match the commanded state. This indicates that I/O
pack does not see the relay command going out the DC-62 connector into the expected terminating impedance on the trip
board.

Solution

• Check the I/O pack connector seating on terminal board.


• Check the trip board cable seating and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

76
Description K25A Relay (synch check) Driver does not match commanded state

Possible Cause The driver output of I/O pack for K25A does not match the commanded state. This indicates that I/O
pack does not see the relay command going out the DC-62 connector into the expected terminating impedance on the trip
board.

Solution

• Check the I/O pack connector seating on terminal board.


• Check the trip board cable seating and the cable integrity.
• One at a time, replace the following: the emergency trip board cable, the trip terminal board, the terminal board hosting
the I/O pack, and the I/O pack.

83-85
Description Trip Relay (ETR) Contact [ ] does not match commanded state

Possible Cause

• Relay feedback from Emergency Trip Relay ETR1 (K1), ETR2 (K2), or ETR3 (K3) does not match the commanded
state. This indicates that the relay feedback from the trip board does not agree with the commanded state.
• Solenoid power is not applied to the trip board.

Solution

• Check the trip board relays, as well as the cable from trip board to main terminal board (if not TREA).
• Check that solenoid power is applied to the terminal board.

86-88
Description Econ Relay Contact [ ] does not match commanded state

Possible Cause The relay feedback from Economizing Relay 1 (KE1), KE2, or KE3 does not match the commanded
state. This indicates that the relay feedback from the trip board does not agree with the commanded state.

Solution Check the trip board relays, as well as the cable from trip board to main terminal board.

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89
Description Servo Clamp Relay Contact does not match commanded state

Possible Cause The relay feedback from K4CL does not match the commanded state. This indicates that the relay
feedback from the trip board does not agree with the commanded state.

Solution

• Check the I/O pack connector seating on the terminal board.


• Check the trip board cable seating and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

90
Description K25A Relay Coil Feedback does not match commanded state

Possible Cause The relay feedback from K25A does not match the commanded state. This indicates that the relay
feedback from the trip board does not agree with the commanded state. Relay feedback is taken after hardware command
voting on the trip terminal board has occurred; therefore, a probable cause is that one I/O pack is not commanding the same
state as the other two I/O packs.

Solution

• Verify that the K25A Relay is supported on the paired PTUR terminal board.
• Confirm that the TMR packs are commanding the same state for K25A.
• Check the I/O pack connector seating on the terminal board.
• Check the trip board cable seating and the cable integrity.
• One at a time, replace the following: the emergency trip board cable, the trip terminal board, the terminal board hosting
the I/O pack, and the I/O pack.

97
Description Solenoid Power Source is missing

Possible Cause Solenoid power monitoring provided by the trip board indicates the absence of power.

Solution

• Check the source of solenoid power.


• Confirm that the wiring between the trip boards is correct.

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GE Internal
99-101
Description Solenoid Voltage [ ] does not match commanded state

Possible Cause

• The solenoid voltage associated with K1-K3 does not match the commanded state.
• K1-K3 are closed, but no voltage is detected on the solenoid.
• Solenoid voltage was removed through another means while the I/O pack expects to detect its presence.
• The ETR state associated with this PPRO is being out voted by the other two PPROs.

Solution

• This may be due to removal of solenoid voltage through another means when the I/O pack expects to see it.
• Review the system-level trip circuit wiring and confirm the voltage should be present if the I/O pack energizes the
associated trip relay.
• From the ToolboxST application, verify that the variables (typically L20PTR#) which drive the Primary Trip Relays
(PTRs) in the PTUR are correctly assigned to the PPRO Variables tab (PTR1, PTR2, and PTR3).
• Check the pre-voted values for ComposTrip1 under the Vars-Trip tab to verify that all three PPROs have the same status.
If the current PPRO differs from the others, check the pre-vote status of other variables under this tab to determine the
exact cause of the composite trip and correct the condition.

105
Description TREL/S, Solenoid Power, Bus A, Absent

Possible Cause TRES/TREL solenoid power A is absent. Solenoid power does not match the solenoid state for longer
than 40 ms.

Note This diagnostic alarm can be turned off if required. From the PPRO Parameters tab, change the value of
DiagSolPwrA to Disable.

Solution

• Check power applied to the trip board.


• Check the field wiring.
• Check the solenoid.
• Replace the terminal board.

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106
Description TREL/S, Solenoid Power, Bus B, Absent

Possible Cause TRES/TREL solenoid power B is absent. The solenoid power does not match the solenoid state for
longer than 40 ms.

Note This diagnostic alarm can be turned off if required. From the PPRO Parameters tab, change the value of
DiagSolPwrB to Disable.

Solution

• Check power applied to the trip board.


• Check the field wiring.
• Check the solenoid.
• Replace the terminal board.

107
Description TREL/S, Solenoid Power, Bus C, Absent

Possible Cause TRES/TREL solenoid power C is absent. The solenoid power does not match The solenoid state for
longer than 40 ms.

Note This diagnostic alarm can be turned off if required. From the PPRO Parameters tab, change the value of
DiagSolPwrC to Disable.

Solution

• Check power applied to the trip board.


• Check the field wiring.
• Check the solenoid.
• Replace the terminal board.

108
Description Control Watchdog Protection Activated

Possible Cause An alarm indicates that the ContWdog variable has not changed for five consecutive frames. The alarm
clears if changes are seen for 60 seconds.

Solution

• Verify that the ContWdog is connected to the output of a DEVICE_HB block and that the block is located in a task which
is run at frame rate.
• Verify that the output signal from the block is changing at least once a frame.

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109
Description Speed Difference Protection Activated

Possible Cause This alarm only occurs if the parameter SpeedDifEnable has been enabled. An alarm indicates that the
difference between the output signal Speed1 and the first I/O pack pulse rate speed is larger than the percentage OS_DIFF for
more than three consecutive frames. The percentage is based off of the parameter RatedRPM_TA. The alarm clears if the
difference is within limits for 60 seconds for more than three consecutive frames.

Solution Verify that the Speed1 signal is set up correctly in the ToolboxST and that the source of the signal reflects the
primary (PTUR/YTUR) pulse rate speed.

110
Description Stale Speed Protection Activated

Possible Cause The speed trip protection may be stale. This alarm can only occur if the parameter StaleSpdEn has been
enabled. An alarm indicates that the variable Speed1 has not changed for 100 consecutive frames. The alarm clears if the
speed dithers for 60 seconds.

Solution Verify that the Speed1 signal is set up correctly in the ToolboxST configuration, and that the source of the signal
reflects the primary (PTUR/YTUR) pulse rate speed.

111
Description Frame Sync Monitor Protection Activated

Possible Cause This alarm indicates that the communication with the controller was lost for at least five consecutive
frames after the I/O pack was online. The alarm clears if the frame synch is established for at least 60 seconds.

Solution Verify that the IONet is healthy. This indicates that the I/O pack is not synchronized with the Mark VIe
start-of-frame signal.

112-114
Description Overspeed [ ] firmware setpoint configuration error

Possible Cause There is a firmware over-speed limit mismatch between IO signal space limit and the configuration. The
current configuration file downloaded from the ToolboxST application has a different over-speed limit than the IO signal
OS[]_Setpoint.

Solution Change the output signal designated in OS[]_Setpoint (Vars-Speed tab) to match the configuration value
OS[]_Setpoint (Pulse Rate tab).

115-117
Description Overspeed [ ] hardware setpoint configuration error

Possible Cause There is a hardware over-speed limit mismatch between IO signal space limit and the configuration. The
current configuration file downloaded from the ToolboxST application has a different over-speed limit than the IO signal
OSHW_Setpoint[ ].

Solution Change the output signal designated in OSHW Setpoint [ ] (Vars-Speed tab) to match the configuration value in
OSHW_Setpoint (Pulse Rate tab).

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118-120
Description Overspeed [ ] hardware setpoint changed after power up

Possible Cause This alarm always occurs when PulseRate[ ] parameter OSHW_Setpoint is changed and downloaded to
the I/O pack after the turbine has started. It can also change if PRScale is changed to a decimal value and downloaded to the
I/O pack after the turbine has started.

Solution Confirm that the limit or scale change is correct. Restart the I/O pack to force the hardware overspeed to
re-initialize the limit.

121
Description TREA - K1 solid state relay shorted

Possible Cause The TREA provides voltage-based detection of relays that remain in the energized position in the six
voting contacts used to provide K1. Zero voltage has been detected on one or more contacts of K1 when voltage should be
present.

Solution Replace the TREA.

122
Description TREA - K2 solid state relay shorted

Possible Cause TREA provides voltage based detection of relays that remain in the energized position in the six voting
contacts used to provide K2. Zero voltage has been deleted on one or more contacts of K2 when voltage should be present.

Solution Replace the TREA.

123
Description LED - Turbine RUN permissives lost

Possible Cause The RUN LED is lit red on the I/O pack because one of the RUN permissives for the turbine has been
lost. The LedDiags parameter must be set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiag parameter.


• From the Vars-Trip tab, identify the condition that caused the trip.
• The condition leading to a trip condition must be cleared, and a master reset issued.

124
Description LED - Overspeed fault detected

Possible Cause The Overspeed LED is lit on the I/O pack because of a detected Trip condition. The LedDiag parameter
must be set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiag parameter.


• The condition leading to a trip condition must be cleared, and a master reset issued.

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125
Description LED - Estop detected

Possible Cause The Estop LED is lit on the I/O pack because of a detected Estop signal. The LedDiag parameter must
be set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiag parameter.


• Remove the Estop condition, and issue a master reset.

126
Description LED - Synch fault detected

Possible Cause

• The Synch LED is lit on the I/O pack because of a failure to synchronize. The LedDiag parameter must be set to Enable
to get this alarm.
• The K25A Relay is not enabled to support synchronization

Solution

• Verify the configuration of the LedDiag parameter.


• Verify that the K25A Relay is enabled.
• Issue a master reset to clear the alarm until the next failed attempt to synchronize.

127
Description Configuration changed after power up - running with old configuration

Possible Cause SIL related configuration parameters have changed after going online. The following parameters may not
change after going online while SilMode is enabled:

• SILMode
• PRType cannot go from/to Unused
• Contact Input TripMode/Used/Unused
• TurbineType
• EstopEnab (TREA only)

Note PRScale may not change regardless of SilMode.

Solution

• From the Parameters tab, verify that SilMode is set correctly. Set the parameters to their original state and download
them to the PPRO if they have been changed inadvertently.
• Refer to the error log to determine which parameter may have changed. From the ToolboxST application, right-click
IOPack and select Troubleshooting, Advanced Diagnostics, and Error log.
• Remove power from the I/O pack to get the hardware to accept the new values if changes are required.

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128
Description PPRO module is not SIL compatible - remain offline

Possible Cause One or more of the boards in the PPRO module is not SIL compatible. The PPRO will not go online in
this condition.

Solution

• Verify that the I/O pack(s), trip board(s), and terminal board(s) are all S-board revision types. Replace all H-board
revisions with their compatible S-board revisions. Refer to the PPRO help file, the section, Compatibility.
• If SIL is not required, change the SilMode parameter to Disable.

129
Description Tripped - Missing pulse rate signal

Note This diagnostic is generated from hardware detection that is only available on PPRO_1B I/O packs. PPROH1A I/O
packs will not detect this condition the same way.

Possible Cause No speed input detected on a speed sensor due to the following reasons:

• Broken wire
• Sensor malfunction
• Signal conditioning malfunction

Note This condition will cause a trip on SIL3 systems.

Solution

• Examine the PreVote values for the PulseRate signals to determine which PulseRate is affected.
• Check the terminal connections for the failed speed sensor.
• Check the speed sensor gap.

130
Description Processor hardware error detected (Error Code) [ ]

Possible Cause Hardware error detected by the FPGA as follows:

• Error code 1: FPGA program changed during runtime, possibly one-time event
• Error code 2: clock oscillator error

Note These conditions cause a trip that can only be cleared with a power cycle.

Solution

• Restart the I/O pack.


• Download firmware of the I/O pack.
• Replace the I/O pack.

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131
Description The configuration is not supported for SIL mode

Possible Cause SilMode is Enable and one of the following conditions is true:

• TREA is used
• TRES/L is selected
• QC Mode enabled
• Configured as a LargeSteam turbine

Note This condition causes a trip that can only be cleared by changing the configuration and restarting the I/O pack.

Solution

• Correct the configuration to be valid.


• Change SilMode to Disable.

132
Description Rate-based Overspeed detection not supported on this hardware

Possible Cause The Rate-based Overspeed (RBOS) detection feature is not enabled on this module because it is not
supported on the PPROH1A. This is likely caused by installing a PPROH1A in place of a PPROS1B without updating the
ToolboxST configuration.

Note If this diagnostic alarm is active, the RBOS protection feature is not running on the specified I/O module.

Solution

• Install the PPROS1B module.


• Disable the RBOS feature for all shafts.

224-239
Description Input Signal [ ] Voting Mismatch, Local=[ ], Voted=[ ]

Possible Cause Within the TMR I/O pack set, one of the same input signals does not match the other two of the same
input signals.

Solution

• Adjust the TMR threshold limit or correct the cause of the difference.
• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and the networking.
• Check the I/O pack mounting on terminal board.
• Verify the operation of the device generating the specified signal.
• Verify the terminal board wiring and connections.
• Replace the I/O pack.

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1064-1255
Description Logic Signal [ ] Voting Mismatch

Possible Cause Within the TMR I/O pack set, one of the same logic signals does not match the other two of the same
logic signals.

Solution

• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and the networking.
• Check the I/O pack mounting on the terminal board.
• Verify the operation of the device generating the specified signal.
• Verify the terminal board wiring and connections.
• Replace the I/O pack.

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7.3 Mark VIeS YPRO Backup Turbine Protection I/O Pack
The Backup Turbine Protection (YPRO) I/O pack and associated terminal boards
provide an independent backup overspeed protection system with a backup check for
generator synchronization to a utility bus. They also provide an independent watchdog
function for the primary control. The YPRO has Ethernet connections for IONet
communications with the control modules.

A typical protection system consists of three TMR YPRO I/O packs mounted to
separate simplex protection (SPRO) terminal boards or three TMR YPROs mounted to
one TPROS#C terminal board. A cable, with DC-37 pin connectors on each end,
connects each terminal board to the designated TREG trip board. An alternate
arrangement puts three YPRO I/O packs directly on the TREA for an aeroderivative
TMR protection system.

The Mark VIeS Safety control is designed with primary and backup trip protection that
interacts at the trip terminal board level. Primary protection is provided with the YTUR
I/O pack, which operates a primary trip board (TRPG, TRPA). Backup protection is
provided with the YPRO I/O pack operating a backup trip board (TREG, TREA).
Infrared Port Not Used
YPRO accepts three speed signals. It monitors the operation of the primary control and
can monitor the primary speed as a sign of normal operation. YPRO monitors the status
and operation of the selected trip board through a comprehensive set of feedback
signals. If a problem is detected, YPRO will trip the backup trip relays on the trip board
and activate a trip on the primary control. The I/O pack is fully independent of and
unaffected by the primary control operation.

A maximum of three trip solenoids can be connected between the primary and backup
trip terminal boards. Connecting a solenoid between the boards isolates the power on
both sides of the solenoid and provides visibility of solenoid voltage as a system
feedback. The primary/backup trip boards TRPG/TREG are designed to operate as a
pair and use cabling between the boards for system connections. TRPA and TREA are
designed with no pairing required and can be used independently of each other. When
TRPA and TREA are paired, they function the same as other board pairs.

In following figure, the YTUR and YPRO I/O packs share in the turbine protection scheme. Either one can independently trip
the turbine using the relays on TRPG or TREG.

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7.3.1 Compatibility
The YPROS1A I/O pack mounts directly onto the SPRO, TPROS#C, or TREA terminal board. When mounted onto the
SPRO or TPROS#C, it is cable-compatible with the TREG. The following table lists all compatible boards.

Board TMR Simplex Output Output ESTOP Input Input Econo-


Contacts, Contacts, Contacts, 125 Contacts, 24 my
125 V dc 24 V dc V dc V dc Resistor
TPROS#C Yes No
SPROS1A Yes1 Yes
1 with three SPROs

TREGS1B Yes No Yes Yes Yes Yes No Yes


TREGS2B Yes No No Yes
TREGS3B ** Yes No Yes No
JX1 28 V dc
TREGS4B ** Yes No Yes No
JY1 28 V dc
TREGS5B ** Yes No Yes No
JZ1 28 V dc
** TREG S3, S4, and S5 versions are the same as the S1 except that power is provided by JX1, JY1, or JZ1.
TREAS1A Yes No No Yes Yes No No No
TREAS2A Yes No
TREAS3A *** No Yes
TREAS4A *** Yes No
*** TREA S3 and S4 are the same as S1 and S2, only euro versions.

Simplex Main Control with TMR backup protection is supported by all Mark VIeS backup trip boards. In this
configuration, one port on each of three YPRO I/O packs hooks into the controller IONet.
Dual Main Control with TMR backup protection is supported by all Mark VIeS backup trip boards (TREG and TREA).
This configuration uses the dual controller TMR output standard network connection. The first YPRO pack has one network
port connected to the R controller network. The second pack has one network port connected to the S controller network. The
third pack has one network port connected to the R controller network and one network port connected to the S controller
network. The third YPRO monitors the operation of both controllers. The pack trips if either controller malfunctions or both
controllers malfunction.
Triple Main Control with TMR Backup protection is supported when operating with a TMR main control, two out of three
(2oo3). All Mark VIeS backup trip boards support this configuration. The normal network configuration connects the first
YPRO I/O pack to the R network, the second to the S network, and the third to the T network.

Note YPRO TMR applications do not support dual network connections for all three YPROs. In a redundant system there is
no additional system reliability gained by adding network connections to the first two YPROs with dual controllers or any of
the three YPROs with TMR controllers. The additional connections simply reduce mean time between failures (MTBF)
without increasing mean time between forced outages (MTBFO).

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7.3.2 Installation
The YPRO mounts directly on the SPROS1A, TPROS#C, or TREAS#A terminal board. When mounted on the SPRO or
TPRO, cables with DC-37 pin connectors on both ends are required between the terminal board and the selected TREG trip
board. The TREG terminal board connects to the SPRO or TPRO terminal board.

➢ To install the YPRO I/O pack


1. Securely mount the SPRO, TPRO, or TREA terminal board.
2. If SPRO or TPRO is used, mount the desired TREG trip terminal board and connect the DC-37 cable between the trip
board and terminal board.
3. Depending on terminal boards used, directly plug all three YPRO I/O packs as follows.
a. Plug one YPRO I/O pack into each of the three SPROs.
b. Plug all three YPRO I/O packs into one TREA.
c. Plug all three YPRO I/O packs into one TPRO.
4. Slide the threaded posts on YPRO, located on each side of the Ethernet ports, into the slots on the terminal
board-mounting bracket.
5. Adjust the bracket location so the DC-62 pin connector on YPRO and the terminal board fit together securely. Tighten the
mounting bracket. The adjustment should only be required once in the life of the product.
6. Securely tighten the nuts on the threaded posts locking YPRO in place.
7. Plug in one or two Ethernet cables depending on the system configuration. The YPRO is not sensitive to Ethernet
connections and selects the proper operation over either port.
8. Apply power by plugging in the power connector on the side of the I/O pack. It has inherent soft-start capability that
controls current levels upon application.
9. Use the ToolboxST* application to configure the I/O pack as necessary. Refer to GEH-6705, ToolboxST User Guide for
Mark VIeS Safety Control for more information.

7.3.2.1 Connectors
• A DC-62 pin connector on the underside of the I/O pack connects directly to the terminal board. The connector contains
the signals needed to sense inputs and operate a trip terminal board.
• An RJ-45 Ethernet connector named ENET1 on the side of the pack is the primary system interface.
• A second RJ-45 Ethernet connector named ENET2 on the side of the I/O pack is the redundant or secondary system
interface.
• A 3-pin power connector on the side of the I/O pack is for 28 V dc power for the I/O pack and terminal board.

Note If the trip terminal board features contact trip inputs, the power for those contacts is provided through a separate
terminal board connector, not from the 28 V dc power source.

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7.3.3 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Safety Module Alarms

7.3.3.1 Application-specific Hardware


The I/O pack has an internal, application-specific circuit board (BPRO) that contains the hardware needed for the turbine
backup trip function. The application board connects between the processor and either the SPRO, TPRO, or TREA terminal
board. The application board has provisions for additional hardware expansion options that can be added through a dedicated
header.

3 Pulse Rate ID Chip


Input
Conditioning
To I / O Pack

2 PT Input
12 Digital Signal Processor
Inputs, E-Stop
7 Isolated
Contact Inputs
8 Relay
DC - 6 2

Command
Outputs Processor

Pass Through to Local Power


Option Supplies
Option Header

BPRO Application Board

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7.3.3.2 Protective Functions
The I/O pack performs the following protective functions in a mix of hardware, programmable logic, and firmware. In the
following diagram, standard symbols for time delay contacts have been used:

In the following diagrams, a standard has been used to indicate signal origin and flow.

• Signal names that end with (SS) are created within the I/O pack and the data flow is out to the controller through signal
space.
• Signal names that end with SS are created in the controller and the data flow is into the I/O pack through signal space.
• Signal names that end with (IO) are created within the I/O pack and the data flow is out to the hardware.
• Signal names that end with IO indicate the signal is a hardware input into the I/O pack.
• Signal names that end with anything containing CFG are part of the I/O pack configuration. In this case an attempt has
been made to indicate what area of the I/O pack configuration contains the variable.
• When J3 is referenced in a CFG, it refers to the connection point for the turbine backup trip relay board, and the
corresponding configuration values.
• The combination IO (SS) indicates a signal that comes from the hardware inputs to the I/O pack, and is then sent out to
the controller as part of signal space.
If there is no special ending on a signal name, then the signal is used internal to the I/O pack and is not part of the hardware or
signal-space data movement. This signal is not available or visible to applications, but it is needed to adequately describe the
I/O pack’s operation.

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7.3.3.3 Direct/Conditional Discrete Input Trip
The I/O pack supports the seven isolated discrete contact input trip signals provided on the backup turbine trip board. In the
following figure, the direct / conditional determination is implemented in firmware while Contact#, and L5Cont#_Trip are in
hardware logic. When configured for direct trip, the firmware is not in the trip path. When configured for conditional trip, the
firmware determines the communication health (displayed as network_keepalive) and populates the programmable logic with
the conditional signal from signal space. If the controller communication is lost, the default will permit any conditional trip.

Note The contact inputs include an 8 ms contact de-bounce filter to protect against false trips.

A
network _keepalive
A>=B
B L3SS_Comm, (SS)
3

Trip#_Inhbt , SS L3SS_Comm, (SS) Inhbt#_Fdbk , (SS)


A
Trip_Mode , CFG (J3, Contact #)
A=B
B Cont#_TrEnab , (SS)
Direct, CNST
A
A=B
B
Conditional , CNST Trip#_EnCon, (SS)

Contact #, (IO) Cont#_TrEnab L5Cont#_Trip, (SS)


Includes 8 mSec
CONTACT#
digital filter on close ,
no delay on open TRIP
Trip#_EnCon Inhbt#_Fdbk , SS

L5Cont#_Trip , (SS) L86MR, SS

Note: The contact circuit in this diagram is duplicated 7 times. To obtain the correct signal name,
replace the symbol # with the numbers 1-7. Signal names without # appear only once for all 7
circuits (L3SS_COMM, L86MR).

Contact Input Trips

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The resulting contact trip signals are combined into a single contact trip summary, L5Cont_Trip.

Contact Input Trip Signal Concentration

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7.3.3.4 Firmware Overspeed Trip
Firmware overspeed protection is performed on the three values that come out of the high speed select. Although the
established standard for naming these three inputs is HP, IP, and LP, the three inputs are free to be applied as needed in a
system design.

Note The following pulse rate variables are displayed using a # symbol. Replace the # with 1 for HP, 2 for LP, or 3 for IP.

OS1_ Setpoint,SS
RPM A |A|
A-B A A
OS1_SP_ CfgEr
OS _ Setpoint, CFG (J5,PulseRate #) A>B
B 1 RPM System Alarm, if the two setpoints
RPM B do not agree
A
MIN
B

OS _Stpt_PR # OS _Setpoint_ PR #

A A
A+B zero
MULT A
0.04
B MIN B
OS_Tst_Delta, CFG (J5,PulseRate #)
B
RPM
OfflineOS # tst, SS
OnlineOS # tst, SS

PulseRate #, IO
A
OS1
A>=B
OS_ Setpoint _ PR #
B

OS#_SP_CfgEr L5 CFG #_ Trip


PR #_Zero

OS# HW_ SP_ CfgEr

L5 CFG #_Trip L86 MR, SS

OS1_ Trip
OS1
Overspeed
Trip
OS1_Trip L86MR,SS

Firmware Overspeed

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Firmware Overspeed Trip functions include:

• Fault on overspeed threshold match failure between config and signal space values when speed is zero
• Pick the lower threshold from config or signal space
• Provide a mechanism to zero the threshold for online overspeed test
• Provide a mechanism to modify the threshold for offline overspeed test, bounded to limit increases to the threshold to
104%

Note Use a negative OS_Tst_Delta value to reduce the threshold during testing.

• Compare the threshold to the calculated speed and latch overspeed

7.3.3.5 Hardware Overspeed Trip


The following pulse rate variables are displayed using a # symbol. Replace the # with 1 for HP, 2 for LP, or 3 for IP. OSHW_
Setpoint only goes into the hardware at I/O pack startup.

OSHW_ Setpoint #, SS
A
Generate an alarm if the hardware is
|A- B| A different than the firmware trip
OSHW _ Setpoint ,CFG OS # HW_ SP_ CfgEr ( SS)
B A> B
(PulseRate #)
1RPM
B
OS_ Setpoint Generate an alarm if the hardware
A setpoint changes after power - on
HW Value
OS # HW_ SP_ Pend ( SS)
| A- B|

PulseRate #,
A
HWIO
A> =B

B OS # HW

Hardware
Overspeed
OS# HW OS # HW _Trip Trip
( SS )

OS # HW _Trip, ( SS) L 86MRX

Speed#Updating
Hardware Overspeed Trip, HP Shaft

Note Refer to the section Shaft Speed Accel, Decel, and Zero for the definition of Speed#Updating.

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Hardware Overspeed Trip functions include:

• Load the independent hardware overspeed set point only when the I/O pack restarts or is power cycled
• Generate an alarm when the hardware configuration set point is >1 Hz different from the value passed through signal
space from the application configuration

Note Hardware overspeed detection involves two rotations of the shaft to determine an overspeed condition.

• Generate an alarm and signal space Boolean when the set point in configuration fails to match the value stored in the
hardware

• Implement speed calculation and the trip logic entirely inside programmable logic
• Overspeed trip response typically less than 60 ms at normal operating speeds

Note There is no separate enable or disable signal for this overspeed protection. The disable signal is created by setting a
high overspeed point value. The calculated speed will never reach the value needed to trigger OS1HW.

The actual hardware implementation depends on two configuration items:

• OSHW_Setpoint specifies the overspeed trip level in RPM.


• PRScale determines the number of speed sensor pulses per revolution used to convert pulse rate into RPM for both
hardware and firmware overspeed value.
The hardware implementation requires two adjacent revolutions exceeding the OSHW_Setpoint to trip the system. When a
trip is present, the setting of OSHW_Setpoint is reduced by a small amount in the hardware to provide a clean trip signal. Due
to this reduction, speed must be reduced well below the overspeed threshold before a reset may take place. Because there are
set limits to the time integration used in the hardware detector, the minimum RPM setting for the OSHW_Setpoint is
approximately four RPM.

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7.3.3.6 LP Shaft Locked Detection
This is another protection function that is in addition to the overspeed protection. LP Shaft Locked Detection generates a
signal if the first pulse rate signal is above minimum speed, and the second pulse rate signal is still at zero.

PR1_MIN PR2_Zero, (SS)

LockRotorByp, SS LPShaftLock, (SS)

LPShaftLock, (SS) L86MR, SS

LP Shaft Locked Detection

7.3.3.7 YPRO E-Stop


The I/O pack monitors the E-Stop trip signal that is present on the TREG or TREA terminal boards and uses it to cross trip
the main control in the event E-Stop is invoked. It is also used within the pack logic as part of the trip relay output command.
The relays are not required to close if the E-Stop signal is present. The main control counterpart is also present. If the main
control votes to trip, it can also cross-trip the corresponding I/O pack.

J 3 = TREA EstopEnab, CFG


HwEstop1 , IO KESTOP 1_Fdbk , (SS )

J3 = TREG

J3 = TREA EstopEnab, CFG


KESTOP1_Fdbk , (SS) L5ESTOP1 , ( SS )

J3 = TREG ESTOP 1
TRIP

L5ESTOP1 , ( SS ) L86MR , SS

YPRO Contact Input E-Stop

Note There are several inversions in the hardware signal path, but the end result is that KESTOP#_Fdbk is only a 1 when
E-Stop is energized. Therefore, 1 = OK. The TREL and TRES terminal boards do not have E-Stop capability because it is on
the primary trip boards TRPL and TRPS.

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7.3.3.8 YPRO Speed Difference Detection
There should never be a reason why the speed calculated by the I/O pack is significantly different from the speed calculated
by the main control. Speed difference detection looks at the difference in magnitude between pulse rate 1 from both the pack
and the main control. If the difference is greater than the set threshold for three successive samples, a SpeedDifTrip is latched.
If the main control recovers for 60 seconds, the trip is removed. This allows the main control to recover with subsequent
re-arming of the backup protection.

Speed 1, SS
A A
PulseRate1 |A-B|
A Speed1_Diff
B
(RPM), IO OS_Diff, CFG (%) A>B B (A&B&C)
Rated RPM_TA,
B
100 CFG (RPM) C

SpeedDifEn , Card CFG

Speed1_Diff Speed_Diff_Trip
Enable Speed
Difference
Tip
L86 MR, SS Speed1_Diff Close
immediately , 60 second
delay on opening
Speed_Diff_Trip
YPRO Speed Difference Detection
When configured for dual controller, additional logic is added so that separate speed inputs from the two controllers come into
the I/O pack. This trip logic acts as if both controllers have a speed error, but continues to run if one controller has a valid
speed signal.

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7.3.3.9 Maximum Speed Hold
The I/O pack provides a maximum speed hold function that resets when:

• Using the command PR_Max_RST (from signal space)


• PR1_Zero changes to false when the shaft first starts turning
Output values are PR1_Max, PR2_Max, and PR3_Max. These signals are used to determine the maximum speed obtained
while running or after stopping a turbine.

7.3.3.10 Overspeed Test Logic, Steam Turbine


The signal OnLineOS1Tst is used for PulseRate1, OnLineOS2Tst is used for PulseRate2, and OnLineOS3Tst is used for
PulseRate3. In the following figure, there is another signal, Online OS1X, which initiates an online overspeed test for
PulseRate1. This signal also creates a 1.5 second reset pulse when removed.

Online Overspeed Test Logic

Note If the K4CL relay is enabled during an online Overspeed test, use the OnlineOS1X option and not the OnlineOS1Tst.
This will avoid an unwanted K4CL activation.

7.3.3.11 Speed State Boolean Values


The I/O pack has detection for zero speed from a set point with 1 RPM hysteresis. The I/O pack calculates a minimum speed
signal from a set point. The rate of change of speed from a set point is calculated resulting in a selectable acceleration trip. A
deceleration trip is then determined from a fixed 100% / second rate.

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7.3.3.12 Shaft Speed Accel, Decel and Zero
The I/O pack has detection for zero speed from a set point with 1 RPM hysteresis. The I/O pack calculates a minimum speed
signal from a set point. The rate of change of speed from a set point is calculated, resulting in a selectable acceleration trip. A
deceleration trip is then determined from a fixed 100% / second rate.
The acceleration for a given pulse rate (PR#_Accel) is calculated by computing two adjacent shaft speeds over a period of
AccelCalType ms each by computing change in pulse counts, and then computing the difference in these speeds divided by
AccelCalType ms to get the acceleration of the shaft.
In the following figures, pulse rate variables are displayed using a # symbol. Replace the # with 1 for HP, 2 for LP, or 3 for IP.
This figure is the same for PulseRate1, 2, and 3. Simply replace the 1 with a 2 or 3 to get the signal name. The contact, PR#_
Min, in the Acc1_Trip is only present for PR2 (PR2_Min) and PR3 (PR3_Min). It is not used for PR1.

PR_Zero
Hyst
1

0
PulseRate #, IO 0 RPM
(RPM) CFG

A
Zero_Speed, CFG A<B
(PulseRate #) PR#_Zero
B
(SS)
A
A+B
1 RPM
B PR #_Zero
A
A>B
Min_Speed, PR#_Min
CFG(PulseRate #) B

Speed State Boolean Values

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The pulse rate inputs have special detection for loss of signal, and special filtering to remove input noise from nearly
stationary shaft speeds.

PulseRate #, IO

Speed Wheel Pulse


Detected Window Speed #Updating
Speed
Inactive Counter Updating
Based on last speed Normally
(Maximum 24
seconds )

(Pulse Rates in Hz ) A Shaft # Turning


Allow Accel /
A > B
Decel Trip
75 Hz
B

1 Second Delay

1 **


Speed # Updating Shaft # Turning Decel #Trip Loss of
Pulse Rate

Decel #Trip †
can only be reset when
Speed #Updating becomes True
(pulses are able to be seen ) or
** 1 = Normal Operation after the I/O pack is rebooted
Pulse Rate Conditioning

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Decel#Trip
PulseRate#
(RPM)
A PR#_DEC

(From GearSpeed) A OR
Speed#Updating
A<B B
-100%/SEC**
S
B
(Der)
Shaft#Turning

%/Sec A PR#_ACC
0 %/Sec

A AND

A>B B
Acc_Setpoint, CFG (J5, PulseRate#)
B

PR#_DEC Dec#_Trip, (SS)

Dec#_Trip L86MR,SS

Acc_Trip, CFG (J5, PulseRate#)

Enable Acc#_Trip, (SS)


PR#_ACC PR#_MIN **
Acc#_TrEnab

HP, IP and LP Shaft Accel Decel Trip Logic


Acc#_Trip L86MR,SS
Note: PR#_MIN is not used on ACC1_Trip.
PR2_Min is used on ACC2_Trip and
PR3_Min is used on ACC3_Trip.

**Note: Where 100% is defined as the OS Setpoint.

Shaft Speed Accel, Decel and Zero

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7.3.3.13 Trip Anticipate Function
Steam turbine applications provide a speed trip that uses a live set point from signal space. This overspeed trip is vigorously
changed as a function of turbine load. This function does the following:

• Input set point is OS1_TATrpSp from signal space. Input rated RPM is specified by RatedRPM_TA as part of the I/O
pack configuration. Function test request input is TrpAntcptTst from signal space.
• If (OS1_TATrpSP is < 103.5% OR > 116% of RatedRPM_TA) then TA_Spd_Sp (the local set point value) = 106% of
RatedRPM_TA and TA_StptLoss (Signal space) is true and alarm L30TA is declared. Otherwise, TA_Spd_Sp = OS1_
TATrpSP.
• If TrpAntcptTst is true, decrease the current value of TA_Spd_Sp by 1RPM / second. Set the minimum value of
RatedRPM_TA to 94%. If TrpAntcptTst is false, the value of TA_Spd_Sp from above is immediately used.
• If PulseRate1 (Speed input 1 from the pulse rate input) > TA_Spd_Sp the internal value Trp_Anticptr is set properly.
• If the I/O pack is configured for steam turbine application (internal value SteamTurbOnly), then TA_Trip (signal space)
equals the value of Trp_Anticptr.

Note The I/O pack mounted on a TREA does not toggle the relays for trip anticipate function.

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GE Internal
7.3.3.14 Solenoid Voltage / Power Sense
The I/O pack provides three comparator voltage inputs used to monitor solenoid power or solenoid voltage depending on the
trip card that is connected. SOL1_Vfdbk (SS), SOL2_Vfdbk (SS), and SOL3_Vfdbk (SS) are generated from the input
signals.

7.3.3.15 Main Control Watchdog


A standard control watchdog function is provided by the I/O pack. In this function, a value from a Device Heartbeat
(DEVICE_HB) block is passed from the main controller to the I/O pack each data frame. If the I/O pack stops detecting the
value from the main controller, a counter is incremented and, after five data frames, leads to a trip. If the main controller
recovers for 60 seconds, the trip is removed, allowing for the recovery of the main controller with subsequent re-arming of the
backup protection. The recovery function is provided for typical activities such as cycling power on a controller to perform
maintenance.
While the controller is offline, the I/O pack associated with that controller will vote to trip. When the controller returns to
operation, the I/O pack will remove the vote to trip. The watchdog offers monitoring of two main controllers in the event both
Ethernet ports are connected. When configured for two controllers, having one controller active is sufficient to prevent a trip.

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7.3.3.16 Stale Speed Detection
The I/O pack provides an additional main control watchdog function that is based on a live speed signal. The protection works
as follows: If the pack PulseRate1 is determined to be zero speed the protection is turned off. If above zero speed, the pack
looks at the value of Speed1 from the main control. If the most recent Speed1 value exactly matches the Speed1 value from
the last data frame then a counter is incremented. If the counter reaches a threshold then a stale speed trip is declared and
latched. If speeds are different the counter is cleared.

Although Speed_1, SS is available as a connected variable, it should not be forced. It


can cause the protection to trip the system if enabled.

Attention
This protection is based on the knowledge that a live speed signal always dithers or moves some small amount. If the speed
values being read by PPRO from the controller are not changing (dithering), there is loss of speed signal integrity from the
controller. If the main control recovers for 60 seconds, the trip is removed allowing for the recovery of the main control with
subsequent re-arming of the backup protection. The protection offers monitoring of two main controls in the event both
Ethernet ports are connected. When configured for two controls, having one control satisfy the test is sufficient to prevent a
trip.

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GE Internal
7.3.3.17 Main Control Ethernet Monitor
The main control provides time synchronization across the distributed control elements. The time synchronization is tied
tightly into the time at which traffic occurs on a given controller's IONet. The I/O pack provides monitoring of this service to
ensure it is working correctly. Gross errors in time synchronization are detected by the pack through a number of different
means, and if problems persist, the I/O pack will vote to trip. Once the trip is latched, if the problem goes away for 60 seconds
the trip shall be reset (this assumes the control recovers from the problem and is back on line). The monitor will offer
monitoring of two main controls in the event both Ethernet ports are connected. When configured for two controls, having
one control sequencing correctly is sufficient to prevent a trip.
In the following diagram, the detection has been simplified to display monitoring of an Ethernet frame number as the means
for determining a problem is present.

Sync Frame Count Monitor

7.3.3.18 Trip Signal Logic


The different trip signals are combined into a composite signal that is used in the relay output logic. The following figure
specifies how the signals are combined. This function is partitioned between firmware and programmable logic. The path to
trip through hardware overspeed is done completely in hardware so that a firmware malfunction cannot defeat the protection.
The same is true of the contact input trip signals when they are configured for direct trip.
There are differences between steam turbine protection and other protection. A composite signal SteamTurbOnly is created
for ease of use:

LargeSteam **

MediumSteam **

** A number of contacts depend on


SmallSteam **
the value of Turbine _Type, CFG.

SteamTurbOnly
Steam Turbine Trip Signals

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Dec1_Trip
OS1_Trip

Acc1_Trip PulseRate1
L5CFG1_Trip Trips

Dec2_Trip
OS2_Trip 1
GT_2Shaft
PulseRate2
Trips
Acc2_Trip
L5CFG2_Trip LM_2Shaft1

1
LPShaftLock LM_3Shaft ComposTrip1,
(SS)
Dec3_Trip
OS3_Trip PulseRate3
1 Trips
LM_3Shaftf
Acc3_Trip
L5CFG3_Trip

L5Cont_Trip
SpeedDiff_Trip System
Cross_Trip, SS Trips

StaleSpdTrip
ContWdogTrip
FrameSyncTrip

2
Sil_Diag_Trip
1 1
LM_2Shaft LM_3Shaft PR1_Zero
Zero
Speed
1 Special
HPZeroSpdByp SteamTurbOnly
LMTripZEnable, CFG Case
SS
L3Z

Hardware
OS1HW_Trip Overspeed
OS2HW_Trip
OS3HW_Trip
1
Notes: CFG values.
2
This trip is generated if a PulseRate signal is broken (such as in the case of no
signal) and SilMode is set to enabled, or if a hardware issue is detected
regardless of SilMode. There will be an accompanying diagnostic generated to
designate the actual cause of the trip.
Trip Combine - All Signals (SS) unless Marked

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GE Internal
7.3.3.19 Watchdog Trip Function
Hardware in the I/O pack monitors local firmware operation, providing a watchdog trip function if the firmware malfunctions.
The operation of this watchdog does not display in the normal sequencing figures. The I/O pack hardware is designed to be in
a fail-safe or trip mode if it is not properly configured and operating. This means that with power off, while starting up, when
in a hardware reset, or otherwise not online, the I/O pack will vote to trip. If the I/O pack watchdog acts, it resets the hardware
thereby generating a vote to trip.
The processor board used inside the I/O pack has hardware features that allow it to differentiate between a reset caused by the
watchdog hardware and a reset caused by cycling of power. This information is available from the pack after it restarts. In the
event that an I/O pack votes to trip due to a reset, it is then possible to determine if a watchdog reset or a cycling of control
power caused the event.

7.3.3.20 Servo Suicide Relay Command


The I/O pack provides a command to a servo suicide relay, and provides coil-monitoring feedback named K4CL_Fdbk, (SS).
This signal is typically used in a simplex control of a gas turbine system where it is highly desirable for the pack emergency
protection to have a hardware path to close the fuel valves. It is also used in simplex steam turbines to close the steam valves.

Servo Suicide Relay Command

Note If the K4CL relay is enabled during an online Overspeed test, use the OnlineOS1X option and not the OnlineOS1Tst.
This will avoid an unwanted K4CL activation.

7.3.3.21 Trip and Economizing Relay Outputs


The I/O pack provides drivers for three emergency trip relay commands, and provides monitoring for three status feedback
signals. Trip is a combination of firmware trip and direct trip implemented in programmable logic. The pack contains drivers
for three economizing relay commands and monitoring for three status feedback signals. Economizing relays are used when it
is desirable to introduce some series resistance in a solenoid coil path to reduce current once the solenoid is picked up.

Note YPROs or PPROs mounted on TREA terminal boards have TA_Trip_Enab# set by default to Disable and this
parameter is not configurable.

The reset signal applied to this function is not edge triggered. A continuously applied reset can result in output cycling in the
presence of an intermittent trip signal. The duration of the reset should only be sufficient to allow the reset to complete and
should not be maintained. Logic for the economizing relay drivers is a time-delayed copy of the emergency trip relays as
displayed in the following figure.

324 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
In
FPGA
TA_Trip, (SS) TestETR1 ComposTrip1 ETR1_Enab L5ESTOP1(SS) ETR1 (IO)
SS (SS) CFG, K1_Fdbk Trip Relay,
Energize to Run
TA_Trip_Enabl1 TRES, TREL Used
CFG (PPRO) In
Firmware
ETR1 SOL1_Vfdbk KE1_Enab TD_KE1
IO (SS) CFG, KE1_Fdbk In
2 Second Delay on Firmware
Pickup KE1 (IO)
Economizing Relay,
TD_KE1
Energize to Econ

In
FPGA
TA_Trip(SS) TestETR2 ComposTrip1 ETR2_Enab L5ESTOP1(SS) ETR2 (IO)
SS (SS) CFG, K2_Fdbk Trip Relay,
Energize to Run
TA_Trip_Enabl2 TRES, TREL Used
CFG (PPRO)
In
Firmware
ETR2 SOL2_Vfdbk KE2_Enab TD_KE2
IO (SS) CFG, KE2_Fdbk In
2 Second Delay on Firmware
Pickup KE2 (IO)
TD_KE2 Economizing Relay,
Energize to Econ

L97EOST_ONLZ Large Steam


CFG
In
FPGA
TA_Trip(SS) ComposTrip1 TestETR 3 ETR3_Enab L5ESTOP1(SS) ETR3 (IO)
(SS) SS CFG, K3_Fdbk Trip Relay,
Energize to Run
TA_Trip_Enabl3 TRES, TREL Used
CFG (PPRO) In
Firmware
ETR3 SOL3_Vfdbk KE3_Enab TD_KE3
IO (SS) CFG, KE3_Fdbk
In
2 Second Delay on Firmware
Pickup KE3 (IO)
Economizing Relay,
TD_KE3
Energize to Econ,
Note: TREL and TRES do not have economizing relays so the KE1, KE2, and KE3 drivers are
not used when those boards are configured. Estop is only on TREG so it is bypassed when
driving ETR1-3 with TREL and TRES.

Trip and Economizing Relay Outputs

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GE Internal
7.3.3.22 Backup Synchronizing Check
The Mark VIeS YPRO or Mark VIe PPRO provides two PT inputs and performs a backup synchronizing check. The TPRO
has fanned PT inputs. The SPRO does not use fanned PT inputs because there are three direct PT paths.

Generator Synchronizing with TPRO

TTUR Cont’d
P28
TTURH 1C R PTUR PR3 K25P
Cont’d K25 K25A
P3
T
Generator, +0.3 Hz Cont’d 2/3 2/3
Slip RD RD S
PT secondary, 17 P3 (0.25 Hz) P125/24 V dc
PR 3
nomin. 115 V ac +0.12 Hz 01 From JR 4
18 (0.1 Hz) 03
(75 to 130 V ac),
Phase
45 to 66 Hz +10 Deg K25P
Fan out Gen lag Gen lead CB_ Volts_OK 04
connection PS3 02
Bus,
19 to S Auto Synch K25
PT secondary, L52Ga
nomin. 115 V ac Algorithm CB_K25P_PU 05
20 L52G
(75 to 130 V ac), PT3 06
S PTUR K25A
45 to 66 V Hz JT4 52Gb
to T CB_K25_PU 07
T PTUR
JS4
CB_K25A_PU Breaker
Close
Coil
08
JR4

N125 /24 V dc

JT1
Generator,
PT secondary, 1 JS1 TRPG / TRPL / TRPS
nomin. 115 V ac
(75 to 130 V ac), 2 JR1
45 to 66 Hz Fan out
Bus, connection J2
3
PT secondary,
nomin. 115 V ac
4 J2
(75 to 130 V ac),
45 to 66 V Hz
TREG / TREL / TRES

R PPRO K25A
2/3
TPRO
TPROH1C Relay
Sync Check RD
Slip Algorithm Driver
JR1 JX1 JX1
+0.3 Hz

-10 Deg +10 Deg Phase


-0.3 Hz

JS1 JY1 JY1

S PPRO

JT1 JZ1 JZ1

T PPRO

326 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
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Generator Synchronizing with SPRO
TTUR
P28 Cont’d
TTUR R YTUR PR3
P3 K 25 P
Cont’d K25 K25 A
Cont’d
+0.3 Hz T
2 /3 2/ 3
Generator Slip (0.25Hz) RD RD S P125 /24 V dc
PT secondary 17 PR3 P3
Nomin . 115 V ac +0. 12 Hz
18 (0.1Hz) 01 From JR 4 03
( 75 to 130 V ac ) Phase Volt K 25P
45 to 66 Hz Fan out + 10 Deg
connection PS3 Gen lag 02 CB_ s _OK 04
Bus Gen lead
19 to S L 52 Ga K 25
PT secondary Auto Synch CB_K25P_PU
nomin. 115 V ac Algorithm 05
20 L52 G
( 75 to 130 V ac) PT 3 K 25 A 06
S Y TUR JT 4 52 Gb
45 to 66 Hz to T CB_K25_PU 07
T Y TUR
JS 4
CB_K25A_PU Breaker
Close
Coil
08
JR4
N 125 /24 V dc

JT1

JS1 TRPG
JR1

J2

J2

JA 3 JX1
K25 A
2/3
Relay
RD
Driver
Generator R SPRO
PT secondary 1 R YPRO
Nomin. 115 V ac
( 75 to 130 V ac ) 2 Sync Check
45 to 66 Hz Slip Algorithm
Fan out +0.3 Hz
Bus 3 connection JA1
PT secondary Phase
-10 Deg +10 Deg TREG
Nomin .115 V ac 4
( 75 to 130 V ac ) -0.3 Hz
45 to 66 Hz
JY 1
JA3
Generator 1 S SPRO
PT secondary
Nomin. 115 V ac
( 75 to 130 V ac ) 2
45 to 66 Hz Fan out
3 connection
Bus
PT secondary S YPRO
Nomin. 115 V ac 4
JA1
( 75 to 130 V ac )
45 to 66 Hz

Generator JA 3 JZ 1
1 T SPRO
PT secondary
Nomin . 115 V ac
( 75 to 130 V ac ) 2
45 to 66 Hz Fan out
Bus 3 connection
PT secondary T YPRO
Nomin. 115 V ac 4
( 75 to 130 V ac ) JA1
45 to 66 Hz

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GE Internal
7.3.3.23 K25A Sync Check Function
The K25A sync check function is based on phase lock loop techniques. The PPRO or YPRO performs the calculations for this
function with interfaces to the breaker close circuit located on the TTUR board (not TPRO or SPRO). Its basic function is to
monitor two Potential Transformer (PT) inputs, and to calculate generator and bus voltage amplitudes and frequencies, phase,
and slip.
When it is armed (enabled) from the application code, and when the calculations determine that the input variables are within
the requirements, the relay K25A will be energized. The above limits are configurable. The algorithm uses the phase lock loop
technique to derive the above input variables, and has a bypass function to provide dead bus closures. The window in this
algorithm is the current window, not the projected window (as used on the auto sync function), therefore it does not include
anticipation. Limit checks are performed against adjustable constants as follows:

• Generator under-voltage
• Bus under-voltage
• Voltage error
• Frequency error (slip), with a maximum recommended value of 0.5 Hz, typically set to 0.27 Hz
• Phase error with a maximum rotational value of 30°, typically set to 10°.

328 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
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The sync check arms logic to enable the function and provides bypass logic for dead bus closure. The following sync window
is based on typical settings.

Typical Sync Window


The PPRO or YPRO provides a command to monitor feedback for the K25A sync relay and K25A coil. The feedback is
named K25A_Fdbk, (SS).

Sync Check and K25A Sync Relay Command


The Sync Check will allow the breaker to close with negative slip. The window is configurable for phase and slip.
The following diagnostics relating to the auto sync function are generated by the PPRO or YPRO:

• K25A Relay (sync check) Driver mismatch requested state. This means the PPRO or YPRO cannot establish a current
path to the TREx terminal board.
• K25A Relay (sync check) Coil trouble, cabling to P28 V on TTUR. This means the K25A relay is not functional; it could
be due to an open circuit between the TREx and the TTUR terminal boards or to a missing P28 V source on the TTUR
terminal board.

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GE Internal
7.3.3.24 K25A Relay Algorithm
The following figure displays the logic for K25A Relay from the Mark VIeS YPRO, which is the same as from the Mark VIe
PPRO.

Signal Space, Outputs;


Algorithm Inputs
YPRO Config
SynchCheck used/ unused
SystemFreq
FreqDiff
TurbRPM
PhaseDiff
Slip L3_Window
* ReferFreq PR_Std +0. 3 Hz

+ 10 Deg
Phase Signal Space, inputs;
PR1/PR2 Algorithm Outputs
Gen Lag Gen Lead
SPRO
DriveFreq
1 center freq BusFreq
Generator, Phase Lock Loop GenFreq
PT secondary 2 Phase, Slip, Freq, GenVoltsDiff
Amplitude GenFreqDiff
3 GenPhaseDiff
Calculations
Bus,
PT secondary 4
L25A_Command
A
GenVoltsDiff OR
A
|A|<B B

VoltageDiff 2.8 B
GenVolts
A L3_GenVolts
A> B
6.9 B
GenVoltage
BusVolts
A
A> B
L3_BusVolts A
6.9 B
BusVoltage B
C
AND A L25A _ Command
SynCk_Perm D OR
E B

TREG
SynCk_ByPass A TTUR
B Dead Bus TRPG
AND Y TUR
L3_GenVolts C
D
L3_BusVolts NOT K25A
RD

Note *ReferFreq is a configuration parameter, used to make a selection of the variable that is used to establish the center
frequency of the Phase Lock Loop. It allows a choice between:
• PR_Std
– Using PulseRate1 speed input on a single shaft applications
– Using PulseRate2 on all multiple shaft applications
• SgSpace uses DriveFreq (the generator frequency in Hz) from signal space (application code). SgSpace is used when
PR_Std is not applicable.

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7.3.4 Specifications
Item YPRO Description
Speed Input Quantity Three input signals provided
Speed input Range Pulse rate frequency range 2 Hz to 20 kHz
Speed Input Accuracy Pulse rate accuracy 0.05% of reading
Speed Input Sensitivity Required peak-peak voltage rises as a function of frequency:
2 Hz requires 24 mV p-p (TREA, SPRO, TPRO)
20 kHz requires 294 mV p-p (TREA)
20 kHz requires 276 mV p-p (SPRO, TPRO)
Generator and Bus Voltage Input voltage range 75 to 127 V rms. Loading less than 3 VA. Frequency accuracy 0.05%
Inputs over 45 to 66 Hz range.
Frame Rate 25 Hz maximum
Size 8.26 cm High x 4.19 cm Wide x 12.1 cm Deep (3.25 in. x 1.65 in. x 4.78 in.)
Technology Surface-mount
†Ambient rating for enclosure -30 to 65ºC (-22 to 149 ºF)
design
Shipping and Storage -40 to 85ºC (-40 to 185 ºF)
Temperature
Humidity 5 to 95% non-condensing
Air Quality Pollution Degree 2, free convection at the module
Vibration
Seismic Universal Building Code (UBC) – Seismic Code section 2312 Zone 4 with operation without
trip
Shipping (by road) Bellcore GR-63-CORE Issue 1, 1995 0.5 g, 5-100 Hz, 10 min. per octave,
1 sweep/axis x 3 axes, ~ 42 min./axis
3 shocks of 15 g, 2 ms impulse each repeated for all axes
Operating at site 1.0 g horizontal. 0.5 g vertical at 15 to 120 Hz, IEC 60721-3-2

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

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GE Internal
YPRO Agency Approvals
Safety Standards UL 508 A Safety Standard Industrial Control Equipment
CSA 22.2 No. 14 Industrial Control Equipment
EN 61010-1 Safety of Electrical Equipment, Industrial Machines (Low Voltage Directive)

Printed Wire Board Assemblies UL 796 Printed Circuit Boards


UL recognized Board manufacturer
ANSI IPC guidelines
ANSI IPC/EIA guidelines

Electromagnetic Compatibility EN 61000-4-2 Electrostatic Discharge Susceptibility


(EMC) EN 61000-4-3 (ENV 50140) Radiated RF Immunity
EN 61000-6-2 Generic Immunity Industrial Environment
EN 61000-4-4 Electrical Fast Transient Susceptibility
EN 61000-4-5 Surge Immunity
EN 61000-4-6 Conducted RF Immunity
EN 55011 Radiated and Conducted RF Emissions
ANSI/IEEE C37.90.1 Surge

7.3.5 Diagnostics
The I/O pack performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the analog feedback currents
• A comparison between the commanded state of each relay drive and the feedback from the commanded output circuit
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set

Note Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be
individually latched, and then reset with the RESET_DIA signal if they go healthy.

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7.3.5.1 YPRO Status LEDs
During normal I/O pack operation, all six trip application LEDs display green. An additional feature, rotating LEDs, can be
configured for the I/O pack. Using this feature, only one LED is turned on at a time, and walked up and down the six LEDs
creating a synchronized motion. The walking is regulated by the controller IONet, and synchronized across a set of three I/O
packs. This provides a quick visual indication of the system time synchronization status. There are six LEDs on the front left
side of the I/O pack to indicate trip status. All six LEDs stay off until the I/O pack is completely online.
RUN is green any time the I/O pack has energized the emergency trip relays. RUN turns red any time the I/O pack has
removed power from the emergency trip relays, voting to trip.
ESTP is green when the ESTOP input (if applicable) is in the run state. ESTP turns red any time ESTOP is invoked to
prevent pick up of the emergency trip relays. If the selected trip terminal board does not support ESTOP, then the LED
defaults to green.
OSPD turns red any time the I/O pack votes to trip in response to a detected overspeed condition on any of the three speed
inputs. OSPD is green when an overspeed condition is not present or latched.

Note WDOG turns green to indicate that the trip status of any of these features has been cleared.

WDOG turns red when any of the following I/O pack trip functions are enabled and active:

• Control Watchdog
• Speed Difference Detection
• Stale Speed Detection
• Frame Sync Monitor
SYNC is green when generator and bus voltage is synchronized and matched in amplitude. SYNC turns red when the I/O
pack determines that ac bus and generator bus voltage does not satisfy the synchronization requirements, and synchronization
has been requested by the system.
OPT is reserved for options that expand the capabilities of the I/O pack. The default display is green.

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GE Internal
7.3.6 Configuration

Note The information in this section is extracted from the ToolboxST application and represents a sample of the
configuration information for this board. Refer to the actual configuration file within the ToolboxST application for specific
information.

7.3.6.1 Parameters
Parameter Description Choices
Unused, GT_1Shaft, LM_
3Shaft, MediumSteam,
Turbine Type and Trip Solenoid Configuration SmallSteam,
TurbineType
GT_2Shaft, Stag_GT_1Sh,
Stag_GT_2Sh, LargeSteam,
LM_2Shaft
LMTripZEnabl On LM machine, when no PR on Z, Enable a vote for Trip Disable, Enable
TA_Trp_Enab1 Steam, Enable Trip Anticipate on ETR1 Disable, Enable
TA_Trp_Enab2 Steam, Enable Trip Anticipate on ETR2 Disable, Enable
TA_Trp_Enab3 Steam, Enable Trip Anticipate on ETR3 Disable, Enable
SpeedDifEn Enable Trip on Speed Difference between Controller and YPRO Disable, Enable
StaleSpdEn Enable Trip on Speed from Controller Freezing Disable, Enable
RotateLeds Rotate the Status LEDs if all status are OK Disable, Enable

LedDiags is Disabled by
default.
LedDiags Disable, Enable
Attention

When enabled, generates a diagnostic alarm when Trip LEDs are


lit. Refer to the section, Diagnostics, YPRO Trip Status for more
information on LED operation.
RatedRPM_TA Rated RPM, used for Trip Anticipator and for Speed Diff Protection 0 to 20,000
AccelCalType Select Acceleration Calculation Time (milliseconds) 10 to 100
OS_Diff Absolute Speed Difference in Percent For Trip Threshold 0 to 10

7.3.6.2 Terminal Board SPRO or TPRO


Variable Description Direction Type
PulseRate1 HP speed AnalogInput REAL

PulseRate2 LP speed AnalogInput REAL

PulseRate3 IP speed AnalogInput REAL

BusPT_KVolts Kilo-Volts rms AnalogInput REAL

GenPT_KVolts Kilo-Volts rms AnalogInput REAL

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7.3.6.3 Terminal Board TREA
Variable Description Direction Type
PulseRate1 HP speed AnalogInput REAL

PulseRate2 LP speed AnalogInput REAL

PulseRate3 IP speed AnalogInput REAL

Fan_Spd_Fbk Fanned Speed Signal Feedback: - Fanned = Jumpers Closed Input BOOL

KESTOP1_Fdbk ESTOP1, inverse sense, True = Run Input BOOL

The SOE generated for this variable requires the attachment of


an application variable to this signal. Otherwise, a build warning
is generated.

K1_Fdbk L4ETR1_FB, Trip Relay 1 Feedback Input BOOL

K2_Fdbk L4ETR2_FB, Trip Relay 2 Feedback Input BOOL

VSen1 Voltage Sensor 1 Feedback Input BOOL

VSen2 Voltage Sensor 2 Feedback Input BOOL

VSen3 Voltage Sensor 3 - Power Monitor Feedback Input BOOL

7.3.6.4 Terminal Board TREG


Variable Description Direction Type
KESTOP1_Fdbk ESTOP1, inverse sense, K4 relay, True = Run Input BOOL

The SOE generated for this variable requires the attachment of


an application variable to this signal. Otherwise, a build warning
is generated.

Contact1 through 7 Contact Input 1 through 7 Input BOOL

K1_Fdbk L4ETR1_FB, Trip Relay 1 Feedback Input BOOL

K2_Fdbk L4ETR2_FB, Trip Relay 2 Feedback Input BOOL

K3_Fdbk L4ETR3_FB, Trip Relay 3 Feedback Input BOOL

KE1_Fdbk Current Economizing Relay for Trip Solenoid 1 Input BOOL

KE2_Fdbk Current Economizing Relay for Trip Solenoid 2 Input BOOL

KE3_Fdbk Current Economizing Relay for Trip Solenoid 3 Input BOOL

K4CL_Fdbk Drive Control Valve Servos Closed. Input BOOL

K25A_Fdbk Synch Check Relay Input BOOL

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 335


GE Internal
7.3.6.5 YPRO Signals
Board Points (Signals) Description – Point Edit (Enter Signal Connection) Direction Type
L3DIAG_YPRO_R, _S, _T I/O Diagnostic Indication Input BOOL
LINK_OK_YPRO_R, _S, _T I/O Link Okay Indication Input BOOL
ATTN_YPRO_R, _S, _T I/O Attention Indication Input BOOL
PS18V_YPRO_R, _S, _T I/O 18 V Power Supply Indication Input BOOL
PS28V_YPRO_R, _S, _T I/O 28 V Power Supply Indication Input BOOL
IOPackTmpr_R, _S, _T I/O pack Temperature (deg °F) AnalogInput REAL
K1_FdbkNV_R, _S, _T Non Voted L4ETR1_FB, Trip Relay 1 Feedback Input BOOL
K2_FdbkNV_R, _S, _T Non Voted L4ETR2_FB, Trip Relay 2 Feedback Input BOOL
K3_FdbkNV_R, _S, _T Non Voted L4ETR3_FB, Trip Relay 3 Feedback Input BOOL
K1FLT K1 Shorted Contact Fault Input BOOL
K2FLT K2 Shorted Contact Fault Input BOOL
PR1_Zero L14HP_ZE Input BOOL
PR2_Zero L14HP_ZE Input BOOL
PR3_Zero L14HP_ZE Input BOOL
OS1_Trip L12HP_TP Input BOOL
OS2_Trip L12HP_TP Input BOOL
OS3_Trip L12HP_TP Input BOOL
Dec1_Trip L12HP_DEC Input BOOL
Dec2_Trip L12HP_DEC Input BOOL
Dec3_Trip L12HP_DEC Input BOOL
Acc1_Trip L12HP_ACC Input BOOL
Acc2_Trip L12HP_ACC Input BOOL
Acc3_Trip L12HP_ACC Input BOOL
TA_Trip Trip Anticipate Trip, L12TA_TP Input BOOL
TA_StptLoss L30TA Input BOOL
OS1HW_Trip L12HP_TP Input BOOL
OS2HW_Trip L12HP_TP Input BOOL
OS3HW_Trip L12HP_TP Input BOOL
SOL1_Vfdbk When TREG, Trip Solenoid 1 Voltage Input BOOL
SOL2_Vfdbk When TREG, Trip Solenoid 2 Voltage Input BOOL
SOL3_Vfdbk When TREG, Trip Solenoid 3 Voltage Input BOOL
L25A_Cmd L25A Breaker Close Pulse Input BOOL
Cont1_TrEnab through 7 Config – Contact 1 Trip Enabled through 7 Input BOOL
Acc1_TrEnab through 3 Config – Accel 1 Trip Enabled through 3 Input BOOL
GT_1Shaft Config – Gas Turb, 1 Shaft Enabled Input BOOL
GT_2Shaft Config – Gas Turb, 2 Shaft Enabled Input BOOL
LM_2Shaft Config – LM Turb, 2 Shaft Enabled Input BOOL
LM_3Shaft Config – LM Turb, 3 Shaft Enabled Input BOOL
LargeSteam Config – Large Steam 1, Enabled Input BOOL
MediumSteam Config – Medium Steam, Enabled Input BOOL

336 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
Board Points (Signals) Description – Point Edit (Enter Signal Connection) Direction Type
SmallSteam Config – Small Steam, Enabled Input BOOL
Stag_GT_1Sh Config – Stag 1 Shaft, Enabled Input BOOL
Stag_GT_2Sh Config – Stag 2 Shaft, Enabled Input BOOL
ETR1_Enab Config – ETR1 Relay Enabled Input BOOL
ETR2_Enab Config – ETR2 Relay Enabled Input BOOL
ETR3_Enab Config – ETR3 Relay Enabled Input BOOL
OS1HW_SP_Pend Hardware HP overspeed setpoint changed after power up Input BOOL
OS2HW_SP_Pend Hardware LP overspeed setpoint changed after power up Input BOOL
OS3HW_SP_Pend Hardware IP overspeed setpoint changed after power up Input BOOL
KE1_Enab Config – Economizing Relay 1 Enabled Input BOOL
KE2_Enab Config – Economizing Relay 2 Enabled Input BOOL
KE3_Enab Config – Economizing Relay 3 Enabled Input BOOL
OS1HW_SP_CfgErr Hardware HP Overspd Setpoint Config Mismatch Error Input BOOL
OS2HW_SP_CfgErr Hardware LP Overspd Setpoint Config Mismatch Error Input BOOL
OS3HW_SP_CfgErr Hardware IP Overspd Setpoint Config Mismatch Error Input BOOL
K4CL_Enab Config – Servo Clamp Relay Enabled Input BOOL
K25A_Enab Config – Synch Check Relay Enabled Input BOOL
L5CFG1_Trip HP Config Trip Input BOOL
L5CFG2_Trip LP Config Trip Input BOOL
L5CFG3_Trip IP Config Trip Input BOOL
OS1_SP_CfgEr HP Overspd Setpoint Config Mismatch Error Input BOOL
OS2_SP_CfgEr LP Overspd Setpoint Config Mismatch Error Input BOOL
OS3_SP_CfgEr IP Overspd Setpoint Config Mismatch Error Input BOOL
ComposTrip1 Composite Trip 1 Input BOOL
ComposTrip2 Composite Trip 2 Input BOOL
ComposTrip3 Composite Trip 3 Input BOOL
L5ESTOP1 ESTOP1 Trip Input BOOL
L5Cont1_Trip through 7 Contact 1 Trip 7 Input BOOL
LPShaftLock LP Shaft Locked Input BOOL
Inhbt1_Fdbk through 7 Trip Inhibit Signal Feedback for Contact 1 through 7 Input BOOL
L3SS_Comm Communication Fault Input BOOL
Trip1_EnCon through 7 Contact 1 Trip Enabled through 7 – Conditional Input BOOL
BusFreq SFL2 Hz AnalogInput REAL
GenFreq DF2 Hz AnalogInput REAL
GenVoltsDiff DV_ERR KiloVolts rms - Gen Low is Negative AnalogInput REAL
GenFreqDiff SFDIFF2 Slip Hz - Gen Slow is Negative AnalogInput REAL
GenPhaseDiff SSDIFF2 Phase degrees - Gen Lag is Negative AnalogInput REAL
PR1_Accel HP Accel in RPM/SEC AnalogInput REAL
PR2_Accel LP Accel in RPM/SEC AnalogInput REAL
PR3_Accel IP Accel in RPM/SEC AnalogInput REAL
PR1_Max HP Max Speed since last Zero Speed in RPM AnalogInput REAL

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 337


GE Internal
Board Points (Signals) Description – Point Edit (Enter Signal Connection) Direction Type
PR2_Max LP Max Speed since last Zero Speed in RPM AnalogInput REAL
PR3_Max IP Max Speed since last Zero Speed in RPM AnalogInput REAL
SynCk_Perm L25A_PERM - Sync Check Permissive Output BOOL
SynCk_ByPass L25A_BYPASS - Sync Check ByPass Output BOOL
Cross_Trip L4Z_XTRP - Control Cross Trip Output BOOL
OnLineOS1Tst L97HP_TST1 - On Line HP Overspeed Test Output BOOL
OnLineOS2Tst L97LP_TST1 - On Line LP Overspeed Test Output BOOL
OnLineOS3Tst L97IP_TST1 - On Line IP Overspeed Test Output BOOL
OffLineOS1Tst L97HP_TST2 - Off Line HP Overspeed Test Output BOOL
OffLineOS2Tst L97LP_TST2 - Off Line LP Overspeed Test Output BOOL
OffLineOS3Tst L97IP_TST2 - Off Line IP Overspeed Test Output BOOL
TrpAntcptTst L97A_TST - Trip Anticipate Test Output BOOL
LokdRotorByp LL97LR_BYP - Locked Rotor Bypass Output BOOL
HPZeroSpdByp L97ZSC_BYP - HP Zero Speed Check Bypass Output BOOL
PTR1 L20PTR1 - Primary Trip Relay CMD, for Diagnostic only Output BOOL
PTR2 L20PTR2 - Primary Trip Relay CMD, for Diagnostic only Output BOOL
PTR3 L20PTR3 - Primary Trip Relay CMD, for Diagnostic only Output BOOL
PR_Max_Rst Max Speed Reset Output BOOL
OnLineOS1X L43EOST_ONL - On Line HP Overspeed Test,with auto reset Output BOOL
TestETR1 L97ETR1 - ETR1 test, True de-energizes relay Output BOOL
TestETR2 L97ETR2 - ETR2 test, True de-energizes relay Output BOOL
TestETR3 L97ETR3 - ETR3 test, True de-energizes relay Output BOOL
Trip1_Inhbt through 7 Contact 1 Trip Inhibit through 7 Output BOOL
OS1_Setpoint HP Overspeed Setpoint in RPM AnalogOutput REAL
OS2_Setpoint LP Overspeed Setpoint in RPM AnalogOutput REAL
OS3_Setpoint IP Overspeed Setpoint in RPM AnalogOutput REAL
OS1_TATrpSp PR1 Overspeed Trip Setpoint in RPM for Trip Anticipate Fn AnalogOutput REAL
DriveFreq Drive (Gen) Freq (Hz), used for non standard drive config AnalogOutput REAL
Speed1 Shaft Speed 1 in RPM AnalogOutput REAL
OSHW_Setpoint1 HP Overspeed Setpoint in RPM AnalogOutput REAL
OSHW_Setpoint2 LP Overspeed Setpoint in RPM AnalogOutput REAL
OSHW_Setpoint3 IP Overspeed Setpoint in RPM AnalogOutput REAL
ContWdog Controller Watchdog Counter Output DINT

338 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.4 YPRO Specific Alarms
17
Description Main Terminal Board Mismatch

Possible Cause The terminal board configured in the ToolboxST application does not match the actual hardware.

Solution

• Verify that the ToolboxST configuration matches the actual hardware.


• Perform the Build and Download commands to configure the I/O pack.

18
Description Trip Board Mismatch

Possible Cause The trip board configured in the ToolboxST application does not match the actual trip board hardware.

Solution

• Verify that the ToolboxST configuration matches the actual hardware.


• Perform the Build and Download commands to configure the I/O pack.

40
Description Contact Excitation Voltage Test Failure

Has Health Bit Yes

Possible Cause Voltage for the contact inputs on the trip board is not within published limits.

Solution Check source of contact excitation voltage applied to trip board.

50
Description Main Terminal Board Mismatch

Possible Cause The terminal board configured in the ToolboxST application does not match the actual hardware.

Solution

• Verify that the ToolboxST configuration matches the actual hardware.


• Perform the Build and Download commands to configure the I/O pack.

51
Description Trip Board Mismatch

Possible Cause The trip board configured in the ToolboxST application does not match the actual trip board hardware.

Solution

• Verify that the ToolboxST configuration matches the actual hardware.


• Perform the Build and Download commands to configure the I/O pack.

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 339


GE Internal
69–71
Description Trip relay (ETR) driver [ ] does not match commanded state

Has Health Bit No

Possible Cause The driver output of the I/O pack for Emergency Trip Relay 1 (K1), ETR2 (K2), or ETR3 (K3) does not
match the commanded state. This indicates that the I/O pack does not see the relay command going out the DC-62 connector
into the expected terminating impedance on the trip board.

Solution

• Check the I/O pack connector seating on the terminal board.


• Check the trip board cable seating (if not TREA) and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

72–74
Description Econ Relay Driver [ ] does not match commanded state

Has Health Bit No

Possible Cause The driver output of the I/O pack for Economizing Relay KE1, KE2, or KE3 does not match the
commanded state. This indicates that the I/O pack does not see the relay command going out the DC-62 connector into the
expected terminating impedance on the trip board.

Solution

• Check the I/O pack connector seating on terminal board.


• Check the trip board cable seating and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

75
Description Servo Clamp Relay Driver does not match commanded state

Has Health Bit No

Possible Cause The driver output of I/O pack for K4CL does not match the commanded state. This indicates that I/O
pack does not see the relay command going out the DC-62 connector into the expected terminating impedance on the trip
board.

Solution

• Check the I/O pack connector seating on terminal board.


• Check the trip board cable seating and the cable integrity.
• Replace the cable, the trip board, the main terminal board, and the I/O pack.

340 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
76
Description K25A relay (synch check) driver does not match commanded state

Has Health Bit No

Possible Cause The driver output of I/O pack for K25A does not match the commanded state. This indicates that I/O
pack does not see the relay command going out the DC-62 connector into the expected terminating impedance on the trip
board.

Solution

• Check the I/O pack connector seating on terminal board.


• Check the trip board cable seating and the cable integrity.
• One at a time, replace the following: the emergency trip board cable, the trip terminal board, the terminal board hosting
the I/O pack, and the I/O pack.

83–85
Description Trip relay (ETR) contact [ ] does not match commanded state

Has Health Bit No

Possible Cause

• Relay feedback from Emergency Trip Relay ETR1 (K1), ETR2 (K2), or ETR3 (K3) does not match the commanded
state. This indicates that the relay feedback from the trip board does not agree with the commanded state.
• Solenoid power is not applied to the trip board.

Solution

• Check the trip board relays, as well as the cable from trip board to main terminal board (if not TREA).
• Check that solenoid power is applied to the terminal board.

86–88
Description Econ relay contact [ ] does not match commanded state

Has Health Bit No

Possible Cause The relay feedback fromEconomizing Relay 1 (KE1), KE2, or KE3 does not match the commanded
state. This indicates that the relay feedback from the trip board does not agree with the commanded state.

Solution Check the trip board relays, as well as the cable from trip board to main terminal board.

89
Description Servo clamp relay contact does not match commanded state

Has Health Bit No

Possible Cause Check the I/O pack connector seating on the terminal board. Check the trip board cable seating and the
cable integrity. Replace the cable, the trip board, the main terminal board, and the I/O pack.

Solution Servo Clamp Relay Contactmismatch requested state

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 341


GE Internal
90
Description K25A relay (synch check) coil trouble, cabling to P28 V on TTUR

Has Health Bit No

Possible Cause

• Confirm that the TMR packs are commanding the same state for K25A.
• Check the I/O pack connector seating on the terminal board.
• Check the trip board cable seating and the cable integrity.
• One at a time, replace the following: the emergency trip board cable, the trip terminal board, the terminal board hosting
the I/O pack, and the I/O pack.

Solution K25A Relay (synch check) Coil trouble, cabling to/P28 V on TTUR

97
Description Solenoid power source is missing

Has Health Bit No

Possible Cause

• Check the source of solenoid power.


• Confirm that the wiring between the trip boards is correct.

Solution Solenoid Power Source is missing

99–101
Description Solenoid voltage [ ] does not match commanded state

Has Health Bit No

Possible Cause

• Solenoid voltage associated with K1-K3 does not match the commanded state
• Removal of solenoid voltage through another means when the I/O pack expects to see it
• K1-K3 are closed, but no voltage is detected on the solenoid
• Solenoid voltage was removed through another means while the I/O pack expects to detect its presence
• ETR state associated with this YPRO is being out voted by the other two YPROs

Solution

• Review the system-level trip circuit wiring and confirm the voltage that should be present if the I/O pack energizes the
associated trip relay.
• From the ToolboxST application, verify that the variables (typically L20PTR#) which drive the Primary Trip Relays
(PTRs) in the YTUR are correctly assigned to the YPRO Variables tab (PTR1, PTR2, and PTR3).
• Check the pre-voted values for ComposTrip1 under the Vars-Trip tab to verify that all three YPROs have the same status.
If the current YPRO differs from the others, check the pre-vote status of other variables under this tab to determine the
exact cause of the composite trip and correct the condition.

342 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
108
Description Control Watchdog Protection Activated

Has Health Bit No

Possible Cause An alarm indicates that the ContWdog signal has not changed for five consecutive frames. The alarm
clears if changes are detected for 60 seconds.

Solution

• Verify that the ContWdog is connected to the output of a DEVICE_HB block and that the block is located in a task which
is run at frame rate.
• Verify that the output signal from the block is changing at least once a frame.

109
Description Speed Difference Protection Activated

Has Health Bit No

Possible Cause This alarm only occurs if the SpeedDifEnable parameter has been enabled. An alarm indicates that the
difference between the Speed1 output signal and the first I/O pack pulse rate speed is larger than the OS_DIFF percentage for
more than three consecutive frames. The percentage is based off of the RatedRPM_TA parameter. The alarm clears if the
difference is within limits for 60 seconds for more than three consecutive frames.

Solution Verify that the Speed1 signal is set up correctly in the ToolboxST application, and that the source of the signal
reflects the primary YTUR pulse rate speed.

110
Description Stale Speed Protection Activated

Has Health Bit No

Possible Cause The speed trip protection may be stale. This alarm can only occur if the StaleSpdEn parameter has been
enabled. An alarm indicates that the Speed1 variable has not changed for 100 consecutive frames. The alarm clears if the
speed dithers for 60 seconds.

Solution

• Verify that the source of the Speed1 signal reflects the YTUR primary pulse rate speed.
• Verify that Speed1 is not set to a static (fixed) value.
• Verify that Speed1 is not filtered.

111
Description Frame Sync Monitor Protection Activated

Has Health Bit No

Possible Cause This alarm indicates that the communication with the controller was lost for at least five consecutive
frames after the I/O pack was online. The alarm clears if the frame synch is established for at least 60 seconds.

Solution Verify that the IONet is healthy. This indicates that the I/O pack is not synchronized with the Mark VIe controller
start-of-frame signal.

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GE Internal
112–114
Description Overspeed [ ] firmware setpoint configuration error

Has Health Bit No

Possible Cause There is a firmware over-speed limit mismatch between the OS[ ]_Setpoint I/O signal space limit and the
current configuration file downloaded from the ToolboxST application. This causes the OS[ ]_Setpoint output signal to not
match the configuration value of OS_Setpoint.

Solution From the Vars Speed tab, change the output signal designated in OS[ ]_Setpoint to match the configuration
value of OS_Setpoint (found in the Pulse Rate tab).

115–117
Description Overspeed [ ] hardware setpoint configuration error

Has Health Bit No

Possible Cause There is a hardware over-speed limit mismatch between the OSHW_Setpoint[ ] I/O signal space limit
and the current configuration file downloaded from the ToolboxST application. This causes the OSHW_Setpoint[ ] output
signal to not match the configuration value of OSHW_Setpoint.

Solution From the Var-Speed tab, change the output signal designated in OSHW_Setpoint[ ] to match the configuration
value of OSHW_Setpoint (found in the Pulse Rate tab).

118–120
Description Overspeed [ ] hardware setpoint changed after power up

Has Health Bit No

Possible Cause This alarm always occurs when PulseRate[ ] OSHW_Setpoint is changed and downloaded to the I/O
pack after the turbine has started.

Solution Confirm that the limit change is correct. Restart the I/O pack to force the hardware overspeed to re-initialize the
limit.

121
Description TREA - K1 solid state relay shorted

Has Health Bit No

Possible Cause The TREA provides voltage-based detection of relays that remain in the energized position in the six
voting contacts used to provide K1. Zero voltage has been detected on one or more contacts of K1 when voltage should be
present.

Solution Replace the TREA.

122
Description TREA - K2 solid state relay shorted

Has Health Bit No

Possible Cause TREA provides voltage based detection of relays that remain in the energized position in the six voting
contacts used to provide K2. Zero voltage has been deleted on one or more contacts of K2 when voltage should be present.

Solution Replace the TREA.

344 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
123
Description LED - Turbine RUN permissives lost

Has Health Bit No

Possible Cause The RUN LED is lit red on the I/O pack because one of the RUN permissives for the turbine has been
lost. The LedDiag parameter must be set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiag parameter.


• From the ToolboxST application Vars Trip tab, identify the condition that caused the trip.
• The condition leading to a trip condition must be cleared, and a master reset issued.

124
Description LED - Overspeed fault detected

Has Health Bit No

Possible Cause The Overspeed LED is lit on the I/O pack because of a detected Trip condition. The LedDiag parameter
must be set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiag parameter.


• The condition leading to a trip condition must be cleared, and a master reset issued.

125
Description LED - Estop detected

Has Health Bit No

Possible Cause The Estop LED is lit on the I/O pack because of a detected Estop signal. The LedDiag parameter must be
set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiag parameter.


• Remove the Estop condition, and issue a master reset.

126
Description LED - Synch fault detected

Has Health Bit No

Possible Cause The Synch LED is lit on the I/O pack because of a failure to synchronize. The LedDiag parameter must
be set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiag parameter.


• Issue a master reset to clear the alarm until the next failed attempt to synchronize.

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 345


GE Internal
224–239
Description Input Signal [ ] Voting Mismatch, Local=[ ], Voted=[ ]

Has Health Bit No

Possible Cause A problem exists with a status input between the R, S, and T I/O packs and one of the following:

• The device
• The connections to the terminal board
• The terminal board

Solution

• Adjust the TMR threshold limit or correct the cause of the difference.
• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and the networking.
• Check the I/O pack mounting on terminal board.
• Verify the operation of the device generating the specified signal.
• Verify the terminal board wiring and connections.
• Replace the I/O pack.

1064–1255
Description Logic Signal [ ] Voting Mismatch

Has Health Bit No

Possible Cause A problem exists with a status input between the R, S, and T I/O packs and one of the following:

• The device
• The connections to the terminal board
• The terminal board

Solution

• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and the networking.
• Check the I/O pack mounting on the terminal board.
• Verify the operation of the device generating the specified signal.
• Verify the terminal board wiring and connections.
• Replace the I/O pack.

346 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.5 TPRO_#C TMR Backup Protection Terminal Board
The TMR Backup Protection (TPROH#C, TPROS#C) terminal board conditions speed signal inputs and contains a pair of
potential transformers (PTs) for bus and generator voltage input. It has three DC-37 pin connectors, each adjacent to the I/O
pack connectors. Each DC-37 accepts a cable leading to a trip relay terminal board. The TPRO has two 24-point terminal
blocks (48 points).

Compatibility

I/O Packs TPRO Version Terminal Block Type Available Trip Boards
TPROH1C Barrier, removable
Three Mark VIe PPROs TREG, TREL, TRES
TPROH2C Euro Box, removable
Three Mark VIeS YPROs † TPROS1C Barrier, removable
or TREGS#B
Three Mark VIe PPROS1Bs † TPROS2C Euro Box, removable
† This combination is IEC 61508 safety certified

7.5.1 TPRO _#C Installation


The TPRO and a plastic insulator mount on a sheet metal carrier, which mounts on a DIN-rail. Optionally, the TPRO and
insulator mount on a sheet metal assembly, which bolts directly in a panel. Speed signals and PT inputs are wired directly to
the terminal block using typical #18 AWG wires.
The R, S and T I/O packs mount on TPRO connectors JR1, JS1 and JT1, respectively. Three DC-37 pin conductor cables plug
into TPRO connectors JX1, JY1 and JZ1 with the other ends attached to the turbine backup trip board.

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 347


GE Internal


Transformers


(T1 and T 2) 





 






 
 

 




 



         
 






 
 











         

  








   


 



 


 

 


  


     
 
   





  


       






 






      


 


 




      
 












      



  


 




        
 




 

      




   


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used at a time ) 
 
 

 


        



 


 
 




     


  


 







 

 

 



       
    
 

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TPRO_#C Board Layout

348 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.5.1.1 Primary and Backup Turbine Protection
In the following figure, the TPRO and three I/O packs (Mark VIe PPROs or Mark VIeS YPROs) are connected to a trip relay
board for backup turbine trip protection. Three Mark VIe PTURs or Mark VIeS YTURs, the TTUR terminal board, and a
primary trip relay board provide turbine-specific primary trip protection.

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 349


GE Internal
YTUR
YTUR
YTUR

TPROS#C

YPRO

YPRO

YPRO

Primary and Backup Turbine Protection

350 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.5.2 Operation
In the following drawing, the PT inputs to TPRO are displayed on terminals 1-4.

TPRO Signal Inputs

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 351


GE Internal
Nine speed inputs are displayed on terminals 31-48. Terminals 5, 9, and 11 offer P24 output for the customer. Terminal 8
(MARET) acts as the return path for the P24 output. The P24 output is derived by ORing the 28 V power supply of I/O packs
R, S, and T. If any of the I/O pack are switched off, P24 V output can still be sourced. If speed inputs are TTL-based, then
TB3 terminals are used along with even-numbered terminals 32-48, as displayed in the following table.

Input Signal TBConnector Terminal Description


Number
PulseRate1 MAG1TTL_R TB3 1 For TTL input High

MX1L TB2 32 Return for TTL input

MAG1TTL_S TB3 4 For TTL input High

MY1L TB2 38 Return for TTL input

MAG1TTL_T TB3 7 For TTL input High

MZ1L TB2 44 Return for TTL input

P24V1 TB1 5 For TTL input Sensor Power

MARET TB1 8 For TTL input Sensor Power


Return
PulseRate2 MAG2TTL_R TB3 2 For TTL input High

MX2L TB2 34 Return for TTL input

MAG2TTL_S TB3 5 For TTL input High

MY2L TB2 40 Return for TTL input

MAG2TTL_T TB3 8 For TTL input High

MZ2L TB2 46 Return for TTL input

P24V2 TB1 9 For TTL input Sensor Power

MARET TB1 8 For TTL input Sensor Power


Return
PulseRate3 MAG3TTL_R TB3 3 For TTL input High

MX3L TB2 36 Return for TTL input

MAG3TTL_S TB3 6 For TTL input High

MY3L TB2 42 Return for TTL input

MAG3TTL_T TB3 9 For TTL input High

MZ3L TB2 48 Return for TTL input

P24V3 TB1 11 For TTL input Sensor Power

MARET TB1 8 For TTL input Sensor Power


Return

Note For terminal 8 (MARET) to act as the return path for 24 V output and 4-20 mA input, ensure that JP1B is at position
(1-2).

352 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.5.3 Specification
Item TPRO Specification
Generator and bus voltage sensors Two single-phase potential transformers, with secondary output
supplying a nominal 115 V rms
If K25A_Enab = False, the generator and bus potential Each input has less than 3 VA of loading.
transformer (PT) live values are disabled. Allowable voltage range for synch is 75 to 130 V rms
Each PT input is magnetically isolated with a 1,500 V rms barrier.
Cable length can be up to 1,000 ft. of 18 AWG wiring.

Magnetic speed pickup pulse rate range 2 Hz to 20,000 Hz

Magnetic speed pickup pulse rate accuracy 0.05% of reading

Speed input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 24 mV p-p
Speed input sensitivity is such that turning gear 20 kHz requires 276 mV p-p
speed may be observed on a typical turbine
application.

Size 33.02 cm high x 17.8 cm wide (13 in x 7 in)

Technology Surface-mount

P24V1 There are three 24 V outputs for customer (not voted), with each
P24V2 supporting a max current output of 25 mA.
P24V3

7.5.4 Diagnostics
The TPRO board and backup trip relay terminal board contain electronic ID parts that are read during power initialization.
This information is used by the I/O pack to confirm a valid hardware arrangement prior to starting normal operation.

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 353


GE Internal
7.6 SPROH#A, S1A Simplex Backup Protection Terminal
Board
The Simplex Backup Protection (SPRO) terminal board conditions speed signal inputs for the I/O pack and contains a pair of
potential transformers (PTs) for bus and generator voltage input. It has a DC-37 pin connector adjacent to the I/O pack
connector that accepts a cable leading to a backup trip relay terminal board.

Compatibility

I/O Packs Board Available Trip Boards Terminal Block


Revision
SPROH1A 24 removable, barrier
One Mark VIe PPRO TREG, TREL, TRES
SPROH2A 24 removable, Euro style box-type

One Mark VIeS YPRO † SPROS1A TREGS#B 24 removable, barrier


† IEC 61508 safety certified with YPRO (not PPROS1B)

7.6.1 Installation
The SPRO and a plastic insulator mount on a sheet metal carrier, which mounts on a DIN-rail. Optionally, the SPRO and
insulator mount on a sheet metal assembly, which bolts directly in a panel. Speed signals and PT inputs are wired directly to
the terminal block using typical #18 AWG wires.
The I/O pack mounts directly on connector JA1 of the SPRO. A DC-37 pin conductor cable plugs into connector JA3 of
SPRO with the other end attached to a backup trip terminal board.

7.6.1.1 Primary and Backup Turbine Protection


The following figure displays the primary and backup trip protection system. Turbine-specific primary trip protection is
provided by the Mark VIe PTUR or Mark VIeS YTUR, the TTUR terminal board, and a primary trip relay board. Backup
protection is provided by the Mark VIeS YPRO or Mark VIe PPRO, the SPRO, and a backup trip relay board.

354 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
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Primary and Backup Turbine Protection

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 355


GE Internal
7.6.2 Operation
In the following drawing, the PT inputs to SPRO are displayed on terminals 1-4. Three speed inputs are displayed on
terminals 19-24. Terminals 7-15 are reserved for future control feature expansion and are routed to the JA1 I/O pack
connector. Terminals 5-6 and 16-18 have no board connection. The JA1 and JA3 connectors provide locations for the I/O
pack and the trip terminal board cables.

SPRO Signal Inputs

356 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
SPRO Inputs
Terminal Signal Name Variable Name Description
1 GENH GenPT_KVolts Generator PT input high.

2 GENL Generator PT input low

3 BUSH BusPT_KVolts Bus PT input high

4 BUSL Bus PT input low

5 Not connected
6 Not connected
7 KPRO1 Unused, left for future control feature expansion.

8 KPRO2 Unused, left for future control feature expansion.

9 KPRO3 Unused, left for future control feature expansion.

10 KPRO4 Unused, left for future control feature expansion.

11 KPRO5 Unused, left for future control feature expansion.

12 KPRO6 Unused, left for future control feature expansion.

13 KPRO7 Unused, left for future control feature expansion.

14 KPRO8 Unused, left for future control feature expansion.

15 KPRO9 Unused, left for future control feature expansion.

16 Not connected
17 Not connected
18 Not connected
19 MAG1H PulseRate1 Magnetic pickup-1 high input

20 MAG1L Magnetic pickup-1 low input

21 MAG2H PulseRate2 Magnetic pickup-2 high input

22 MAG2L Magnetic pickup-2 low input

23 MAG3H PulseRate3 Magnetic pickup-3 high input

24 MAG3L Magnetic pickup-3 low input

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 357


GE Internal
7.6.3 Specifications
Item SPRO Specification
Generator and bus voltage sensors Two single-phase potential transformers, with secondary output supplying a
nominal 115 V rms
Each input has less than 3 VA of loading.
If K25A_Enab = False, the generator Allowable voltage range for synch is 75 to 130 V rms
and bus potential transformer (PT) live Each PT input is magnetically isolated with a 1,500 V rms barrier.
values are disabled. Cable length can be up to 1,000 ft. of 18 AWG wiring.

Magnetic speed pickup pulse rate range 2 Hz to 20,000 Hz

Magnetic speed pickup pulse rate 0.05% of reading


accuracy

Speed input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 24 mV p-p
20 kHz requires 276 mV p-p
Turning gear speed may be observed
on a typical turbine application.

Size 15.9 cm high x 17.8 cm wide (6.25 in x 7.0 in)

Technology Surface-mount

7.6.4 Diagnostics
The SPRO board and backup trip relay terminal board contain electronic ID parts that are read during power initialization.
This information is used by the I/O pack to confirm a valid hardware arrangement prior to starting normal operation.

358 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.7 TREAH#A, S#A Aeroderivative Turbine Trip Board
The Aeroderivative Turbine Emergency Trip (TREA) terminal board inputs and outputs are as follows:

• Customer input terminals provided through two 24-point terminal blocks (48 points)
• Nine passive pulse rate devices (three per X/Y/Z section) sensing a toothed wheel to measure the turbine speed.
• Jumper blocks that enable fanning of one set of three speed inputs to all three I/O packs.
• Two TMR-voted output contacts to trip the system.
• Four 24–125 V dc voltage detection circuits for monitoring trip string.
• Signals fan out to the three I/O packs through JX1, JY1, and JZ1 DC-62 connectors.

Compatibility
Board Revision Mark VIe control Mark VIeS Safety control Features
IS220PPRO IS200YPRO
TREAH1A 24 V dc with barrier terminal blocks
TREAH2A 125 V dc with barrier terminal blocks
No
TREAH3A 24 V dc with Euro box terminal blocks
TREAH4A 125 V dc with Euro box terminal blocks
TREAS1A 24 V dc, barrier, IEC 61508 safety certified with
YPRO (not PPROS1B)
TREAS2A Yes 125 V dc, barrier, IEC 61508 safety certified with
YPRO (not PPROS1B)
Yes
TREAS3A 24 V dc, Euro box, IEC 61508 safety certified
with YPRO (not PPROS1B)
TREAS4A 125 V dc, Euro box, IEC 61508 safety certified
with YPRO (not PPROS1B)

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 359


GE Internal
TREA_1A Turbine Terminal Board

360 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
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7.7.1 Installation
In 240 V ac applications, do not inadvertently cross-connect the 240 V ac and the dc
voltages. The peak voltage will exceed the Transorb rating, resulting in a failure.

Most ac supplies operate with a grounded neutral, and if an inadvertent connection


between the 125 V dc and the ac voltage is created, the sum of the ac peak voltage and
the 125 V dc is applied to Transorbs connected between dc and ground. However, in
Caution 120 V ac applications, the Transorb rating can withstand the peak voltage without
causing a failure.

For H1 / S1 and H2 / S2 board versions, voltage detection and the breaker relay are wired to the I/O terminal blocks TB1.
Passive pulse rate pick-ups are wired to TB2. Each block is held down with two screws and has 24 terminals accepting up to
#12 AWG wires. A shield termination strip attached to chassis ground is located immediately to the left of each terminal
block.
For H3 / S3 and H4 / S4 board versions, voltage detection and the breaker relay are wired to the I/O box terminals at the top
of the board. Passive pulse rate pick-ups are wired to the lower terminals. All terminals plug into a header on the TREA board
and accept up to a single #12 AWG wire.

The TREA must be configured for the desired speed input connections using the
following table. Jumpers P1 and P2 select fanning of the <R> section pulse rate
pickups to the <S> and <T> I/O packs.
Attention
Speed Input Connections
Wiring Function Jumper
Wire to all 9 pulse inputs: Each set of three pulse inputs goes to its own Cannot use jumper: place in
PR1_X – PR3_Z dedicated I/O pack STORE position.
Wire to bottom 3 pulse inputs only: The same set of signals are fanned to all the I/O Use jumper: place over pin pairs.
PR1_X – PR3_X packs
NO wiring to PR1_Y-PR3_Z

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 361


GE Internal
7.7.1.1 TREA Terminal Board Wiring
Screw terminal connections are listed in the following table. Terminal names starting with DBRD are reserved for the addition
of an optional daughterboard.

Pin Signal Name Pin Signal Name


1 K1_PDC 2 K1_NDC
3 K2_PDC 4 K2_NDC
5 SOL1_A 6 SOL1_B
7 SOL2_A 8 SOL2_B
9 PWR_A 10 PWR_B
11 TRP_A 12 TRP_B
13 K4_PDC 14 K4_NDC
15 K5_PDC 16 K5_NDC
17 K6_PDC 18 K6_NDC
19 DBRD1_A 20 DBRD1_B
21 DBRD2_A 22 DBRD2_B
23 DBRD3_A 24 DBRD3_B
25 DBRD4_A 26 DBRD4_B
27 DBRD5_A 28 DBRD5_B
29 DBRD6_A 30 DBRD6_B
31 PR1H_Z 32 PR1L_Z
33 PR2H_Z 34 PR2L_Z
35 PR3H_Z 36 PR3L_Z
37 PR1H_Y 38 PR1L_Y
39 PR2H_Y 40 PR2L_Y
41 PR3H_Y 42 PR3L_Y
43 PR1H_X 44 PR1L_X
45 PR2H_X 46 PR2L_X
47 PR3H_X 48 PR3L_X

362 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.7.1.2 Contact Outputs

The contact outputs are polarity sensitive. Wire the circuit carefully to avoid
damaging the relays. There is no contact or solenoid suppression, user must add
external solenoid suppression to avoid damaging the relays and their contacts.
Caution
A voltage detection circuit is included on TREA that is able to detect a shorted relay when voltage is present across the open
contact set.

Connection to TREA contact output

7.7.1.3 E-Stop/TRP Input


• The TRP input is configurable in the I/O pack to either be required or bypass the signal. When enabled, the TRP input
works through a hardware path on the I/O pack and does not act through the I/O pack firmware. When enabled, TRP
must be powered for the trip relays to close.
• The E-Stop must be connected to a CLEAN dc source battery or filtered (< 5% ripple) rectified ac.
• There must be a minimum of 18 V dc at the TRP inputs for proper operation. The current required was kept low to
minimize drop on long cable runs.
• As the TRP is very fast < 5 ms and the output relay contacts are also fast (< 15 ms), best wiring practices should be
utilized to avoid disoperation. Use twisted-pair cable when possible and avoid running with ac wiring.

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 363


GE Internal
7.7.2 Operation
The TREA is designed for three I/O packs to be mounted directly onto it. This module assembly forms a self-contained
emergency trip function. TREA_1A, 2A, 3A, and 4A only functions correctly with three I/O packs. Simplex operation is not
possible.

Note The Trip Anticipate test function does not toggle the ETR relays on the TREA.

7.7.2.1 Speed Inputs


With the three I/O packs mounted directly on the TREA, the speed inputs provide two options. Each I/O pack can receive a
dedicated set of three speed inputs from their respective TREA terminal points. As an option, jumpers P1 and P2 can be
placed on the TREA to take the first three speed inputs from the <X> I/O pack and fan them to the <Y> and <Z> I/O packs.
When this is selected, the terminal board points for the Y and Z speed inputs become no-connects and should not be used. As
a check, when the I/O pack is configured for either fanned or direct speed input, a feedback signal is provided by TREA. If
there is a mismatch between the jumper position and I/O pack configuration, an alarm will be generated.

364 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.7.2.2 E-Stop
The TREA includes an E-Stop function. This consists of an optically isolated input circuit designed for a dc input in the range
of 24 V to 125 V nominal. When energized, the circuit enables coil drive power in the X, Y, and Z relay circuits through
independent hardware paths. The response time of this circuit of less than five milliseconds plus the response time of the trip
relays of less than one millisecond yields very fast E-Stop response. E-Stop is monitored by I/O pack firmware, but the action
to remove trip relay coil power is a hardware path in the I/O pack. It is possible to configure the I/O pack to turn off the
E-Stop function.

7.7.2.3 Voltage Monitors


The trip relays on TREA may be freely located anywhere in a trip string. Because the trip string circuit is not fixed, there are
three general-purpose isolated voltage sensor inputs on TREA. These can be used to monitor any points in the trip system and
drive the voltage status into the system controller where action can be taken. Typical use of these inputs may be to sense the
power supply voltage for the two trip strings (PWR) and to sense the solenoid voltage of the device being driven by the relays
(SOL1, SOL2). This set of applications is used in the wording of the board symbol, but the sensors can be freely applied to
best serve the application.

7.7.2.4 Trip Relays


The trip relays are made using sets of six individual form devices arranged in a voting pattern. Any two controllers that vote
to close will establish a conduction path through the set. Because detection of a shorted relay is important to preserve tripping
reliability, there is a sensing circuit applied to each of the sets of relays. When the relays are commanded to open, and voltage
is present across the relays, the circuit will detect if one or more relays are shorted. This signal goes to the I/O pack to create
an alarm. The TREA sensing circuit uses the relay commands from all three I/O packs to avoid a false indication, in the event
that one I/O pack votes to close the relay while the other two I/O packs vote to open. The voting arrangement is displayed in
the following TREA symbol.

Contacts are polarity-sensitive, external voltage suppression MUST be used.

Caution

Note Many circuit paths in the following drawing have been omitted for clarity.

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 365


GE Internal
Trip Relays
KX1 KY1
K1_PDC Relay V Monitor JZ1
KY1
KZ1
JX1
KZ1 KX1
JY1
K1_NDC JZ1
KX2 KY2
K2_PDC
KY2 Relay V Monitor
KZ2 Relay Drivers
P28X
KZ2 KX2
JX1
K2_NDC KX1 R
D

SOLn_A R
KX2
Trip Voltage JX1 P28Y D
Monitor JY1
SOLn_B 2 Circuits JZ1 JY1
KY1 R ID
D
TRP_A
Estop Monitor JX1
1 Circuit JY1 KY2 R
TRP_B P28Z D
TMR Output JZ1
PWR_A JZ1
Solenoid Power JX1 KZ1 R JY1
D
Monitor JY1
PWR_B 1 Circuits JZ1
KZ2 R
D
Alternate Sol Input
on WTEA

X Channel Speed
Inputs (3 circuits)
MP PRnH_X
U JX1
Suppression
JX1
PRnL_X JY1
Optional Speed JZ1
Fanning Jumper
P1
Speed Fan ID
Y Channel Speed Sense
Inputs (3 circuits)
MP PRnH_Y
U JY1
Suppression JX1
PRnL_Y
Optional Speed
Fanning Jumper
Z Channel Speed P2

Inputs (3 circuits)
MP PRnH_Z
U JZ1
Suppression

PRnL_Z

ID

TREA_1A Trip Relays (PPRO, YPRO)

366 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.7.3 Specifications
Item TREA Specification
Number of inputs 3 x 3 passive (magnetic) speed pickups
3 voltage detection circuits
1 E-STOP/TRP input

Number of outputs 2 trip contacts

Contact ratings NEMA class F. Minimum operations: 100,000

IS200TREA_1A, 3A Voltage: 28 V dc max


Max. Current 10 A dc 40ºC (104 ºF) maximum
de-rate current linearly to 7 A dc 65ºC (149 ºF) maximum
Leakage: 2.21 mA max

IS200TREA_2A, 4A Voltage: 140 V dc max


Max. Current 3 A dc 40ºC (104 ºF) maximum
de-rate current linearly to 2 A dc 65ºC (149 ºF) maximum
Leakage: 3.31 mA max

Voltage detection inputs Min/max input voltage rating: 16/140 V dc max pk


Current Loading (Max leakage): 3 mA
Detection delay (max): 60 ms
Voltage isolation: Optically isolated: 2500 V rms isolation, for one min.
Surge/Spike rating: 1000 V pk for 8.3 ms

ESTOP/TRP detection Input Voltage: 24-125 V dc ±10% (18/140 V pk Min/Max)


Loading (max): 12 mA (5 typical)
Delay (max): 5 ms (<1 typical)

MPU pulse rate range 2 Hz to 20 kHz

MPU pulse rate accuracy 0.05% of reading

MPU input circuit sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 24 mV p-p
20 kHz requires 294 mV p-p

Size 33.0 cm high x 17.8 cm, wide (13 in x 7 in)

Technology Surface mount

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 367


GE Internal
7.7.4 Diagnostics
Diagnostic tests are made on the terminal board:

• Feedback from the shorted contact detector is checked, if a shorted relay is detected an alarm will be created.
• Feedback from speed pickup fanning jumpers is checked; if there is a mismatch between intention and actual position, an
alarm is created.
• If any one of the above signals goes unhealthy, a composite diagnostic alarm occurs. The diagnostic signals can be
individually latched and then reset with the RESET_DIA signal if they go healthy.
• Terminal board connectors have their own ID device that is interrogated by the I/O pack. The ID device is a read-only
chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read
by the I/O pack and a mismatch is encountered, a hardware incompatibility fault is created.

7.7.5 Configuration
Jumpers JP1 and JP2 select the fanning of the 3 X section passive speed pickups to the S and T section I/O packs. Place the
jumper over the pin pairs if you want to fan the 3 R speed input to the other two TMR sections.

368 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.8 TREGH#B, S#B Gas Turbine Trip Board
The Gas Turbine Backup Trip (TREG) terminal board provides power to three emergency trip solenoids and is controlled by
the Mark VIe PPRO or Mark VIeS YPRO. Up to three trip solenoids can be connected between the TREG and TRPG
terminal boards. The TREG provides the positive side of the dc power to the solenoids and TRPG provides the negative side.
The PPRO or YPRO provides emergency overspeed protection, emergency stop functions, and controls the 12 relays on
TREG, nine of which form three groups of three to vote inputs controlling the three trip solenoids.

TREG Terminal Board


P125 V dc
To TRPG
JH1 x J1
x
x x 1 J2
2
x 4
x 3 JZ1 To TSVC
x x 5
6 terminal boards
x x 7
8
x x 9
10
x x 11
12
x x 13
14
x x 15
16
x 18
x 17 Cable to SPRO
TPRO YPRO I/O
x 19 Cable to
x 20 JY1 or SPRO pack mounted
x 22 x 21
x 23 the SPRO
on the TPRO
x 24
x or SPRO

x
x x 25
26
x x 27
28
x x 29
30
x x 31
32 JX1
x x 33 CabletotoSPRO
TPRO
34 Cable
x x 35
36 or SPRO
x x 37
38
x x 39
40
x x 41
42
x 44 x 43
x x 45
46
x x 47
48
x Cable to TPRO
Cable or SPRO
to SPRO
TREG terminal board x

Shield bar 37-pin D shell type


connectors with
latching fasteners
Barrier type terminal
blocks can be
unplugged from board for
maintenance

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 369


GE Internal
7.8.1 Compatibility
The TREG trip board connects to the SPRO or TPRO terminal board. Control power from the JX1, JY1, and JZ1 connectors
are diode combined to create redundant power on the board for status feedback circuits and powering the economizing relays.
Power separation is maintained for the trip relay circuits. The following table lists all compatible versions.

Board TMR Simplex Output Output E-Stop Input Input Economy


Contacts, Contacts, Contacts, Contacts, Resistor
125 V dc 24 V dc 125 V dc 24 V dc
TREGH1B, S1B‡ Yes No Yes Yes Yes Yes No Yes
TREGH2B, S2B‡ Yes No Yes Yes Yes No Yes Yes
†TREGH3B, S3B‡ Yes No Yes Yes Yes Yes No Yes
JX1 28 V dc
†TREGH4B, S4B‡ Yes No Yes Yes Yes Yes No Yes
JY1 28 V dc
†TREGH5B, S5B‡ Yes No Yes Yes Yes Yes No Yes
JZ1 28 V dc
† TREGH3/S3, H4/S4, and H4/S5 versions are the same as the H1/S1 except that power is provided by JX1, JY1, or JZ1.

‡ S#B versions are IEC 67508 safety certified with Mark VIeS YPRO (SPRO or TPRO) or with Mark VIe PPROS1B (only

TPRO)

370 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
7.8.2 Installation
The three trip solenoids, economizing resistors, and the emergency stop are wired directly to the first I/O terminal block. Up
to seven trip interlocks can be wired to the second terminal block. The wiring connections are displayed in the following
figure.

Power 125 V dc To TRPG, 12 wires To servo


terminal
boards on
Turbine Emergency Trip simplex
J2 J1 systems
Terminal Board TREG JH1

JZ1
x
x 1 SOL 1 or 4
PWR_N1 x 2
x 3 RES 1A
RES 1B x 4
x 5 SOL 2 or 5
PWR_N2 x 6
RES 2B x 8
x 7 RES 2A
x 9 SOL 3 or 6
PWR _N3 x 10
x 12
x 11 RES 3A
RES 3B
x 14
x 13 E-TRP (H)
E-TRP (H) x 15
E-TRP (L) x 16 JUMPER
x 17
x 18
x 19 JY1 TPRO or SPRO
SPRO
x 20
x 22
x 21 with
x 23 YPRO I/O
x 24
x pack

x
x 25
x 26
x
x 27
28
x 29
PWR_P2 (for probe) x 30 JX1 TPRO or SPRO
SPRO
x 31 PWR_P1 (for probe)
x 32
x
with
33
x 34 YPRO I/O
x 35 Contact TRP1 (H)
Contact TRP1 (L) x 36 pack
x 37 Contact TRP2 (H)
Contact TRP2 (L) x 38
x 39 Contact TRP3 (H)
Contact TRP3 (L) x 40
x 41 Contact TRP4 (H)
Contact TRP4 (L) x 42
x 43 Contact TRP5 (H)
Contact TRP5 (L) x 44
x 45 Contact TRP6 (H)
Contact TRP6 (L) x 46
x 47 Contact TRP7 (H)
Contact TRP7 (L) x 48
x
TPRO or SPRO
SPRO
with
YPRO I/O
Up to two #12 AWG wires per Terminal blocks can be unplugged
from terminal board for maintenance pack
point with 300 volt insulation

TREG Terminal Board Wiring

Note TREG_2B is a 24 V dc version of the terminal board.

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 371


GE Internal
7.8.3 Operation
The TREG is entirely controlled by the I/O pack. The connections to the control modules are the J2 power cable and trip
solenoids. In simplex systems, a third cable carries a trip signal from J1 to the servo terminal board, which provides a servo
valve clamp function upon turbine trip.

7.8.3.1 Control of Trip Solenoids


Both TRPG and TREG control the trip solenoids so that either one can remove power and actuate the hydraulics to close the
steam or fuel valves. The nine trip relay coils on TREG are supplied with 28 V dc from the I/O pack. The trip solenoids are
supplied with 125 V dc through plug J2, and draw up to 1 A with a 0.1 second L/R time constant.

Note The solenoid circuit has a metal oxide varistor (MOV) for current suppression and an optional 100 Ω, 70 W
economizing resistor.

A separately fused 125 V dc feeder is provided from the turbine control for the solenoids, which energize in the run mode and
de-energize in the trip mode. Diagnostics monitor each 125 V dc feeder from the power distribution module at its point of
entry on the terminal board to verify the fuse integrity and the cable connection.
Two series contacts from each emergency trip relay (ETR1, 2, 3) are connected to the positive 125 V dc feeder for each
solenoid, and two series contacts from each primary trip relay (PTR1, 2, 3 in TRPG) are connected to the negative 125 V dc
feeder for each solenoid. An economizing relay (KE1, 2, 3) is supplied for each solenoid with a normally closed contact in
parallel with the current limiting resistor. These relays are used to reduce the current load after the solenoids are energized.
The ETR and KE relay coils are powered from the I/O pack in each of the R, S, and T sections, which supply an independent
28 V dc source.
The 28 V dc bus is current limited and used for power to an external manual emergency trip contact, displayed as E-Stop.
Three master trip relays (KX4, KY4, KZ4) disconnect the 28 V dc bus from the ETR, and KE relay coils if a manual
emergency trip occurs. Any trip that originates in either the protection module (such as EOS) or the TREG (such as a manual
trip) will cause each of the three protection module sections to transmit a trip command over the IONet to the control module,
and may be used to identify the source of the trip.
In addition, with the Mark VIe PSVO, the K4CL servo clamp relay will energize and send a contact feedback directly from
the TREG terminal board to the TSVC servo terminal board. The servo terminal board disconnects the servo current source
from the terminal block and applies a bias to drive the control valve closed. This is only used on simplex applications to
protect against the servo amplifier failing high.

372 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
TREG Board, Trip Interlocks, and Trip Solenoids

Note ** The KCL4 relay is referred to as K4CL within ladder logic, signal names, and descriptions in this document.

PPRO, YPRO Backup Turbine Protection GEH-6721_Vol_III_BG System Guide 373


GE Internal
7.8.3.2 Solenoid Trip Tests
The Mark VIe or Mark VIeS controller is used to initiate tests of the trip solenoids. Online tests allow each of the trip
solenoids to be manually tripped one at a time, either through the PTR relays from the controller, or through the ETR relays
from the protection module. A contact from each solenoid circuit is wired back as a contact input to give a positive indication
that the solenoid has tripped. Primary and emergency offline overspeed tests are provided too for verification of actual trips
due to software simulated trip overspeed conditions.

7.8.4 Specifications
Item TREG Specification
Number of trip solenoids Three solenoids per TREG (total of six per I/O pack)

Trip solenoid rating H1 and S1 are 125 V dc standard with 1 A draw


H2 and S2 are 24 V dc alternate with 1 A draw
Trip solenoid circuits Circuits rated for NEMA class E creepage and clearance
Circuits can clear a 15 A fuse with all circuits fully loaded

Solenoid inductance Solenoid maximum L/R time constant is 0.1 second


Suppression MOV across the solenoid

Relay outputs Three economizer relay outputs, two second delay to energize
Driver to breaker relay K25A on TTUR
Servo clamp relay on the servo terminal board

Solenoid control relay contacts Contacts are rated to interrupt inductive solenoid loads at 125 V dc, 1 A
Bus voltage can vary from 70 to 140 V dc

Trip inputs Seven trip interlocks to the I/O pack, 125/24 V dc


One emergency stop hard wired trip interlock, 24 V dc

Trip interlock excitation H1 and S1 are nominal 125 V dc, floating, ranging from 100 to 140 V dc

H2 and S2 are nominal 24 V dc, floating, ranging from 18.5 to 32 V dc

Trip interlock current H1 and S1 for 125 V dc applications:


Circuits draw 2.5 mA (50 Ω)

H2 and S2 for 24 V dc applications:


Circuits draw 2.5 mA (10 Ω)

Trip interlock isolation Optical isolation to 1500 V on all inputs

Trip interlock filter Hardware filter, 4 ms

Trip interlock ac voltage rejection 60 V rms 50/60 Hz at 125 V dc excitation

Size 17.8 cm wide x 33.02 cm, high (7.0 in x 13.0 in)

7.8.5 Diagnostics
The I/O pack runs diagnostics on the TREG board and connected devices. The diagnostics cover the trip relay driver and
contact feedbacks, solenoid voltage, economizer relay driver and contact feedbacks, K25A relay driver and coil, servo clamp
relay driver and contact feedback, and the solenoid voltage source. If any of these do not agree with the desired value, a fault
is created.
TREG connectors JX1, JY1, and JZ1 have their own ID device that is interrogated by the I/O pack. The ID device is a
read-only chip coded with the terminal board serial number, board type, revision number, and the plug location. When the
chip is read by the I/O pack and a mismatch is encountered, a hardware incompatibility fault is created.

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7.8.6 Configuration
A jumper must be placed across terminals 15 and 17 if the second emergency stop input is not required. There are no switches
on the terminal board.

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7.9 TREL Large Steam Turbine Trip Board
7.9.1 Functional Description
The Large Steam Turbine Emergency Trip (TREL) terminal board is used for the emergency overspeed protection for large
steam turbines. The TREL is controlled by the PPRO I/O pack in the protection module. It provides power to three emergency
trip solenoids, which can be connected between the TREL and TRPL terminal boards. The TREL provides the positive side of
the 125 V dc (or 24 V dc) to the solenoids and TRPL provides the negative side. The PPRO I/O pack provides emergency
overspeed protection, emergency stop functions, and controls the nine relays on TREL, which form three groups of three to
vote inputs controlling the three trip solenoids. The three groups are called ETR (emergency trip) 1, 2, and 3. The following
also applies to the TREL:

• TREL is only available in TMR form.


• TREL has no economizing relay as with TREG.
• TREL has no E-Stop function as with TREG.

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7.9.2 Installation
The three trip solenoids are wired to the first I/O terminal block. Up to seven trip interlocks are wired to the second terminal
block. The wiring connections are displayed in the following figure. Connector J2 carries three power buses from TRPL, and
JH1 carries the excitation voltage for the seven trip interlocks.

TREL Terminal Board Wiring

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7.9.3 Operation
The TREL is entirely controlled by the PPRO I/O pack. The only connections to the turbine control are the J2 power cable
and the trip solenoids. In simplex systems, a third cable carries a trip signal from J1 to the servo terminal board, providing a
servo valve clamp function upon turbine trip.

7.9.3.1 Control of Trip Solenoids


Both TRPL and TREL control the trip solenoids 1 and 2 so that either one can remove power and actuate the hydraulics to
close the steam or fuel valves. ETR3 is set up to supply power to trip solenoid #3. The nine trip relay coils on TREL are
supplied with 28 V dc from the PPRO . The trip solenoids are supplied with 125 or 24 V dc through plug J2, and draw up to 1
A with a 0.1 second L/R time constant. The solenoid circuit has a MOV for current suppression on TRPL.
A separately fused 125 or 24 V dc feeder is provided from the PDM to the solenoids. Diagnostics monitor each dc feeder
from the PDM at its point of entry on the terminal board to verify the fuse integrity and the cable connection.

Note A normally closed contact from each relay is used to sense the relay status for diagnostics.

Two series contacts from each of the emergency trip relays (ETR1, 2, 3) are connected to the positive 125 or 24 V dc feeder
for each solenoid, and two series contacts from each of the primary trip relays are connected to the negative dc feeder for each
solenoid. The ETR relay coils are powered from a 28 V dc source from the PPRO . Each PPRO in each of the R, S, and T
sections supplies an independent 28 V dc source.
The K4CL servo clamp relay will energize and send a contact feedback directly from the TREL terminal board to the servo
terminal board. The servo terminal board disconnects the servo current source from the terminal block and applies a bias to
drive the control valve closed. This is only used on simplex applications to protect against the servo amplifier failing high.
The primary and emergency overspeed systems will trip the hydraulic trip solenoids independent of this circuit.

7.9.3.2 Solenoid Trip Tests


Software in the Mark VIe controller is used to initiate tests of the trip solenoids. Online tests allow each of the trip solenoids
to be manually tripped one at a time, either through the PTR relays from the controller, or through the ETR relays from the
protection module. A contact from each solenoid circuit is wired back as a contact input to give a positive indication that the
solenoid has tripped. Primary and emergency offline overspeed tests are provided too for verification of actual trips due to
software simulated trip overspeed conditions.

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TREL Terminal Board, Trip, Interlocks, and Trip Solenoids

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7.9.4 Specifications
Item TREL Specification
Number of trip solenoids Three solenoids per TREL (total of six per PPRO I/O pack)

Trip solenoid rating 125 V dc standard with 1 A draw


24 V dc is alternate with 3 A draw or 125 V dc standard with 1 A draw
Trip solenoid circuits Circuits rated for NEMA class E creepage and clearance
Circuits can clear a 15 A fuse with all circuits fully loaded

Solenoid inductance Solenoid maximum L/R time constant is 0.1 sec


Suppression MOV on TRPL across the solenoid

Relay Outputs Driver to breaker relay K25A on TTUR.


Servo clamp relay on the servo terminal board.

Solenoid control relay contacts Contacts are rated to interrupt inductive solenoid loads at 125 V dc, 1 A.
Bus voltage can vary from 70 to 140 V dc

Trip inputs Seven trip interlocks to the PPRO protection module, 125/24 V dc

Trip interlock excitation H1 - Nominal 125 V dc, floating, ranging from 100 to 140 V dc
H2 - Nominal 24 V dc, floating, ranging from 18.5 to 32 V dc

Trip interlock current H1 for 125 V dc applications:


Circuits draw 2.5 mA (50 Ω)
H2 for 24 V dc applications:
Circuits draw 2.5 mA (10 Ω)

Trip interlock isolation Optical isolation to 1500 V on all inputs

Trip interlock filter Hardware filter, 4 ms

Trip interlock ac voltage rejection 60 V rms at 50/60 Hz at 125 V dc excitation

Size 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in)

7.9.5 Diagnostics
The PPRO protection module runs diagnostics on the TREL board and connected devices. The diagnostics cover the trip relay
driver and contact feedbacks, solenoid voltage, K25A relay driver and coil, servo clamp relay driver and contact feedback,
and the solenoid voltage source. If any of these do not agree with the desired value, a fault is created.
TREL connectors JX1, JY1, and JZ1 have their own ID device that is interrogated by the PPRO. The ID device is a read-only
chip coded with the terminal board serial number, board type, revision number, and the plug location. When the chip is read
by the PPRO
I/O pack and a mismatch is encountered, a hardware incompatibility fault is created.

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7.10 TRES Small Steam Turbine Trip Board
7.10.1 Functional Description
The Small Steam Turbine Emergency Trip (TRES) terminal board is used for the emergency overspeed protection for
small/medium size steam turbines. The TRES is controlled by the PPRO I/O pack. The TRES provides power to three
emergency trip solenoids, which can be connected between the TRES and TRPS terminal boards. TRES provides the positive
side of the 125/24 V dc to the solenoids and TRPS provides the negative side. The PPRO I/O pack provides emergency
overspeed protection, emergency stop functions, and controls the three relays on TRES, which control the three trip solenoids.
The following also applies to the TRES:

• TRES has both simplex and TMR form.


• There are seven dry contact inputs for trip interlocks.
• TRES has no economizing relays.
• There are no emergency stop inputs.
In the TRES, the seven dry contact inputs excitation and signal are monitored and fanned to the protection module. The board
includes the synch check relay driver, K25A, and associated monitoring, the same as on TREG, and the servo clamp relay
driver, K4CL, and its associated monitoring. A second TRES board cannot be driven from the protection module.

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7.10.2 Installation
The three trip solenoids are wired to the first I/O terminal block. Up to seven trip interlocks are wired to the second terminal
block. The wiring connections are displayed in the following figure.
Connector J2 carries three power buses from TRPS, and JH1 carries the excitation voltage for the seven trip interlocks.

TRES Terminal Board Wiring

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7.10.3 Operation

7.10.3.1 Control of Trip Solenoids


Both TRPS and TRES control the trip solenoids 1 and 2 so that either one can remove power and actuate the hydraulics to
close the steam or fuel valves. ETR3 is set up to supply power to trip solenoid #3. The nine trip relay coils on TRES are
supplied with 28 V dc from the PPRO I/O pack. The trip solenoids are supplied with 125 or 24 V dc through plug J2, and
draw up to 1 A with a 0.1 second L/R time constant. In simplex systems, a third cable carries a trip signal from J1 to the servo
terminal board, providing a servo valve clamp function upon turbine trip.
A separately fused 125 or 24 V dc feeder is provided from the PDM for the solenoids. Diagnostics monitor each 125 or 24 V
dc feeder from the PDM at its point of entry on the terminal board to verify the fuse integrity and the cable connection. The
solenoid circuit has a MOV for current suppression on TREL.

Note A normally closed contact from each relay is used to sense the relay status for diagnostics

Two series contacts from each of the emergency trip relays (ETR1, 2, 3) are connected to the positive 125 or 24 V dc feeder
for each solenoid, and two series contacts from each of the primary trip relays are connected to the negative 125 or 24 V dc
feeder for each solenoid. The ETR relay coils are powered from PPROs in each of the R, S, and T sections, which supply an
independent 28 V dc source.
The K4CL servo clamp relay will energize and send a contact feedback directly from the TRES terminal board to the servo
terminal board. The servo terminal board disconnects the servo current source from the terminal block and applies a bias to
drive the control valve closed. This is only used on simplex applications to protect against the servo amplifier failing high.
The primary and emergency overspeed systems will trip the hydraulic trip solenoids independent of this circuit.

Note To enable solenoid voltage feedbacks on the TRPS board, install jumpers between SUS#A and either SOL#A or
SOL#B. Connect SUS#A to the solenoid in the chosen configuration. The solenoids may be connected to the NO or NC
contacts of the ETR, and the SUS#A pin should be connected to the same contact to enable the voltage monitoring input. For
jumper configurations needed to enable solenoid voltage feedback, refer to GEI-100575, Mark VIe Control Turbine Specific
Primary Trip (PTUR) Module Description, the section, TRPS Turbine Primary Trip.

7.10.3.2 Solenoid Trip Tests


Software in the Mark VIe controller is used to initiate tests of the trip solenoids. Online tests allow each of the trip solenoids
to be manually tripped one at a time, either through the PTR relays from the controller, or through the ETR relays from the
protection module. A contact from each solenoid circuit is wired back as a contact input to give a positive indication that the
solenoid has tripped. Primary and emergency offline overspeed tests are provided too for verification of actual trips due to
software simulated trip overspeed conditions.

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J 2 , power
buses from
Terminal Board TRES TRPS Terminal
JA 1 Board
P 28 A PwrA_ N PwrB_N
Simplex PwrC_N
TRPS
system
uses JA 1 P 28 X
PwrA_P PwrB_ P PwrC_P
P 28 Y
P 28
P 28 Z Sol .
ID To JX1, Power
JX1 JY1, JZ1, Monitor
JA1 J2
J2
I/O
Controller 2 RD ETR 1
3 SUS1A 01
PwrA_P SUS1B 02 Trip
To X , Y, Z, A
Mon solenoid
ETR1 SOL1A 03 +
ETR 1 -

ID ETR1 SOL1B 04
Several terminals
P 28 PwrA_P 08
PwrA_N positions for
JY1 PwrA_N 09 different
I /O applications
Controller 2 RD ETR 2
3
J2
J2
To X, Y, Z, A
Mon
SUS2A 11
ETR 2
PwrB_P SUS2B 12 Trip
ID
solenoid
ETR2 SOL 2A 13 + -
P 28 ETR2 SOL2B 14
JZ1 PwrB_P 18
PwrB_ N
I /O PwrB_N
RD 19
Controller 2 ETR 3
J2
3 J2

To X , Y, Z, A
SUS3A 21
Mon
ETR 3 PwrC_P SUS3B 22 Trip
ID solenoid
ETR3 SOL3A
To the servo 23 + -
P 28 VV
terminal board ETR3 SOL 3B 24
on simplex K4 CL JX1
J1 2
systems JY1 PwrC_P 28
RD 3 PwrC_N
JZ1
JA1 PwrC_N 29
K4 CL
Servo Clamp To JX 1, JY 1 ,
K4 CL Mon JZ 1, JA1
To TTURH 1B J 25 Exc _ P
Excitation
To relay K 25 A JX1 volts 35 TRP1A
J2 2 NS
on TTUR RD 3 JY1
JZ1 7 36 TRP1B
JA1 NS
JH 1 Mon
Excit_ P . Trip interlock
From .
Excitation _ N .
PDM
BCOM 7 circuits as above

TRES Terminal Board, Trip Interlocks, and Trip Solenoids

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7.10.4 Specifications
Item TRES Specification
Number of trip solenoids Three solenoids per TRES

Trip solenoid rating 125 V dc standard with 1 A draw


24 V dc is alternate with 3 A draw
Trip solenoid circuits Circuits rated for NEMA class E creepage and clearance
Circuits can clear a 15 A fuse with all circuits fully loaded

Solenoid inductance Solenoid maximum L/R time constant is 0.1 sec


Suppression MOV on TRPS across the solenoid

Relay Outputs Driver to breaker relay K25A on TTUR


Servo clamp relay on the servo terminal board.

Solenoid control relay contacts Contacts are rated to interrupt inductive solenoid loads at 125 V dc, 1 A.
Bus voltage can vary from 70 to 140 V dc.

Trip inputs Seven trip interlocks to the PPRO I/O pack

Trip interlock excitation H1 - Nominal 125 V dc, floating, ranging from 100 to 140 V dc
H2 - Nominal 24 V dc, floating, ranging from 18.5 to 32 V dc

Trip interlock current H1 for 125 V dc applications:


Circuits draw 2.5 mA (50 Ω)
H2 for 24 V dc applications:
Circuits draw 2.5 mA (10 Ω)

Trip interlock isolation Optical isolation to 1500 V on all inputs

Trip interlock filter Hardware filter, 4 ms

Trip interlock ac voltage rejection 60 V rms at 50/60 Hz at 125 V dc excitation

Size 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in)

7.10.5 Diagnostics
The PPRO runs diagnostics on the TRES board and connected devices. The diagnostics cover the trip relay driver and contact
feedbacks, solenoid voltage, K25A relay driver and coil, servo clamp relay driver and contact feedback, and the solenoid
voltage source. If any of these do not agree with the desired value, a fault is created.
TRES connectors JA1, JX1, JY1, and JZ1 have their own ID device that is interrogated by the PPRO. The ID device is a
read-only chip coded with the terminal board serial number, board type, revision number, and the plug location. When the
chip is read by the PPRO and a mismatch is encountered, a hardware incompatibility fault is created.

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Notes

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8 PSCH Specialized Serial
Communication
8.1 PSCH Specialized Serial Communication I/O Pack
The Serial Communication Input/Output (PSCH) pack provides specialized
communication support for GE Drilling equipment, including the blowout preventer
(BOP). The PSCH can have one or two I/O Ethernet networks and mounts to the serial
communications terminal board (SSCA). Several unique communication devices
(protocols) can be configured to manage I/O points during scans.

The PSCH I/O pack contains a processor board used with most distributed I/O modules
and a serial communications board (BSCA). The BSCA contains six serial transceiver
channels, each of which can be individually configured to comply with RS-232C, RS-422,
or RS-485 half-duplex standards. Input to the I/O pack is through dual RJ-45 Ethernet
connectors and a 3-pin power input. Output is through a DC-62 pin connector that
connects directly with the associated terminal board connector. Visual diagnostics are
provided through indicator LEDs.

The PSCH does not support frame periods less than 40 ms.

For configuration of I/O


points, refer to GEH-6763,
Mark* VIe Control PSCH
Specialized Serial
Communication Module
Instruction Guide.

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8.1.1 Installation
➢ To install the PSCH I/O pack
1. Securely mount the SSCA terminal board inside the distributed I/O cabinet. Refer to GEH-6721_Vol_II, the chapter
PSCA Serial Communication Module, the section SSCA Simplex Serial Communication Terminal Board.
2. Directly plug one PSCH I/O pack into the SSCA terminal board connector.
3. Mechanically secure the I/O pack using the threaded inserts adjacent to the Ethernet ports. The inserts connect with the
mounting bracket specific to the terminal board type (H1 or H2). The bracket location should be adjusted such that there
is no right angle force applied to the DC-62 pin connector between the PSCH I/O pack and the terminal board. This
adjustment should only be required once in the service life of the PSCH.
4. Plug in one or two Ethernet cables depending on the system configuration. The PSCH operates over either port. If dual
connections are used, standard practice is to attach ENET1 to the network associated with the R controller. However, the
PSCH is not sensitive to Ethernet connections, and will operate correctly over either port.
5. Apply power to the PSCH by plugging in the connector on the side of the I/O pack. It is not necessary to remove power
from the cable before plugging it in because the PSCH has inherent soft-start capability that controls current inrush on
power application.
6. From the ToolboxST* application, add the PSCH I/O module and communication devices. Refer to GEH-6700, the
chapter Special I/O Functions.

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8.1.1.1 Rules and Restrictions
A summary of device restrictions and configuration rules for the PSCH is as follows:

• Maximum number of subsea POD serial channels per PSCH is 1


• Maximum number of surface test POD serial channels per PSCH is 2
• No other device types or serial protocols may be used with a POD device
• Every POD in the system must have a unique POD with Subsea Electronics Module (SEM) configuration setting
• Maximum number of GPS serial channels per PSCH is 1
• No other device types or serial protocols may be used with a GPS device
• Maximum number of other BOP serial channels per PSCH is 4
• PSCH is limited to 4 input exchange buffers and 3 output exchange buffers. Refer to the following table for the number
of input and output exchanges used per I/O device.

Number of Exchanges Required

I/O Device Output Exchange Input Exchange


Ethernet Buffers Ethernet Buffers
FTI (Panametrics) 1 1

ASK 1 –
FTD (OTEK display) 1 –

ERA – 1
UPS – 1

The following are examples of valid configurations:

• PSCH with one ERA, one ASK, and two UPS


• PSCH with two FTIs and one FTD
• PSCH with one subsea POD
• PSCH with two surface test PODs
• PSCH with one GPS
Redundancy

Protocol Simplex HotBackup


FTI, FTD, and GPS Yes No
POD, ASK, ERA, and UPS Yes Yes

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8.1.2 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• Auto-reconfiguration
• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Module Alarms

8.1.2.1 Serial Channels


The BSCA board in the pack contains six independently configurable serial channels. The processor board configures the
channels with one of three mode inputs as follows:

Mode Transceiver
0 RS-232C
1 RS-422
2 RS-485 half duplex only

3 Default/resent state (fail safe)

Jumpers on the SSCA terminal board are used to set up the terminal scheme for the selected communication mode.

8.1.2.2 Data Flow


For most applications, the system is normally configured to use dual Mark VIe controllers and PSCHs with redundancy
configured as HotBackup. The following specialized communication devices provide data flow between equipment, PSCHs,
and Mark VIe controllers:

• Automatic Station Keeping (ASK)


• Electronic Riser Angle (ERA)

• Flow Totalizer Display (FTD)

• Flow Totalizer Input (FTI)


• Global Positioning System (GPS)

Note FTD, FTI, and GPS communication devices do not support HotBackup redundancy.

• POD
• Universal Power Supply (UPS)

Note Refer to GEH-6763, Mark VIe Control PSCH Specialized Serial Communication Module Instruction Guide for more
information on these communication devices.

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8.1.2.3 Connectors
• DC-62 located on the underside of the I/O pack connects directly to a discrete output terminal board.
• RJ-45 Ethernet connector – ENET1 located on the I/O pack side is the primary system interface.
• RJ-45 Ethernet connector – ENET2 located on the I/O pack side is the redundant or secondary system interface.

Note The terminal board provides fused power output from a power source that is applied directly to the terminal board, not
through the I/O pack connector.

8.1.3 Specifications
Item PSCH Specification
Channels Six independently configurable serial channels
One Ethernet Modbus Channel (simplex network)

Communication choices RS-232C Mode


RS-422 Mode
RS-485 Mode half duplex only
Ethernet Modbus Mode
RS-232C Mode Cable distance: 50 ft (15.24 m)
Communication Rate: 115.2 kbps maximum

RS-422 Mode Cable distance: 1000 ft (304.8 m)


Communication Rate: 375 kbps maximum
Number of Drops: 8

RS-485 Mode Cable distance: 1000 ft (304.8 m)


Communication Rate: 115.2 kbps maximum
Number of drops: 8

Size 8.26 cm high x 4.19 cm wide x 12.1 cm deep (3.25 in x 1.65 in x 4.78 in)

Technology Surface-mount
† Ambient rating for enclosure design Operating: -30 to 65ºC (-22 to 149 ºF)

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

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8.1.4 Diagnostics
The I/O pack performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set
Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be individually
latched, and then reset with the RESET_DIA signal if they go healthy.

8.1.5 Configuration
For configuration of I/O points, refer to GEH-6763, Mark VIe Control PSCH Specialized Serial Communication Module
Instruction Guide.

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8.2 PSCH Specific Alarms
The following alarms are specific to the PSCH.

32-67
Description Comm Port #[ ] Device/Station #[ ] Communication Failure - No Response

Possible Cause

• A command was sent to a field device, but no response was received.


• The connected device is powered-off or rebooting.

Solution

• Verify that the serial or Ethernet cable is connected to the field device.
• Verify that the device is powered-on and configured for the correct station ID.
• For serial connections, verify that the baud rate and parity are set correctly.
• For Ethernet connections, verify that the IP address is set correctly.
• Cycle power on the field device.
• Troubleshoot the field device for internal errors, referring to its manual. If the problem persists, replace the field device.

72-107
Description Comm Port #[ ] Device/Station #[ ] Communication Failure - Bad Data

Possible Cause The field device responded, but could not provide data for one or more points.

Solution

• For serial connections, verify that the baud rate and parity are set correctly.
• Cycle power on the field device.
• Troubleshoot the field device for internal errors, referring to its manual. If the problem persists, replace the field device.
• Verify that the slave device is the one expected to be communicating with.

108-113
Description Configuration Problem Port #[ ]

Possible Cause The configuration file downloaded from the Toolbox ST application contained an error.

Solution

• Verify that the I/O and configuration compatibility codes agree between the ToolboxST configuration and the PSCH.
• Build and download the firmware and the configuration to the PSCH.
• If diagnostic persists, restart the PSCH.

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120-125
Description Communication Device Failure Port #[ ]

Possible Cause Failed to create a task to support the configured communication device

Solution

• Verify that the I/O and configuration compatibility codes agree between the ToolboxST configuration and the PSCH.
• Build and download the firmware and the configuration to the PSCH.
• If diagnostic persists, restart the PSCH.

126-131
Description FTI Port #[ ] - Register Set Mismatch

Possible Cause

• The Modbus port is connected to a device other than an Ultrasonic Flow Meter.
• Register 508 is not reporting the correct baud rate.

Solution

• Verify that the serial port is connected to an Ultrasonic Flow Meter.


• Verify that register 508 is returning the baud rate index for the device.
• If the diagnostic persists, restart the PSCH.

132-137
Description Simplex Communication Device on Port #[ ] used in a HotBackup PSCH

Possible Cause A simplex protocol (GPS, FTI, FTD) was defined in a PSCH that was configured as a HotBackup. This
protocol does not support HotBackup.

Solution From the ToolboxST application, either remove the communication device from the port specified, or configure
the PSCH as simplex.

138-143
Description POD Port #[ ] Communication Device Major Revision Mismatch. PSCH: [ ], POD: [ ]

Possible Cause As part of the communications between the PSCH and the POD, certain revision information is
exchanged to ensure compatibility. This alarm indicates that there is a mismatch between the PSCH major revision and the
major revision currently loaded in the POD. From the ToolboxST application, the PSCH major revision MasterMajorRev
displays in the Parameters tab (show advanced rows).

Solution The major revisions of the PSCH and POD must match for communication to occur. Perform one of the
following:

• Upgrade the POD software to match the major/minor revision implemented in the PSCH.
• Re-add the PSCH to the system definition, using a firmware revision that implements the major/minor revision of the
communication device that matches the current version in the POD.

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144-149
Description POD Port #[ ] Communication Device Minor Revision Mismatch. PSCH: [ ], POD: [ ]

Possible Cause As part of the communications between the PSCH and the POD, certain revision information is
exchanged to ensure compatibility. This alarm indicates that there is a mismatch between the PSCH minor revision and the
minor revision currently loaded in the POD. From the ToolboxST application, the PSCH minor revision MasterMinorRev
displays in the Parameters tab (show advanced rows).

Solution The minor revisions of the PSCH and POD must match for communication to occur. Perform one of the
following:

• Upgrade the POD software to match the major/minor revision implemented in the PSCH.
• Re-add the PSCH to the system definition, using a firmware revision that implements the major/minor revision of the
communication device that matches the current version in the POD.

150-155
Description ASK Port #[ ] Prefix string requires '$' then 5 characters

Possible Cause For the ASK communication device on the PSCH, the port is configured with three prefix code strings
for serial communications. These three strings must be six characters in length with the first character being a dollar sign ($).

Solution Correct the three prefix code strings and re-download.

➢ To display and correct these strings


1. From the Component Editor Tree View, select the PSCH.
2. Expand and select the ASK port.
3. From the Summary View, select the Parameters tab.
4. Click the lightening bolt (advanced view) icon.
5. Verify that all names beginning with Prefix are six characters in length and start with a $.
Defaults: PrefixYellow="$HYRIY", PrefixBlue="$HYRIB", PrefixSurfaceRiser="$HYRIT"

156-161
Description Port #[ ]: Scan period, [ ] millisecond, too small for specified baud rate

Possible Cause Based on the number of characters to be transmitted and received on the serial port and the associated
baud rate, the specified scan period is too small.

Solution Do one of the following:

• Increase the scan period.


• Increase the baud rate.
• Configure the PSCH for less data to be transmitted or received.

162-167
Description Port #[ ]: GPS - Satellite signals are too weak

Possible Cause Fewer than three satellite signals have been detected by the GPS unit. No position or time information is
available.

Solution Verify that the GPS antenna is positioned correctly and is connected to the GPS receiver.

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168-173
Description Comm Port #[ ]: Communication Failure - Insufficient Data

Possible Cause The field device responded, but did not provide enough data for a complete response.

Solution

• Verify that the serial or Ethernet cable is connected to the field device.
• Verify that the device is powered-on and configured for the correct station ID.
• For serial connections, verify that the baud rate and parity are set correctly.
• For Ethernet connections, verify that the IP address is set correctly.

174-179
Description Comm Port #[ ]: Communication Failure - Excess Data

Possible Cause The field device responded, but provided more data than required for a complete response.

Solution

• Verify that the serial cable is connected to the correct field device.
• Verify that the device is configured for the correct station ID.
• For Ethernet connections, verify that the IP address is set correctly.

180-185
Description Configuration Problem Port #[ ]: - incorrect scaling values

Possible Cause Scaling data was entered incorrectly.

Solution

• Fix Raw Min to be less than the Raw Max value.


• Fix Eng Min to be less than the Eng Max value.
• To disable scaling, set all four entries (Raw Min, Raw Max, Eng Min, Eng Max) to 0.

186-191
Description Comm Port #[ ]: No HotBackup Primary Detected

Possible Cause No HotBackup Primary was detected for over five seconds.

Solution

• Verify that the primary control bits are being used in the class one variable definition.
• Verify that the R and S primary control are not both set to true for over five seconds.
• Verify that the R and S primary control are not both set to false for over five seconds.

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192-197
Description Comm Port #[ ]: GPS Receiver Configuration Failed

Possible Cause Unable to configure the GPS Receiver

Solution

• Verify the connection to the GPS Receiver is correct.


• Verify the baud rate is 1200, 4800, 9600 or 19200. The auto baud only attempts these values.
• Verify that the Yellow and Blue Panel Baud rates are the same. The Blue panel does not auto-baud and relies on the
Yellow Panel GPS to set the baud rate on the GPS Receiver.

198-203
Description Comm Port #[ ]: - Value exceeds the display's ability, [ ]

Possible Cause Trying to display too large a value

Solution Change the DigitsAfterPt parameter to a value between 0 and 7.

204-209
Description Comm Port #[ ]: Communication Failure - Incorrect Message

Possible Cause The field device responded, but did not provide the correct response.

Solution

• Verify that the serial or Ethernet cable is connected to the correct field device.
• Verify that the device is powered on and configured for the correct station ID.
• For serial connections, verify that the baud rate and parity are set correctly.
• For Ethernet connections, verify that the IP address is set correctly.

210
Description NTP is not currently running - No time sync available

Possible Cause The NTP process is not currently active, which means that UTC clock synchronization is not occurring.

Solution Verify that the GPS signals are not weak, and that the GPS device is providing an accurate time source to the
PSCH.

8.3 Simplex Serial Communication Input/Output (SSCA)


Refer GEH-6721_Vol_II, the chapter PSCA Serial Communication I/O Module, the section, Simplex Serial Communication
Input/Output (SSCA).

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Notes

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9 PSVO Servo Control Module
9.1 PSVO Servo Control I/O Pack
The Servo Control (PSVO) I/O pack provides the electrical interface between one or
two I/O Ethernet networks and a TSVC servo terminal board. The I/O pack contains
common processor board and an application board specific to the servo function. The
PSVO uses the adjacent WSVO servo driver module to handle two servo valve position
loops, with a selection of five servo valve output currents from 10-120 mA dc. The I/O
pack supplies LVDT excitation, and accepts eight LVDT feedbacks and two pulse rate
inputs from fuel flow meters.

Input to the I/O pack is through dual RJ-45 Ethernet connectors, and 28 V dc power is
supplied from the terminal board. Output is through a DC-62 pin connector that
connects directly with the associated terminal board connector. Visual diagnostics are
provided through indicator LEDs.

PSVO
I/O Pack
BSVOH1 A Processor
board board

Ethernet
connections
TSVCH1A
Servo ENET1
Terminal WSVO
Board Servo ENET2
driver
Servo coil outputs
LVDT excitation
LVDT inputs
ENET1
Pulse rate inputs

ENET2
WSVO

ENET1

ENET2
WSVO

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9.1.1 Compatibility
The PSVO I/O pack includes one of the following BPPx processor boards.

• The PSVOH1A contains a BPPB processor.


• The PSVOH1B contains a BPPC processor, and requires firmware V04.09 or later.

Terminal Option for T1 Module


Board through T4 Redundancy Network Redundancy
TSVCH1A With isolation Simplex, 1 I/O pack 1 I/O network with 1 controller
TSVCH2A transformers 2 I/O networks with 2 or 3 controllers
Excludes isolation TMR, 3 I/O packs TMR controllers: 3 I/O network per pack (R, S, T)
transformers Dual controllers: 2 I/O networks with T pack having both networks

9.1.2 Installation
➢ To install the PSVO I/O pack
1. Securely mount the desired terminal board (TSVCH1A or H2A).
2. Directly plug one (simplex) or three I/O packs (for TMR) into the terminal board connectors.
3. Mechanically secure the I/O pack(s) using the threaded inserts adjacent to the Ethernet ports. The inserts connect with a
mounting bracket specific to the terminal board type. The bracket location should be adjusted such that there is no right
angle force applied to the DC-62 pin connector between the I/O pack and the terminal board. The adjustment should only
be required once in the service life of the product.
4. Plug the WSVO servo driver assemblies into the J2 48-pin connectors and secure with the four screws.
5. Plug in one or two Ethernet cables depending on the system configuration. The I/O pack operates over either port. If dual
connections are used, standard practice is to hook ENET1 to the network associated with the R controller, however, the
PSVO is not sensitive to Ethernet connections and negotiates proper operation over either port.
6. Apply power to the I/O packs and drivers using the power switches on TSVC. Use SW3 for R, SW2 for S, and SW1 for
T, and check the indicator lights.

For simplex applications that have a connection to the TSVC JD1 or JD2 (the K1 relay
is being used) verify that SW1 is in the ON position, and verify that the green DS1
LED is lit. This indicates that the necessary P28T power is available. If the DS1 LED
is not lit, then the K1 trip override relay will not provide the intended protection.
Caution
7. Use the ToolboxST* application to configure the I/O packs as necessary.

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9.1.3 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• Auto-reconfiguration
• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Module Alarms

9.1.3.1 Connectors
• The DC 62-pin connector on the underside of the I/O pack connects directly to a discrete output terminal board.
• The RJ-45 Ethernet connector (ENET1) on the I/O pack side is the primary system interface.
• The second RJ-45 Ethernet connector (ENET2) on the I/O pack side is the redundant or secondary system interface.

Note The terminal board provides fused power output from a power source that is applied directly to the terminal board, not
through the I/O pack connector.

9.1.3.2 Calibrate Valve Function


The calibration of LVDTs associated with PSVO, PSVP, PCAA, or PMVE (MVRA or MVRF) servos is required when a new
terminal board is used on a system. The controller saves the barcode of the terminal board and compares it to the current
terminal board during reconfiguration load time. Any time a recalibration is saved, it updates the barcode name to the current
board.

Note Refer to the ToolboxST User Guide for Mark Controls Platform (GEH-6700), the chapter Special I/O Functions. the
section Calibrate Valve Function.

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9.1.3.3 BSVO Servo Board
The BSVO board multiplexes 24 analog channels into a 16-bit A/D converter. The 100 kHz A/D has a ±10 V dc range, and
handles the servo current regulator signals, the LVDT inputs, and power supply monitoring. The current references for the
analog current regulators on WSVO are generated on the BSVO by a 14-bit D/A converter. Excitation for the LVDTs uses a
digital to analog converter, which outputs a sine wave with a frequency of 3.2 kHz. This is filtered and passed to the WSVO.
The board provides signal conditioning for two pulse rate channels and passes the signals to the processor board to determine
the pulse rate.

9.1.3.4 WSVO Servo Driver Assembly


The servo driver assembly has a power supply that converts the P28 voltage input to a positive 15 V and negative 15 V output
for the servo current regulator circuits. There are two servo current regulators working off the current references from the
servo I/O pack. The servo driver circuit has a selection of five configurable gains, and the assembly contains the servo suicide
relays and excitation output driver circuits.

9.1.3.5 Flow Rate / Speed Pickups


An interface is provided for two passive magnetic speed inputs or two TTL active sensor inputs with a frequency range of 2 to
12,000 Hz. The PSVO signal-conditioning circuit is optimized for flow divider sensors, whereas the PTUR circuit is
optimized for primary speed inputs.
Pulse rate inputs can be configured for a variety of applications. Flow types are used for flow divider fuel flow measurements.
Speed type is used for normal single shaft turbines. Speed high type provides extended speed range above the standard speed
type. Speed LM type is designed for LM applications. Speed_HSNG type is used for applications where compensation for
inconsistent tooth spacing on the speed wheel is desired. This pulse rate type will map the spacing of the teeth on the speed
wheel to remove this periodic variation from speed measurements. Mapping locked status bits (HSNGn_Stat) are in signal
space so that the mapping status of the algorithm can be observed. If the status indicator for a pulse rate input is false then the
mapping algorithm sees too much variation in the tooth-tooth measurements to lock onto the tooth geometry.
The Lock_Limit parameter can be adjusted in 1% increments to allow for more tooth-to-tooth variation per revolution.
Increasing the Lock_Limit value will allow the next generation speed algorithm to stay locked with increased variation. The
following are reasons why this parameter may need to be adjusted:

• Magnetized speed wheel


• Two-piece speed wheel
• Electro-magnetic interference from outside sources
• Improper wiring or shielding practices

The cost for opening the Lock_Limit is that it will allow for more speed variation. If
the speed variation is too high when opening up the Lock_Limit, go to the source of
the problem as listed above and correct the issue there.
Attention

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9.1.3.6 Regulators

Type Description
no_fdk Regx_Ref is directly the Servo mA command. Regn_fdbk is not used and set to 0. This regulator type
may be used when the actual servo position regulator is performed in application logic.

1 LV position Position regulator used with a single LVDT Input.

1_PulseRate Pulse rate regulator used with a single pulse rate feedback.

2_LVpilotCyl Pilot Cylinder regulator with two LVDT position feedbacks: LVDT1 (main) and LVDT2 (pilot).

2_LVposMAX Position regulator using the maximum select from 2 LVDT inputs for feedback.

2_LVposMIN Position Regulator using the minimum select from 2 LVDT inputs for feedback.

2_PlsRateMAX Pulse Rate Regulator using the maximum select from two pulse rate feedbacks.

3_LV_LMX Position Regulator using the median select from 3 LVDT inputs for feedback. Originally designed for the
LMX100 gas turbine.

3_LVposMID Position Regulator using the median select from 3 LVDT inputs for feedback. Originally designed for
heavy-duty gas turbines.

4_LV_LM Position Regulator selecting one of two ratio-metric LVDT pairs for the position feedback. Originally
designed for the LM1600, LM2500, and LM6000 gas turbines.

4_LV_LMX Position Regulator selecting from 2 LVDT ratio-metric pairs for feedback.

4_LVp/cylMAX Pilot Cylinder Regulator with four LVDT position feedbacks: LVDT1 (main), LVDT2 (main), LVDT3 (pilot),
and LVDT4 (pilot).

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9.1.4 Specifications
Item PSVO Specification
Number of inputs Eight LVDT windings
Two pulse rate signals

Number of outputs Two servo valve currents


Two excitation sources for LVDTs
Two excitation sources for pulse rate transducers

Power supply voltage Nominal 28 V dc

LVDT accuracy 1% with 14-bit resolution

LVDT input filter Low pass filter with 3 down breaks at 50 rad/sec ±15%

LVDT common mode rejection CMR is 1 V, 60 dB at 50/60 Hz

LVDT excitation output Frequency of 3.2 ±0.2 kHz


Voltage of 7.00 ±0.14 V rms

Pulse rate accuracy 0.05% of speed value calculated from 2hz to 12khz with 16-bit resolution at 50 Hz frame rate
Noise of acceleration measurement is less than ±50 Hz/sec for a 10,000 Hz signal being read at 10
ms
Pulse rate input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 72 mV p-p
12 kHz requires 1486 mV p-p

Magnetic PR pickup signal < 150 V p-p into 60 kΩ

Active PR Pickup Signal 5 to 27 V p-p into 60 kΩ

Servo valve output accuracy 2% with 12-bit resolution


Dither amplitude and frequency adjustable

Fault detection Servo current out of limits or not responding


Regulator feedback signal out of limits
Servo suicided
Calibration voltage range fault
The LVDT excitation is out of range
The input signal varies from the voted value by more than the TMR differential limit
Failed ID chip

Size 8.26 cm high x 4.19 cm wide x 12.1 cm deep (3.25 in x 1.65 in x 4.78 in)

Technology Surface-mount
† Ambient rating for enclosure design PSVOH1B is rated from -40 to 70ºC (-40 to 158 ºF)
PSVOH1A is rated from -30 to 65ºC (-22 to 149 ºF)

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

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9.1.5 Diagnostics
The I/O pack performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set
• Each input has system limit checking based on configurable high and low levels. These limits can be used to generate
alarms, to enable and disable, and as latching and non-latching. RSTSYS resets the out of limits.
Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be individually
latched, and then reset with the RSTDIAG signal if they go healthy.

9.1.5.1 Servo Application LEDs


The ENA1 and ENA2 LEDs indicate that a given servo output is driving current. If a servo is suicided, the corresponding
LED will be off.

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9.1.6 Configuration

9.1.6.1 Parameters
Parameter Description Choices
SystemLimits Allows the user to temporarily disable all system limit checks for Enable (default), Disable
testing purposes. Setting this parameter to Disable will cause a
diagnostic alarm to occur.

9.1.6.2 Variables
Name where Variable Description Type
(p = R, S, or T),
(x = 1 or 2)
L3DIAG_PSVO_p PSVO I/O Diagnostic indication Input non-voted Boolean-3 bits

LINK_OK_PSVO_p PSVO I/O Link OK indication Input non-voted Boolean-3 bits

ATTN_PSVO_p PSVO I/O Attention indication Input non-voted Boolean-3 bits

PS18V_PSVO_p PSVO I/O 18 V Power Supply indication Input non-voted Boolean-3 bits

PS28V_PSVO_p PSVO I/O 28 V Power Supply indication Input non-voted Boolean-3 bits

IOPack_Tmpr_p PSVO I/O Pack Temperature (deg °F) Analog Input non-voted -3 real

Sx_SuicideNV_p ServoOutputx Suicide relay status Input non-voted Boolean-6 bits

Servox_Suicide ServoOutput x Suicide relay status Input voted Boolean-2 bits

HSNGx_STAT Pulse rate x high speed next generation stability status Input voted Boolean
(TRUE for tooth – tooth distance inside Lock_Limit for
tooth geometry compensation)

RegCalMode Regulator under Calibration Input voted Boolean

Accelx Acceleration value of the board point FlowRatex Analog Input voted REAL

Mon# Value assigned to Monx based on configuration Analog Input voted REAL
parameters found in the Monitor Tab, where # = 1 to 8

Excit_Monx Excitation Monitor x (V rms) Analog Input voted REAL

ServoOutxNV Servo Output x measured current (%) Analog Input non-voted Real

ServoxMonitorNV Servo x AvSelection Monitor Analog Input non-voted Real

SysLimxPRx Process Alarm Input Boolean

ActiveCalibCMd Internally generated calibration signal, do Not connect Output Boolean


variable to this signal

9.1.6.3 Regx Variables

Name Regx Variable Description Type


where x = 1 or 2
Regx_CalibratedNV_p Regulator has been calibrated status Input non-voted Boolean-6 bits

RegxFbkFail Regulator x feedback fault status Input non-voted Boolean-6 bits

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Name Regx Variable Description Type
where x = 1 or 2
RegxSensorSpreadAlm Regulator x Sensor Spread Alarm status Input voted Boolean-2 bits

Regx_PosAFlt Regulator x, LM machine only, Position A failure Input voted Boolean

Regx_PosBFlt Regulator x, LM machine only, Position B failure Input voted Boolean

Regx_PosDif1 For LM machines, Position Difference 1 failure Input voted Boolean


For 4LVLMX, PosDif1 is ratio-metric pair A position out of limits

Regx_PosDif2 For LM machines, Position Difference 2 failure Input voted Boolean


For 4LVLMX, PosDif2 is ratio-metric pair B position out of limits

RegxSenAFlt Regulator x Sensor A fault, LMX machines only Input voted Boolean

RegxSenBFlt Regulator x Sensor B fault, LMX machines only Input voted Boolean

RegxSenCFlt Regulator x Sensor C fault, 3LVLMX only Input voted Boolean

RegCalMode Regulator under Calibration Input voted Boolean

RegxSenA2LVSumFlt Regulator x Sensor A 2LV Summation Fault, 4_LV_LMX only Input voted Boolean

RegxSenB2LVSumFlt Regulator x Sensor B 2LV Summation Fault, 4_LV_LMX only Input voted Boolean

Regx_Fdbk Regulator x position feedback Analog Input voted REAL

MiscFdbkxa Regulator x Position A when 2_LVpilotCyl, 4_LV_LM, 4_LV_ Analog Input voted REAL
LMX, and 4LVp/cylMAX regs

MiscFdbkxb Regulator x Position B when 4_LV_LM, and 4_LV_LMX regs Analog Input voted REAL

Regx_Error Position error for the Regulator x position loops and pulse rate Analog Input voted REAL
error for the Pulse Rate reg

RegxFdbkSelState 3LVLMX or 4LVLMX Tri-select State Input DINT


State = 3 indicates MidSelect from 3 Sensors
State = 5 indicates Use single Sensor
State = 4 indicates Average 2 Sensors
State = 6 indicates Min/Max Select of 2 Sensors
State = 7 indicates No Sensor Available
CalibEnabx Enable Calibration Regulator x Output Boolean

SuicidForcex Force Suicide on Reg x Output Boolean

PosDiffEnabx Position Difference Enable for Regulator x when configured as Output Boolean
4_LV_LM

RegxSenAFReq Force a Sensor fault on Regulator x configured as 3 or 4_LV_ Output Boolean


RegxSenBFReq LMX
RegxSenCFReq

RSuicRegx R, S, or T I/O pack Force Suicide for Regulator x Output Boolean


SSuicRegx Used with LV_LMX regs only
TSuicRegx

Regx_Ref Regulator x Position reference (%) where x = 1 or 2 Output Boolean

Regx_NullCor Regulator x Null Bias Correction (%) where x = 1 or 2 Output Boolean

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9.1.6.4 Servos
Servo Description Choices
Parameter
ServoOutput# Servo Output X measured current in percent. Point Edit (Input Real)
where # = 1 or 2
RegNumber Maps a specific regulator to a given servo output. Unused, Reg1, Reg2
(default is Unused)

Servo_MA_Out Nominal servo current rating in milliamperes. 10 mA, 20 mA, 40 mA, 80 mA,
120 mA
(default is 10 mA)

EnablCurSuic Enable Current Suicide Function Enable, Disable


(default is Disable)

EnablFbkSuic Enable Position Feedback Suicide Function Enable, Disable


(default is Disable)

EnblAutoGain Enable Auto Gain function is approved for 4_LV_LM, 3_LVLMX and Enable, Disable
4_LVLMX regulator configurations. The Auto_Gain function modifies (default is Disable)
the regulator output based on the suicide state of the other two
PSVOs. If the total system gain is applied to the configuration
parameter, Reg_Gain, then enabling Auto Gain adjusts the gain in
each of the three PSVOs to provide 100% of the system gain. For
example, G=0.33 for each PSVO if all PSVOs are not suicided, and
G=0.5 for each PSVO if only one of the PSVOs is suicided. The
objective is to maintain a constant gain and null bias under the
condition of a single PSVO output failure.

Coil_RS_Only Configuration parameter is enabled when the PSVO is driving a 2-coil Enable, Disable
servo. For 2-coil servo, no load is connected to the SxTH/L where x = (default is Disable)
1or 2 terminal screws.
AV_Selector Configuration selector to map one of the specified variables to the Coil_OHMs,
PSVO variable, ServoxMonitorNV where x = 1 or 2. Compliance_Voltage
Coil_OHMs = Servo coil resistance (ohms) LM_Auto_Gain
Compliance_Voltage = Servo driver output voltage (V) MA_CMD_PCT
LM_Auto_Gain = Gain determined by Auto_Gain function (%/%) (default is
MA_CMD_PC = Servo mA command (%). Compliance_Voltage)

Curr_Suicide Current command is compared to the actual feedback current. If the 0 to 100
error exceeds the configuration limit, Curr_Suicide (%), then the (default is 5)
Servo output will suicide.

Fdbk_Suicide The position feedback, Regx_Fdbk (%) is compared against the 0 to 10


value, 100% + Fdbk_Suicide (%). If Regx_Fdbk (%) where x = 1 or 2 (default is 5)
exceeds that value, the regulator assumes the feedback has gone
open loop and the servo must be suicided if this condition and the
EnablFbkSuic = Enable.
OpenCoilSuic If configuration parameter, OpenCoilSuic = Enable, then the servo coil Enable, Disable
open detection function will suicide the servo if the function detects an (default is Disable)
open ckt.

Set OpenCoildiag = Enable to receive a diagnostic message as to why


the servo suicide occurred.

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Servo Description Choices
Parameter
OpenCoildiag If enabled, a specific diagnostic message is generated for why the Enable, Disable
servo suicide occurred; for example, Servo x Suicide due to Open (default is Disable)
servo coil.
ShrtCoilSuic If configuration parameter, ShrtCoilSuic = Enable, then the servo coil Enable, Disable
short ckt. detection function will suicide the servo if the function (default is Disable)
detects a short ckt.

Set ShrtCoildiag = Enable to receive a diagnostic message as to why the


servo suicide occurred.

Use of dither with shorted


coil detection enabled is not
recommended.
Attention
ShrtCoildiag If enabled, a specific diagnostic message is generated for why the Enable, Disable
servo suicide occurred; for example, Servo x Suicide due to Short (default is Disable)
circuit of servo coil.

Use of dither with shorted


coil detection enabled is not
recommended.
Attention
TBmAJmpPos TSVC terminal board mA jumper position selection. This should 10 mA, 20 mA, 40 mA, 80 mA,
match the jumper selection on the TSVC to allow the open / short 120 mA_A, 120 mA_B
circuit servo coil detection to work correctly. (default is 10 mA)

RopenTimeLim Time in seconds required for the open circuit condition of the servo 0 to 100
coil to be in effect before a diagnostic and / or suicide of the servo (if (default is 1)
enabled) occurs.

RShrtTimeLim Time in seconds required for the short circuit condition of the servo 0 to 100
coil to be in effect before a diagnostic and / or suicide of the servo (if (default is 1)
enabled) occurs.

RcoilOpen This defines the initial value for the open circuit resistance in ohms. 0 to 10000000000
After the LVDT calibration, the value for RcoilOpen = 2 * (Servo (default is 1000000 simplex or
Compliance Voltage / Servo Current) measured during the calibration 1000000,1000000,1000000
mode. TMR)

There is one value for simplex I/O packs and three values for R, S, and T
on TMR systems.

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Servo Description Choices
Parameter
RcoilShort This defines the initial value for the short circuit resistance in ohms. 0 to 10000000000
After the LVDT calibration, the value for RcoilShort = 0.5 * (Servo (default is 0 simplex or 0,0,0
Compliance Voltage / Servo Current) measured during the calibration TMR)
mode.

There is one value for simplex I/O packs and three values for R, S, and T
on TMR systems.

TMR_DiffLimt Diagnostic limit, TMR Input Vote difference in % 0 to 110


(default is 25)

9.1.6.5 Pulse Rates


Pulse Rates Description Choices
Parameter
FlowRatex Bipolar input = PRxH – PRxL, Point Edit (Input Real)
where x = 1 or 2 Unipolar = TTLx - PRxL

PRType Define the pulse rate feedback type or basic speed range. See Flow, Speed, Speed_High,
section Speed Pickups for description of types. Speed_HSNG, Speed_LM,
Unused
PRScale Scaling: multiplier to convert pulses per second into desired EU for 0 to 1000 EU/pulse
feedback
SysLim1Enabl If enabled, System Limit 1 is active. Enable, Disable
(default is Disable)

SysLim1Latch If enabled, the System Limit 1 function will latch its state if the Latch, NotLatch
FlowRate exceeds the limit function defined by SysLim1Type and (default is Latch)
SysLimit1.

SysLim1Type Defines the compare function used in the Limit1 expression. ≤ or ≥


(default is ≥)

SysLimit1 Defines Limit1 value to be used for the input, FlowRate. 0 to 20,000 EU
(default is 0)

SysLim2Enabl If enabled, System Limit 2 is active. Enable, Disable


(default is Disable)

SysLim2Latch If enabled, the System Limit 2 function will latch its state if the Latch, NotLatch
FlowRate exceeds the limit function defined by SysLim2Type and (default is Latch)
SysLimit2.

SysLim2Type Defines the compare function used in Limit 2’s expression. ≤ or ≥


(default is ≥)

SysLimit2 Defines Limit2 value to be used for the input, FlowRate. 0 to 20,000 EU
(default is 0)

TMR_DiffLimt Diagnostic limit, TMR Input Vote difference in EU 0 to 20,000 EU


(default is 5)

TeethPerRev Number of teeth on speed wheel (per revolution) 1 to 512


(Speed_HSNG
only)

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Pulse Rates Description Choices
Parameter
Calculation rate of speed in milliseconds. Speed is calculated at this 5 to 1000
rate and averaged over the previous time interval specified by this
period.

Speed_x_ms
(Speed_HSNG
only) Using a value other than an integer multiple of the
application frame period can have adverse impact on use of
this control.
Attention
This is the averaging period for acceleration calculation in 10 to 1000
milliseconds. The acceleration is calculated every Accel_X_ms. It is
based on the difference between two speed samples divided by the
sample period. Each acceleration calculation is the average of
acceleration over the period specified by this parameter. For example,
if Accel_x_ms is 40 then acceleration will be the average acceleration
Accel_x_ms
over the previous 80 ms.
(Speed_HSNG
only)

Using a value other than an integer multiple of the


application frame period can have adverse impact on use of
this control.
Attention
Lock_Limit HSNG speed type locking limit for teeth mapping (percent). Refer to 1 to 100
(Speed_HSNG section Speed Pickups for description of Lock_Limit function.
only)

9.1.6.6 Regulators

Regulators Description Choices


Parameter Certain parameters are only available with certain regulator types.
Regulator 1 Select and enable the regulators Enable checkbox
Regulator 2

Reg_Type Regulator Algorithm Type Unused, no_fbk, 1_


LVposition, 1_
Regulator 1, 2 must be enabled before the configuration parameter, Reg_ PulseRate, 2_
Type can be selected. LVpilotCyl, 2_
LVposMAX, 2_
Refer to the section Operations, Regulators for more information.
LVposMIN, 2_
PlsRateMAX, 3_LV_
LMX, 3_LVposMID, 4_
LV_LM, 4_LV_LMX, 4_
LVp/cylMAX

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Regulators Description Choices
Parameter Certain parameters are only available with certain regulator types.
Dither rate in hertz. 12_5 Hz, 25 Hz, 33_33
Hz, 50 Hz, 100 Hz,
Unused
(default is Unused)

Dither_Freq

Use of dither with shorted coil detection enabled is not


recommended.

Attention
DitherAmpl Dither in % current 0 to 10
(default is 2)
Dither magnitudes greater than 2 percent could interfere with the proper
operation of the coil ohm calculation. If dither magnitude is a priority, disable
the coil ohm calculation.
LVDT_Margin Defines the over range in % for the LVDT input. A diagnostic is generated if 1 to 100
this value is exceeded. (default is 2)

LVDT1input This is the LVDT input selection. LVDT1, LVDT2, LVDT3,


With 2_LVpilotCyl selected, LVDT1 is main and LVDT2 is pilot. LVDT4, LVDT5, LVDT6,
With 4_LVp/cylMAX selected, LVDT1 is main, LVDT2 is main, LVDT3 is pilot, LVDT7, LVDT8, Unused
and LVDT4 is pilot. (default is Unused)

RegGain Position loop Gain in % current / Eng Units or usually % current / % position. -200 to 200
(default is 1)

RegNullBias Regulator Null Bias provides a fixed current command in percent to cancel or -100 to 100
null the spring force of the valve which will close the valve if the servo suicides (default is 0)
or shuts down.
TMR_DiffLimt Diagnostic limit, TMR Input Vote difference in % -15 to 150
(default is 5)

MaxPOSvalue Position in Eng. units (usually %) at the maximum end stop of the valve. -15 to 150 (default is
100)

MinPOSvalue Position in Eng. Units (usually %) at the minimum end stop of the valve. -15 to 150 (default is 0)

MnLVDTx_Vrms This is the value of LVDTx V rms at the minimum end stop of the valve. These 0 to 7.1
values are normally set by the Auto-Calibrate function. For TMR, the first (default is 1 simplex or
value is from PSVO-R perspective, the second from PSVO-S, and the last 1,1,1 TMR)
from PSVO-T

There is one value for simplex I/O packs and three values for R, S, and T on TMR
systems.

MxLVDTx_Vrms This is the value of LVDTx V rms at the maximum end stop of the valve. These 0 to 7.1
values are normally set by the Auto-Calibrate function. For TMR, the first (default is 5 simplex or
value is from PSVO-R perspective, the second from PSVO-S, and the last 5,5,5 TMR)
from PSVO-T

There is one value for simplex I/O packs and three values for R, S, and T on TMR
systems.

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Regulators Description Choices
Parameter Certain parameters are only available with certain regulator types.
PRateInputx Pulse Rate input selection PR1, PR2, Unused
(default is Unused)

PilotGain Pilot loop gain in % current / Eng. unit -200 to 200


(default is 1)

CurBreak Current break for nonlinear servo current -100 to 100


(default is 0)

CurClpNg Servo Current Clamp (%) Negative -300 to 300


(default is -100)

CurClpPs Servo Current Clamp (%) Positive -300 to 300


(default is 100)

CurSlope1 Slope current gain modifier for low position error values 0 to 10
(default is 1)
Position regulator requires CurSlope1 and CurSlope2 equal to a nonzero value for
feedback to follow position command.

CurSlope2 Slope current gain modifier for position error > CurBreak limit 0 to 10
(default is 1)
Position regulator requires CurSlope1 and CurSlope2 equal to a nonzero value for
feedback to follow position command.

DefltValue If all position sensors or LVDTs are bad, the regulator feedback is assigned to -1 to 110
this value in percent. (default is 100)

LagTau Position loop Lag Breakpoint (seconds), zero to disable 0 to 10


(default is 0)

LeadTau Position loop Lead Breakpoint (seconds), zero to disable 0 to 10


(default is 0)

SelectMinMax With regulator type 3 or 4_LV_LMX, If 2 of the 3 LVDTs are healthy, this Max, Min
parameter determines whether a minimum select or maximum select is made (default is Max)
for the remaining two sensors.

With regulator type 4_LV_LM, Select the Min or the Max of PositionA or
PositionB when the difference between the two is excessive. Used in
conjunction with PosDiffcmp1 and PosDifftime1.

SensorOofRTD Sensor Out of Range Time Delay (seconds) 0 to 2000


(default is 10)

SenSpreadMx Sensor Spread Maximum (%) -2000 to 2000


(default is 1000)

SensoSpreadTD Sensor Spread Time Delay (seconds) 0 to 2000


(default is 10)

LVDTVsumMarg Allowable rang exceed error (%) for ratio-metric sum 1 to 100
(default is 2)

PosDefltEnab Position Default Enable / Disable Enable, Disable


(default is Enable)

PosDiffcmp1 Position Difference Limit1 (%) -1 to 110


(default is 2)

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Regulators Description Choices
Parameter Certain parameters are only available with certain regulator types.
PosDiffcmp2 Position Difference Limit2 (%) -1 to 110
(default is 3)

PosDifftime1 Position Difference Limit1 Timeout (seconds) 0 to 10


(default is 0.5)

PosDifftime2 Position Difference Limit2 Timeout (seconds) 0 to 10


(default is 0.5)

PosSelect Position Selection Mode Avg, Max, Min


(default is Avg)

SenSumChkTD Volts RMS Sum Check Out of Range Time Delay (seconds) 0 to 2000
(default is 10)

9.1.6.7 Monitors
Monitors Description Choices
Parameter Certain parameters are only available with certain monitor types.
MonType Monx will equal sensor position expressed in percent assigned in the 1_LMposition
3LVLMX regulator where x = 1 to 8

Monx will equal sensor position expressed in V rms assigned in the 4_LV_ 1_LMVRMS
LMX, 3_LV_LMX, or 4_LV_LM regulator where x = 1 to 8

Monx will equal the scaled value from the LVDT assigned through LVDT1 1_LVposition
input where x = 1 to 8

Monx will equal the maximum selected scaled value from two LVDTs 2_LVposMAX
assigned through LVDTyinput where x = 1 to 8 and y = 1 to 2.

Monx will equal the minimum selected scaled value from two LVDTs 2_LVposMIN
assigned through LVDTyinput where x = 1 to 8 and y = 1 to 2.

Monx will equal the median selected scaled value from three LVDTs 3_LVposMID
assigned through LVDTyinput where x = 1 to 8 and y = 1 to 3.

LMPOSin LMX Position Input Selector Reg1SenAPos,


Reg1SenBPos,
Reg1SenCPos,
Reg1SenDPos (not used),
Reg2SenAPos,
Reg2SenBPos,
Reg2SenCPos,
Reg2SenDPos (not used),
Unused (default)

TMR_DiffLimt Diagnostic limit, TMR Input Vote difference in % -15 to 150


(default is 5)

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Monitors Description Choices
Parameter Certain parameters are only available with certain monitor types.
LVRMSin LMX VRMS Input Selection Reg1SenAVrms,
Reg1SenBVrms,
Reg1SenCVrms,
Reg1SenDVrms (4LVLMX
only),
Reg2SenAVrms,
Reg2SenBVrms,
Reg2SenCVrms,
Reg2SenDVrms (4LVLMX
only),
Unused (default)

LVDT_Margin Defines the over range in % for the LVDT input. A diagnostic is generated 1 to 100
if this value is exceeded. (default is 2)

LVDTxinput LVDTx input selection LVDT1, LVDT2, LVDT3,


LVDT4, LVDT5, LVDT6,
LVDT7, LVDT8, Unused
(default)

MaxPOSvalue Position in Eng. units (usually %) at the maximum end stop of the valve. -15 to 150
(default is 100)

MinPOSvalue Position in Eng. Units (usually %) at the minimum end stop of the valve. -15 to 150
(default is 0)

MnLVDTx_ This is the value of LVDTx V rms at the minimum end stop of the valve. 0 to 7.1
Vrms These values are normally set by the Auto-Calibrate function, and must be (default is 1 simplex or 1,1,1
manually entered. For TMR, the first value is from PSVO-R perspective, TMR)
the second from PSVO-S, and the last from PSVO-T perspective.

There is one value for simplex I/O packs and three values for R, S, and T on
TMR systems.

MxLVDTx_ This is the value of LVDTx V rms at the maximum end stop of the valve. 0 to 7.1
Vrms These values are normally set by the Auto-Calibrate function, and must be (default is 5 simplex or 5,5,5
manually entered. For TMR, the first value is from PSVO-R perspective, TMR)
the second from PSVO-S, and the last from PSVO-T perspective.

There is one value for simplex I/O packs and three values for R, S, and T on
TMR systems.

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9.2 PSVO Specific Alarms
The following alarms are specific to the PSVO I/O pack.

33-40
Description LVDT #[ ] RMS voltage for Regulator [ ] out of limits

Possible Cause

• Excitation to LVDT, faulty transducer, or open or short-circuit


• LVDT [ ] input to the analog to digital converter exceeded the converter limits
• LVDT scaling configuration (MnLVDT[ ]_Vrms, MxLVDT[ ]_Vrms) has not been calibrated.

Solution

• Check the field wiring between the TSVC excitation output and the LVDT including shields.
• Check for approximately 7 V rms at the TSVC Excitation screws.
• Check the feedback wire between LVDT and TSVC LVDT Input connections (including shields).
• Check the LVDT for mechanical integrity.
• Calibrate the regulator with the proper LVDTs.
• Verify the configuration limits, MnLVDT[ ]_Vrms and MxLVDT[ ]_Vrms for the affected regulator.
• Problem is usually not a PSVO or terminal board failure if other LVDT inputs are working correctly.

45
Description Calibration Mode Enabled

Possible Cause

• Variable CalibEnab# set to True and user has selected the Calibration Mode button in the Calibrate Valve dialog.

Solution

• This alarm is active to annunciate that the I/O pack is in a special mode where servo suicide protection has been disabled,
the user needs to take special precautions in this mode.
• Exit calibration mode and set CalibEnab# to False.

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46
Description PSVO not online, Servos suicided

Possible Cause Servo outputs suicided because I/O pack offline

Solution

• Verify that the controller is online.


• Verify that network connections to the I/O pack are okay.

47-48
Description Servo current #[ ] disagrees w/ ref, suicided

Possible Cause

• Possible open circuit in servo current loop


• Servo current feedback does not match servo current command within specified (Cur_Suicide) percentage and
EnablCurSuic is enabled.
• Jumper configuration set incorrectly
• Open circuit to servo coil
• I/O pack hardware failure

Solution

• Check the field wiring for an open loop


• Check for servo open coil.
• Verify the proper settings of TSVC hardware jumpers.
• Verify the proper setting of configuration parameters and tuning of servo.
• Replace the PSVO and WSVO.

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52-53
Description Servo current #[ ] short circuit

Possible Cause

• Servo short circuit detection enabled (ShrtCoildiag) and low resistance measured
• Possible shorted servo coil
• Shorted coil threshold (RcoilShort) or shorted coil time limit (RShrtTimeLim) set incorrectly.

Solution

• Verify the proper servo ohm value.


• Set AV_Selector to the value Coil_OHMS (build/download), and view the measured coil resistance displayed in
Servo#MonitorNV_R,S,T.
• Verify that the measured resistance matches the actual coil resistance, and is above RcoilShort value.
• Verify that the RcoilShort is set to the proper value. Re-calibrate to update measured resistance values.
• Verify the proper setting on the Servo_MA_Out parameter.
• Verify that the terminal board jumpers match the configuration.

57-58
Description Servo current #[ ] open circuit

Possible Cause

• Servo short circuit detection enabled (OpenCoildiag) and low resistance measured
• Possible open servo coil
• Open coil threshold (RcoilOpen) or open coil time limit (RopenTimeLim) set incorrectly

Solution

• Check field wiring for possible open circuit. Verify the proper servo ohm value.
• Set AV_Selector to value Coil_OHMS (build/download) and view the measured coil resistance displayed in
Servo#MonitorNV_R,S,T.
• Verify that the measured resistance matches actual coil resistance, and is below value.
• Verify that the RcoilOpen is set to the proper value. Re-calibrate to update measured resistance values.
• Verify that the terminal board jumpers match the configuration.

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62-63
Description Servo posititon #[ ] fdbk out of range, suicided

Possible Cause

• LVDT position feedback outside specified range


• LVDT inputs not calibrated or V rms limits incorrect

Solution

• Check field wiring including shields and LVDT excitation. Problem is usually not a PSVO or terminal board failure if
other LVDT inputs are working correctly.
• Check the LVDT sensor.
• Calibrate the servo regulator with the proper LVDT.
• Verify that LVDT_Margin is set to the proper value.

67-68
Description Regulator #[ ] configuration error

Possible Cause

• Regulator LVDTInput connected to unused LVDT


• LVDT selected by two or more LVDTInputs
• MnVrms and MxVrms values are equal for LVDTInput
• Regulator selected by Servo but not enabled
• Not enough Pulse Rates selected for a regulator
• For Pilot Cylinder regulators, Servo CurrentRange parameters not equal

Solution

• Use Advanced Diagnostics command, Servo Regulator Config Error to display decoded fault code.
• Verify the regulator configuration settings.
• Verify the servo configuration settings.
• Verify that the LVDT input setup (Max/Min limits) matches the regulator configuration.
• Verify that the configured regulators are used by the proper servos.

72
Description Internal calibration reference voltage range fault

Possible Cause Internal voltage reference values out of range.

Solution Replace I/O pack hardware.

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73-74
Description Lvdt excitation #[ ] voltage out of range

Possible Cause

• Possible short in excitation voltage.


• Excitation voltage too low.

Solution

• Disconnect LVDT excitation from terminals and check that excitation voltage at TSVC screws is approximately 7 V rms.
• If proper voltage is verified, check field wiring from terminal board to the LVDT sensor and LVDT electrical integrity for
shorted coil.
• If improper voltage at screws, replace PSVO and WSVO, then TSVC.

77
Description Servo Output Assignment Mismatch

Possible Cause

• Regulator types 2_LVpilotCyl and 4_LVp/cylMAX require two servos assigned to regulator. These servos must match in
configured parameters.

Solution

• Verify that both servos specify the configured regulator.


• Verify that servo configuration parameters (Servo_MA_Out) are both set to the same value.

90-96
Description Power supply [ ] V is out of range, voltage = [ ]

Possible Cause

• Specified internal power supply voltage incorrect.

Solution

• Replace the WSVO.


• If the problem still exists, replace the PSVO.

97
Description Pack internal null voltage out of limits, voltage = ([ ])V

Possible Cause The null voltage is more than +/- 5% from the expected value which indicates a hardware failure.

Solution

• Cycle power on the PSVO.


• Replace the PSVO.

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108-109
Description LVDT configuration error on Regulator #[ ]

Possible Cause

• For regulators 4_LV_LM and 4_LV_LMX, the configured LVDT V rms limits configured incorrectly for ratiometric
LVDTs.

Solution

• Verify that ratiometric LVDT pairs have opposite V rms values in the Min/Max limits.

110-111
Description Servo Coil #[ ] not within resistance limits, resulting in Servo Coil Open and Short Detection functions being
disabled

Possible Cause During calibration, the measured servo coil resistance was out of range.

Note As a result of this alarm condition, RCoilShort and RCoilOpen values were not saved during calibration.

Solution

• Verify that Servo_MA_Out setting matches the terminal board jumpers.


• Verify servo coil resistance.
• Verify field wiring.

112-119
Description Regulator #[ ] Sensor #[ ] out of range

Possible Cause

• LVDT position feedback is outside the specified range.


• LVDT inputs have not been calibrated or V rms limits are incorrect.

Solution

• Check field wiring including shields and LVDT excitation. Problem is usually not a PSVO or terminal board failure if
other LVDT inputs are working correctly.
• Check the LVDT sensor.
• Calibrate the servo regulator with the proper LVDT.
• Verify that LVDT_Margin is set to the proper value.

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120-121
Description Servo #[ ] Suicided

Possible Cause

• Servo suicided.
• Regulator feedback out of range.
• Servo Current feedback differs from Servo Current command.
• Open or shorted coil detected.

Solution

• LVDT feedback issue: Check LVDT connections.


• Check LVDT mechanical integrity to the valve.
• Check for wiring of servo output loop for open or short circuit.
• Check for a short or an open servo coil.

128
Description Logic Signal [ ] Voting Mismatch

Possible Cause N/A

Solution N/A

192-215
Description LVDT #[ ] RMS voltage for Monitor [ ] out of limits

Possible Cause

• After a PSVO calibration, the Min/Max V rms saved values for the LVDTs were not manually copied to the Monitors.
• Excitation to LVDT, faulty transducer, or open or short-circuit.
• LVDT [ ] input to analog-to-digital converter exceeded converter limits.
• LVDT scaling configuration (MnLVDT[ ]_Vrms, MxLVDT[ ]_Vrms) not calibrated.

Solution

• After calibration, manually copy the saved LVDT Min/Max V rms values from the Regulator tab to the Monitors.
• Check field wiring between the TSVC excitation output and LVDT, including shields.
• Check for approximately seven V rms at the TSVC excitation screws.
• Check the feedback wire between the LVDT and TSVC LVDT input connections, including shields.
• Check the LVDT for mechanical integrity.
• Verify the configuration limits, MnLVDT[ ]_Vrms and MxLVDT[ ]_Vrms for the affected regulator.
• Problem is usually not a PSVO or terminal board failure if other LVDT inputs are working correctly.

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224-247
Description Input Signal [ ] Voting Mismatch, Local=[ ], Voted=[ ]

Possible Cause Voter disagreement between R, S, and T I/O packs.

Solution Adjust the specified parameter below for each input type:

• If input variable is FlowRate[ ], adjust the TMR_DiffLimt.


• If input signal is Reg[ ]_Fdbk, adjust the TMR_DiffLimt on the Regulators tab.
• If input variable is Mon[ ], adjust the TMR_DiffLimt on the Monitors tab.
• If input variable is ServoOutput[ ], adjust the TMR_DiffLimt.
• Check for a mismatch in the coil resistance.
• Reg[ ]_Gain is set too high for the specified TMR_DiffLimt value.

1050
Description R Detects S ComFailure on channels 1+2

Possible Cause

• S I/O pack serial communication to R I/O pack failed


• S I/O pack rebooted
• S I/O pack not connected properly

Solution

• Verify that the S PSVO is seated correctly on the terminal board.


• Check the S I/O pack for other diagnostics to determine the cause of the reboot.
• Replace the S I/O pack.
• Replace the terminal board.

1051 - 1052
Description R Detects S ComError on channel [ ]

Possible Cause

• S I/O pack serial communication to R I/O pack failed


• S I/O pack rebooted
• S I/O pack not connected properly

Solution

• Verify that the S PSVO is seated correctly on the terminal board.


• Check S I/O pack for other diagnostics to determine cause of reboot.
• Replace the S I/O pack.
• Replace the terminal board.

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1053
Description R Detects T ComFailure on channels 1+2

Possible Cause

• T I/O pack serial communication to R I/O pack failed


• T I/O pack rebooted
• T I/O pack not connected properly

Solution

• Verify that the T PSVO is seated correctly on the terminal board.


• Check the T I/O pack for other diagnostics to determine the cause of the reboot.
• Replace the T I/O pack.
• Replace the terminal board.

1054 - 1055
Description R Detects T ComError on channel [ ]

Possible Cause

• T I/O pack serial communication to R I/O pack failed


• T I/O pack rebooted
• T I/O pack not connected properly

Solution

• Verify that the T PSVO is seated correctly on the terminal board.


• Check the T I/O pack for other diagnostics to determine the cause of the reboot.
• Replace the T I/O pack.
• Replace the terminal board.

1056
Description R Detects R ComFailure on channels 1+2

Possible Cause R I/O Pack serial communication failure on R feedback indicates internal hardware failure.

Solution

• Verify that the R PSVO is seated correctly on the terminal board.


• Replace the R I/O pack.
• Replace the terminal board.

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1057 - 1058
Description R Detects R ComError on channel [ ]

Possible Cause R I/O Pack serial communication failure on R feedback indicates an internal hardware failure

Solution

• Verify that the R PSVO is seated correctly on the terminal board.


• Check R I/O pack for other diagnostics to determine cause of reboot.
• Replace the R I/O pack.
• Replace the terminal board.

1059
Description S Detects R ComFailure on channels 1+2

Possible Cause

• R I/O pack serial communication to S I/O pack failed


• R I/O pack rebooted
• R I/O pack not connected properly

Solution

• Verify that the R PSVO is seated correctly on the terminal board.


• Check the R I/O pack for other diagnostics to determine the cause of the reboot.
• Replace the R I/O pack.
• Replace the terminal board.

1060 - 1061
Description S Detects R ComError on channel [ ]

Possible Cause

• R I/O pack serial communication to S I/O pack failed


• R I/O pack rebooted
• R I/O pack not connected properly

Solution

• Verify that the R PSVO is seated correctly on the terminal board.


• Check the R I/O pack for other diagnostics to determine the cause of the reboot.
• Replace the R I/O pack.
• Replace terminal board.

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1062
Description S Detects T ComFailure on channels 1+2

Possible Cause

• T I/O pack serial communication to S I/O pack failed


• T I/O pack has rebooted
• T I/O pack is not connected properly

Solution

• Verify that the T PSVO is seated correctly on the terminal board.


• Check the T I/O pack for other diagnostics to determine the cause of the reboot.
• Replace the T I/O pack.
• Replace the terminal board.

1063 - 1064
Description S Detects T ComError on channel [ ]

Possible Cause

• T I/O pack serial communication to S I/O pack failed


• T I/O pack rebooted
• T I/O pack not connected properly

Solution

• Verify that the T PSVO is seated correctly on the terminal board.


• Replace the T I/O pack.
• Replace the terminal board.

1065
Description S Detects S ComFailure on channels 1+2

Possible Cause S I/O Pack serial communication failure on S feedback indicates internal hardware failure

Solution

• Verify that the S PSVO is seated correctly on the terminal board.


• Replace the S I/O pack.
• Replace the terminal board.

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1066 - 1067
Description S Detects S ComError on channel [ ]

Possible Cause S I/O Pack serial communication failure on S feedback indicates internal hardware failure

Solution

• Verify that the S PSVO is seated correctly on the terminal board.


• Replace the S I/O pack.
• Replace the terminal board.

1068
Description T Detects R ComFailure on channels 1+2

Possible Cause

• R I/O pack serial communication to T I/O pack failed


• R I/O pack rebooted
• R I/O pack not connected properly

Solution

• Verify that the R PSVO is seated correctly on the terminal board.


• Check the R I/O pack for other diagnostics to determine the cause of the reboot.
• Replace the R I/O pack.
• Replace the terminal board.

1069 - 1070
Description T Detects R ComError on channel [ ]

Possible Cause

• R I/O pack serial communication to T I/O pack failed


• R I/O pack rebooted
• R I/O pack not connected properly

Solution

• Verify that the R PSVO is seated correctly on the terminal board.


• Check the R I/O pack for other diagnostics to determine the cause of the reboot.
• Replace the R I/O pack.
• Replace the terminal board.

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1071
Description T Detects S ComFailure on channels 1+2

Possible Cause

• S I/O pack serial communication to T I/O pack failed


• S I/O pack rebooted
• S I/O pack not connected properly

Solution

• Verify that the S PSVO is seated correctly on the terminal board.


• Check the S I/O pack for other diagnostics to determine the cause of the reboot.
• Replace the S I/O pack.
• Replace the terminal board.

1072 - 1073
Description T Detects S ComError on channel [ ]

Possible Cause

• S I/O pack serial communication to T I/O pack failed


• S I/O pack rebooted
• S I/O pack not connected properly

Solution

• Verify that the S PSVO is seated correctly on the terminal board.


• Check the S I/O pack for other diagnostics to determine the cause of the reboot.
• Replace the S I/O pack.
• Replace terminal board.

1074
Description T Detects T ComFailure on channels 1+2

Possible Cause T I/O Pack serial communication failure on T feedback indicates internal hardware failure.

Solution

• Verify that the T PSVO is seated correctly on the terminal board.


• Replace the T I/O pack.
• Replace the terminal board.

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1075 - 1076
Description T Detects T ComError on channel [ ]

Possible Cause T I/O Pack serial communication failure on T feedback indicates internal hardware failure

Solution

• Verify that the T PSVO is seated correctly on the terminal board.


• Replace the T I/O pack.
• Replace the terminal board.

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9.3 TSVC Servo Input/Output Terminal Board
9.3.1 Functional Description
The Servo Input/Output (TSVC) terminal board interfaces to two electro-hydraulic servo valves that actuate the steam/fuel
valves. Valve position is measured with linear variable differential transformers (LVDT). TSVC is designed specifically for
the PSVO I/O pack and the WSVO servo driver. The terminal board supports simplex and TMR configurations. Three 28 V
dc supplies come in through plug J28. Plugs JD1 or JD2 are for an external trip from the protection module.

TSVC Servo Terminal Board


TSVCH1 T1 through T4 isolation transformers provide galvanic isolation between the WSVO's excitation output driver and
the primary-side of the LVDT/R position sensor.
TSVCH2 excludes the isolation transformers T1 through T4 resulting in no galvanic isolation between the WSVO excitation
driver output and the LVDT/R position sensor.

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9.3.2 Installation
Sensors and servo valves are wired directly to two I/O terminal blocks. Each block is held down with two screws and has 24
terminals accepting up to #12 AWG wiring. A shield terminal strip attached to chassis ground is located immediately to the
left of each terminal block. External trip wiring is plugged into either JD1 or JD2.
Each servo output can have three coils in TMR configuration. The size of each coil current is jumper selected using JP1, 3, 5
for Servo 1, and JP2, 4, 6 for servo 2.
Three 28 V dc power supplies for the R, S, and T board functions are connected to J28. Two non-isolated LVDT excitation
sources for S and T are wired to terminal block TB3 and TB4.

Servo/LVDT Terminal Board Wiring

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The three J1 connectors for the PSVO I/O packs are R, S, and T. These plug into the DC-37 pin connector with latching
fasteners, and bolt to a side bracket holding the I/O packs in place. The three J2 connectors for the WSVO servo drivers are R,
S, and T. Each WSVO is held down with four screws. The WSVO servo driver and PSVO I/O pack are ordered as a set and
should be replaced if diagnostics indicate a servo problem.
The PSVO I/O pack and WSVO driver can be replaced with the unit running by removing power from the failed channel with
the corresponding manual enable switch, SW1, or SW2, or SW3. Power to each channel is indicated with LEDs on the board
and LEDs on each power switch.

9.3.3 Operation
The TSVC servo terminal board provides two channels consisting of bi-directional servo current outputs, LVDT position
feedback, LVDT excitation, and pulse rate flow inputs. It provides excitation for, and accepts inputs from, up to eight LVDT
valve position inputs. There is a choice of one, two, three, or four LVDTs for each servo control loop. The two pulse rate
inputs are used for gas turbine liquid fuel flow feedback measurement. Each servo output is equipped with an individual
suicide relay under firmware control that shorts the PSVO output signal to signal common when de-energized, and recovers to
nominal limits after a manual reset command is issued. Diagnostics monitor the output status of each servo voltage, current,
and suicide relay.
Each of the servo output channels can drive either one or two-coil servos in simplex applications, or two or three-coil servos
in TMR applications. The two-coil TMR applications are for 200# oil gear systems where each of two control PSVOs drive
one coil each, and the third PSVO has no servo coil interface. Servo cable lengths up to 300 m (984 ft) are supported with a
maximum two-way cable resistance of 15 Ω. Since there are many types of servo coils, a variety of bi-directional current
sources are jumper selectable.

Note The primary and emergency overspeed systems will trip the hydraulic solenoids independent of this circuit.

For simplex applications, a trip override relay K1 is provided on the terminal board, which is controlled from the PPRO
protection module. If an emergency overspeed condition is detected in the protection module, the K1 relay will energize,
disconnect the servo output, and apply a bias to drive the control valve closed. This is only used on simplex applications to
protect against the servo amplifier failing high, and is functional only with respect to the servo coils driven from <R>.
For Simplex applications that require this backup protection relay, verify that the JPDM or JPDS wiring includes jumpers
between the PR, PS, and PT connectors on either TB1 or TB2 to energize the T bus, and that the TSVC SW1 is in the ON
position. The TSVC green DS1 LED (indicating that P28T is available) should be lit if power is being supplied for the K1
relay. Illumination of the DS1 LED is sufficient to demonstrate that power to energize the K1 relay is available.

For simplex applications that have a connection to the TSVC JD1 or JD2 (the K1 relay
is being used) verify that SW1 is in the ON position, and verify that the green DS1
LED is lit. This indicates that the necessary P28T power is available. If the DS1 LED
is not lit, then the K1 trip override relay will not provide the intended protection.
Caution

9.3.3.1 LVDT Excitation


In TMR applications, the LVDT signals fan out to three I/O packs through JR1, JS1, and JT1. A single 5-pin connector brings
power into the TSVC where the three voltages are diode high-selected and current limited to supply 24 V dc to the pulse rate
active probes.

Note Only two pulse rate probes on one TSVC are used.

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LVDT and Pulse Rate Inputs Mark VIe Controller
Application Logic

Servo Terminal Board


Servo Pack <R > Digital Servo Driver < R >
TSVCH1 A
PSVO servo
Input Portion WSVO
JR 1 regulator
LVDT ( or LVDR ) A / D converter
LVDT1 H 1 8 Ckts .
3.2 kHz , Regulator
A/ D
7 V rms
excitation LVDT1 L 2 P28VR
source SCOM
JS1 D/ A
J 28
D/ A Servo driver
28 V dc for R 1
28 V dc return 4 converter To servo
voltage
28 V dc for S 2 P28VS outputs
5 P 28 V limit
28 V dc return JT1 on TSVC
28 V dc for T 3
E n a b l e swi tch,
fu se , a n d l i g h t
P28VT

Configurable
P24 V1 41 CL Gain
P28 V
JR1 3. 2 k Hz To TSVC
PCOM 42
continued excitation
Pulse rate P1 TTL 39 Pulse
inputs
Rate
active probes P1H 43
(

PR
2 Hz - 12 kHz
TTL P1L 44
JS1
continued
45 CL
P24 V2 PSVO Servo Pack <S > WSVO Driver < S>
46
PCOM JT1
40
P2 TTL continued
Pulse rate
P2 H 47 PSVO Servo Pack <T> WSVO Driver <T>
(

inputs , PR
magnetic MPU P2L 48
pickups
Noise
2 Hz - 12 kHz suppression
TSVC continued

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For TMR systems, each servo channel has connections to three output coils with a range of current ratings up to 120 mA,
selected by jumper.

TSVC Servo Coil Outputs and LVDT Excitation

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9.3.3.2 Pilot Cylinder Servo Control
The pilot cylinder regulator types are used on low-pressure hydraulic systems with an inner pilot position loop. Both servo
outputs must be assigned to the same regulator. Each servo output is configured for ±120 mA current, yielding a total current
of ±240 mA. The following figure displays approved wiring options and jumper settings.

Mark VIe Controller


Application logic

Servo Terminal Board TSVCH 1A (continued )

Servo Pack R Digital Servo Driver R


PSVO Servo WSVO
Regulator JD1
Trip input from
A/D converter P28V 1 PPRO not used
2 for TMR
A/D Regulator
JD2
1
Suicide relay P 28 V
2 Parallel Servos for
D/A Servo J P1
D/A Pilot / Cylinder App .
120B
Converter Driver (s) 120 ( 240 mA max .) for
JR1 80
25 S1RH Servo coil from R
40
P 28 V 20
10 31

26 S1RL
Configurable
Gain The resistance
JR2 JP 2 calculation will
120B measure only half
120
Pulse 80
of the current
40
33 S2RH through the coil
Rate
20 resistance , so the
10 reported resistance
Configurable 34 S2 RL
Gain is twice the actual
coil resistance of
the actuator .

JS1 J P3 Parallel Servos for


120 B Pilot / Cylinder App.
120 ( 240 mA max .) for
80
40
27 S1SH Servo coil from S
20
10
28 S1SL
PSVO Servo Pack S WSVO Driver S JS2 J P4
120B
120
80 35 S2 SH
40
20
10
36 S2SL

JT1/2 J P3
120B
120
80
29 Pilot / Cylinder App.
40 S 1TH
using PSVO does
20
10 not use Servo Outs
from T (user does
PSVO Servo Pack T WSVO Driver T 2 Ckts. 30 not have to put a
S 1TL resistor load on T )

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9.3.3.3 Servo Coil Resistance
The following table defines the standard servo coil resistance and their associated internal resistance, selected with the
terminal board jumpers displayed in the previous figures. In addition to these standard servo coils, it is possible to drive
non-standard coils by using a non-standard jumper setting. For example, an 80 mA, 125 Ω coil could be driven by using a
jumper setting 120B.

Note The excitation source is isolated from signal common (floating) and is capable of operation at common mode voltages
up to 35 V dc, or 35 V rms, 50/60 Hz.

Servo Coil Resistance and Associated Internal Resistance


Jumper Label Coil Nominal Current Coil Resistance Internal Application
Type (Ohms) Resistance (Ohms)
101 ±10 mA 1000 180 Simplex and TMR

202 ±20 mA 125 442 Simplex

403 ±40 mA 62 195 Simplex

404 ±40 mA 89 195 TMR


805 ±80 mA 22 115 TMR
120A ±120 mA (A) 40 28 Simplex

120B ±120 mA (B) 75 10 TMR

This table does not apply when the servo outputs are paralleled.

The governing equation for determining if the user needs to select a non-standard terminal board jumper position is
R ILIM_Calculated = (12,000 / Servo_MA_OUT) — RCOIL / Coil_Parallel - 10
where:

R ILIM_CALCULATED is the maximum terminal board current-limiting resistance in ohms the WSVO servo driver can
withstand to push 100% Servo_MA_OUT current through the coil. A negative value implies an unreal resistance highlighting
an incorrect value for RCOIL, Servo_MA_OUT, and so forth.

Servo_MA_OUT is the configuration parameter in the ToolboxST Servo Component Editor, Hardware tab, PSVO or
PSVP, Servo tab. The value in milli-amperes defines the servo actuator nominal current.

RCOIL is the servo actuator resistance per coil in ohms.

Coil_Parallel value equals 1 for a single coil and equals 2 for two coils paralleled.

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If the following inequality is True,
Jumper Setting Internal Resistance (from table above) > R ILIM_CALCULATED
then the WSVO will not have the capability to drive 100% current. Select the next lowest terminal board current-limiting
resistance from the Internal Resistance column in the Servo Coil Resistance and Associated Internal Resistance table.
If the new Internal Resistance value meets the condition
Jumper Setting Internal Resistance ≤ R ILIM_CALCULATED
then use this terminal board current-limiting resistor jumper setting.
The following is an example of this formula:
R ILIM_Calculated = (12,000 / 80) - 125 / 1 - 10 = 15 ohms
where only one single servo driver output used, the servo actuator resistance is 125 ohms per coil, the nominal current is 80
mA and the servo actuator coils are not paralleled. Based on this calculation, Jumper 120B is selected with the ToolboxST
application PSVO or PSVP configuration parameters defined as given in the equation above.

9.3.3.4 Valve Position


Control valve position is sensed with either a four-wire LVDT or a three-wire linear variable differential reluctance (LVDR)
transducer. Redundancy implementations for the feedback devices are determined by the application software to allow the
maximum flexibility. LVDT/Rs can be mounted up to 300 m (984 ft) from the turbine control with a maximum two-way cable
resistance of 15 Ω.
Two LVDT/R transformer isolated excitation sources are located on the terminal board for simplex applications and another
two transformer isolated excitation sources for TMR applications. A fifth and sixth non-isolated excitation source are
provided for the customer’s use. Excitation voltage is 7 V rms and the frequency is 3.2 kHz with a total harmonic distortion of
less than 1% when loaded.
A typical LVDT/R has an output of 0.7 V rms at the zero stroke position of the valve stem, and an output of 3.5 V rms at the
designed maximum stroke position (some applications have these reversed). The LVDT/R input is converted to dc and
conditioned with a low pass filter. Diagnostics perform a high/low (hardware) limit check on the input signal and a high/low
system (software) limit check.

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9.3.3.5 Pulse Rate
Pulse rate inputs support both passive magnetic pickups and active pulse rate transducers (TTL type) interchangeable without
configuration. Normally, these inputs are not used on steam turbine applications, but are usually for liquid fuel flow
measurement, and monitoring flow divider feedback in gas turbine applications. Pulse rate inputs can be located up to 300 m
(984 ft) from the turbine control cabinet. This assumes shielded-pair cable is used with typically 70 nF single ended or 35 nF
differential capacitance and 15 Ω resistance.
A frequency range of 2 Hz to 12 kHz can be monitored at a normal sampling rate of either 10 or 20 ms. Magnetic pickups
typically have an output resistance of 200 Ω and an inductance of 85 MHz excluding cable characteristics. The transducer is a
high-impedance source, generating energy levels insufficient to cause a spark.

9.3.4 Specifications
Item TSVC Specification
Number of inputs Eight LVDT windings
Two pulse rate signals, magnetic or TTL
External trip signal to shut off servo outputs

Number of outputs Two servo valves, three coils each, ±(10, 20, 40, 80, 120) mA
Four excitation sources for LVDTs (transformer isolation)
Two excitation sources for LVDTs (no transformer isolation)
Two 24 V dc excitation sources for pulse rate transducers
TSVCH2 has 6 sources with no isolation
Power supply voltage Nominal 24 V dc from three supplies P28R, P28S, P28T

Power supply current 5 A dc (Poly-Fuse or current limit rating for each input is 1 A dc)

LVDT excitation output Frequency of 3.2 ±0.2 kHz


Voltage of 7.00 ±0.14 V rms

Pulse rate input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 72 mV p-p
12 kHz requires 1486 mV p-p

Magnetic PR pickup signal < 150 V p-p into 60 Ω

Active PR pickup signal 5 to 27 V p-p into 60 Ω

Fault detection Servo current out of limits or not responding


Regulator feedback signal out of limits
Failed ID chip

Size 33.02 cm high x 17.8 cm wide (13 in x 7 in)

Technology Surface-mount

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9.3.5 Diagnostics
PSVO makes diagnostic checks on the terminal board components as follows:

• The output servo current is out of limits or not responding, creating a fault.
• The regulator feedback (LVDT) signal is out of limits, creating a fault. If the associated regulator has two sensors, the bad
sensor is removed from the feedback calculation and the good sensor is used.
• If any one of the above signals go unhealthy a composite diagnostic alarm, L#DIAG_PSVO occurs. Details of the
individual diagnostics are available from the ToolboxST* application. The diagnostic signals can be individually latched,
and reset with the RESET_DIA signal if they go healthy.
• Each cable connector on the terminal board has its own ID device that is interrogated by the I/O processor. The ID device
is a read-only chip coded with the terminal board serial number, board type, revision number, and the J connector
location. When this chip is read by the I/O processor and a mismatch is encountered, a hardware incompatibility fault is
created.

9.3.6 Configuration
In a simplex system, servo 1 is configured for the correct coil current with jumper JP1, and servo 2 is configured with jumper
JP2. In a TMR system, each servo output can have three coils. In this case, each coil current is jumper selected using JP1, JP3,
and JP5 for servo 1, and JP2, JP4, and JP6 for servo 2. All other servo board configuration is done from the ToolboxST
application.
Power must be applied to the three channels, so check that all three switches SW1, SW2, and SW3 are ON, and the power
indicators for P28 R, S, and T are lit.

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Notes

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10 PSVP Servo Control – Steam
10.1 PSVP Servo Control I/O Pack for Steam
The PSVP servo I/O pack, WSVO servo driver and the SSVP terminal board provide an
electro-hydraulic control for both new and retrofit steam turbine applications. The
following are salient features for this product:

• Six position sensor input channels


• Two servo outputs with a parallel feature allowing isolation of a failure in
electronics
• Two excitation outputs with a hot-backup redundancy feature for single position
sensor valves
• A pulse rate input optimized for turbine speed feedback similar to the PTUR and
PPRO pulse rate inputs
The product firmware supports single, minimum-select or maximum-select dual, and
mid-select triple position sensor input position regulators. The single and
maximum-select dual pilot cylinder position regulators are available. The product does
not support the flowrate regulators for liquid-fuel control or any of the position
regulators supporting the land and marine (LM) gas turbines.

Input to the PSVP is through dual RJ-45 Ethernet connectors, and 28 V dc power is
supplied from the terminal board. The output is through a 62-pin connector that connects
directly with the associated terminal board connector. Visual diagnostics are provided
Infrared Port Not Used through indicator light emitting diodes (LEDs).

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10.1.1 Compatibility
PSVPH1A is only compatible with the DIN-rail mounted servo terminal board SSVP.

Terminal Board Control Mode


SSVPHxx Simplex, Dual, TMR

TSVOHxx Not compatible

TSVCHxx Not compatible

Note The PSVP is designed in particular for retrofit steam turbine applications.

Control mode refers to the number of I/O packs used in a signal path.

• Simplex uses one PSVP, WSVO, and SSVP set with one or two network connections on each I/O pack.
• Dual uses two PSVP, WSVO, and SSVP sets with one network connection on each I/O pack.
• TMR uses three PSVP, WSVO, and SSVP sets with one network connection on each I/O pack.

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10.1.2 Installation
➢ To install the PSVP I/O pack
1. Securely mount the terminal board.

Note The PSVP along with its associated WSVO servo driver assembly mounts directly to SSVP terminal board.

2. Directly plug one PSVP I/O pack into the terminal board connector.
3. Mechanically secure the I/O pack using the threaded inserts adjacent to the Ethernet ports. The inserts connect with a
mounting bracket specific to the terminal board type. The bracket location should be adjusted such that there is no right
angle force applied to the 62-pin connector between the I/O pack and the terminal board. The adjustment should only be
required once in the service life of the product.
4. Plug the WSVO servo driver assembly into the J2 48-pin connector and secure it with the four screws.
5. Plug in one or two Ethernet cables depending on the system configuration. The pack operates over either port. If dual
connections are used, standard practice is to hook ENET1 to the network associated with the R controller; however, the
PSVP is not sensitive to Ethernet connections and negotiates proper operation over either port.
6. Plug the 28 V power into the SSVP P28IN 2-pin connector. Be sure the high is connected to pin 1 and the low is
connected to pin 2.
7. If PSVP redundancy is simplex, insert the plug for suicide protection from the protection module.
8. If PSVP redundancy is dual, plug the RJ-45 connector from SSVP_R JLA to SSVP_S JUA, and from SSVP_R JLB to
SSVP_S JUB.
9. Apply power to the PSVP subassembly using the SW1 power switch on the SSVP. Check the indicator lights on the
PSVP.
10. Use the ToolboxST* application to configure the I/O pack as necessary. Refer to GEH-6700 for more information.

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10.1.3 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• Auto-reconfiguration
• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Module Alarms

10.1.3.1 Connectors
• The DC 62-pin connector on the underside of the I/O pack connects directly to a discrete output terminal board.
• The RJ-45 Ethernet connector (ENET1) on the I/O pack side is the primary system interface.
• The second RJ-45 Ethernet connector (ENET2) on the I/O pack side is the redundant or secondary system interface.

Note The terminal board provides fused power output from a power source that is applied directly to the terminal board, not
through the I/O pack connector.

10.1.3.2 PSVP Circuitry


The PSVP has a BSVP application board that provides six rms to V dc converters for position feedback. The rms to V dc
converters accept a maximum of 7.07 V rms sine wave input. They change the ac input signal into a 10 V dc input, read by
the 16-bit analog-to-digital converter. The digitized position information is used in the valve position control loop in the
PSVP firmware. The output of the position regulator is written to an analog-to-digital converter located on the BSVP. This
analog output feeds the WSVO current regulator.
The PSVP also controls the servo suicide relay on the WSVO and the isolation relay on the SSVP. It inputs the servo driver
output voltage and the servo current. Coil ohms are calculated in firmware by using the servo current feedback and the
voltage monitored at the SSVP servo terminal points.
The excitation source for the LVDT/R position sensor is generated using the processor board’s field programmable gate array
(FPGA) to control a digital-to-analog converter. The converter’s 3.2 kHz sine wave is outputted to the SSVP terminal board
where the excitation driver is located. The excitation redundancy control is performed by a micro-controller located on the
BSVP.
The decision to switch from one excitation source to the hot backup is determined by the excitation current feedback and
excitation voltage feedback from the SSVP terminal board. If the excitation current and/or voltage is outside its prescribed
operating window, the micro-controller will send a command to de-energize the KE1 or KE2 switchover relay on one SSVP
and energize the KE1 or KE2 switchover relay on the SSVP that has the redundant excitation source. The state information
for this switchover control is passed to the other PSVP through a Private Serial Network (PSN). The PSN is a RS-422 based
serial network that works in concert with a FPGA / micro-controller excitation switchover function.

Note The PSN has a faster response time than what can be achieved through IONet / PSVP firmware.

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10.1.3.3 Pulse Rate Input
The PSVP module has one pulse rate input designed for turbine speed, but not for flow rate feedback used for liquid-fuel
control. The pulse rate input circuit in the PSVP enhances the turbine speed signal. The 28 V dc input on the BPPB is not
used to power the PSVP I/O module. The 28 V dc source is connected to the P28IN connector on the SSVP to power the
PSVP, WSVO servo driver and the SSVP terminal board.

Note The PSVP pulse rate input is similar to the PTUR and PPRO pulse rate inputs.

An interface is provided for one passive magnetic speed input. There is no provision for active pulse rate sensors or TTL
input. A frequency range of 2 to 20,000 Hz is supported. The pulse rate input is not designed for flow divider sensors and the
corresponding liquid fuel regulators are not included.

Note The PSVP signal-conditioning circuit is designed for the primary speed input, the same as the PTUR or PPRO.

Pulse rate inputs can be configured for a variety of applications. Speed type is the default setting normally used with turbine
control. Speed_high type provides an extended speed range above the standard speed type. Speed_HSNG type is an improved
pulse rate detection method that eliminates discontinuities due to hardware and software gearing, and eliminates alias speed
values associated with non-uniform pulse rate. Speed_HSNG should be used for all turbine applications unless otherwise
specified.
The Speed_HSNG type will map the spacing of the teeth on the speed wheel to remove periodic variation from speed
measurements. HSNGn_Stat mapping locked status bits are in signal space so the mapping status of the algorithm can be
observed. If the status indicator for a pulse rate input is false, then the mapping algorithm detects too much variation in the
tooth-tooth measurements to lock onto the tooth geometry. The Lock_Limit parameter can be adjusted in 1% increments.
Increasing the Lock_Limit value will allow the next generation speed algorithm to stay locked with increased variation. This
allows greater tooth-to-tooth variation per revolution, which can be caused by some of the following issues:

• A Magnetized speed wheel


• Electro-magnetic interference from outside sources
• Improper wiring or shielding practices

The impact of opening the Lock_Limit is increased speed variation. If the speed
variation becomes excessive after increasing the Lock_Limit, identify the source of the
problem (listed above) and correct the issue.
Caution

10.1.3.4 WSVO
The WSVO servo driver is used for both the PSVP and PSVO applications. The WSVO has two servo current regulators to
drive the servo outputs on the SSVP terminal board. It provides the dc-to-dc converter (28 V dc to +15 / -15 V dc) to power
the analog circuitry. It also has two excitation voltage drivers that are not used by the PSVP. The excitation drivers for the
PSVP are located on the SSVP to optimize the excitation output for load steps in the excitation switchover scheme used in
this module.

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10.1.3.5 Position Feedback
The PSVP / SSVP has six Linear Variable Differential Transformer (LVDT) or Linear Variable Differential Reluctance
(LVDR) sensor inputs, each of which includes:

• SSVP Open-wire detection circuit and load


• BSVP rms to V dc converter

Note Although there are six LVDT signal inputs, there are only two excitation outputs. Each excitation output can only
support two LVDTs, effectively limiting the number of LVDTs that a PSVP can support to four for certain applications.

The SSVP open-wire circuitry provides weak pull-up and pull-down resistors to the appropriate power rails, adding
approximately one mA of dc current into the feedback windings of the LVDT or LVDR. If the circuit on the feedback side of
the position transducer opens, the PSVP detects the absence of this additional dc current. It flags the controller that a position
sensor connection has opened using the Out of Range detection logic in the PSVP firmware. The SSVP provides a 20
kilo-ohm resistive load for the feedback winding of the LVDT or LVDR.

Note For dual and TMR PSVP redundancy, the position sensor feedbacks must be fanned external to the SSVP.

The BSVP rms to V dc converter has a high impedance differential amplifier, providing common mode voltage protection.
The rectifier and low-pass filtering is designed to scale the dc signal output where 10 V dc is equivalent to 7.07 V rms at the
input. The rms to V dc converter outputs are multiplexed into a single 16-bit analog-to-digital converter. Each converter
output is sampled every five ms or at a 200 Hz rate.

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10.1.3.6 Position Sensor Types
Most LVDTs used for sensing valve positions are three-wire with bias winding as displayed in the following figure.

LVDT with Bias Winding


The LVDT with bias winding has a primary excitation winding defined by the red and blue wire connections. The red wire
connects to SSVP EXnH, and the blue wire connects to EXnL where n = 1-2. The two secondary windings are connected in
series, providing a position output between the yellow and blue wires. The yellow wire is connected to SSVP LVxH where x
= 1-6 and the blue wire is connected to SSVP LVxL. A bias winding has also been added to aid in the detection of sensor
failures.
A sliding magnetic core or armature is located within the LVDT, coupling the primary and secondary windings. The
secondary windings are connected in series, aiding each other electrically. The output voltage is above zero when the core is
positioned equally between the two secondary windings. Moving the core from the center position will create a voltage
proportional to the distance from the null position. The steam turbine product line normally uses LVDRs.
The LVDR is a linear variable differential reluctance transducer, having a single coil and a center tapped with a movable
magnetic core or armature. Normally, the excitation source is applied across the entire winding through the black and red
wires. The valve position feedback is extracted from the center-tapped point on the coil (white wire) and the low side (red
wire) of the excitation.

LVDR Position Sensor

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10.1.3.7 Recommended Wiring Practices
The excitation black wire is connected to the SSVP EXnH screw. The excitation red wire is connected to the SSVP EXnL
screw where n = 1 –2. The position sensing high-side white wire is connected to SSVP LVxH. the red wire is connected to
SSVP LVxL where x = 1-6.

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10.1.3.8 Servo Outputs
The PSVP module has two servo channels. The servo loop is comprised of the following:

• Firmware position regulator


• Digital-to-analog converter
• Current regulator
• Current limiting resistors
• Simplex protection
• Parallel option with failure isolation
The PSVP processor runs the firmware position regulator for Servo 1 and Servo 2 every five ms or at a 200 Hz rate. The
position reference command is a system output from the controller and the position feedback is the digitized and scaled value
from the BSVP / SSVP circuitry.
The regulator output is written to a digital-to-analog converter. The converter output is the analog current command for the
WSVO analog current regulator. The fixed-gain proportional-plus-integral current regulator provides a voltage-controlled
current source output with discrete nominal current ratings of 10, 20, 40, 80, and 120 mA.
When the configuration for the PSVP is properly set, a suicide relay on the WSVO limits the current regulator output if the
coil ohms calculation function detects any of the following:

• A coil open or coil short condition


• A current regulator control loss
• An open or out-of-range position feedback
The SSVP current limiting resistors reduce the power dissipation of the current driver to prevent a shorted output. Berg
Jumpers on the SSVP are provided to select the proper nominal current rating for the coil driver application.
For simplex controller application of the PSVP module, an externally controlled relay is provided on the SSVP (controlled by
the PPRO) to disable the WSVO servo driver and select a positive biased current to drive the valve closed. The PSVO /
WSVO / TSVC and the PSVP / WSVO / SSVP servo outputs can be paralleled, but only the PSVP module can isolate a
failure of the WSVO. The isolation circuitry is controlled by the PSVP through the KS1 and KS2 relays on the SSVP terminal
board.

10.1.3.9 Calibrate Valve Function


The calibration of LVDTs associated with PSVO, PSVP, PCAA, or PMVE (MVRA or MVRF) servos is required when a new
terminal board is used on a system. The controller saves the barcode of the terminal board and compares it to the current
terminal board during reconfiguration load time. Any time a recalibration is saved, it updates the barcode name to the current
board.

Note Refer to the ToolboxST User Guide for Mark Controls Platform (GEH-6700), the chapter Special I/O Functions. the
section Calibrate Valve Function.

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10.1.4 Specifications
The following table provides information specific to the PSVP I/O pack and WSVO driver.

Item PSVP Specification


Number of inputs Six LVDT / R windings**
Single pulse rate input

** Although there are six LVDT signal inputs, there are only two excitation outputs. Each excitation output can only support two
LVDTs, effectively limiting the number of LVDTs that a PSVP can support to four for certain applications.

Number of outputs Two servo valve currents


Two excitation sources with redundant control capability for LVDT / Rs.

Power supply voltage Nominal 28 V dc

LVDT accuracy 1% with 16-bit resolution

LVDT input filter Low pass filter with 3 down breaks at 50 rad/sec ±15%

LVDT common mode range CMR is 15 V dc, 10 V rms


at 50/60 Hz
LVDT excitation output Frequency of 3.2 ±0.2 kHz
Voltage of 7.07 ±0.14 V rms

Pulse rate accuracy 0.05% of reading with 16-bit resolution at 50 Hz frame rate
Noise of acceleration measurement is less than ±50 Hz/sec for a 10,000 Hz signal being read
at 10 ms
Pulse rate input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 28 mV p-p
20 kHz requires 320 mV p-p

Magnetic PR pickup signal Generates 150 V p-p into 60 kΩ

Servo valve output accuracy 2% with 12-bit resolution

Fault detection Servo current out of limits or not responding


Regulator feedback signal out of limits
Servo suicide
Calibration voltage range fault
The LVDT excitation is out of range
The input signal varies from the voted value by more than the TMR differential limit
Failed ID chip

Size 8.26 cm high x 4.19 cm wide x 12.1 cm deep (3.25 in x 1.65 in x 4.78 in)

Technology Surface-mount
†Ambient rating for Operating: -30 to 65ºC (-22 to 149 ºF)
enclosure design

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

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10.1.5 Diagnostics
The I/O pack performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware.
• Continuous monitoring of the internal power supplies for correct operation.
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set.
• Each analog input has hardware limit checking based on preset (non-configurable) high and low levels near the end of the
operating range. If this limit is exceeded, a logic signal is set and the input is no longer scanned. The L3DIAG_xxxx logic
signal refers to the entire board.
• The pulse rate input has system limit checking based on configurable high and low levels. These limits can be used to
generate alarms, to enable/disable, and as latching/non-latching. RSTSYS in the SYS_OUTPUTS blocks resets the out of
limits. Refer to GEI-100682, Mark VIe Controller Standard Block Library, the section, System Outputs (SYS_OUTPUTS)
for more information.
• The analog input hardware includes precision reference voltages in each scan. Measured values are compared against
expected values and are used to confirm health of the analog to digital converter circuits.
• Analog output current is sensed on the terminal board using a small burden resistor. The pack conditions this signal and
compares it to the commanded current to confirm health of the digital to analog converter circuits.
• The analog output suicide relay is continuously monitored for agreement between commanded state and feedback
indication.
• Servo coil resistance is calculated based on servo terminal point voltage and current. The calculated resistance is
compared against configurable limits to generate open and/or shorted coil alarms.
Details of the individual diagnostics are available from the ToolboxST application. The diagnostic alarms can be individually
latched and then reset with the RSTDIAG parameter in the SYS_OUTPUTS block when the diagnostic condition becomes
inactive. Suicide alarms require a RSTSUIC before the servo relays will un-suicide. Excitation alarms require a RSTDIAG to
rearm excitation switchover when excitation sharing is used.

10.1.5.1 PSVP LEDs


PSVP LEDs
LED Label Description
Green SV1 Servo #1 is able to output current and not suicided.

Green SV2 Servo #2 is able to output current and not suicided.

Green EX1 Excitation Output #1 is active and connected to position sensor.

Green EX2 Excitation Output #2 is active and connected to position sensor.

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10.1.6 Configuration
Only configurations provided in this document have been approved for use.

Parameter Description Choices


ServoOutput# Servo Output X measured current in percent. Point Edit (Input Real)
Where # = 1 or
2
RegNumber Maps a specific regulator to a given servo output Unused, Reg1, Reg2
(Default-Unused)

Servo_MA_Out Nominal servo current rating in mA 10 mA (default), 20 mA,


40 mA, 80 mA, 120 mA
EnablCurSuic Enable Current Suicide Function Enable, Disable (default)

EnablFbkSuic Enable Position Feedback Suicide Function Enable, Disable (default)

AV_Selector Configuration selector to map one of the specified variables to the Coil_Ohms, Compliance_Voltage,
PSVP variable, ServoxMonitorNV where x = 1 or 2. Excitation_Current, mA_cmd_pct,
mA_cmd_pct_limit,
RCoilLocalOhms, Servo_Screw_
Voltage

Curr_Suicide Current command is compared to the actual feedback current. If the 0 to 100 (default 5)
error exceeds the configuration limit, Curr_Suicide (%), then the
Servo output will suicide.

Fdbk_Suicide The position feedback, Regx_Fdbk(%), where x = 1 or 2, is 0 to 10 (default 5)


compared against the values, 100% + Fdbk_Suicide(%) and 0% -
Fdbk_Suicide(%). If Regx_Fdbk(%) is greater than the positive value
or less than the negative value, the Servo output will suicide.

OpenCoilSuic If configuration parameter, OpenCoilSuic = Enable, then the servo Enable, Disable (default)
coil open detection function will suicide the servo if the function
detects an open ckt. Set OpenCoildiag = Enable to receive a
diagnostic message as to why the servo suicide occurred.

If the Coil_Parallel parameter is set to Coils_Parallel, set


OpenCoilSuic to Disable. This allows the servo to keep generating
current if one of the two servo coils fails to open.

If one coil fails and remains open, the calculated coil resistance
value doubles to a value that is at the nominal open circuit threshold.
Set the OpenCoilDiag parameter to Enable so the open coil failure is
annunciated for this case.
ShrtCoilSuic If configuration parameter ShrtCoilSuic = Enable, then the servo coil Enable, Disable (default)
short ckt. Detection function will suicide the servo if the function
detects a short ckt. Set ShrtCoildiag = Enable to receive a diagnostic
message as to why the servo suicide occurred.

OpenCoildiag If enabled, a specific diagnostic message is generated to explain Enable, Disable (default)
why the servo suicide occurred, such as Servo x Suicide due to
Open servo coil.

ShrtCoildiag If enabled, a specific diagnostic message is generated to explain Enable, Disable (default)
why the servo suicide occurred, such as Servo x Suicide due to
Short circuit of servo coil.

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Parameter Description Choices
Coil_Parallel If set to Coils_Parallel then the servo is connected to 2 servo coils Coils_parallel,
wired in parallel. The coil resistance calculation determines the Coils_not_parallel (default)
resistance of a single coil for use with the short and open circuit coil
protection. If set to Coils_not_parallel then the servo is connected to
a single servo coil.

TBmAJmpPos This is the SSVP terminal board mA jumper position selection. It 10 mA (default), 20 mA, 40 mA,
should match the jumper selection on the SSVP 80 mA, 120 mA A, 120 mA B

RopenTimeLim This is the time in seconds required for the open circuit condition of 0 to 100 (default 1)
the servo coil to be in effect before a diagnostic and / or suicide of
the servo (if enabled) occurs.

RShrtTimeLim This is the time in seconds required for the short circuit condition of 0 to 100 (default 1)
the servo coil to be in effect before a diagnostic and / or suicide of
the servo (if enabled) occurs.

RcoilOpen This defines the initial value for the open circuit resistance in ohms. 1 to 10E+09 (default 1000000)
After the LVDT calibration, the value for RcoilOpen is 2 * (Servo_
Screw_Volts / Servo Current) measured during the calibration mode.

RcoilShort This defines the initial value for the short circuit resistance in ohms. 1 to 10E+09 (default 0)
After the LVDT calibration, the value for RcoilShort is 0.5 * (Servo_
Screw_Volts / Servo Current) measured during the calibration mode.

TMR_DiffLimt Diagnostic limit, TMR Input Vote difference in % 0 to 110 (default 25)

Pulse Rates Bipolar input = PRH – PRL Point Edit (Input Real)

PRType This defines the speed algorithm used for the pulse rate input. Speed, Speed_High, Speed_
HSNG, Unused
PRScale Scaling: pulses per revolution (outputs RPM) 0 to 1000

TeethPerRev Number of teeth on speed wheel (per revolution) 1 to 512

This is the calculation rate of speed in milliseconds. Speed is 5 to 1000


calculated at this rate and averaged over the previous time interval
specified by this period.

Speed_x_ms
Using a value other than an integer multiple of the associated
application frame rate can have an adverse impact on use of
this in control.
Attention

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Parameter Description Choices
This is the averaging period for acceleration calculation in 10 to 1000
milliseconds. The acceleration is calculated every Accel_X_ms. It
is based on the difference between two speed samples divided by
the sample period. Each acceleration calculation is the average of
acceleration over the period specified by this parameter. For
example, if Accel_x_ms is 40 then acceleration is the average
acceleration over the previous 80 ms.
Accel_x_ms

Using a value other than an integer multiple of the associated


application frame rate can have an adverse impact on use of
this in control.
Attention
Lock_Limit This is the HSNG speed type-locking limit for teeth mapping 1 to 100 (must be a positive integer)
(percent).

SysLim1Enabl If enabled, System Limit 1 is active. Enable, Disable (default)

SysLim1Latch If enabled, the System Limit 1 function will latch its state if the Latch (default), NotLatch
PulseRate exceeds the limit function defined by SysLim1Type and
SysLimit1.

SysLim1Type Defines the compare function used in the Limit1 expression. ≥ (default), ≤

SysLimit1 Defines Limit1 value to be used for the input, PulseRate. 0 to 20,000 (default 0)

SysLim2Enabl If enabled, System Limit 2 is active. Enable, Disable (default)

SysLim2Latch If enabled, the System Limit 2 function will latch its state if the Latch (default), NotLatch
PulseRate exceeds the limit function defined by SysLim2Type and
SysLimit2.

SysLim2Type Defines the compare function used in Limit 2’s expression ≥ (default), ≤

SysLimit2 Defines Limit2 value to be used for the input, PulseRate 0 to 20,000 (default 0)

TMR_DiffLimt Diagnostic limit, TMR Input Vote difference in % 0 to 20,000 (default 5)

Excitation PSVP supports 2 LVDT excitation channels. An individual set


of configuration parameters are supplied for each Excitation
x where x = 1 through 2.

StandAloneDiag Non-shared diagnostic enable, diagnostics cannot be disabled for 1 = enable (default), 0 = disable
excitation outputs that have been configured as shared by the
Exc_Sharing parameter

Common The following parameters are common for all regulators

RegType Regulator Algorithm Type Unused, no_fbk, 1_LVposition,


2_LVpilotCyl,
2_LVposMAX, 2_LVposMIN,
3_LVposMID,
4_LVp/cylMAX

RegGain Position loop Gain in % current / Eng Units or usually % current / -200 to 200 (default 1)
% position

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Parameter Description Choices
RegNullBias Regulator Null Bias provides a fixed current command in percent -100 to 100 (default 0)
to cancel or null the spring force of the valve which will close the
valve if the servo suicides or shuts down.
TMR_DiffLimt Diagnostic limit, TMR Input Vote difference in % 0 to 150 (default 5)

LVDT PSVP supports six LVDT input channels. An individual set of


Parameters configuration parameters as listed below are supplied for each
LVDTx where x = 1 through 6.

Enable Selects this LVDT to be used by the PSVP monitor or position Enable or Disable (default)
regulator for servo control use

LVDT_Margin This defines the over range in % for the LVDT input. A diagnostic 0 to 100 (default 2)
is generated if this value is exceeded.

MinVrms LVDT1 V rms is at the minimum end stop of the valve. These 0 to 7.1 (default 1)
values are normally set by the Auto-Calibrate function.

MaxVrms LVDT1 V rms is at the maximum end stop of the valve. These 0 to 7.1 (default 1)
values are normally set by the Auto-Calibrate function.

MaxPOSvalue Position in Eng. units (usually %) at the maximum end stop of the -15 to 150 (default 100)
valve
MinPOSvalue Position in Eng. units (usually %) at the minimum end stop of the -15 to 150 (default 0)
valve
TMR_DiffLimt Diagnostic limit, TMR Input vote difference in % 0 to 150 (default 5)

RegType Position regulator used with a single LVDT Input = 1 LV position

LVDT1input Defines which LVDT input from the SSVP will be used by the LVDT1, LVDT2, LVDT3, LVDT4,
position regulator for input 1 LVDT5, LVDT6, or Unused (default)

RegType Pilot cylinder regulator with two LVDT position feedbacks = 2_LVpilotCyl

PilotGain Pilot loop gain in % current / Eng. unit -200 to 200 (default 1)

LVDT1input Defines which LVDT input from the SSVP will be used for the LVDT1, LVDT2, LVDT3, LVDT4,
cylinder feedback mapped into Regx_Fdbk where x = 1 or 2 LVDT5, LVDT6, or Unused (default)

LVDT2input Defines which LVDT input from the SSVP will be used for the pilot LVDT1, LVDT2, LVDT3, LVDT4,
feedback mapped into PilotFdbk. LVDT5, LVDT6, or Unused (default)

RegType Position regulator using the maximum select from 2 LVDT = 2_LVposMAX
inputs for feedback

LVDT1input Defines which LVDT input from the SSVP the position regulator LVDT1, LVDT2, LVDT3, LVDT4,
will use for input 1. LVDT5, LVDT6, or Unused (default)

LVDT2input Defines which LVDT input from the SSVP the position regulator LVDT1, LVDT2, LVDT3, LVDT4,
will use for input 2. LVDT5, LVDT6, or Unused (default)

RegType Position regulator using the minimum select from 2 LVDT = 2_LVposMIN
inputs for feedback

LVDT1input Defines which LVDT input from the SSVP the position regulator LVDT1, LVDT2, LVDT3, LVDT4,
will use for input 1 LVDT5, LVDT6, or Unused (default)

LVDT2input Defines which LVDT input from the SSVP the position regulator LVDT1, LVDT2, LVDT3, LVDT4,
will use for input 2 LVDT5, LVDT6, or Unused (default)

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Parameter Description Choices
RegType This is the position regulator using the median select from 3 = 3_LVposMID
LVDT inputs for feedback. It was originally designed for
heavy-duty gas turbines.

LVDT1input Defines which LVDT input from the SSVP the position regulator LVDT1, LVDT2, LVDT3, LVDT4,
will use for input 1 LVDT5, LVDT6, or Unused (default)

LVDT2input Defines which LVDT input from the SSVP the position regulator LVDT1, LVDT2, LVDT3, LVDT4,
will use for input 2 LVDT5, LVDT6, or Unused (default)

LVDT3input Defines which LVDT input from the SSVP the position regulator LVDT1, LVDT2, LVDT3, LVDT4,
will use for input 3 LVDT5, LVDT6, or Unused (default)

RegType Four LVDT pilot cylinder with maximum select of two LVDTs =4_LVp/cylMAX
for cylinder feedback and maximum select of two LVDTs for
the pilot feedback

PilotGain Pilot loop gain in % current / Eng. unit -200 to 200 (default 1)

LVDT1input Defines which LVDT input from the SSVP will be used for the first LVDT1, LVDT2, LVDT3, LVDT4,
input into the maximum select of the cylinder feedback mapped LVDT5, LVDT6, or Unused (default)
into Reg_fdbk.

LVDT2input Defines which LVDT input from the SSVP will be used for the LVDT1, LVDT2, LVDT3, LVDT4,
second input into the maximum select of the cylinder feedback LVDT5, LVDT6, or Unused (default)
mapped into Reg_fdbk.

LVDT3input Defines which LVDT input from the SSVP will be used for the first LVDT1, LVDT2, LVDT3, LVDT4,
input into the maximum select of the pilot feedback, PilotFdbk. LVDT5, LVDT6, or Unused (default)

LVDT4input Defines which LVDT input from the SSVP will be used for the LVDT1, LVDT2, LVDT3, LVDT4,
second input into the maximum select of the pilot feedback, LVDT5, LVDT6, or Unused (default)
PilotFdbk.
RegType Six LVDT pilot cylinder with median select of three LVDT/Rs =6_LVp/cylMID
for cylinder feedback and median select of three LVDT/Rs for
the pilot feedback.

PilotGain Pilot loop gain in % current / Eng. unit -200 to 200 (default 1)

LVDT1input Defines which LVDT/R input from the SSVP will be used for the LVDT1, LVDT2, LVDT3, LVDT4,
first input into the median select of the cylinder feedback mapped LVDT5, LVDT6, or Unused (default)
into Reg_fdbk.

LVDT2input Defines which LVDT/R input from the SSVP will be used for the LVDT1, LVDT2, LVDT3, LVDT4,
second input into the median select of the cylinder feedback LVDT5, LVDT6, or Unused (default)
mapped into Reg_fdbk.

LVDT3input Defines which LVDT/R input from the SSVP will be used for the LVDT1, LVDT2, LVDT3, LVDT4,
third input into the median select of the cylinder feedback, Reg_ LVDT5, LVDT6, or Unused (default)
fdbk.
LVDT4input Defines which LVDT/R input from the SSVP will be used for the LVDT1, LVDT2, LVDT3, LVDT4,
first input into the median select of the pilot feedback, PilotFdbk. LVDT5, LVDT6, or Unused (default)

LVDT5input Defines which LVDT/R input from the SSVP will be used for the LVDT1, LVDT2, LVDT3, LVDT4,
second input into the median select of the pilot feedback, LVDT5, LVDT6, or Unused (default)
PilotFdbk.
LVDT6input Defines which LVDT/R input from the SSVP will be used for the LVDT1, LVDT2, LVDT3, LVDT4,
third input into the median select of the pilot feedback, PilotFdbk. LVDT5, LVDT6, or Unused (default)

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Parameter Description Choices
MonType Monx equals the scaled value from the LVDT assigned = 1_LVposition
through LVDT1input where x = 1 to 6

LVDTxinput LVDTx input selection LVDT1, LVDT2, LVDT3, LVDT4,


where x = 1 LVDT5, LVDT6, Unused (default)

MonType Monx equals the maximum selected scaled value from two = 2_LVposMAX
LVDTs assigned through LVDTyinput where x = 1 to 6 and y =
1 to 2.
LVDTxinput LVDTx input selection LVDT1, LVDT2, LVDT3, LVDT4,
where x = 1 to 2 LVDT5, LVDT6, Unused (default)

TMR_DiffLimt Diagnostic limit, TMR Input Vote difference in % -10 to 150 (default 5)

MonType Monx equals the minimum selected scaled value from two = 2_LVposMIN
LVDTs assigned through LVDTyinput where x = 1 to 6 and y =
1 to 2.
LVDTxinput LVDTx input selection LVDT1, LVDT2, LVDT3, LVDT4,
where x = 1 to 2 LVDT5, LVDT6, Unused (default)

TMR_DiffLimt Diagnostic limit, TMR Input Vote difference in % -10 to 150 (default 5)

MonType Monx equals the median selected scaled value from three = 3_LVposMID
LVDTs assigned through LVDTyinput where x = 1 to 6 and y =
1 to 3.
LVDTxinput LVDTx input selection LVDT1, LVDT2, LVDT3, LVDT4,
where x = 1 to 3 LVDT5, LVDT6, Unused (default)

TMR_DiffLimit Diagnostic limit, TMR Input Vote difference in % -10 to 150 (default 5)

10.1.6.1 Valid Servo Configurations with TMR I/O (non Pilot / Cylinder)

Servo #1 Configuration Option 1

* Coil_Parallel (cfg) Coils_not_parallel

RegType (cfg) 3_LVposMID

Servo #2 Configuration Option 1

* Coil_Parallel (cfg) Coils_not_parallel

RegType (cfg) 3_LVposMID

* The parameter Coil_Parallel is not visible in ToolboxST for a TMR PSVP. It is forced by the firmware to Coils_not_parallel.

Note LVDT or LVDR position sensors can be used. 1_LVposition, 2_LVposMIN or 2_LVposMAX are supported but are not
normally used.

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Option One: TMR LVDR and Triple Coil Servo

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10.1.6.2 Valid Servo Configurations with Dual LVDR and Dual Coil Servo, Coils Not
Paralleled
If PSVP-S powers on before PSVP-R, the controller selects the PSVP-S signal-space inputs as the voted data to be used.
LVDT or LVDR position sensors can be used. 2_LVposMIN, 2_LVposMAX or 3_LVposMID are supported for two or three
sensors per servo but are not normally used.

Servo #1 Option 2 Option 2 with fanned Option 3 Option 4


Configuration inputs

Coil_Parallel (cfg) Coils_not_parallel Coils_not_parallel Coils_not_parallel Coils_not_parallel

RegType (cfg) 1_LVposition 2_LVposMAX 1_LVposition 1_LVposition

Servo #2 Option 2 Option 2 Option 2 Option 2


Configuration

Coil_Parallel (cfg) Coils_not_parallel Coils_not_parallel Coils_not_parallel Coils_not_parallel

RegType (cfg) 1_LVposition 1_LVposition 1_LVposition 1_LVposition

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Option Two: Dual LVDR and Dual Coil Servo

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10.1.6.3 Valid Servo Configurations with Simplex LVDR and Dual Coil Servo, Coils Not
Paralleled
If PSVP-S powers on before PSVP-R, the controller selects the PSVP-S signal-space inputs as the voted data to be used.
LVDT or LVDR position sensors can be used. 2_LVposMIN, 2_LVposMAX or 3_LVposMID are supported for two or three
sensors per servo but are not normally used.

Servo #1 Configuration Option 3 Option 4

Coil_Parallel (cfg) Coils_not_parallel Coil_parallel

RegType (cfg) 1_LVposition 1_LVposition

Servo #2 Configuration Option 3 Option 3

Coil_Parallel (cfg) Coils_not_parallel Coils_not_parallel

RegType (cfg) 1_LVposition 1_LVposition

Option Three: Simplex LVDR and Dual Coil Servo with Coils not Paralleled

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10.1.6.4 Valid Servo Configuration with Simplex LVDR and Dual Coil Servo, Coils
Paralleled
Servo #1 Configuration Option 4 Option 5

Coil_Parallel (cfg) Coil_parallel Coil_parallel

RegType (cfg) 1_LVposition 1_LVposition

Servo #2 Configuration Option 4 Option 4

Coil_Parallel (cfg) Coil_parallel Coil_parallel

RegType (cfg) 1_LVposition 1_LVposition

Option Four: Simplex LVDR and Dual Coil Servo with Coils Paralleled
If PSVP-S powers on before PSVP-R, the controller selects the PSVP-S signal-space inputs as the voted data to be used.
LVDT or LVDR position sensors can be used. 2_LVposMIN, 2_LVposMAX or 3_LVposMID are supported for two or three
sensors per servo but are not normally used.

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10.1.6.5 Controller Software Support for Dual PSVP I/O Configurations
In the dual I/O redundancy configuration, the controller(s) use the I/O pack health to determine which I/O pack inputs to use.
For example, assume the controller(s) voted or selected PSVP(R) for system inputs. Also assume that LVDT1 input on PSVP
(R) is out of range, resulting in an unhealthy LVDT1 input, and LVDT1 from PSVP(S) is healthy. Because PSVP(R) is the
voted I/O pack for system inputs, the controller software is constrained due to the unhealthy LVDT1 input.
The dual I/O redundancy configuration can be enhanced by using the Pre-Vote block on PSVP(R) and PSVP(S) system
inputs. The Pre-Vote block frees the controller software to determine whether the PSVP(R) or PSVP(S) input should be used.

Recommended Controller Software Selection Logic for Pre-Vote Outputs

Voted Source <R> Healthy <S> Healthy Vote Mismatch Pre-Vote Output to
Use
<R> or <S> NO NO NO or YES Default to Safe Value
<R> or <S> NO YES NO or YES <S>
<R> or <S> YES NO NO or YES <R>
<R> YES YES NO <R>
<S> YES YES NO <S>
<R> or <S> YES YES YES ** Application Dependent

** The application determines whether to use either PSVP(R) system input or PSVP(S) system input.

Voted Source PSVP(R) or PSVP(S) system inputs are selected for use by controller

<R> Healthy PSVP(R) pack is healthy

<S> Healthy PSVP(S) pack is healthy

Vote Mismatch PSVP(R) system input – PSVP(S) system input > TMR Diff Limit

Pre-Vote Output to Use Result of controller software selection logic

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10.1.6.6 Valid Servo Configuration with Simplex LVDR and Dual Coil Servo, Coils
Paralleled
Servo #1 Configuration Option 5

Coil_Parallel (cfg) Coil_parallel **

RegType (cfg) 1_LVposition

Servo #2 Configuration Option 5

Coil_Parallel (cfg) Coil_parallel **

RegType (cfg) 1_LVposition

** This parameter is forced to Coils_Parallel internal to a Simplex PSVP for all regulator types except Pilot/Cylinder.

Note LVDT or LVDR position sensors can be used. 2_LVposMIN, 2_LVposMAX, or 3_LVposMID are supported for two or
three sensors per servo but are not normally used.

Option Five: Simplex LVDR and Dual Coil Servo with Coils Paralleled

Note Dual IONet is permissible for frame rates of 25 and 50 Hz. The 100 Hz frame rate is not permissible due to firmware
execution limitations.

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10.1.6.7 Simplex PSVP: Pilot / Cylinder Configuration
The Pilot / Cylinder regulator types are used on low-pressure hydraulic systems with an inner pilot position loop. For pilot /
cylinder regulator types, both servo outputs should be assigned to the same regulator. Each servo output is configured for
±120 mA current, yielding a total current of ±240 mA.
The 2_LVpilotCyl regulator type configuration uses one position sensor for the outer cylinder valve and one position sensor
for the inner pilot cylinder loop. Independent excitation outputs are provided on the SSVP to supply 7.07 V rms at 3.2 kHz to
the LVDT or LVDR sensor input.
The 4_LVp/cylMAX selects the maximum from two position inputs from both the outer cylinder position loop and the inner
pilot position loop. The PSVP / WSVO / SSVP provides two excitation outputs. Each excitation output is designed to support
two LVDT/R position sensors assuming the total current does not exceed 60 mA.

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Servo with Paralleled Coils
For a servo with parallel coils, Servo drive #1 and Servo drive #2 are paralleled. Set the Servo Tab configuration parameter,
Coil_Parallel to Coils_Parallel for both servos. With this new configuration, the PSVP module allows the suicide to remain
enabled for protection. The servos have an isolation contact provided for each servo circuit located on the SSVP. If Servo
drive #1 hardware fails, the WSVO suicides Servo drive #1 output. Simultaneously, the SSVP opens the isolation contact
controlled by the KS1 relay. The relay isolates Servo drive #1 from Servo drive #2, allowing Servo drive #2 to continue to
run. This results in half the rated current of ±120 mA being supplied to the servo valve. Set the Regulator Tab configuration
parameter, RegType to 4_LVp/cylMAX.

Note Dual IONet is permissible for frame rates of 25 and 50 Hz. The 100 Hz frame rate is not permissible due to firmware
execution limitations.

Simplex PSVP: Dual Pilot / Dual Cylinder Valves with Dual Coil Servo (coils paralleled)

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For the Simplex PSVP with single pilot and single cylinder and dual coil servo, set the Regulator Tab configuration
parameter, RegType to 2_LVpilotCyl.

Simplex PSVP: Single Pilot / Single Cylinder Valves with Dual Coil Servo (coils paralleled)

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Servo with Non-paralleled Coils
If the pilot cylinder servo coils have separate coil connections, set the PSVP Servo Tab configuration parameter, Coil_
Parallel to Coils_not_parallel. For this case, the isolation contacts are always closed and the suicide contacts work like all
other servo products. Set the Regulator Tab configuration parameter, RegType to 4_LVp/cylMAX.

Note Dual IONet is permissible for frame rates of 25 and 50 Hz. The 100 Hz frame rate is not permissible due to firmware
execution limitations.

Simplex PSVP: Dual Pilot / Dual Cylinder Valves with Dual Coil Servo (not paralleled)

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For the Simplex PSVP with single pilot and single cylinder and dual coil servos not paralleled, set the Regulator Tab
configuration parameter, RegType to 2_LVpilotCyl.

Simplex PSVP: Single Pilot / Single Cylinder Valves with Dual Coil Servo (not paralleled)

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10.1.6.8 Dual PSVP: Pilot / Cylinder Configuration
The Dual PSVP redundancy configuration provides paralleled servo outputs per PSVP, and each PSVP drives a single servo
coil. The dual PSVP configuration provides redundancy for both of the following:

• Servo driver failure on the PSVP, maintaining 100% forcing for the servo coil
• Servo coil failure with reduced forcing dependent on the overdrive capability of the servo coil
The 2_LVpilotCyl regulator type configuration uses one position sensor for the outer cylinder valve and one position sensor
for the inner pilot cylinder loop. Independent excitation outputs are provided on the SSVP to supply 7.07 V rms at 3.2 KHz to
the LVDT or LVDR sensor input.
The 4_LVp/cylMAX selects the maximum from two position inputs from both the outer cylinder position loop and the inner
pilot position loop. The PSVP / WSVO / SSVP provides two excitation outputs. Each excitation output is designed to support
two LVDT/R position sensors assuming the total current does not exceed 60 mA.
The 6_LVp/cylMID selects the median of the three position inputs from both the outer cylinder position loop and the inner
pilot position loop. In this configuration, the Excitation Switchover function allows one of the two PSVPs to be powered off
while the other still maintains control of the pilot cylinder loop.

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The configuration parameter(s) for the following figure are:
Coil_Parallel = Coils_not_parallel
RegType = 4_LVp/cylMAX

Dual PSVP: Dual Pilot / Dual Cylinder Valves with Dual Coil Servo

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Servo with Non-paralleled Coils
The pilot / cylinder servo with individual coil connections and servo outputs paralleled is supported. In this configuration, the
PSVP Servo Tab configuration parameter, Coil_Parallel entry is not used. The PSVP firmware overrides this selection,
forcing the PSVP servo outputs to be paralleled per PSVP.

Note The paralleled servo coils configuration is not supported.

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The configuration parameter(s) for the following figure are:
RegType = 2_LVpilotCyl

Dual PSVP: Single Pilot / Single Cylinder Valves with Dual Coil Servo

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The configuration parameter(s) for the following figure are:
RegType = 6_LVp/cylMID

Dual PSVP: Triple Pilot / Triple Cylinder LVDRs with Dual Coil Servo

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10.1.6.9 TMR PSVP: Pilot / Cylinder Configuration
The TMR PSVP redundancy for Pilot / Cylinder configuration provides three fully independent sets of PSVP electronics.
Each PSVP has its regulator configured as RegType = 2_LVpilotCyl, inputting a single independent position feedback for
both the pilot and operating cylinder valves. The 2_LVpilotCyl position regulator output generates a servo current command
for Servo drive #1 and Servo drive #2. PSVP <R>, PSVP <S> and PSVP <T> Servo drive #1 outputs are paralleled together
to control the current to Coil #1. Likewise, Servo drive #2 outputs are paralleled to drive Coil #2. The maximum current
applied to each coil is limited depending upon the number of operating Servo drives paralleled.

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The configuration parameter(s) for the following figure are:
RegType = 2_LVpilotCyl

TMR PSVP: Single Pilot / Single Cylinder Valves with Dual Coil Servo

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10.1.6.10 PSVP Position Regulators
The following seven servo position regulators are supported by the PSVP:

• Single LVDT/R position feedback, RegType = 1_LVposition


• Dual LVDT/R feedback minimum select, RegType = 2_LVposMIN
• Dual LVDT/R feedback maximum select, RegType = 2_LVposMAX
• Triple LVDT/R position feedback middle select, RegType = 3_LVposMID
• Single LVDT/R pilot cylinder, RegType = 2_LVpilotCyl
• Dual LVDT/R pilot cylinder maximum select, RegType = 4_LVp/cylMAX
• Triple LVDT/R pilot cylinder middle select, RegType = 6_LVp/cylMID
There is an eighth position regulator option, RegType = no_fbk. With this option, a position regulator runs in the control
software, and the PSVP provides the position feedback through the system input variable, Regn_fdbk where n = 1 or 2. The
controller’s position regulator output can be assigned to the System output, Regn_Ref where the PSVP maps this value to the
current regulator command.
Each of the position regulator types are comprised of the following blocks:

• Feedback Conditioning
• Proportional Regulator
• Calibration section
The configuration parameter RegType determines the number of feedback position sensors. In addition, it determines the
initial position feedback selection. Before the selection process takes place, the Reg_Calc_Position block scales the position
sensor feedback from V rms to percent, where usually 100% is defined as a fully open valve. An out-of-range check is
performed on the V rms position value before the scaling takes place. The out-of-range limit is defined by the configuration
parameter LVDT_Margin in units of percent. An out-of-range is declared if the V rms value is less than –LVDT_Margin(%) or
greater than LVDT_Margin(%) + 100% of the feedback range.

RegType No. of Position Sensors Selection Criteria


1_LVposition 1 No selection required.

2_LVposMIN 2 Select the minimum of the two position sensors.

2_LVposMAX 2 Select the maximum of the two position sensors.

3_LVposMID 3 Select the middle value from the three position values.

2_LVpilotCyl 1 pilot sensor No selection required.


1 cylinder sensor

4_LVp/cylMAX 2 pilot sensors Select the maximum from the two pilot sensor values, and
2 cylinder sensors select the maximum from the two cylinder sensor values.

6_LVp/cylMID 3 pilot sensors Select the median from the three pilot sensor values, and select
3 cylinder sensors the median from the three cylinder sensor values.

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After the selection of the sensor feedback is complete, the selected position feedback runs through a limit check function. The
limits are defined by the configuration parameter Fdbk_Suicide. The value is units of percent of feedback. A value of 5%
would declare an exceeded limit if the selected position feedback is greater than 105% or less than –5% where 100% is
usually defined as a fully open valve. For the 2_LVpilotCyl, the 4_LVp/cylMAX, and the 6_LVp/cylMID regulator types, the
position feedback PilotFdbkn is used for the limit check. If the configuration parameter EnabFbkSuic = TRUE and the Fdbk_
Suicide limit is exceeded, the servo output will suicide (zero current). This condition implies that the feedback has gone open
loop due to either a damaged sensor or a sensor excitation / feedback wiring open or short.
The proportional regulator error Regn_Error is equal to the reference command from the controller Regn_Ref minus the
resultant position sensor feedback Regn_Fdbk where n is the regulator number 1 or 2. The position regulator output is defined
as:
Servo_mA_refs(%) = Regn_Error(%) * RegGain(%servo current / % valve position) +
(RegNullBias(% current) + Regn_NullCor(% current))
where
Servo_mA_refs is the analog current regulator command in percent of servo current nominal of 10, 20, 40, 80, or 120 mA

• RegGain is the configuration parameter defining the gain from percent position to percent servo current.
• RegNullBias is the portion of current required to null the spring force of the servo actuator. For 3-coil servos, the null bias
will be ⅓ of the total. For 2-coil individual, the null bias will be ½ of the total. For 2-coil paralleled or single coil servos,
the null bias is assigned 100% of the total current needed to balance the spring force.
• Regn_NullCor is used by the controller to correct a null bias imbalance if one of the PSVPs in a dual or TMR redundancy
configuration goes offline or the servo output suicides.
At startup or when a new PSVP is installed on site, a servo valve calibration should be performed. During the calibration
procedure, the servo is used to push the valve to the maximum open-end point and the maximum closed-end point. At these
end points, the LVDT/R feedback voltage is read and stored. The PSVP uses this value for scaling purposes when the Reg_
Calc_Position function runs.

Note Servo regulator configuration settings (RegGain, and so forth) are application and site specific. Consult the equipment
specific Controls Setting Specification or equivalent document for proper configuration.

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10.1.6.11 Module Level Parameters
Parameter Description Choices
Exc_Sharing Connections for sharing excitation of LVDT (for dual configuration only) Unused
For example: R1_S1 and R2_S2 means R1_S1_only,
Excitation output 1 of R PSVP and output 1 of S PSVP connected to R2_S2_only,
the same LVDT coil R1_S1_and_R2_S2
Excitation output 2 of R PSVP and output 2 of S PSVP connected to
the same LVDT coil
Serial_Links These are the serial link cable connections where upper refers to the Unused
serial connectors at the top of the SSVP and lower refers to the serial R_upper_to_S_lower
connectors at the bottom of the SSVP. All connections from A labeled R_lower_to_S_upper
connectors must go to A connectors on other SSVPs. All connections
from B connectors must go to B connectors on other SSVPs. Upper
connectors can only be connected to lower connectors.
For dual systems, only R and S can be used with connections R_
Upper_to_S_Lower or R_Lower_to_S_Upper.

For TMR systems, there are only two available combinations of


connections. They are uniquely identified by one connection pair
selected from the option list.
R_Upper_to_S_Lower option configures:
R upper connected to S lower
S upper connected to T lower
T upper connected to R lower

R_Lower_to_S_Upper option configures:


R upper connected to T lower
S upper connected to R lower
T upper connected to S lower

AccelCalTime This is the acceleration calculation time for speed algorithms Speed 0 to 100 ms (default is 100)
and Speed_High. Use integer multiples of controller frame period.

SystemLimits Allows user to temporarily disable all system limit checks for testing Enable (default), Disable
purposes. Setting this parameter to Disable will cause a diagnostic
alarm to occur.

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10.1.6.12 PSVP Variable Definitions
Name Description Description Type
L3DIAG_PSVP PSVP I/O diagnostic indication Input non-voted Boolean 3 bits

LINK_OK_PSVP PSVP I/O Link OK indication Input non-voted Boolean 3 bits

ATTN_PSVP PSVP I/O attention indication Input non-voted Boolean 3 bits

PS18V_PSVP PSVP I/O 18 V power supply indication Input non-voted Boolean 3 bits

PS28V_PSVP PSVP I/O 28 V power supply indication Input non-voted Boolean 3 bits

IOPackTmpr PSVP I/O pack temperature in degrees °F Analog input non-voted Real

Rx_SuicideNV ServoOutputx suicide relay status where x = 1 or 2 Input non-voted Boolean 3 bits

Regx_CalibratedNV Regulator x (x=1 or 2) has been calibrated. Input non-voted Boolean 3 bits

Reg1_Suicide ServoOutput1 suicide relay status Input voted Boolean

Reg2_Suicide ServoOutput2 suicide relay status Input voted Boolean

HSNG_Stat Pulse rate high speed next generation stability status (TRUE Input voted Boolean
for tooth to tooth distance inside Lock_Limit for tooth
geometry compensation)

RegCalMode Regulator under calibration Input voted Boolean

Reg1_Fdbk Regulator 1 position feedback Analog input voted REAL

Reg2_Fdbk Regulator 2 position feedback Analog input voted REAL

PilotFdbk1 Regulator 1 pilot feedback when 2_LvpilotCyl or 4_ Analog input voted REAL
LVp/cylMax

PilotFdbk2 Regulator 2 pilot feedback when 2_LvpilotCyl or 4_ Analog input voted REAL
LVp/cylMax

Reg1_Error Position error for the regulator 1 position loops Analog input voted REAL

Reg2_Error Position error for the regulator 2 position loops Analog input voted REAL

Accel Acceleration value of the variable PulseRate Analog input voted REAL

Monx where x = 1 to 6 Value assigned to Monx based on configuration parameters Analog input voted REAL
found in the Monitor tab
Exn_ActiveNV Excitation #n active(on) where n = 1 or 2 Input non-voted Boolean 3 bits

Excit_Monx Excitation monitor x (V rms) where x = 1 or 2 Analog input voted REAL

ServoOutx Servo output x measured current (%) where x = 1 or 2 Analog input non-voted Real

ServoxMonitorNV Servo x AvSelection monitor where x = 1 or 2 Analog input non-voted Real

CalibEnab1 Enable calibration regulator 1 Output Boolean

CalibEnab2 Enable calibration regulator 2 Output Boolean

SuicidForcex Force suicide on servo x where x = 1 or 2 Output Boolean

Regx_Ref Regulator x position reference (%) where x = 1 or 2 Output Boolean

Regx_NullCor Regulator x null bias correction (%) where x = 1 or 2 Output Boolean

SysLimxPR System limit for pulse rate input X, where x=1 or 2 Input Boolean

ActivateCalibCmd Activate calibration command Inputed voted Boolean

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10.2 PSVP Specific Alarms
The following alarms are specific to the PSVP I/O pack

45
Description Calibration Mode Enabled

Possible Cause

• The variable CalibEnab# has been set to True and the user has selected the Calibration Mode button in the Calibrate
Valve dialog.

Solution

• This alarm is active to annunciate that the pack is in a special mode where servo suicide protection has been disabled, and
the user needs to take special precautions in this mode.
• Exit calibration mode and set CalibEnab# to False.

46
Description PSVP not online, servos suicided

Possible Cause Servo outputs suicided because I/O pack was offline. This alarm is not visible until the pack goes back
online, so it should be inactive when visible. If the reason for the offline state is unknown, proceed to the solutions.

Solution

• Verify that the controller is online.


• Verify that network connections to the pack are okay.

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47-48
Description Servo current #[ ] disagrees w/ ref, suicided

Possible Cause

• Possible open circuit in servo current loop


• Servo current feedback does not match servo current command within specified Cur_Suicide percentage and
EnablCurSuic is enabled.
• Jumper configuration set incorrectly
• Open or shorted servo coil
• I/O pack hardware failure

Solution

• Check the field wiring for an open loop.


• Check for servo open coil.
• Verify the proper settings of SSVP hardware jumpers.
• Verify the proper setting of configuration parameters and tuning of servo.
• Replace the PSVP and WSVO.

52-53
Description Servo current #[ ] short circuit

Possible Cause

• Servo short circuit detection enabled (ShrtCoildiag) and low resistance measured
• Possible shorted servo coil
• Shorted coil threshold (RcoilShort) or shorted coil time limit (RShrtTimeLim) set incorrectly

Solution

• Verify the proper servo ohm value.


• Set AV_Selector to the value Coil_OHMS (build/download), and view the measured coil resistance displayed in
Servo#MonitorNV_R,S,T.
• Verify that the measured resistance matches the actual coil resistance, and it is above RcoilShort value.

Note For pilot/cylinder regulator types it may be necessary to lower the value of RcoilShort (calculated by the
calibration) if the measured value of Coil_Ohms is noisy enough to cause a short circuit alarm at low currents.

• Verify that the RcoilShort is set to the proper value. Re-calibrate to update measured resistance values.
• Verify the proper setting on the Servo_MA_Out parameter.
• Verify that the terminal board jumpers match the configuration.

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57-58
Description Servo current #[ ] open circuit

Possible Cause

• Servo open circuit detection enabled (OpenCoildiag) and low resistance measured
• Possible open servo coil
• Open coil threshold (RcoilOpen) or open coil time limit (RopenTimeLim) set incorrectly
• PPRO K4CL relay activated.

Solution

• Check field wiring for possible open circuit. Verify the proper servo ohm value.
• Set AV_Selector to value Coil_OHMS (build/download) and view the measured coil resistance displayed in
Servo#MonitorNV_R,S,T.
• Verify that the measured resistance matches actual coil resistance, and is below value.

Note For pilot/cylinder regulator types, it may be necessary to raise the value of RcoilOpen (calculated by the
calibration) if the measured value of Coil_Ohms is noisy enough to cause an open circuit alarm at low currents.

• Verify that the RcoilOpen is set to the proper value. Re-calibrate to update measured resistance values.
• Verify that the terminal board jumpers match the configuration.
• Check state of K4Cl relay.

62-63
Description Servo position #[ ] fdbk out of range, suicided

Possible Cause

• LVDT position feedback outside specified range


• LVDT inputs not calibrated or V rms limits incorrect

Solution

• Check field wiring including shields and LVDT excitation. The problem is usually not a PSVP or terminal board failure if
other LVDT inputs are working correctly.
• Check the LVDT sensor.
• Calibrate the servo regulator with the proper LVDT.
• Verify that LVDT_Margin is set to the proper value.

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67-68
Description Regulator #[ ] configuration error-Error Category [ ]

Possible Cause Configuration settings incorrect for specified regulator type:

• Category 0 error = inactive alarm


• Category 1 error = servo used but no regulator type is assigned to the designated regulator
• Category 2 error = servo does not have a valid regulator assigned to it
• Category 3 error = LVDT sensors required for the designated regulator type are unused
• Category 4 error = LVDT min and max V rms are configured the same
• Category 5 error = Coil_Parallel parameter value not supported for selected PSVP redundancy
• Category 6 error = LVDT required for regulator is not enabled

Solution

• Check the regulator configuration settings.


• Verify that the LVDT input setup (Max/Min limits) matches the regulator configuration.
• Verify that the configured regulators are used by the proper servos.
• Verify that the LVDTs used are enabled.

69
Description Dual Ethernets not supported with 10 msec frame rate

Possible Cause The second Ethernet port is connected, but not supported for a 10 ms frame rate.

Solution Remove the second Ethernet connection to the I/O pack.

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Description Lvdt excitation #[ ] voltage or current out of range-Error Category [ ]

Possible Cause

• Possible short or open inexcitation voltage


• Excitation diagnostics for unused excitation outputs have not been disabled.
• Excitation voltage or current too low
• Loss of serial communications between PSVP modules if excitation sharing is enabled.

Solution

• Check that excitation voltage at SSVP screws is approximately 7 V rms


• If serial link faults are indicated, correct serial link problems first. Serial link faults may cause shared excitation sources
to energize simultaneously.
• Set parameter StandAloneDiag to 0 for unused excitation outputs.
• If excitation is shared with another PSVP that has no excitation faults then replace PSVP and WSVO, then replace SSVP.
A diagnostic reset is required to reset the fault for shared excitation, and to enable the backup excitation source to be
re-armed for excitation switchover.
• If proper voltage is verified, check field wiring from terminal board to the LVDT sensor and LVDT electrical integrity for
shorted or open coil.
• If improper voltage at screws is detected, replace PSVP and WSVO, then replace SSVP.
• Category 1 failure = voltage low
• Category 2 failure = current low
• Category 3 failure = detection logic failure (replace PSVP)

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77
Description Servo Output Assignment Mismatch

Possible Cause

• Regulator types 2_LVpilotCyl, 4_LVp/cylMAX, and 6_LVp/cylMID require two servos assigned to a single regulator.
• Only one regulator should be enabled.
• Servos must have matching parameter (RegNumber) values, as well as matching parameter values for Servo_MA_Out and
TBmAJmpPos.

Solution

• Verify that both servos specify the configured regulator.


• Verify that only one regulator is enabled.
• Verify that the configuration parameters (RegNumber, Servo_MA_Out , and TBmAJmpPos) are the same for both servos.

80-85
Description LVDT [ ] Position Out of Limit

Possible Cause

• Excitation to LVDT, bad transducer, or open or short-circuit.


• LVDT input is out of range.
• LVDT has not been calibrated.

Solution

• Check field wiring including shields and LVDT excitation. The problem is usually not a PSVP/SSVP failure if other
LVDT inputs are working correctly.
• Check LVDT sensor.
• Calibrate servo regulator with the proper LVDT.
• Verify the configuration limits, MinVrms and MaxVrms.
• Verify that LVDT_Margin is set to the proper value.

90-97
Description Power supply [ ]V out of range, voltage = [ ]V

Possible Cause

• Specified internal power supply voltage is incorrect.

Solution

• Replace the WSVO.


• If the problem still exists, replace the PSVP.

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98
Description Pack internal reference voltage out of limits, voltage = ([ ])V

Possible Cause The calibration reference voltage is more than ±5% from the expected value, indicating a hardware
failure.

Solution

• Cycle power on the PSVP.


• Replace the PSVP.

99
Description Pack internal null voltage out of limits, voltage = ([ ])V

Possible Cause The null voltage is more than ±5% from the expected value, indicating a hardware failure.

Solution

• Cycle power on the PSVP.


• Replace the PSVP.

100-101
Description Lvdt backup excitation #[ ] not available

Possible Cause

• Possible short in excitation voltage


• Excitation voltage too low

Solution This diagnostic is only generated for shared excitation where the standby excitation source has failed internally to
the PSVP I/O module. Replace the PSVP and WSVO, then replace the SSVP.

110-111
Description Servo Coil #[ ] not within resistance limits

Possible Cause

• During calibration, the measured servo coil resistance was out of range.

Note As a result of this alarm condition, RCoilShort and RCoilOpen values were not saved during calibration, resulting in
Servo Coil Open and Short Detection functions being disabled.

Solution

• Verify that Servo_MA_Out setting matches the terminal board jumpers.


• Verify servo coil resistance.
• Verify field wiring.

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120-121
Description Servo #[ ] Suicided

Possible Cause

• Servo suicided
• Regulator feedback out of range
• Servo Current feedback differs from Servo Current command
• Open or shorted coil detected

Solution

• LVDT feedback issue: Check LVDT connections.


• Check LVDT mechanical integrity to the valve.
• Check for wiring of servo output loop for open or short circuit.
• Check for a short or an open servo coil.

122
Description SSVP Serial Communications Cabling Error: Board Network Ports (#[ ] connected to each other

Possible Cause

• #1 - Direct cable connection between upper and lower left serial connectors [Connector JUA cabled to connector JLA] on
the same terminal board
• #2 - Direct cable connection between upper and lower right serial connectors [Connector JUB cabled to connector JLB]
on the same terminal board

Solution

• Remove extraneous cables.


• Connect private serial network cables to adjacent SSVP board.
• Adjust configuration data to agree with corrected cable connections.
• Refer to diagrams in the PSVP Servo Control, Configuration section for proper serial connections between PSVP
assemblies.

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123
Description SSVP Serial Communications Cabling Error: Redundant Cables on Network "A" (Left side)

Possible Cause

• Private Serial "A" upper and lower connectors are both connected to the same SSVP board.

Solution

• Remove the extra cable connection.


• Adjust the configuration data to agree with the remaining single connection.
• Refer to diagrams in the PSVP Servo Control, Configuration section for proper serial connections between PSVP
assemblies.

124
Description SSVP Serial Communications Cabling Error: Redundant Cables on Network "B" (Right side)

Possible Cause

• Private Serial "B" upper and lower connectors are both connected to the same SSVP board.

Solution

• Remove extra cable connection.


• Adjust configuration data to agree with remaining single connection.
• Refer to diagrams in the PSVP Servo Control, Configuration section for proper serial connections between PSVP
assemblies.

125
Description SSVP Serial Communications Failure: Upper Left ("A") Network

Possible Cause

• Adjacent SSVP connected to upper left "A" network has rebooted


• Cable not connected properly
• Communications driver failure on SSVP
• "A" (Left side) and "B" (Right side) networks are cross connected to each other.

Solution

• Verify that adjacent PSVP pack is operational.


• Verify cable connection.
• Replace the adyacent PSVP pack and/or SSVP terminal board.
• Replace the local PSVP pack and/or SSVP terminal board.
• Remove left-to-right network cross connections.
• Refer to diagrams in the PSVP Servo Control, Configuration section for proper serial connections between PSVP
assemblies.

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126
Description SSVP Serial Communications Failure: Upper Right ("B") Network

Possible Cause

• Adjacent SSVP connected to upper left "B" network has rebooted.


• Cable not connected properly.
• Communications driver failure on SSVP.
• "A" (Left side) and "B" (Right side) networks are cross connected to each other.

Solution

• Verify that adjacent PSVP pack is operational.


• Verify cable connection.
• Replace the adjacent PSVP pack and/or SSVP terminal board.
• Replace the local PSVP pack and/or SSVP terminal board.
• Remove left-to-right network cross connections.
• Refer to diagrams in the PSVP Servo Control, Configuration section for proper serial connections between PSVP
assemblies.

127
Description SSVP Serial Communications Failure: Lower Left ("A") Network

Possible Cause

• Adjacent SSVP connected to lower left "A" network has rebooted.


• Cable not connected properly.
• Communications driver failure on SSVP.
• "A" (Left side) and "B" (Right side) networks are cross connected to each other.

Solution

• Verify that adjacent PSVP pack is operational.


• Verify cable connection.
• Replace the adjacent PSVP pack and/or SSVP terminal board.
• Replace the local PSVP pack and/or SSVP terminal board.
• Remove left-to-right network cross connections.
• Refer to diagrams in the PSVP Servo Control, Configuration section for proper serial connections between PSVP
assemblies.

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128
Description SSVP Serial Communications Failure: Lower Right ("B") Network

Possible Cause

• Adjacent SSVP connected to lower left "B" network has rebooted.


• Cable not connected properly
• Communications driver failure on SSVP
• "A" (Left side) and "B" (Right side) networks are cross connected to each other.

Solution

• Verify that adjacent PSVP pack is operational.


• Verify cable connection.
• Replace the adjacent PSVP pack and/or SSVP terminal board.
• Replace the local PSVP pack and/or SSVP terminal board.
• Remove left-to-right network cross connections.
• Refer to diagrams in the PSVP Servo Control, Configuration section for proper serial connections between PSVP
assemblies.

129
Description SSVP Serial Communications Configuration or Wiring Error: Error Category = [ ]

Possible Cause

• Category #1: excitation sharing defined, but serial comm is Not Used
• Category #2: unexpected data received on upper left ("A") network, unused port
• Category #3: unexpected data received on upper right ("B") network, unused port
• Category #4: unexpected data received on lower left ("A") network, unused port
• Category #5: unexpected data received on lower right ("B") network, unused port
• Category #6: unexpected data received on upper left ("A") network, wrong pack sending data
• Category #7: unexpected data received on upper right ("B") network, wrong pack sending data
• Category #8: unexpected data received on lower left ("A") network, wrong pack sending data
• Category #9: unexpected data received on lower right ("B") network, wrong pack sending data
• Category #10: Regulator Type 2_LVpilotCyl in TMR topology, but serial comm is Not Used

Solution

• Category #1:
− For Simplex or TMR: from the Parameters tab, set Exc_Sharing to Unused.
− For Dual: from the Parameters tab, set Serial_Links to a selection other than Unused.
• Category #2-9: change Serial_Links from R_Lower_to_S_Upper to R_Upper_to_S_Lower or the other way around as
appropriate. Check the cabling between the packs. Ensure that the serial ports are connected in agreement with the
Serial_Links setting.
• Category #10: Set Serial_Links to a selection other than Unused when the TMR 2_LVpilotCyl application is used.

130
Description Calibration mode permissive cleared because multiple SSVP serial links are faulted

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Possible Cause

• LVDT excitation configured for sharing and both SSVP serial links are faulted
• TMR 2_LVpilotCyl application is used, and multiple SSVP serial links are faulted

Solution

• Verify that the adjacent PSVP is operational.


• Check all serial cable connections. Clear alarms 125-128 as appropriate.
• Replace the adjacent PSVP I/O pack and/or the SSVP terminal board.
• Replace the local PSVP I/O pack and/or the SSVP terminal board.
• Remove left-to-right network cross connections.
• Refer to the section, PSVP Servo Control - Steam, Configuration for proper serial connections between PSVP assemblies.
• Set the Exc_Sharing parameter to Unused if in TMR configuration for PSVP.

144
Description Logic Signal [ ] Voting Mismatch

Possible Cause N/A

Solution N/A

224-247
Description Input Signal [ ] Voting Mismatch, Local=[ ], Voted=[ ]

Possible Cause

• Voter disagreement between R, S and T packs


• Mismatch in the coil resistance
• Reg[ ]_Gain is set too high for the specified TMR_DiffLimt value

Solution

• Adjust the parameters for each input type as follows:


− If input variable is PulseRate[ ], adjust TMR_DiffLimt on the Pulse Rates tab.
− If input parameter is Reg[ ]_Fdbk, adjust TMR_DiffLimt on the Regulators tab.
− If input variable is Mon[ ], adjust TMR_DiffLimt on the Monitors tab.
− If the input parameter is LVDT[ ], adjust the TMR_DiffLimit on the LVDTs tab.
− If input variable is ServoOutput[ ], adjust TMR_DiffLimt on the Regulators tab.
• Check for a mismatch in the coil resistance.
• Check parameter Reg[ ]_Gain settings and adjust TMR_DiffLimt.

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10.3 SSVP Servo Input/Output Terminal Board
10.3.1 Functional Description
The Servo I/O (SSVP) terminal board connects to two electro-hydraulic servo valves that actuate the steam valves. Valve
position is measured with linear variable differential transformers (LVDT) or linear variable differential reluctance
transformers (LVDR). SSVP is designed specifically for the PSVP I/O pack and the WSVO servo driver. It does not work
with the VSVO board or the PSVO pack. The SSVP is a simplex terminal board. Dual redundancy is supported by using two
SSVPs and fanning the inputs externally. Likewise, for TMR redundancy, use three SSVPs and fan the LVDT inputs
externally by using jumpers to send the signal from one SSVP to another SSVP. A single 28 V dc supply comes in through
plug P28IN. Plugs JD1 or JD2 are for an external trip from the protection module.

Note T1 through T2 isolation transformers provide galvanic isolation between the SSVP’s excitation output driver and the
primary-side of the LVDT/R position sensor.

SSVP Terminal Board

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10.3.1.1 Terminal Board Options
The SSVP accepts direct mounting of the PSVPH1A I/O pack and the WSVOH1A servo driver module. There are four
options for the SSVP terminal board:

• SSVPH1A provides the 24-point barrier style input connector.


• SSVPH2A provides the Euro style box-type terminal blocks.
• IS230SSVPH1A barrier style with subassembly
• IS230SSVPH2A Euro style box-type terminal blocks with subassembly
The IS230SSVPHxx is a subassembly comprised of the PSVP I/O pack, the WSVO servo driver, the SSVP terminal board,
and the DIN-rail mechanical assembly.

Subassembly PSVP WSVO SSVP Description


IS230SSVPH1A H1A H1A H1A DIN-rail subassembly with a SSVP providing a 24-point
barrier-strip type customer connector

IS230SSVPH2A H1A H1A H2A DIN-rail subassembly with a SSVP providing a Euro style
box-type terminal blocks

10.3.2 Installation
Sensors and servo valves are wired directly to the TB1 I/O terminal block. The block is held down with two screws and has
24 terminals accepting up to #12 AWG wiring. A shield terminal strip attached to chassis ground is located immediately to the
left of the terminal block. External trip wiring is plugged into either JD1 or JD2.

Note The SSVP can only be used with the PSVP I/O pack.

Each SSVP servo output can support one coil of a three-coil electro-hydraulic servo-actuator or paralleled-coils from a
two-coil servo. Based on the rated coil current, the user selects the current limiting resistor value to limit thermal stress on the
current driver in case of a shorted output. Jumper, JP1 selects the resistor value for Servo 1 and JP2 is for Servo 2.
The P28 power input for the PSVP and WSVO comes into the servo through the SSVP connector labeled P28IN. Switch,
SW1 is used to enable the P28 bus that feeds the PSVP pack and the WSVO servo driver module. The LED labeled P28IN
lights if 28 V dc has been applied to the SSVP. The P28ON LED will remain OFF until the user turns SW1 to the P28ON
position. The RED LED on SSVP labeled PSVP_ONLY will light if a PSVO instead of a PSVP I/O pack is accidently
plugged into the JA1 connector.

10.3.2.1 Connecting to the PSVP


The SSVP simplex terminal board has one DC-62 pin connector, JA1 to accommodate the PSVP pack. The JA1 inputs LVDT
and the pulse rate signals from the SSVP input circuits. It outputs current command signals to the WSVO and receives
feedback status information from the WSVO. It outputs excitation reference to the excitation drivers on the SSVP. It supports
I/O from the RS-422 drivers to support the Private Serial Network used to control the excitation switchover and the isolation
protection for servos paralleled.

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10.3.2.2 Connecting to the WSVO
The JA2 connector is for the WSVO servo driver module. The WSVO module is held down with four screws. If a diagnostic
indicates a servo problem, it is recommended to replace both the PSVP pack and the WSVO servo driver module.

Turn the SSVP input power switch, SW1 to OFF before removing the PSVP, WSVO,
TB1, P28 connector, and serial connectors.

Attention

10.3.3 Operation
The SSVP servo terminal board provides two channels consisting of bi-directional servo current outputs, six channels of
LVDT/R position feedback, two channels of LVDT/R excitation, and one pulse rate input. There is a choice of one, two, or
three LVDT/Rs for each servo control loop. The single pulse rate input is used for the steam turbine primary speed and is not
designed for a flow-type pulse-rate input.
Each servo output is equipped with an individual suicide relay under firmware control that shorts the current output to
common when de-energized, and recovers to nominal limits after a manual reset command is issued. Each servo output also
includes an isolation relay on the SSVP to isolate a short from other servos that are connected in parallel to the suicided servo.
Diagnostics monitor the output status of each servo voltage, current, and suicide relay.
Each of the servo output channels are designed to drive a single coil or parallel coils. The servo outputs are also designed to
be paralleled as shown in the PSVP configuration section. Servo cable lengths up to 300 m (984 ft) are supported with a
maximum two-way cable resistance of 15 Ω. Since there are many types of servo coils, a variety of bi-directional current
sources are jumper selectable.
A trip override relay K1 is provided on the terminal board, which is driven from the PPRO protection I/O pack. If an
emergency overspeed condition is detected in the protection module, the K1 relay energizes, disconnects the servo output, and
applies a bias to drive the control valve closed. This is only used on simplex applications to protect against the servo amplifier
failing high, and is functional only with respect to the servo coils driven from <R>.

Note The primary and emergency overspeed systems will trip the hydraulic solenoids independent of this circuit.

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SSVP Operational Flow 1 of 2

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SSVP Operational Flow 2 of 2

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10.3.3.1 TMR
For Option One: TMR LVDR and Triple Coil Servo (refer to the figure, Option One: TMR LVDR and Triple Coil Servo), the
LVDT/R signals are fanned externally through customer wiring to LVDT inputs SSVP_R, SSVP_S, and SSVP_T. For 3-coil
servos, SSVP_R servo output connects to coil one, SSVP_S connects to coil two, and SSVP_T connects to the third coil of the
3-coil servo actuator. Redundant power for the TMR configuration is handled by independent 28 V dc sources for each SSVP.
The PSVP also provides TMR support for the Pilot/Cylinder configuration. A TMR PSVP: Single Pilot/Single Cylinder
Valves with Dual Coil Servos allows for three independent PSVPs, each inputting one Pilot position feedback and one
Cylinder position feedback running the 2LVpilotCyl position regulator. Each PSVP provides one servo driver output for Coil
#1 and the other servo driver output for Coil #2. This configuration allows Coil #1 servo drivers from PSVP <R>, <S> and
<T> to be paralleled; likewise, for Coil #2 servo drivers.

10.3.3.2 Servo Coils


The following table defines the standard servo coil resistance and their associated internal resistance, selected with the
terminal board jumpers. In addition to these standard servo coils, it is possible to drive non-standard coils by using a
non-standard jumper setting. For example, an 80 mA, 125 Ω coil could be driven by using a jumper setting 120B. The
excitation source is isolated from signal common (floating) and is capable of operation at common mode voltages up to 15 V
dc, or 10 V rms, 50/60 Hz.

Note Servo configuration settings (RegGain, jumpers, and so forth) are application and site specific. Consult the equipment
specific Controls Setting Specification or equivalent document for proper configuration.

Servo Coil Resistance and Associated Internal Resistance


Current Rating Current Coil Resistance Internal Resistance (Ohms)
(Ohms)
10 ±10 mA 1000 170 ±10%
20 ±20 mA 125 432 ±10%
40 ±40 mA 62 - 89 185 ±10%
80 ±80 mA 22 105 ±10%
120A ±120 mA (A) 40 18 ±10%

120B ±120 mA (B) 75 0

Note This table does not apply when servo driver outputs are paralleled.

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The governing equation for determining if the user needs to select a non-standard terminal board jumper position is

R ILIM_Calculated = (12,000 / Servo_MA_OUT) — RCOIL / Coil_Parallel - 10

where:

R ILIM_CALCULATED is the maximum terminal board current-limiting resistance in ohms the WSVO servo driver can
withstand to push 100% Servo_MA_OUT current through the coil. A negative value implies an unreal resistance highlighting
an incorrect value for RCOIL, Servo_MA_OUT, and so forth.

Servo_MA_OUT is the configuration parameter in the ToolboxST Servo Component Editor, Hardware tab, PSVO or
PSVP, Servo tab. The value in milli-amperes defines the servo actuator nominal current.

RCOIL is the servo actuator resistance per coil in ohms.

Coil_Parallel is the configuration parameter found in the ToolboxST Component Editor, Hardware tab, PSVO or PSVP,
Servo tab. The value equals 1 for a single coil and equals 2 for two coils paralleled. If the inequality

Jumper Setting Internal Resistance (from table above) > R ILIM_CALCULATED

is True, then the WSVO will not have the capability to drive 100% current. Select the next lowest terminal board
current-limiting resistance from the Internal Resistance column in the Servo Coil Resistance and Associated Internal
Resistance table.
If the new Internal Resistance value meets the condition

Jumper Setting Internal Resistance ≤ R ILIM_CALCULATED

The following is an example of this formula:

R ILIM_Calculated = (12,000 / 80) - 125 / 1 - 10 = 15 ohms

where only one single servo driver output used, the servo actuator resistance is 125 ohms per coil, the nominal current is 80
mA and the servo actuator coils are not paralleled. Based on this calculation, Jumper 120B is selected with the ToolboxST
application PSVO or PSVP configuration parameters defined as given in the equation above.

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10.3.3.3 Valve Position
Control valve position is sensed with either a three or four-wire LVDT, or a three-wire linear variable differential reluctance
(LVDR) transducer. Redundancy implementations for the feedback devices are determined by the application software to
allow the maximum flexibility. LVDT/Rs can be mounted up to 300 m (984 ft) from the turbine control with a maximum
two-way cable resistance of 15 Ω.

Note Refer to the section, PSVP Servo Control, Operation, Recommended Wiring Practices.

Two LVDT/R transformer-isolated excitation sources are located on the terminal board. Excitation voltage is 7.07 V rms, and
the frequency is 3.2 kHz with a total harmonic distortion of less than 1%. A typical LVDT/R has an output of 0.7 V rms at the
zero stroke position of the valve stem, and an output of 3.5 V rms at the designed maximum stoke position (some applications
have these reversed). The LVDT/R input is converted to dc and conditioned with a low pass filter. Diagnostics perform a
high/low (hardware) limit check on the input signal and a high/low system (software) limit check.
The pulse rate input supports a single passive magnetic pickup only. The TTL type active pulse rate transducer is not
supported. The MPU can be located up to 300 m (984 ft) from the turbine control cabinet. This assumes shielded-pair cable is
used with typically 70 nF single ended or 35 nF differential capacitance, and 15 Ω resistance.
A frequency range of 2 to 20 kHz can be monitored. Magnetic pickups typically have an output resistance of 200 Ω and an
inductance of 85 mH excluding cable characteristics. The transducer is a high-impedance source, generating energy levels
insufficient to cause a spark.

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10.3.4 Specifications
Item SSVP Specification
Number of inputs Six LVDT windings
One pulse rate signal, magnetic pickup sensor only
External trip signal to shut off servo outputs

Number of outputs Two servo valves, ±(10, 20, 40, 80, 120) mA
Two excitation sources for LVDT / Rs (transformer isolation)

Power supply voltage Nominal 28 V dc from single supply, P28


Pin 1 is Hi
Pin 2 is Lo
Power supply current 1.5 A dc (Poly-Fuse or current limit rating for each input is 1 A dc)

LVDT excitation output Frequency of 3.2 ±0.2 kHz


Voltage of 7.07 ±0.14 V rms

Pulse rate input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 28 mV p-p
20 kHz requires 320 mV p-p

Magnetic PR pickup signal Generates 150 V p-p into 60 Ω

Fault detection Servo current out of limits or not responding


Regulator feedback signal out of limits
Failed ID chip

Size 15.875 cm high x 20.32 cm wide (6.25 in x 8 in)

Technology Surface-mount

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10.3.5 Diagnostics
PSVP makes diagnostic checks on the terminal board components as follows:

• The output servo current is out of limits or not responding, creating a fault.
• The regulator feedback (LVDT) signal is out of limits, creating a fault. If the associated regulator has two sensors, the bad
sensor is removed from the feedback calculation and the good sensor is used.
• If any one of the above signals goes unhealthy a composite diagnostic alarm, L3DIAG_PSVP occurs. Details of the
individual diagnostics are available from the ToolboxST application. The diagnostic signals can be individually latched
and reset with the RESET_DIA signal if they go healthy.

10.3.6 Configuration
In a simplex system, servo 1 is configured for the correct coil current with jumper JP1. Servo 2 is configured with jumper JP2.
In a TMR non-pilot/cylinder system, one servo from three different SSVPs provides the drivers needed for three coils. In this
case, the LVDT inputs are fanned externally to all three SSVPs. All other servo board configuration is done from the
ToolboxST application.

Note Power must be applied to P28IN connector. Verify that the P28IN LED is lit, the SW1 switch is ON, and the P28ON
power indicator is lit.

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Notes

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11 PTUR, YTUR Turbine Specific
Primary Trip
11.1 Mark VIe PTUR Primary Turbine Protection I/O Pack
The Turbine Specific Primary Trip (PTUR) I/O pack provides the electrical interface
between one or two I/O Ethernet networks and a turbine control terminal board. The
PTUR contains a processor board common to the distributed I/O packs, a board specific
to the turbine control function, and an analog acquisition daughterboard. The I/O pack
plugs into the TTURH1C terminal board and handles four speed sensor inputs, bus and
generator voltage inputs, shaft voltage and current signals, eight flame sensors, and
outputs to the main breaker. Input to the pack is through dual RJ-45 Ethernet connectors
and a three-pin power input. Output is through a DC-62 pin connector that connects
directly with the associated terminal board connector. Visual diagnostics are provided
through indicator LEDs.

As an alternative to TTURH1C, three PTUR I/O packs can be plugged directly into a
TRPAH1A terminal board. This arrangement handles four speed inputs per PTUR, or
alternately fans the first four inputs into all three PTURs. Two solid-state primary trip
relays are provided by the TRPA. This arrangement does not support bus and generator
voltage inputs, shaft voltage or current signals, flame sensors, or main breaker output.
For simplex applications, the STUR terminal boards can be used.

BTURH1A
KTURH1A Processor board
board
board Single or dual
TTURH1C Turbine Ethernet cables
Terminal Board ENET1

ENET2

K25 and K25P output External 28 V dc


Speed Sensor inputs power supply
Shaft Voltage
Bus & Gen. Voltages
ENET1

ENET2

28 V dc

3 PTUR packs for


TMR operation ENET1

1 PTUR pack for ENET2


Simplex operation
28 V dc

Trip signals, 8
flame detectors,
to TRPx

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11.1.1 Compatibility
The PTUR I/O pack includes one of the following compatible BPPx processor boards:

• The PTURH1A contains a BPPB processor board.


• The PTURH1B contains a functionally compatible BPPC processor board that is supported in the ControlST* software
suite V04.07 and later.
TMR Compatible Trip and Terminal Boards
Terminal Board
Trip Board TTUR H1C TRPA H1A TRPA H2A
No Trip Board X X X
TRPA H1A X
TRPA H2A X
TRPG H1B X
TRPG H3B X
TRPL H1A X
TRPS H1A X

Simplex Compatible Trip and Terminal Boards


Terminal Board
Trip Board TTUR H1C STUR H1A STUR H2A STUR H3A STUR H4A
No Trip Board X X X
TRPG H2B X X X
TRPS H1A X X X

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11.1.2 Installation
In 240 V ac applications, do not inadvertently cross-connect the 240 V ac and the dc
voltages. The peak voltage will exceed the Transorb rating, resulting in a failure.

Most ac supplies operate with a grounded neutral, and if an inadvertent connection


between the 125 V dc and the ac voltage is created, the sum of the ac peak voltage and
the 125 V dc is applied to Transorbs connected between dc and ground. However, in
Caution 120 V ac applications, the Transorb rating can withstand the peak voltage without
causing a failure.

➢ To install the PTUR I/O pack


1. Securely mount the desired terminal board.
2. Directly plug the PTUR I/O pack into the terminal board connectors.
3. Mechanically secure the I/O pack(s) using the threaded studs adjacent to the Ethernet ports. The studs slide into a
mounting bracket specific to the terminal board type. The bracket location should be adjusted such that there is no
right-angle force applied to the DC-62 pin connector between the I/O pack and the terminal board. The adjustment should
only be required once in the service life of the product.

Note The PTUR mounts directly to a TTUR, STUR, or TRPA terminal board. The TMR TTUR and TRPA have three DC-62
pin connectors for I/O packs. For simplex, either STUR or TTUR can be used.

4. Plug in one or two Ethernet cables depending on the system configuration. The I/O pack will operate over either port. If
dual connections are used, the standard practice is to connect ENET1 to the network associated with the R controller.
5. Apply power to the I/O pack by plugging in the connector on the side of the I/O pack. It is not necessary to remove
power from the cable before plugging it in because the I/O pack has inherent soft-start capability that controls current
inrush on power application.
6. Use the ToolboxST* application to configure the I/O pack as necessary. Refer to GEH-6700, ToolboxST User Guide for
Mark VIe Control, for more information.

11.1.2.1 Connectors
• The DC 62-pin connector on the underside of the I/O pack connects directly to a discrete output terminal board.
• The RJ-45 Ethernet connector (ENET1) on the I/O pack side is the primary system interface.
• The second RJ-45 Ethernet connector (ENET2) on the I/O pack side is the redundant or secondary system interface.

Note The terminal board provides fused power output from a power source that is applied directly to the terminal board, not
through the I/O pack connector.

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11.1.3 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• Auto-reconfiguration
• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Module Alarms

11.1.3.1 Analog Input Hardware


In simplex applications, up to four pulse rate signals may be used to measure turbine speed. The PTUR I/O pack contains
circuits to convert pulse rate inputs to digital speed. Generator and bus voltages are brought into PTUR for automatic
synchronizing in conjunction with the turbine controller and GE excitation system. TTUR has permissive generator
synchronizing relays and controls the main breaker relay coil 52G. Shaft voltage is picked up with brushes and monitored
along with the current to the machine case. PTUR alarms high voltages and tests the integrity and continuity of the circuitry.
In TMR applications there are separate sets of four speed inputs for each PTUR, R, S, and T. All other inputs fan to the three
PTUR I/O packs. Control signals from R, S, and T are voted before they actuate permissive relays K25 and K25P. Relay
K25A is controlled by the PPRO. All three relays have two normally open contacts in series with the breaker close coil.

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PTUR with TTURH1C Terminal Board, Simplex System

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 517
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11.1.3.2 Speed Pickups
An interface is provided for four passive, magnetic speed inputs with a frequency range of 2 to 20,000 Hz. Using passive
pickups on a sixty-tooth wheel, circuit sensitivity allows detection of 2-RPM turning gear speed to determine if the turbine is
stopped (zero speed). If automatic turning gear engagement is provided in the turbine control, this signal initiates turning gear
operation.

Note The median speed signal is used for speed control and for the primary overspeed trip signal.

Pulse rate inputs can be configured for a variety of applications. When using the configuration parameter PRType, flow type is
used for flow divider fuel flow measurements. Speed type is used for normal single shaft turbines. Speed_High type provides
extended speed range above the standard speed type. Speed_LM type is designed for LM applications. Speed_HSNG type is
used for applications where compensation for inconsistent tooth spacing on the speed wheel is desired. This pulse rate type
will map the spacing of the teeth on the speed wheel to remove this periodic variation from speed measurements. Mapping
locked status bits (HSNGn_Stat) are in signal space so that the mapping status of the algorithm can be observed. If the status
indicator for a pulse rate input is false, then the mapping algorithm sees too much variation in the tooth-tooth measurements
to lock onto the tooth geometry.

Note The primary overspeed trip calculations are performed in the controller using algorithms similar to (but not the same
as) those in the PPRO. The optional fast overspeed trip for gas turbines runs in the PTUR.

The Lock_Limit parameter can be adjusted in 1% increments to allow for more tooth-to-tooth variation per revolution caused
by some of the following issues:

• Magnetized speed wheel


• Electro-magnetic interference from outside sources
• Improper wiring or shielding practices
Increasing the Lock_Limit value will allow the HSNG speed algorithm to stay locked with increased variation.

The cost for opening the Lock_Limit is that it will allow for more speed variation. If
the speed variation is too high when opening up the Lock_Limit, go to the source of
the problem as listed above and correct the issue there.
Attention

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PTUR I/O Packs with TTURH1C Terminal Board, TMR System

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 519
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11.1.3.3 Primary Trip Solenoid Interface
The normal primary overspeed trip is calculated in the controller and passed to the PTUR and then to the chosen primary trip
terminal board. TRPx contains relays for interface with the electrical trip devices (ETD). TRPx typically works in conjunction
with an emergency trip board (TREx) to form the primary and emergency sides of the interface to the ETDs. The PTUR
supports up to three ETDs driven from each TRPx/TREx combination.
There are a number of different trip boards supported by the PTUR:

• TRPG is targeted at gas turbine applications and works in conjunction with TREG for emergency trip.
• TRPS is used for small and medium size steam turbine systems and is controlled by the PTUR I/O pack.
• TRPL is intended for large steam turbine systems and is controlled by the PTUR I/O pack for emergency trip.
• TRPA and TREA are used for Aero applications.
In support of the trip board operation, the PTUR provides a number of discrete inputs used to monitor signals, such as trip
relay position, synchronizing relay coil drive, and ETD power status.

11.1.3.4 Synchronizing System


The synchronizing system interfaces to the breaker close coil through the TTURH1C terminal board. Three Mark VIe control
relays must be picked up, plus external permissions must be true, before a breaker can be closed. Both sides of the breaker
close coil power bus must be connected to the TTUR board. This provides diagnostic information and measures the breaker
closure time, through the normally open breaker auxiliary contact, for optimization. The breaker close circuit is rated to make
(close) 10 A at 125 V dc, but to open only 0.6 A. A normally open auxiliary contact on the breaker is required to interrupt
the closing coil current.
The K25P relay is directly driven from the controller application code. In a TMR system, it is driven from R, S, and T, using 2
out of 3 logic voting. For a simplex system, it may be configured by jumper to be driven from R only.
The K25 relay is driven from the PTUR auto sync algorithm, which is managed by the controller application code. In a TMR
system, it is driven from R, S, and T, using 2 out of 3 logic voting. For a simplex system, it may be configured by jumper to
be driven from R only.
The K25A relay is located on TTUR, but is driven from the PPRO sync check algorithm, which is managed by the controller
application code. The relay is driven from the PPRO, using 2 out of 3 logic voting in TREG/L/S. The sync check relay driver
(located on TREG/L/S) is connected to the K25A relay coil (located on TTUR) through cabling from the J2 connector to
TRPG/L/S. It then goes through JR1 (and JS1, JT1) to JR4 (and JS4, JT4) on TTUR.

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11.1.3.5 Synchronizing Modes
There are four basic synchronizing modes: Off, Manual, Auto, and Monitor:

Off The breaker cannot be closed by the controller. The K25A check relay will not pick up.

Manual The operator initiates breaker close, which is still subject to the K25A Sync Check contacts driven by the PPRO or
YPRO. The manual close is initiated from an external contact on the generator panel, normally connected in series with a
sync mode in manual contact.

Auto The system automatically matches voltage and speed, and then closes the breaker at the right time to hit top dead
center on the synchroscope. All three of the following functions must agree for this closure to occur:

• K25A - sync check relay, checks the allowable slip or phase window, from the PPRO or YPRO
• K25 - auto sync relay, provides precision synchronization, from the PTUR or YTUR
• K25P - sync sequence permissive, checks the turbine sequence status, from the PTUR or YTUR
The K25A relay should close before the K25 or else the sync check function will interfere with the auto sync optimizing. If
this sequence does not run, a diagnostic alarm occurs, a lockout signal is set to True. The application code may prevent any
further attempts to synchronize until a reset is issued and the correct coordination is set up.

Monitor The monitor mode is identical to the auto sync mode except it blocks the actual closure of the K25 relay contacts.
The intended K25 breaker closure command can be monitored using the parameter L25_Command. Monitor mode is used to
verify that the performance of the system is correct; it is used as a confidence builder.

11.1.3.6 Automatic Synchronizing


All synchronizing connections are located on the TTUR terminal board. The generator and bus voltages are provided by two,
single phase, potential transformers (PTs) with a fused secondary output supplying a nominal 115 V rms. The PTs are external
to the TTUR, and it is the secondary output of these PTs that ties to the PT inputs of the TTUR. Measurement accuracy
between the zero crossing for the bus and generator voltage circuits is 1 degree.
Turbine speed is matched against the bus frequency. The generator and bus voltages are matched by adjusting the generator
field excitation voltage from commands sent between the turbine controller and the excitation controller over the Unit Data
Highway (UDH). A command is given to close the breaker when all permissions are satisfied. The breaker is predicted to
close within the calculated phase or slip window. Feedback of the actual breaker closing time is provided by a 52G/a contact
from the generator breaker (not an auxiliary relay) to update the database.
An internal K25A sync check relay is provided on the TTUR. The independent backup phase or slip calculation for this relay
is performed in the PPRO or YPRO. Diagnostics monitor the relay coil and contact closures to determine if the relay properly
energizes or de-energizes upon command.

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11.1.3.7 Auto Sync Application Code
The application code must sequence the turbine and bring it to a state where it is ready for the generator to synchronize with
the system bus. For automatic synchronization, the code must:

• Match speeds
• Match voltages
• Energize the sync permissive relay, K25P
• Arm (grant permission to) the sync check function (PPRO, K25A)
• Arm (grant permission to) the auto sync function (PTUR, K25)
The following illustrations represent positive slip (Gen) and negative phase (Gen).

11.1.3.8 Automatic Synchronizing Algorithm


The PTUR or YTUR runs the auto sync algorithm. Its basic function is to monitor two Potential Transformer (PT) inputs,
generator and bus, to calculate phase and slip difference, and when armed (enabled) from the application code, and when the
calculations anticipate top center, to attempt a breaker closure by energizing relay K25. The algorithm uses the zero voltage
crossing technique to calculate phase, slip, and acceleration. It compensates for breaker closure time delay (configurable),
with self-adaptive control when enabled, with configurable limits. It is interrupt driven and must have generator voltage to
function. The configuration can manage the timing on two separate breakers.
The algorithm has a bypass function, two signals for redundancy, to provide dead bus and Manual Breaker Closures. It
anticipates top dead center; therefore, it uses a projected window, based on current phase, slip, acceleration, and breaker
closure time. To pickup K25, the generator must be currently lagging, have been lagging for the last 10 consecutive cycles,
and projected (anticipated) to be leading when the breaker actually reaches closure. Auto sync will not allow the breaker to
close with negative slip. In this fashion, assuming the correct breaker closure time has been acquired, and the sync check relay
is not interfering, breaker closures with less than 1 degree error can be obtained.
Slip is the difference frequency (Hz), positive when the generator is faster than the bus. Positive phase means the generator is
leading the bus; the generator is ahead in time, or the right hand side on the synchroscope. The standard window is fixed and
is not configurable. However, a special window has been provided for synchronous condenser applications where a more
permissive window is needed. It is selectable with a signal space Boolean and has a configurable slip parameter.
The algorithm validates both PT inputs with a requirement of 50% nominal amplitude or greater; that is, they must exceed
approximately 60 V rms before they are accepted as legitimate signals. This is to guard against cross talk under open circuit
conditions. The monitor mode is used to verify that the performance of the system is correct and to block the actual closure of
the K25 relay contacts. It is used as a confidence builder. The signal space Input Gen_Sync_Lo will become true if the K25
contacts are closed when they should not be closed, or if the Sync Check K25A is not picked up before the Auto Sync K25. It
is latched and can be reset with Sync_Reset.
The algorithm compensates for breaker closure time delay, with a nominal breaker close time, provided in the configuration in
milliseconds. This compensation is adjusted with self-adaptive control, based upon the measured breaker close time. The
adjustment is made in increments of one cycle (16.6/20 ms) per breaker closure and is limited in authority to a configurable
parameter. If the adjustment reaches the limit, a diagnostic alarm, Breaker Slower/Faster Than Limits Allows is posted.

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The Auto Sync K25 function uses zero voltage crossing techniques. It compensates for the breaker time delay, which is
defined by two adjustable constants with logic selection between the two (for two breaker applications). The calculations,
which are done on the PTUR or YTUR I/O pack, include phase, slip, acceleration, and anticipated time lead for the breaker
delay. Based on the measured breaker close time, the time delay parameter is adjusted, up to certain limits.
In addition, auto sync arms logic to enable the function, and bypasses logic to provide for deadbus or manual closure. The
auto sync projected sync window is displayed below, where positive slip indicates that the generator frequency is higher than
the bus frequency.

Auto Sync Projected Window


The projected window is based on current phase, current slip, and current acceleration. The generator must currently be
lagging and have been lagging for the last 10 consecutive cycles, and projected (anticipated) to be leading when the breaker
actually reaches closure. Auto sync will not allow the breaker to close with negative slip; speed matching typically aims at
around + 0.12 Hz slip.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 523
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Automatic Synchronizing Algorithm

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11.1.3.9 Synchronization Testing
The hardware interface may be verified by forcing the three synchronizing relays, individually or in combination. If the
breaker close coil is connected to the TTUR terminal board, then the breaker must be disabled so as not to actually connect
the generator to the system bus.

➢ To verify the hardware interface


1. Operate the K25P relay by forcing output signal Sync Perm found under PTUR, card points. Verify that the K25P relay is
functional by probing TTUR screws 3 and 4. The application code has direct control of this relay.
2. Simulate generator voltage on TTUR screws 17 and 18. Operate the K25 relay by forcing TTUR, card point output
signals Sync_Bypass1 =1, and Sync_Bypass0 = 0. Verify that the K25 relay is functional by probing screws 4 and 5 on
TTUR.
3. Simulate generator voltage on SPRO screws 1 and 2. Operate the K25A relay by forcing SPRO, card point output signals
SynCK_Bypass =1, and SynCk_Perm 1. The bus voltage must be zero (dead bus) for this test to be functional. Verify that
the K25A relay is functional by probing screws 5 and 6 on TTUR.

➢ To simulate a synchronization
1. Disable the breaker.
2. Establish the center frequency of the PPRO I/O pack PLL. From the Hardware tab Tree View, select the PPRO.
3. Select the K25A tab and locate the signal, K25A_Fdbk, ReferFreq.
a. If ReferFreq is configured PR_Std, and the PPRO is configured for a single shaft machine, apply rated speed
(frequency) to input PulseRate1.

Terminal Board Screw Pairs


TPRO 31/32
37/38
43/44
SPRO 19/20

b. If ReferFreq is configured PR_Std, and the PPRO is configured for a multiple shaft machine, apply rated speed
(frequency) to input PulseRate 2.

Terminal Board Screw Pairs


TPRO 33/34
39/40
45/46
SPRO 21/22

c. If ReferFreq is configured SgSpace, force the PPRO signal space output DriveRef to 50 or 60 (Hz), depending on the
system frequency.
4. Apply the bus voltage, a nominal 115 V ac, 50/60 Hz, to TTUR screws 19 and 20, and to SPRO screws 3 and 4.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 525
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5. Apply the generator voltage, a nominal 115 V ac, adjustable frequency, to TTUR screws 17 and 18 and to SPRO screws 1
and 2. Adjust the frequency to a value giving positive slip, that is PTUR signal GenFreqDiff of 0.1 to 0.2 Hz. (10 to 5 sec
scope).
6. Force the following signals to the TRUE state:

− PTUR, Sync_Perm, then K25P should pick up


− PTUR, Sync_Perm_AS, then K25 should pulse when the voltages are in phase
− PPRO, SynCK_Perm, then K25A should pulse when the voltages are in phase
7. Verify that the TTUR breaker close interface circuit, screws 3 to 7, is being made (contacts closed) when the voltages are
in phase.
8. Run a trend chart on the following signals:

− PPRO: GenFreqDiff, GenPhaseDiff, L25A_Command, K25A_Fdbk


− PTUR: GenFreqDiff, GenPhaseDiff, L25_Command, CB_K25_PU, CB_K25A_PU
9. Use an oscilloscope, voltmeter, synchroscope, or a light to verify that the relays are pulsing at approximately the correct
time.
10. Examine the trend chart and verify that the correlation between the phase and the close commands is correct.
11. Increase the slip frequency to 0.5 Hz and verify that K25 and K25A stop pulsing and are open.
12. Return the slip frequency to 0.1 to 0.2 Hz, and verify that K25 and K25A are pulsing.
13. Reduce the generator voltage to 40 V ac and verify that K25 and K25A stop pulsing and are open.

11.1.3.10 Fast Overspeed Trip


In special cases where a fast overspeed trip system is required, the PTUR Fast Overspeed Trip algorithms can be enabled. The
system employs a speed measurement algorithm using a calculation for a predetermined tooth wheel. The fast trips are linked
to the output trip relays with an OR-gate. The PTUR computes the overspeed trip instead of the controller, so the trip is very
fast. The time from the overspeed input to the completed relay dropout is 30 ms or less. The following two overspeed
algorithms are available:

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PR_Single uses two redundant PTURs by splitting up the two redundant PR transducers, one to each board. PR_Single
provides redundancy and is the preferred algorithm for LM gas turbines.

Signal Space Input PTUR I/O Pack Firmware Signal Space


Outputs Config. Inputs
param. Scaling
RPM
Input, PR1 PulseRate1
d RPM/sec
PR 1Type, 2 Accel1
PulseRate2 dt
PR 1Scale RPM
------ Four Pulse Rate Circuits ------- PulseRate2
PulseRate3 Accel1 RPM/sec
Accel2
Accel2 RPM
PulseRate4 Accel3 RPM/sec PulseRate3
Accel4 Accel3
RPM
PulseRate4
AccelCal Type RPM/sec
Accel4
Fast Overspeed Protection
FastTripType
PR_Single PulseRate1 A
A >B S
PR1Setpoint B FastOS1Trip
PR1TrEnable R
PR1TrPerm
PulseRate2 A
A >B S
PR2Setpoint B FastOS2Trip
PR2TrEnable R
PR2TrPerm
PulseRate3 A
A >B S
PR3Setpoint B FastOS3Trip
PR3TrEnable R
PR3TrPerm
PulseRate4 A
A >B
S
PR4Setpoint B FastOS4Trip
PR4TrEnable R
PR4TrPerm
InForChanA Accel1
Accel2 Input AccelA
Accel3 cct. A
S
Accel4 select A>B AccATrip
AccASetpoint B R
AccelAEnab
AccelAPerm
InForChanB Accel1
Accel2 Input AccelB
Accel3 cct. A S
Accel4 select A>B AccBTrip
B R
AccBSetpoint
AccelBEnab Fast Trip
Path
AccelBPerm
False = Run
Master Reset OR
(MRESET) MarkVIe,
SYS_OUTPUT block
True = Run
Primary Trip Relay, normal Path, True= Run AND Output, J4,PTR 1
Kq1
PTR1_Output
Primary Trip Relay, normal Path, True= Run AND True = Run
Kq2 Output, J4,PTR 2
PTR 2_Output
Primary Trip Relay, normal Path, True= Run AND True = Run
Kq3 Output, J4,PTR 3
PTR 3_Output

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 527
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PR_Max uses one PTUR connected to the two redundant PR transducers. PR_Max allows broken shaft and deceleration
protection without the risk of a nuisance trip if one transducer is lost.

Signal Space Signal Space


Input Config. PTUR I /O Pack Firmware
Outputs Scaling Inputs
Param. PulseRate1 RPM
Input, PR1 PulseRate1
RPM/sec
PR1Type, 2 _d Accel1
PR1Scale dt RPM PulseRate2
PulseRate2 RPM/sec
Accel1 Four Pulse Accel2
PulseRate3 Accel2 Rate Circuits RPM PulseRate3
Accel3 RPM/sec
PulseRate4 Accel3
Accel4 RPM PulseRate4
AccelCalType RPM/sec
Accel4
FastTripType PR_Max
Fast Overspeed Protection
DecelPerm
DecelEnab
DecelStpt
InForChanA
InForChanB
Accel1 AccelA
Accel2 Input Neg A
Accel3 cct . AccelB A<B S
Accel4 Select Neg B DecelTrip
for R
PulseRate1
PulseRate2 AccelA PulseRateA
and A
PulseRate3
AccelB A> B
PulseRate4 PulseRateB B
PR1/2Max

PulseRate1
A
MAX A>B
PulseRate2 B
S
FastOS 1Trip
FastOS1Stpt R
FastOS1Enab
FastOS1Perm PR3/4Max

PulseRate3
A
MAX A>B S
PulseRate4
B FastOS 2Trip
FastOS2Stpt R
FastOS2Enab
FastOS2Perm

N/C
FastOS 3Trip
N/C
PR1/2Max FastOS 4Trip
A
|A-B| A
PR3/4Max B A>B S
B FastDiffTrip
DiffSetpoint R
DiffEnab
DiffPerm
Fast Trip
Master Reset
Path
(MRESET ) False = Run
OR
MarkVIe,
SYS_OUTPUT
block
True=Run
Primary Trip Relay , normal Path, True=Run AND Output, J4, PTR 1
Kq1
PTR 1_Output
True=Run
Primary Trip Relay , normal Path, True=Run AND Output, J4, PTR2
Kq2
PTR 2_Output
True=Run
Primary Trip Relay , normal Path, True=Run AND Output, J4, PTR3
Kq3
PTR 3_Output

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11.1.3.11 Shaft Voltage and Current Monitor
Bearings can be damaged by the flow of electrical current from the shaft to the case. This current can occur for several
reasons:

• A static voltage can be caused by droplets of water being thrown off the last stage buckets in a steam turbine. This
voltage builds up until a discharge occurs through the bearing oil film.
• An ac ripple on the dc generator field can produce an ac voltage on the shaft with respect to ground through the
capacitance of the field winding and insulation. Note that both of these sources are weak, so high impedance
instrumentation is used to measure these voltages with respect to ground.
• A voltage can be generated between the ends of the generator shaft due to dissymmetries in the generator magnetic
circuits. If the insulated bearings on the generator shaft break down, the current flows from one end of the shaft through
the bearings and frame to the other end. Brushes can be used to discharge damaging voltage buildup, and a shunt should
be used to monitor the current flow.

Note The dc test is driven from the R controller only. If the R controller is down, this test cannot be run successfully.

The turbine control continuously monitors the shaft to ground voltage and current, and alarms excessive levels. There is an ac
test mode and a dc test mode. The ac test applies an ac voltage to test the integrity of the measuring circuit. The dc test checks
the continuity of the external circuit, including the brushes, turbine shaft, and the interconnecting wire.

11.1.3.12 Flame Detectors


With the TRPG primary trip terminal board, the primary protection system monitors signals from eight flame detectors. With
no flame present the detector charges up to the supply voltage. The presence of flame causes the detector to charge to a level
and then discharge through the TRPG. As the flame intensity increases, the discharge frequency increases. When the detector
discharges, the primary protection system converts the discharged energy into a voltage pulse. The pulse rate varies from 0 to
1,000 pulses/sec. These voltage pulses are fanned out to all three modules. Voltage pulses above 2.5 V generate a logic high.
Pulses are counted over a 40 ms period in a counter to generate the flame detector pulse rate.

Note Refer to GEH-6721_Vol_II, the chapter Power Distribution Modules, the section, PSFD Flame Detector Power Supply.

11.1.4 Specifications
Item PTUR Specification
Number of inputs 4 Passive speed pickups
1 Shaft voltage and 1 current measurement
1 Generator and 1 bus voltage
Generator breaker status
Eight flame detectors from TRPG

Number of outputs Automatic synchronizing control to main breaker


Primary trip solenoid interface, 3 outputs to TRPG

Speed sensor range MPU pulse rate range 2 Hz to 20 kHz

Speed sensor accuracy MPU pulse rate accuracy 0.05% of reading from 2 Hz to 20 kHz
The voted speed from the TMR-configured PTUR I/O packs meets the UCTE OH – Policy 1,
±10 mHz accuracy requirement for a frequency in the range of 2000 to 5600 hertz.

Speed input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 24 mV p-p
Turning gear speed may be observed on 20 kHz requires 276 mV p-p
a typical turbine application.

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Item PTUR Specification
Shaft voltage monitor Signal is frequency of ±5 V dc (0 – 1 MHz) pulses from 0 to 2,000 Hz

Shaft voltage dc test Applies a 5 V dc source to test integrity of the circuit. Circuit reads a differential resistance
between 0 and 150 Ω within ±5 Ω. Readings above the BrushLimit ohms setting indicate a
fault. Returned signal is filtered to provide 40 dB of noise attenuation at 60 Hz.

Shaft voltage ac test Applies a test voltage of 2 kHz to the input of the PTUR shaft voltage circuit.

Shaft current input Measures shaft current in amps ac (shunt voltage up to 0.1 V pp)

Generator and bus voltage sensors Two single phase potential transformers, with secondary output supplying a nominal 115 V
rms. These PTs are external to the TTUR, and it is the secondary output of these PTs that ties
to the PT inputs of the TTUR.
Each PT input on the TTUR has less than 3 VA of loading. Allowable voltage range for sync is
75 to 130 V rms with an accuracy of ±0.5% (of the measurement range).

Synchronizing measurements Frequency accuracy 0.05% over 45 to 66 Hz range.


Zero crossing of the inputs is monitored on the rising slope.
Phase difference measurement is better than ±1°.
Contact voltage sensing 20 V dc indicates high and 6 V dc indicates low. Each circuit is optically isolated and filtered for
4 ms.
Size 8.26 cm High x 4.19 cm Wide x 12.1 cm Deep (3.25 in x 1.65 in x 4.78 in)
† Ambient rating for enclosure design PTURH1B is rated from -40 to 70ºC (-40 to 158 ºF)
PTURH1A is rated from -30 to 65ºC (-22 to 149 ºF)

Technology Surface mount

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

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11.1.5 Diagnostics
The I/O pack performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware.
• Continuous monitoring of the internal power supplies for correct operation.
• L3BKR_GXS – the Sync Check Relay on TTUR is Slow.
• Breaker #1 Slower than Adjustment Limit Allows.
• Breaker #2 Slower than Adjustment Limit Allows.
• Synchronization Trouble – the K25 Relay on TTUR Locked Up.
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set.
• Diagnostic information includes status of the solenoid relay driver, contact, high and low flame detector voltage, and the
sync relays. If any one of the signals goes unhealthy a composite diagnostic alarm, L3DIAG_PTUR occurs.
The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal if they go healthy. Details of
the individual diagnostics are available from the ToolboxST application.

11.1.5.1 PTUR Application LEDs

LED Label Description


Yellow K25 Indicates the presence of a command to energize the primary synchronizing relay.

Yellow K25P Indicates the presence of a command to energize the synchronizing permissive relay.

Yellow DCT Indicates the presence of a command to enable the DC Test of shaft voltage and
current monitoring.

Yellow K1, K2, and K3 Indicates a command to energize the corresponding relay.

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11.1.6 PTUR ToolboxST Configuration

11.1.6.1 Parameters
Parameter Name Parameter Description Choices
SystemLimits Allows user to temporarily disable all system limit checks for Enable, Disable
testing purposes. Setting this parameter to Disable will cause a
diagnostic alarm to occur.

ResetShuntTest Reset shunt test OK status on SysLimit Reset (TTUR only) Enable, Disable

No_T_PS_Req No flame detect power supply required for T (TRPG only) Enable, Disable

AccelCalType Select acceleration calculation time (milliseconds) 10 to 100

TripType Select fast trip algorithm Unused, PR_Single, PR_Max

DecelStpt Deceleration setpoint, rpm/sec (TripType = PR_Max) 0 to 1500

DecelEnab Deceleration enable (TripType = PR_Max) Disable, Enable

FastOS1Stpt Fast Overspeed trip #1 setpoint, Max (PR1, PR2), rpm (TripType 0 to 20000
= PR_Max)

FastOS1Enabl Fast Overspeed trip #1 enable (TripType = PR_Max) Disable, Enable

FastOS2Stpt Fast Overspeed trip #2 setpoint, Max (PR3, PR4), rpm (TripType 0 to 20000
= PR_Max)

FastOS2Enabl Fast Overspeed trip #2 enable (TripType = PR_Max) Disable, Enable

DiffSetpoint Difference Speed trip setpoint, rpm (TripType = PR_Max) 0 to 20000

DiffEnable Difference Speed trip, enable (TripType = PR_Max) Disable, Enable

PR1Setpoint Fast Overspeed trip #1, setpoint, PR1, rpm (TripType = PR_ 0 to 20000
Single)

PR1TrEnable Fast Overspeed trip #1, enable (TripType = PR_Single) Disable, Enable

PR2Setpoint Fast Overspeed Trip #2, setput, PR2, rpm (TripType = PR_ 0 to 20000
Single)

PR2TrEnable Fast Overspeed trip #2, enable (TripType = PR_Single) Disable, Enable

PR3Setpoint Fast Overspeed Trip #3, setput, PR3, rpm (TripType = PR_ 0 to 20000
Single)

PR3TrEnable Fast Overspeed trip #3, enable (TripType = PR_Single) Disable, Enable

PR4Setpoint Fast Overspeed Trip #4, setput, PR4, rpm (TripType = PR_ 0 to 20000
Single)

PR4TrEnable Fast Overspeed trip #3, enable (TripType = PR_Single) Disable, Enable

AccASetpoint Acceleration trip setpoint, Chan A, rpm/sec (TripType = PR_ 0 to 1500


Single)

AccBSetpoint Acceleration trip setpoint, Chan B, rpm/sec (TripType = PR_ 0 to 1500


Single)

AccAEnable Acceleration Trip Enable, Chan A (TripType = PR_Single) Disable, Enable

AccBEnable Acceleration Trip Enable, Chan B (TripType = PR_Single) Disable, Enable

InForChanA Input change selection for Accel/Decel trip (TripType = PR_Max Accel, Accel2, Accel3, Accel4
or PR_Single)

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Parameter Name Parameter Description Choices
InForChanB Input change selection for Accel/Decel trip (TripType = PR_Max Accel, Accel2, Accel3, Accel4
or PR_Single)

DiagSolPwrA When using TRPL/S, Sol Power, Bus A, Diagnostic enable. Enable, Disable

DiagSolPwrB When using TRPL/S, Sol Power, Bus B, Diagnostic enable Enable, Disable

DiagSolPwrC When using TRPL/S, Sol Power, Bus C, Diagnostic enable Enable, Disable

11.1.6.2 Pulse Rate


Pulse Rate Name Pulse Rate Description Choices
PRType Define the pulse rate feedback type or basic speed range (for Flow, Speed, Speed_High,
proper resolution). Refer to section, Speed Pickups for Speed_HSNG, Speed_LM,
description of types. Unused

PRScale Pulses per revolution (outputs rpm) 0 to 1,000

TeethPerRev Number of teeth on speed wheel (per revolution) 1 to 512

Speed_x_ms Calculation rate of speed in milliseconds. Speed is calculated at 10 to 1000


this rate and averaged over the previous time interval specified by
this period.

Using a value other


than an integer multiple
of the application frame
period can have adverse
impact on use of this
Attention control.

Accel_x_ms This is the averaging period for acceleration calculation in 20 to 1000


milliseconds. The acceleration is calculated every Accel_X_ms. It
is based on the difference between two speed samples divided by
the sample period. Each acceleration calculation is the average
of acceleration over the period specified by this parameter. For
example, if Accel_x_ms is 40 then acceleration will be the
average acceleration over the previous 80 ms.

Using a value other


than an integer multiple
of the application frame
period can have adverse
impact on use of this
Attention control.

Lock_Limit HSNG speed type locking limit for teeth mapping (percent). Refer 1 to 100
to the section, Speed Pickups for description of Lock_Limit
function.
TMRDiffLimit Diag Limit, TMR input vote difference, in Eng units 0 to 20,000

SysLim1Enable Enable System Limit 1 Fault Check Enable, Disable

SysLim1Latch Latch System Limit 1 Fault Latch, NotLatch

SysLim1Type System Limit 1 Check Type >=, <=

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Pulse Rate Name Pulse Rate Description Choices
SysLimit1 System Limit 1 – RPM 0 to 20,000

SysLim2Enable Enable System Limit 2 Fault Check Enable, Disable

SysLim2Latch Latch System Limit 2 Fault Latch, NotLatch

SysLim2Type System Limit 2 Check Type >=, <=

SysLimit2 System Limit 2 – RPM 0 to 20,000

11.1.6.3 Shaft Volt Mon


Parameter Description Choices
TMRDiffLimt Diag limit, TMR input vote difference, in Hertz 0 to 100

11.1.6.4 Shaft Curr Mon


Parameter Description Choices
ShuntOhms Shunt ohms 0 to 100
ShuntLimit Shunt maximum test ohms 0 to 100
BrushLimit Shaft (Brush + Shunt) maximum ohms 0 to 100

SysLim1Enable Enable System Limit 1 Fault Check Enable, Disable

SysLim1Latch Latch System Limit 1 Fault Latch, NotLatch

SysLim1Type System Limit 1 Check Type >=, <=

SysLimit1 System Limit 1 – Amps 0 to 100

SysLim2Enable Enable System Limit 2 Fault Check Enable, Disable

SysLim2Latch Latch System Limit 2 Fault Latch, NotLatch

SysLim2Type System Limit 2 Check Type >=, <=

SysLimit2 System Limit 2 – Amps 0 to 100

TMR_DiffLimt Diag Limit, TMR Input Vote Difference, in Eng Units 0 to 100

11.1.6.5 Potential Transformer


Parameter Description Choices
PT_Input PT primary in Eng units (kV or percent) for PT_Output 0 to 1,000

PT_Output PT output in volts rms, for PT_Input - typically 115 0 to 150

TMR_DiffLimt Diag Limit, TMR Input Vote Difference, in Eng Units 1 to 1000

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11.1.6.6 Circuit Breaker
Parameter Description Choices
System Frequency Select frequency in Hz 50 or 60

CB1CloseTime Breaker 1 closing time in milliseconds 0 to 1,000

CB1 AdaptLimit Breaker 1 self adaptive limit in milliseconds 0 to 1,000

CB1 AdaptEnabl Enable breaker 1 self adaptive adjustment Enable, Disable

CB1FreqDiff Breaker 1 special window frequency difference, Hz 0.15 to 0.66

CB1PhaseDiff Breaker 1 special window phase Diff, degrees 0 to 20

CB1DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable

CB2CloseTime Breaker 2 closing time in milliseconds (as above) 0 to 1,000

CB2 AdaptLimit Breaker 2 self adaptive limit in milliseconds 0 to 1,000

CB2 AdaptEnabl Enable breaker 2 self adaptive adjustment Enable, Disable

CB2FreqDiff Breaker 2 special window frequency difference, Hz 0.15 to 0.66

CB2PhaseDiff Breaker 2 special window phase Diff, degrees 0 to 20

CB2DiagVoteEnab Enable Voting Disagreement Diagnostic Enable, Disable

11.1.6.7 Flame
Parameter Description Choices
FlmDetTime Flame detector time interval 0.160, 0.080, 0.040 sec
FlameLimitHI Flame threshold Limit HI (HI detection counts means LOW 0 to 160
sensitivity)

FlameLimitLOW Flame threshold Limit Low (Low detection counts means HIGH 0 to 160
sensitivity)

Flame_Det Flame detector used/unused Used, Unused

TMR_DiffLimt Diag Limit, TMR Input Vote Difference, in Hz 1 to 160

11.1.6.8 Relays

Parameter Description Choices


PTR_Output Primary protection relay used/unused Unused, used

DiagVoteEnab Enable voting disagreement diagnostic Enable, Disable

11.1.6.9 E-Stop

Parameter Description Choices


DiagVoteEnab Enable voting disagreement diagnostic Enable, Disable

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11.1.6.10 Variables PTUR
Variable Name Variable Description Direction Type
L3DIAG_PTUR_R,S,T I/O Diagnostic Indication Input BOOL

LINK_OK_PTUR_R,S,T I/O Link Okay Indication Input BOOL

ATTN_PTUR_R,S,T I/O Attention Indication Input BOOL

PS18V_PTUR_R,S,T I/O 18 V Power Supply Indication Input BOOL

PS28V_PTUR_R,S,T I/O 28 V Power Supply Indication Input BOOL

IOPackTmpr_R,S,T I/O Pack Temperature (deg °F) AnalogInput REAL

Kq1_StatNV_R,S,T Non voted Primary Trip Relay 1 Feedback Input BOOL

Kq2_StatNV_R,S,T Non voted Primary Trip Relay 2 Feedback Input BOOL

ShShntTst_OK Shaft voltage monitor shunt test OK Input BOOL

ShBrshTst_OK Shaft voltage brush + shunt test OK Input BOOL

Estop_Signal Raw Estop Signal (unlatched) Input BOOL

K1FLT K1 Shorted Contact Fault Input BOOL

K2FLT K2 Shorted Contact Fault Input BOOL

PR1_HSNGstat Pulse rate 1 HSNG stability status (TRUE for tooth Input BOOL
– tooth distance inside Lock_Limit for tooth
geometry compensation)

PR2_HSNGstat Pulse rate 2 HSNG stability status Input BOOL

PR3_HSNGstat Pulse rate 3 HSNG stability status Input BOOL

PR4_HSNGstat Pulse rate 4 HSNG stability status Input BOOL

Sol1_Vfdbk When TRPL/S, Trip Solenoid #1 Voltage Input BOOL

Sol2_Vfdbk When TRPL/S, Trip Solenoid #2 Voltage Input BOOL

Sol3_Vfdbk When TRPL/S, Trip Solenoid #3 Voltage Input BOOL

ShTestAC L97SHAFT_AC SVM_AC_TEST Output BOOL

ShTestDC L97SHAFT_DC SVM_DC_TEST Output BOOL

ETR1_Fdbk ETR1 feedback, for TREL/S diag checking Output BOOL

ETR2_Fdbk ETR2 feedback, for TREL/S diag checking Output BOOL

ETR3_Fdbk ETR3 feedback, for TREL/S diag checking Output BOOL

Kq1_Status Primary Trip Relay1 Feedback Input BOOL

Kq2_Status Primary Trip Relay2 Feedback Input BOOL

Kq3_Status Primary Trip Relay3 Feedback Input BOOL

SysLim1PR1 Pulse Rate 1 System Limit 1 Fault Input BOOL


↓ ↓ ↓ ↓

SysLim1PR4 Pulse Rate 4 System Limit 1 Fault Input BOOL

SysLim1SHV AC Shaft Voltage Frequency High L30TSVH Input BOOL

SysLim1SHC AC Shaft Current High L30TSCH Input BOOL

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Variable Name Variable Description Direction Type
SysLim1GEN Gen Voltage System Limit 1 Fault Input BOOL

SysLim1BUS Bus Voltage System Limit 1 Fault Input BOOL

SysLim2PR1 Pulse Rate 1 System Limit 2 Fault Input BOOL


↓ ↓ ↓ ↓

SysLim2PR4 Pulse Rate 4 System Limit 2 Fault Input BOOL

SysLim2SHV AC Shaft Voltage System Limit 2 Fault Input BOOL

SysLim2SHC AC Shaft Current System Limit 2 Fault Input BOOL

SysLim2GEN Gen Voltage System Limit 2 Fault Input BOOL

SysLim2BUS Bus Voltage System Limit 2 Fault Input BOOL

11.1.6.11 Variables Vars_Sync

Variable Vars_Sync Variable Description Direction Type


CB_Volts_OK Breaker Closing Coil Voltage is present (L3BKR_ Input BOOL
VLT). Used in diagnostics.

CB_K25P_PU Breaker Closing Coil Voltage is present downstream Input BOOL


of the K25P relay contacts. L3BKR_PRM Sync
Permissive Relay Picked Up. Used in diagnostics.

CB_K25_PU Breaker Closing Coil Voltage is present downstream Input BOOL


of the K25 relay contacts. L3BKR_GES Auto Sync
Relay Picked Up. Used in diagnostics.

CB_K25A_PU Breaker Closing Coil Voltage is present downstream Input BOOL


of the K25A relay contacts. L3BKR_GEX Sync
Check Breaker Closed. Used in diagnostics.

Gen_Sync_LO Generator Synch Lock out. Traditionally known as Input BOOL


L30AS1 or L30AS2; it is a latched signal requiring a
reset to clear (Sync_Reset). It detects a K25 relay
problem (picked up when it should be dropped out)
or a slow Sync Check (relay K25A) function.

L25_Command Breaker Close Command to the K25 relay. Input BOOL


Traditionally known as L25.

GenFreq Generator frequency, Hz. AnalogInput REAL

BusFreq Hz frequency AnalogInput REAL

GenVoltsDiff KiloVolts rms-Gen Low is negative AnalogInput REAL

Gen Freq Diff Slip Hz-Gen Slow is negative AnalogInput REAL

Gen Phase Diff Phase Degrees-Gen Lag is negative AnalogInput REAL

CB1CloseTime Breaker #1 close time in milliseconds AnalogInput REAL

CB2CloseTime Breaker #2 close time in milliseconds AnalogInput REAL

Sync_Perm_AS Auto sync permissive. Traditionally known as Output BOOL


L83AS.

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Variable Vars_Sync Variable Description Direction Type
Sync_Perm Sync permissive mode, L25P. Traditionally known Output BOOL
as L25P; interface to control the K25P relay.

Sync_Monitor Auto Sync monitor mode. Traditionally known as Output BOOL


L83S_MTR; enables the Auto Sync function, except
it blocks the K25 relays from picking up.

Sync_Bypass1 Auto Sync bypass. Traditionally known as L25_ Output BOOL


BYPASS; to pickup L25 for Dead Bus or Manual
Sync.

Sync_Bypass0 Auto Sync bypass. Traditionally known as L25_ Output BOOL


BYPASSZ; to pickup L25 for Dead Bus or Manual
Sync.

CB2_Selected #2 Breaker is selected. Traditionally known as Output BOOL


L43SAUTO2; to use the breaker close time
associated with Breaker #2
AS_Win_Sel Special Auto Sync window. New function, used on Output BOOL
synchronous condenser applications to give a more
permissive window.

Synch_Reset Auto Sync reset. Traditionally known as L86MR_ Output BOOL


TCEA; to reset the Sync Lockout function.

11.1.6.12 Variables Vars-Flame


Variable Vars-Flame Variable Description Direction Type
FD1_Flame Flame Detect 1 present Input BOOL
↓ ↓ ↓ ↓

FD8_Flame Flame Detect 8 present Input BOOL

FD1_Level 1=High Detection Counts Level Output BOOL


↓ ↓ ↓ ↓

FD8_Level 1=High Detection Counts Level Output BOOL

11.1.6.13 Variables Vars-Speed

Variable Vars-Speed Variable Description Direction Type


DecelTrip Deceleration Trip (Accel1, Accel2) Input BOOL

FastDiffTrip Fast Difference Trip Input BOOL

FastOS1Trip Fast Overspeed Trip #1 Input BOOL


↓ ↓ ↓ ↓

FastOS4Trip Fast Overspeed Trip #4 Input BOOL

AccATrip Acceleration Trip ChanA Input BOOL

AccBTrip Acceleration Trip ChanB Input BOOL

Accel1 rpm/sec AnalogInput REAL

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Variable Vars-Speed Variable Description Direction Type
↓ ↓ ↓ ↓

Accel4 rpm/sec AnalogInput REAL

PR1_PulseCnt_R,S,T Pulse Rate 1 – Pulses in the last frame AnalogInput REAL


↓ ↓ ↓ ↓

PR4_PulseCnt_R,S,T Pulse Rate 4 – Pulses in the last frame AnalogInput REAL

FlmDetPwr1 335 V dc AnalogInput REAL

DecelPerm Permissive – Deceleration Trip Output BOOL

FastOS1Perm Permissive – Fast Overspeed Trip #1, from Max Output BOOL
(PR1, PR2)

FastOS2Perm Permissive – Fast Overspeed Trip #2, from Max Output BOOL
(PR3, PR4)

DiffPerm Permissive – Fast Difference Speed Trip Output BOOL

PR1TrPerm Permissive – Fast Overspeed Trip #1, from PR1 Output BOOL
↓ ↓ ↓ ↓

PR4TrPerm Permissive – Fast Overspeed Trip #4, from PR4 Output BOOL

AccelAPerm Permissive – Acceleration Trip, Chan A Output BOOL

AccelBPerm Permissive – Acceleration Trip, Chan B Output BOOL

11.1.6.14 Variables Pulse Rate


Variable Pulse Rate Variable Description Direction Type
PulseRate1 Pulse rate input, PTUR Connector J#5 AnalogInput REAL

PulseRate2 Pulse rate input, PTUR Connector J#5 AnalogInput REAL

PulseRate3 Pulse rate input, PTUR Connector J#5 AnalogInput REAL

PulseRate4 Pulse rate input, PTUR Connector J#5 AnalogInput REAL

11.1.6.15 Variables Shaft Volt Mon


Variable Description Direction Type
ShVoltMon Shaft voltage monitor, frequency (Hz) AnalogInput REAL

11.1.6.16 Variables Shaft Curr Mon


Variable Description Direction Type
ShCurrMon Shaft current monitor, Current (Amps) AnalogInput REAL

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11.1.6.17 Variables Potential Transformer
Variable Description Direction Type
GenPT_KVolts Kilo-Volts RMS AnalogInput REAL

BusPT_KVolts Kilo-Volts RMS AnalogInput REAL

11.1.6.18 Variables Circuit Breaker


Variable Description Direction Type
Ckt_Bkr Circuit breaker Closed – L52G Contact Feedback Input BOOL

11.1.6.19 Variables E-Stop

Variable Description Direction Type


KESTOP1_Fdbk When TPRL/S, ESTOP, inverse sense, K4 relay, Input BOOL
True = Run

11.1.6.20 Variables Flame


Variable Description Direction Type
FlameInd1 When TRPG, Intensity (Hz) AnalogInput REAL

FlameInd2 When TRPG, Intensity (Hz) AnalogInput REAL

FlameInd3 When TRPG, Intensity (Hz) AnalogInput REAL

FlameInd4 When TRPG, Intensity (Hz) AnalogInput REAL

FlameInd5 When TRPG, Intensity (Hz) AnalogInput REAL

FlameInd6 When TRPG, Intensity (Hz) AnalogInput REAL

FlameInd7 When TRPG, Intensity (Hz) AnalogInput REAL

FlameInd8 When TRPG, Intensity (Hz) AnalogInput REAL

11.1.6.21 Variables Relays

Variable Description Direction Type


Kq1 L20PTR1 – Primary Trip Relay Output BOOL

Kq2 L20PTR2 – Primary Trip Relay Output BOOL

Kq3 L20PTR3 – Primary Trip Relay Output BOOL

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11.2 PTUR Specific Alarms
The following alarms are specific to the PTUR I/O pack.

32-34
Description Solenoid #[ ] Relay driver Feedback Incorrect

Possible Cause The I/O pack monitors the relay command for the correct state and termination into the expected trip
board impedance. The I/O pack internal feedback of relay command output does not match the desired state.

Solution

• Check the mounting of the I/O pack on the terminal board.


• Check the cable from the TTUR to the trip board, if used.
• Replace the I/O pack.
• Replace the TRPx trip board.

38-40
Description Solenoid #[ ] Contact Feedback Incorrect

Possible Cause The contact state feedback from the trip board does not match the relay command.

Solution

• Check the mounting of the I/O pack on the terminal board.


• Check the cable from the TTUR to the TRPx.
• Check the operation of the relay.

44
Description Trip Board Solenoid Power Absent

Possible Cause

• The I/O pack has detected the absence of solenoid power as indicated by the connected TRPx board.
• The issue could be with the power source applied in TRPx terminal boards.

Solution

• Verify the TRPx on the J1 connector is receiving power.


• Verify that the voltage at the J1 cable is at an acceptable range. If it is out of range, there could be a problem with the
source or the cable connected between source and the terminal board.
• Check the cabling to the TRPx.
• If the voltage source is good, change the cable between the power source and TRPx boards.
• If the problem persists, replace the cable between the TRPx and the TTUR or STUR board.
• If the problem persists, replace the TRPx board.

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46
Description TRPG Flame Detector Volts Lower than 314.9 V

Possible Cause The voltage is less than 314.9 V dc and any flame detector is configured as Used.

Note The 335 V dc power required for the Honeywell flame detector is provided by the Flame Detector Power Supply
(PSFD). This nominal 335 V power enters the TRPG through the J3, J4, and J5 connectors.

Solution

• If no flame detector is being used, verify that all the Flame_Det parameters are set to Unused.
• If only two PSFDs are being used, set the No_T_PS_Req parameter to True. This disables the check for power on TRPG
J5.
• If the PSFD voltage is less than 314.9 V dc, replace the PSFD.
• Check the voltage at the TRPG side (J3, J4, and J5). If the voltage is above 314.9 V dc, replace TRPG.
• If the voltage reading at TRPG side (J3, J4, and J5) is below 314.9 V dc and the voltage at PSFD is nominal, replace the
cable connected between the TRPG and the PSFD.

47
Description TRPG Flame Detector Volts Higher than 355.1 V

Possible Cause This power comes into the TRPG through the J3, J4, and J5 connectors. If the voltage is greater than
355.1 V dc, this fault is declared.

Solution

• If the voltage is higher than 355.1 V dc, check the power supply.
• Check the voltage on the TRPG. If the voltage is above 355 V, the monitoring circuitry on the TRPG or the cabling to the
TRPG may be the problem.

50
Description L3BKRGXS - Sync Check Relay Is Slow

Possible Cause

• The K25 (auto sync) has picked up but the Sync check relay L3BKRGXS, known as K25A, on the TTUR has not picked
up.
• There is no breaker closing voltage source.
• The K25A relay is not enabled on the PPRO I/O module.

Solution

• Attempt to perform a Sync Reset (set Synch_Reset to True).


• Check the breaker to verify closure.
• Verify that the K25A relay is enabled on the PPRO I/O module.
• Replace the TTUR.

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51

Note This alarm is obsolete.

Description L3BKRGES - Auto Sync Relay Is Slow

Possible Cause

• The Auto Sync relay L3BKRGES, also known as K25, on the TTUR has not picked up when it should have.
• The K25P is not picked up.
• There is no breaker closing voltage source.

Solution

• Attempt to perform a Sync Reset (set Synch_Reset to True).


• Check the breaker to verify closure.
• Replace the TTUR.

52-53
Description Breaker #[ ] Slower Than Adjustment Limit Allows

Possible Cause

• The self-adaptive function adjustment of the Breaker Close Time has reached the allowable limit and cannot make further
adjustments to correct the Breaker Close Time.
• The breaker is experiencing a problem, or the operator should consider changing the configuration. Both the nominal
close time and the self-adaptive limit in milliseconds can be configured.

Solution

• Increase the limit setting of CBxCloseTime for the breaker in question.


• Review breaker feedback timing to verify that it meets the documented specifications.
• Verify that there are no interposing relays causing a delay.
• Replace the terminal board.

54
Description Synchronization Trouble - K25 Relay Locked Up

Possible Cause

• The K25 relay is picked up when it should not be.


• K25 on TTUR is most likely stuck closed, or the contacts are welded together.

Solution

• Attempt to perform a Sync Reset (set Synch_Reset to True).


• Isolate which relay (K25A or K25) is causing a problem by checking the diagnostics and correcting the source of the
issue.
• Replace TTUR.

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55
Description Trip Board required by Main Terminal Board

Possible Cause When the PTUR is used with a TTUR, STURH3, or STURH4 terminal board, an auxiliary trip board is
required. However, the PTUR does not detect that a required trip board has been connected.

Solution

• Verify that the proper terminal board and trip board has been configured in the ToolboxST application. Rebuild the
application, then download the firmware and application code to the affected I/O pack.
• Verify the trip board cable connections at both ends.

57
Description Hardware and Configuration Incompatibility - Main Terminal Board

Possible Cause The PTUR configuration does not match the actual terminal board hardware.

Solution

• Verify that the ToolboxST configuration matches the actual hardware.


• Rebuild the application, then download the firmware and application code to the affected I/O pack.
• Verify that the PTUR is fully seated on the terminal board.
• Verify that the installed ToolboxST version supports the configured hardware.

58
Description Hardware and Configuration Incompatibility - Trip Board

Possible Cause The configuration does not match the connected trip board.

Solution

• Review the hardware compatibility information and correct, if necessary.


• Check the I/O pack configuration to verify that the TTUR board hardware form matches the installed terminal board.
• Rebuild the application, then download the firmware and application code to the affected I/O pack.
• If the configuration is correct, rebuild the device and download the firmware and parameters to the affected I/O pack.
• Verify the trip board cable connections at both ends.
• Verify that the cable between the TTUR/STUR board and the TRPx terminal board is properly seated.
• Verify that the installed ToolboxST version supports the configured hardware.

61
Description TRPL/S Solenoid Power on Bus A is absent

Possible Cause No solenoid power is detected on the TRPL/S bus A.

Solution

• Verify that power is applied to the terminal board.


• Verify that the DC-37 cable is fully seated.
• Replace the terminal board.

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62
Description TRPL/S Solenoid Power on Bus B is absent

Possible Cause No solenoid power is detected on TRPL/S bus B.

Solution

• Verify that power is applied to the terminal board.


• Verify that the DC-37 cable is fully seated.
• Replace the terminal board.

63
Description TRPL/S Solenoid Power on Bus C is absent

Possible Cause No solenoid power is detected on TRPL/S bus C.

Solution

• Verify that power is applied to the terminal board.


• Verify that the DC-37 cable is fully seated.
• Replace the terminal board.

64-66
Description TRPL/S Solenoid #[ ] Voltage Mismatch

Possible Cause Power is applied to the solenoid, but the voltage feedback is not detected.

Solution

• Verify that the J2 connector is fully seated between the primary and emergency trip boards.
• Replace the J2 cable.
• Replace the TTUR.

67
Description Speed Trip

Possible Cause

• I/O pack has detected that a speed input has exceeded the overspeed threshold
• Acceleration threshold has been exceeded
• De-acceleration speed has been exceeded
• Overspeed configuration is set too low
• Acceleration limit has been enabled and is set too low
• Noisy pulse input signal

Solution

• Verify that the overspeed configuration is correct.


• Verify that the acceleration configuration is correct.
• Check the speed sensor.
• Determine the cause of the overspeed condition; for example, input signal, configuration, or noise.

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68
Description TRPA - K1 solid state relay shorted

Possible Cause TRPA provides voltage-based detection of stuck-on relays in the six voting contacts used to provide K1.
Zero voltage has been detected on one or more contacts of K1 when voltage should be present.

Solution Replace the TRPA.

69
Description TRPA - K2 solid state relay shorted

Possible Cause TRPA provides voltage-based detection of stuck-on relays in the six voting contacts used to provide K2.
Zero voltage has been deleted on one or more contacts of K2 when voltage should be present.

Solution Replace the TRPA.

70
Description Pack internal reference voltage out of limits

Possible Cause The calibration reference voltage is beyond the expected value, indicating a hardware failure.

Solution

• Cycle power on the I/O pack.


• Replace the I/O pack.

71
Description Pack internal null voltage out of limits

Possible Cause The calibration null voltage is beyond the expected value, indicating a hardware failure.

Solution

• Cycle power on the I/O pack.


• Replace the I/O pack.

128-223
Description Logic Signal [ ] Voting Mismatch

Possible Cause A problem exists with a status input between the R, S, and T I/O packs. This could be the device, the
wire to the terminal board, or the terminal board.

Solution

• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and networking.
• Check the I/O pack mounting on the terminal board.
• Verify the operation of the device generating the specified signal.
• Verify the terminal board wiring and connections.
• Replace the I/O pack.

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224-252
Description Input Signal [ ] Voting Mismatch, Local=[ ], Voted=[ ]

Possible Cause A problem exists with a status input between the R, S, and T I/O packs. This could be the device, the
wire to the terminal board, or the terminal board.

Solution

• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and networking.
• Check the I/O pack mounting on the terminal board.
• Verify the operation of the device generating the specified signal.
• Verify the terminal board wiring and connections.
• Replace the I/O pack.

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11.3 Mark VIeS YTUR Primary Turbine Protection I/O Pack
The Primary Turbine Protection (YTUR) I/O pack provides the electrical interface
between one or two I/O Ethernet networks and a turbine control terminal board. The
YTUR contains a processor board common to the distributed I/O packs, a board specific
to the turbine control function, and an analog acquisition daughterboard. The I/O pack
plugs into the TTUR terminal board and handles four speed sensor inputs, bus and
generator voltage inputs, shaft voltage and current signals, eight flame sensors, and
outputs to the main breaker.

Infrared Port Not Used

As an alternative to TTUR, three YTUR I/O packs can be plugged directly into a TRPA terminal board. This arrangement
handles four speed inputs per YTUR, or alternately fans the first four inputs into all three YTURs. Two solid-state primary
trip relays are provided by TRPA. This arrangement does not support bus and generator voltage inputs, shaft voltage or
current signals, flame sensors, or main breaker output.

Note Refer to the Turbine Primary Trip TRPA section for more information.

Input to the I/O pack is through dual RJ-45 Ethernet connectors and a three-pin power input. Output is through a DC-62 pin
connector that connects directly with the associated terminal board connector. Visual diagnostics are provided through
indicator LEDs.
Compatibility

Teminal Board # of I/O Packs Additional Trip Board


TTURS1C 1 or 3 TRPAS#A or TRPGS#B
TRPAS#A 3 none

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11.3.1 Installation
➢ To install the YTUR I/O pack
1. Securely mount the desired terminal board.
2. Directly plug one YTUR I/O pack for simplex or three YTUR I/O packs for TMR into the terminal board connectors.
3. Mechanically secure the packs using the threaded studs adjacent to the Ethernet ports. The studs slide into a mounting
bracket specific to the terminal board type. The bracket location should be adjusted such that there is no right-angle force
applied to the DC62 connector between the pack and the terminal board. The adjustment should only be required once in
the life of the product.
4. Plug in one or two Ethernet cables depending on the system configuration. The pack will operate over either port. If dual
connections are used, the standard practice is to connect ENET1 to the network associated with the R controller.
5. Apply power to the pack by plugging in the connector on the side of the I/O pack. It is not necessary to insert this
connector with the power removed from the cable as the I/O pack has inherent soft-start capability that controls current
inrush on power application.
6. Use the ToolboxST application to configure the I/O pack as necessary. Refer to GEH-6705 for more information.

Note Three YTURs mounts directly to a Mark VIeS Safety control TTUR or TRPA terminal board, which has three DC-62
pin connectors for TMR I/O packs. The TTUR can also be used in simplex mode if only one YTUR is installed. The YTUR
directly supports all of these connections.

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11.3.2 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Safety Module Alarms

11.3.2.1 Analog Input Hardware


Circuits to convert pulse rate to digital speed are in the YTUR I/O pack. Generator and bus voltages are brought into YTUR
for automatic synchronizing in conjunction with the turbine controller and GE excitation system. TTUR has permissive
generator synchronizing relays and controls the main breaker relay coil 52G. Shaft voltage is picked up with brushes and
monitored along with the current to the machine case. YTUR alarms high voltages and tests the integrity and continuity of the
circuitry.

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In TMR applications there are separate sets of four speed inputs for each YTUR, R, S, and T. All other l inputs fan to the three
YTURs. Control signals from R, S, and T are voted before they actuate permissive relays K25 and K25P. Relay K25A is
controlled by the I/O controller and TREG boards. All three relays have two normally open contacts in series with the breaker
close coil.

YTUR I/O Packs with TTURS1C Terminal Board, TMR

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In the simplex application, up to four pulse rate signals may be used to measure turbine speed.

YTUR I/O Pack with TTURS1C Terminal Board, Simplex

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11.3.2.2 Speed Pickups
An interface is provided for four passive, magnetic speed inputs with a frequency range of 2 to 20,000 Hz. Using passive
pickups on a sixty- tooth wheel, circuit sensitivity allows detection of 2-RPM turning gear speed to determine if the turbine is
stopped (zero speed). If automatic turning gear engagement is provided in the turbine control, this signal initiates turning gear
operation.

Note The median speed signal is used for speed control and for the primary overspeed trip signal.

The primary overspeed trip calculations are performed in the controller using algorithms similar to (but not the same as) those
in the YPRO protection I/O pack. The fast trip option used on gas turbines runs in YTUR.

11.3.2.3 Primary Trip Solenoid Interface


The normal primary overspeed trip is calculated in the controller and passed to the YTUR and then to the chosen primary trip
terminal board. TRPx contains relays for interface with the electrical trip devices (ETD). TRPx typically works in conjunction
with an emergency trip board (TREG) to form the primary and emergency sides of the interface to the ETDs. YTUR supports
up to three ETDs driven from each TRPx/TREx combination. TRPG is targeted at gas turbine applications and works in
conjunction with TREG for emergency trip.
In support of the trip board operation, YTUR provides a number of discrete inputs used to monitor signals such as trip relay
position, synchronizing relay coil drive, and ETD power status.

Note The reset signal applied to this function is not edge triggered. A continuously applied reset may result in output cycling
in the presence of an intermittent trip signal. The duration of the reset should only be sufficient to allow the reset to complete
and should not be maintained.

11.3.2.4 Automatic Synchronizing


All synchronizing connections are located on the TTUR terminal board. The generator and bus voltages are supplied by two,
single phase, potential transformers (PTs) with a fused secondary output supplying a nominal 115 V rms. Measurement
accuracy between the zero crossing for the bus and generator voltage circuits is 1 degree.
Turbine speed is matched against the bus frequency, and the generator and bus voltages are matched by adjusting the
generator field excitation voltage from commands sent between the turbine controller and the excitation controller over the
UDH. A command is given to close the breaker when all permissions are satisfied, and the breaker is predicted to close within
the calculated phase/slip window. Feedback of the actual breaker closing time is provided by a 52G/a contact from the
generator breaker (not an auxiliary relay) to update the database. An internal K25A sync check relay is provided on the
TTUR; the independent backup phase/slip calculation for this relay is performed in the <P> protection module. Diagnostics
monitor the relay coil and contact closures to determine if the relay properly energizes or de-energizes upon command.

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11.3.2.5 Synchronizing Modes
There are three basic synchronizing modes.

• Off The breaker will not be closed. The check relay will not pickup.
• Manual The operator initiates breaker close, which is still subject to the K25A Sync Check contacts driven by the I/O
controller. The manual close is initiated from an external contact on the generator panel, normally connected in series
with a sync mode in manual contact.
• Auto The system will automatically match voltage and speed, and then close the breaker at the right time to hit top dead
center on the synchroscope. All three of the following functions must agree for this closure to occur:
− K25A sync check relay, checks the allowable slip/phase window, from YPRO.
− K25 auto sync relay, provides precision synchronization, from YTUR.
− K25P sync sequence permissive, checks the turbine sequence status, from YTUR.

Note These modes are selected from an HMI screen or a generator panel mounted switch.

The K25A relay should close before the K25 otherwise the sync check function will interfere with the auto sync optimizing. If
this sequence is not executed, a diagnostic alarm will be posted, a lockout signal will be set true in signal space, and the
application code may prevent any further attempts to synchronize until a reset is issued and the correct coordination is set up.
Details of the various checks are discussed in the following sections.

11.3.2.6 Synchronizing Hardware


The synchronizing system interfaces to the breaker close coil through the TTURS1C terminal board. Three TTURS1C relays
must be picked up, plus external permissions must be true before a breaker can be closed.
The K25P relay is directly driven from the controller application code. In a TMR system, it is driven from R, S, and T, using 2
out of 3 logic voting. For a simplex system, it may be configured by jumper to be driven from R only.
The K25 relay is driven from the YTUR auto sync algorithm, which is managed by the controller application code. In a TMR
system, it is driven from R, S, and T, using 2 out of 3 logic voting. Again for a simplex system, it may be configured by
jumper to be driven from R only.
The K25A relay is located on TTUR, but is driven from the YPRO sync check algorithm, which is managed by the controller
application code. The relay is driven from YPRO, R8, S8, and T8, using 2 out of 3 logic voting in TREG/L/S.
The sync check relay driver (located on TRPG, TRPL, or TRPS) is connected to the K25A relay coil (located on TTUR)
through cabling through the J2 connector to TRPG, TRPL, or TRPS. It then goes through JR1 (and JS1, JT1) to JR4 (and JS4,
JT4) on TTUR.
Both sides of the breaker close coil power bus must be connected to the TTUR board. This provides diagnostic information
and measures the breaker closure time, through the normally open breaker auxiliary contact, for optimization.
The breaker close circuit is rated to make (close) 10 A at 125 V dc, but to open only 0.6 A. The externally supplied normally
open auxiliary contact on the breaker is required to interrupt the closing coil current.

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11.3.2.7 Synchronization Display
A special synchronization screen is available on the HMI with a real-time graphical phase display and control pushbutton.
The display items are listed in table.

Sync Display Description


Dynamic Parameters Voltages: Generator, Bus, Difference
Frequencies: Generator, Bus, Slip (difference)
Phase: Difference angle, degrees

Status Indication Mode: Sync OFF, MANUAL, AUTO


Sync Monitor: OFF, ON
Dead bus breaker: Open/close
Second breaker if applicable: Open/close
Sync permissive: K25P
Auto sync enabled
Speed adjust: Raise/lower
Voltage adjust: Raise/lower

Sync Permissive Gen voltage: OK/not OK


Bus voltage: OK/not OK
Gen frequency: OK/not OK
Bus frequency: OK/not OK
Difference volts: OK/not OK
Difference frequ: OK/not OK
Phase: K25, OK/not OK
K25A, OK/not OK
Limit Constants Upper and lower limits for the above permissive

Breaker Performance Diagnostics: Slow check relay


Sync relay lockup
Breaker #1 close time out of limits
Breaker #2 close time out of limits
Relay K25P trouble
Breaker closing voltage (125 V dc) missing

Control Pushbuttons Sync monitor: ON, OFF


Speed adjust: RAISE, LOWER
Voltage adjust: RAISE, LOWER

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11.3.2.8 Auto Sync Application Code
The application code must sequence the turbine and bring it to a state where it is ready for the generator to synchronize with
the system bus. For automatic synchronization, the code must:

• Match speeds
• Match voltages
• Energize the sync permissive relay, K25P
• Arm (grant permission to) the sync check function (YPRO, K25A)
• Arm (grant permission to) the auto sync function (YTUR, K25)
The following illustrations represent positive slip (Gen) and negative phase (Gen).

Generator Synchronizing System

11.3.2.9 Automatic Synchronization Control in YTUR (K25)


The YTUR runs the auto sync algorithm. Its basic function is to monitor two Potential Transformer (PT) inputs, generator and
bus, to calculate phase and slip difference, and when armed (enabled) from the application code, and when the calculations
anticipate top center, to attempt a breaker closure by energizing relay K25. The algorithm uses the zero voltage crossing
technique to calculate phase, slip, and acceleration. It compensates for breaker closure time delay (configurable), with
self-adaptive control when enabled, with configurable limits. It is interrupt driven and must have generator voltage to
function. The configuration can manage the timing on two separate breakers. For details, refer to the figure.
The algorithm has a bypass function, two signals for redundancy, to provide dead bus and Manual Breaker Closures. It
anticipates top dead center; therefore, it uses a projected window, based on current phase, slip, acceleration, and breaker
closure time. To pickup K25, the generator must be currently lagging, have been lagging for the last 10 consecutive cycles,
and projected (anticipated) to be leading when the breaker actually reaches closure. Auto sync will not allow the breaker to
close with negative slip. In this fashion, assuming the correct breaker closure time has been acquired, and the sync check relay
is not interfering, breaker closures with less than 1 degree error can be obtained.
Slip is the difference frequency (Hz), positive when the generator is faster than the bus. Positive phase means the generator is
leading the bus; the generator is ahead in time, or the right hand side on the synchroscope. The standard window is fixed and
is not configurable.
A special window has been provided for synchronous condenser applications where a more permissive window is needed.
The special window is selected when the signal space Boolean AS_Win_Sel is true. When selected, the window will be
expanded from the standard window to a new window that is defined by configuration parameters CB#FreqDiff and
CB#PhaseDiff, where # is 1 or 2.
The algorithm validates both PT inputs with a requirement of 50% nominal amplitude or greater; that is, they must exceed
approximately 60 V rms before they are accepted as legitimate signals. This is to guard against cross talk under open circuit
conditions. The monitor mode is used to verify that the performance of the system is correct, and to block the actual closure
of the K25 relay contacts; it is used as a confidence builder. The signal space Input Gen_Sync_Lo will become true if the K25
contacts are closed when they should not be closed, or if the Sync Check K25A is not picked up before the Auto Sync K25. It
is latched and can be reset with Sync_Reset.

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The algorithm compensates for breaker closure time delay, with a nominal breaker close time, provided in the configuration in
milliseconds. This compensation is adjusted with self-adaptive control, based upon the measured breaker close time. The
adjustment is made in increments of one cycle (16.6/20 ms) per breaker closure and is limited in authority to a configurable
parameter. If the adjustment reaches the limit, a diagnostic alarm Breaker Slower/Faster than limits allows is posted.
The Auto Sync K25 function uses zero voltage crossing techniques. It compensates for the breaker time delay, which is
defined by two adjustable constants with logic selection between the two (for two breaker applications). The calculations,
which are done on the PTUR or YTUR I/O pack, include phase, slip, acceleration, and anticipated time lead for the breaker
delay. Based on the measured breaker close time, the time delay parameter is adjusted, up to certain limits.
In addition, auto sync arms logic to enable the function, and bypasses logic to provide for deadbus or manual closure. The
auto sync projected sync window is displayed below, where positive slip indicates that the generator frequency is higher than
the bus frequency.

Auto Sync Projected Window

The projected window is based on current phase, current slip, and current acceleration. The generator must currently be
lagging and have been lagging for the last 10 consecutive cycles, and projected (anticipated) to be leading when the breaker
actually reaches closure. Auto sync will not allow the breaker to close with negative slip; speed matching typically aims at
around + 0.12 Hz slip.

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Automatic Synchronizing Algorithm

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11.3.2.10 K25A Sync Check Function
Refer to the chapter, YPRO Emergency Turbine Protection, the section, K25A Sync Check Function.

11.3.2.11 Synchronization Simulation


➢ To simulate a synchronization
1. Disable the breaker
2. Establish the center frequency of the YPRO PLL; this depends on the YPRO configuration, under the YPRO K25A tab,
signal K25A_Fdbk, parameter ReferFreq.

− If ReferFreq is configured PR_Std, and YPRO is configured for a single shaft machine, then apply rated speed
(frequency) to input PulseRate1; that is SPRO screw pairs 19/20.
− If ReferFreq is configured PR_Std and YPRO is configured for a multiple shaft machine, then apply rated speed
(frequency) to input PulseRate 2, that is SPRO screw pairs 21/22.
− If ReferFreq is configured SgSpace, force YPRO signal space output DriveRef to 50 or 60 (Hz), depending on
the system frequency.
3. Apply the bus voltage, a nominal 115 V ac, 50/60 Hz, to TTUR screws 19 and 20, and to SPRO screws 3 and 4.
4. Apply the nominal 115 V ac generator voltage, adjustable frequency, to TTUR screws 17 and 18 and SPRO screws 1 and
2. Adjust frequency to value giving positive slip, YTUR signal GenFreqDiff of 0.1 to 0.2 Hz. (10 to 5 sec scope).
5. Force the following signals to the TRUE state:

− YTUR, Sync_Perm, then K25P should pick up


− YTUR, Sync_Perm_AS, then K25 should pulse when voltages are in phase
− YPRO, SynCK_Perm, then K25A should pulse when voltages are in phase
6. Verify that the TTUR breaker close interface circuit, screws 3 to 7, is being made (contacts closed) when the voltages are
in phase.
7. Run a trend chart on the following signals:

− YPRO: GenFreqDiff, GenPhaseDiff, L25A_Command, K25A_Fdbk


− YTUR: GenFreqDiff, GenPhaseDiff, L25_Command, CB_K25_PU, CB_K25A_PU
8. Use an oscilloscope, voltmeter, synchroscope, or a light to verify that the relays are pulsing at approximately the correct
time.
9. Examine the trend chart and verify that the correlation between the phase and the close commands is correct.
10. Increase the slip frequency to 0.5 Hz and verify that K25 and K25A stop pulsing and are open.
Return the slip frequency to 0.1 to 0.2 Hz, and verify that K25 and K25A are pulsing. Reduce the generator voltage to 40 V ac
and verify that K25 and K25A stop pulsing and are open.

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11.3.2.12 Sync Hardware Verification
The hardware interface can be verified by forcing the three synchronizing relays, individually or in combination. If the
breaker close coil is connected to the TTUR terminal board, then the breaker must be disabled to disconnect the generator
from the system bus.

➢ To perform sync hardware verification


1. Operate the K25P relay by forcing output signal Sync Perm found under YTUR, board points. Verify that the K25P relay
is functional by probing TTUR screws 3 and 4. The application code has direct control of this relay.
2. Simulate generator voltage on TTUR screws 17 and 18. Operate the K25 relay by forcing TTUR, board point output
signals Sync_Bypass1 =1, and Sync_Bypass0 = 0. Verify that the K25 relay is functional by probing screws 4 and 5 on
TTUR.
3. Simulate generator voltage on SPRO screws 1 and 2. Operate the K25A relay by forcing SPRO board point output
signals SynCK_Bypass =1, and SynCk_Perm 1. The bus voltage must be zero (dead bus) for this test to be functional.
Verify that the K25A relay is functional by probing screws 5 and 6 on TTUR.

11.3.2.13 Fast Overspeed Trip


In special cases where a faster overspeed trip system is required, the YTUR Fast Overspeed Trip algorithms may be enabled.
The system employs a speed measurement algorithm using a calculation for a predetermined tooth wheel. Two overspeed
algorithms are available as follows:

• PR_Single. This uses two redundant YTURs by splitting up the two redundant PR transducers, one to each board. PR_
Single provides redundancy and is the preferred algorithm for LM gas turbines.
• PR_Max. This uses one YTUR I/O pack connected to the two redundant PR transducers. PR_Max allows broken shaft
and deceleration protection without the risk of a nuisance trip if one transducer is lost.
The fast trips are linked to the output trip relays with an OR-gate. YTUR computes the overspeed trip, not the controller, so
the trip is very fast. The time from the overspeed input to the completed relay dropout is 30 ms or less.

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Input Signal Space
YTUR I/O Pack Firmware
Config. Inputs
param. Scaling
Input , PR1 RPM PulseRate1
PR1Type, d
2 RPM/sec Accel1
PR1Scale dt
PulseRate2
------ Four Pulse Rate Circuits ------- RPM
PulseRate2
PulseRate3 Accel1 RPM/sec
Accel2
Accel2 RPM
PulseRate4 RPM/sec PulseRate3
Accel3 Accel3
RPM
Accel4 PulseRate4
AccelCal Type RPM/sec
Accel4
Fast Overspeed Protection
FastTripType PR_Single
PulseRate1 A
PR1Setpoint A>B S FastOS1Trip
B
PR1TrEnable R
PR1TrPerm
PulseRate2 A
A>B S
PR2Setpoint FastOS2Trip
B
PR2TrEnable R
PR2TrPerm
PulseRate3 A
PR3Setpoint A>B S FastOS3Trip
PR3TrEnable B
R
PR3TrPerm

PulseRate4 A
A>B S FastOS4Trip
PR4Setpoint B
PR4TrEnable R
PR4TrPerm

InForChanA Accel1
Accel2 Input AccelA
Accel3 cct. A
Accel4 select S AccATrip
AccASetpoint A>B
B R
AccelAEnab
AccelAPerm

InForChanB Accel1
Accel2 Input AccelB
Accel3 cct. A S
A>B AccBTrip
Accel4 select
B R
AccBSetpoint
AccelBEnab Fast Trip
AccelBPerm Path
Master Reset False = Run
OR
(MRESET ) MarkVIeS,
SYS_OUTPUT block
True = Run Output, J4,PTR1
PTR1 Primary Trip Relay, normal Path, True= Run AND
PTR1_Output

PTR2 Primary Trip Relay, normal Path , True= Run AND True = Run Output, J4,PTR2
PTR2_Output
PTR3 True = Run Output, J4,PTR3
PTR3_Output -------------Total of six circuits -----
PTR4 True = Run Output, J4A,PTR4
PTR4_Output
True = Run Output, J4A,PTR5
PTR5
PTR5_Output Output, J4A,PTR6
True = Run
PTR6
PTR6_Output
Fast Overspeed Algorithm, PR-Single

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Signal Space
Input Config . PTUR I/O Pack Firmware
Scaling Inputs
Input, PR1 Param. PulseRate1 RPM PulseRate1
RPM/sec Accel1
PR1Type, 2 d
_
PR1Scale PulseRate2 dt RPM PulseRate2
Accel1 Four Pulse RPM/sec
Accel2
PulseRate3 Accel2 Rate Circuits RPM/sec RPM PulseRate3
PulseRate4 Accel3 Accel3
Accel4 RPM/sec RPM PulseRate4
AccelCalType Accel4
FastTripType PR_Max Fast Overspeed Protection
DecelPerm
DecelEnab
DecelStpt
InForChanA
InForChanB
Accel 1 AccelA
Accel 2 Input Neg A
Accel3 cct. AccelB A<B S DecelTrip
Accel 4 Select Neg B
for R
PulseRate1
PulseRate2 AccelA PulseRateA
and A
PulseRate3
PulseRate4 AccelB A>B
PulseRateB B
PR 1/2Max

PulseRate1
A
MAX A>B
PulseRate2 B
S FastOS1Trip
FastOS1Stpt R
FastOS1Enab
FastOS1Perm
PR3/4Max
PulseRate3
A
PulseRate4 MAX A>B S FastOS2Trip
B
FastOS2Stpt R
FastOS2Enab
FastOS2Perm

N/C FastOS3Trip
PR1/2Max
N/C FastOS4Trip
A
|A-B| A
PR3/4Max B A>B S
B FastDiffTrip
DiffSetpoint R
DiffEnab
DiffPerm
Fast Trip
Master Reset Path
(MRESET ) OR
False = Run
MarkVIeS,
SYS _OUTPUT
block True=Run Output, J4, PTR1
Primary Trip Relay, normal Path, True=Run AND
PTR1
PTR1_Output
True=Run Output, J4, PTR2
Primary Trip Relay, normal Path, True=Run AND
PTR2
PTR2_Output
True=Run Output, J4, PTR3
PTR3
PTR3_Output Total of six circuits True=Run Output, J4, PTR4
PTR4
True=Run Output, J4, PTR5
PTR5
PTR5_Output True=Run Output, J4, PTR6
PTR6
PTR6_Output
Fast Overspeed Algorithm, PR-Max

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11.3.2.14 Shaft Voltage and Current Monitor
Bearings can be damaged by the flow of electrical current from the shaft to the case. This current can occur for several
reasons:

• A static voltage can be caused by droplets of water being thrown off the last stage buckets in a steam turbine. This
voltage builds up until a discharge occurs through the bearing oil film.
• An ac ripple on the dc generator field can produce an ac voltage on the shaft with respect to ground through the
capacitance of the field winding and insulation. Note that both of these sources are weak, so high impedance
instrumentation is used to measure these voltages with respect to ground.
• A voltage can be generated between the ends of the generator shaft due to dissymmetries in the generator magnetic
circuits. If the insulated bearings on the generator shaft break down, the current flows from one end of the shaft through
the bearings and frame to the other end. Brushes can be used to discharge damaging voltage buildup, and a shunt should
be used to monitor the current flow.

Note The dc test is driven from the R controller only. If the R controller is down, this test cannot be run successfully.

The turbine control continuously monitors the shaft to ground voltage and current, and alarms excessive levels. There is an ac
test mode and a dc test mode. The ac test applies an ac voltage to test the integrity of the measuring circuit. The dc test checks
the continuity of the external circuit, including the brushes, turbine shaft, and the interconnecting wire.

11.3.2.15 Flame Detectors


With the TRPG primary trip terminal board, the primary protection system monitors signals from eight flame detectors. With
no flame present the detector charges up to the supply voltage. The presence of flame causes the detector to charge to a level
and then discharge through the TRPG. As the flame intensity increases, the discharge frequency increases. When the detector
discharges, the primary protection system converts the discharged energy into a voltage pulse. The pulse rate varies from 0 to
1,000 pulses/sec. These voltage pulses are fanned out to all three modules. Voltage pulses above 2.5 V generate a logic high.
Pulses are counted over a 40 ms period in a counter to generate the flame detector pulse rate.

Note Refer to GEH-6721_Vol_II, the chapter Power Distribution Modules, the section, PSFD Flame Detector Power Supply.

11.3.2.16 Connectors
• A DC-62 pin connector on the underside of the YTUR I/O pack connects directly to a discrete output terminal board.
• An RJ-45 Ethernet connector named ENET1 on the I/O pack side is the primary system interface.
• A second RJ-45 Ethernet connector named ENET2 on the I/O pack side is the redundant or secondary system interface.
• A 3-pin power connector on the pack side is the input point for 28 V dc power for the I/O pack and terminal board.

Note The terminal board provides fused power output from a power source that is applied directly to the terminal board, not
through this I/O pack connector.

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11.3.3 Specifications
Item YTUR Specification
Number of inputs Passive speed pickups: 4 TRPG, 3 TRPA
3 voltage detection circuits from TRPA
Estop from TRPA
1 Shaft voltage and 1 current measurement from TRPG
1 Generator and 1 bus voltage from TRPG
Generator breaker status from TRPG
Eight flame detectors from TRPG

Number of outputs Automatic synchronizing control to main breaker


Primary trip solenoid interface: 3 outputs to TRPG, 2 trip contact outputs from
TREA
Speed sensor range MPU pulse rate range 2 Hz to 20 kHz

Speed sensor accuracy MPU pulse rate accuracy 0.05% of reading

Speed sensor circuit sensitivity Required peak-peak voltage rises as a function of frequency:
0 to 2 kHz requires 27 mV
2 to 6 kHz requires 50 mV
6 to 10 kHz requires 100 mV
10 to 15 kHz requires 160 mV
Above 15 kHz requires 250 mV

Shaft voltage monitor Voltage signal is ±5 V dc pulses from 0 to 2,000 Hz

Shaft voltage dc test This applies a 5 V dc source to test integrity of the circuit. The circuit reads a
differential resistance between 0 and 150 Ω within ±5 Ω. Readings above the
BrushLimit ohms setting indicate a fault. The returned signal is filtered to
provide 40 dB of noise attenuation at 60 Hz.

Shaft voltage ac test Applies a test voltage of 2 kHz to YTUR shaft voltage circuit input.

Shaft current input Measures shaft current in amps ac (shunt voltage up to 0.1 V pp)

Generator and bus voltage sensors 2 single phase PTs, with secondary output supplying a nominal 115 V rms.
Less than 3 VA loading on inputs. Allowable voltage range for sync is 75 to
130 V rms.
Synchronizing measurements Frequency accuracy 0.05% over 45 to 66 Hz range.
Zero crossing of the inputs is monitored on the rising slope.
Phase difference measurement is better than ±1 degree.

Contact voltage sensing 20 V dc indicates high and 6 V dc indicates low. Each circuit is optically
isolated and filtered for 4 ms.
Size 8.26 cm High x 4.19 cm Wide x 12.1 cm Deep (3.25 in. x 1.65 in. x 4.78 in.)
† Ambient rating for enclosure design -30 to 65ºC (-22 to 149 ºF)

Technology Surface mount

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

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11.3.4 Diagnostics
The I/O pack performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware.
• Continuous monitoring of the internal power supplies for correct operation.
• L3BKR_GXS - the Sync Check Relay on TTUR is Slow
• L3BKR_GES - the Auto Sync Relay on TTUR is Slow
• Breaker #1 Slower than Adjustment Limit Allows
• Breaker #2 Slower than Adjustment Limit Allows
• Synchronization Trouble - the K25 Relay on TTUR Locked Up.
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set.
• Diagnostic information includes status of the solenoid relay driver, contact, high and low flame detector voltage, and the
sync relays. If any one of the signals goes unhealthy a composite diagnostic alarm, L3DIAG_YTUR occurs.
The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal if they go healthy. Details of
the individual diagnostics are available from the toolbox.

11.3.4.1 YTUR Application LEDs

LED Label Description


Yellow K25 Indicates the presence of a command to energize the primary synchronizing relay.

Yellow K25P Indicates the presence of a command to energize the synchronizing permissive relay.

Yellow DCT Indicates the presence of a command to enable the DC Test of shaft voltage and
current monitoring.

Yellow K1, K2, and K3 Indicates a command to energize the corresponding relay.

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11.3.5 Configuration

Note The following information is extracted from the ToolboxST application and represents a sample of the configuration
information for this board. Refer to the actual configuration file within the ToolboxST application for specific information.

Parameter Description Choices


YTUR_Mod_Cfg
System Limits Enable or disable all system limit checking Enable, disable
AccelCalType Select acceleration calculation type Slow, Medium, Fast
TripType Select fast trip algorithm Unused, PR_Single, PR_Max
Trip Type (PR_Max)
DecelEnab Deceleration enable Disable, Enable
DecelStpt Deceleration setpoint, RPM/sec 0 … 1500
FastOS1Stpt Fast Overspeed trip #1 setpoint, Max (PR1, PR2), RPM 0 ... 20000
FastOS1Enabl Fast Overspeed trip #1 enable Disable, Enable
FastOS2Stpt Fast Overspeed trip #2 setpoint, Max (PR3, PR4), RPM 0 ... 20000
FastOS2Enabl Fast Overspeed trip #2 enable Disable, Enable
DiffSetpoint Difference Speed trip setpoint, RPM 0 ... 20000
DiffEnable Difference Speed trip, enable Disable, Enable
PR1Setpoint Fast Overspeed trip #1, setpoint, PR1, RPM 0 ... 20000
PR1TrEnable Fast Overspeed trip #1, enable Disable, Enable
AccASetpoint Acceleration trip setpoint, Change A, RPM/sec 0 ... 1500
Trip Type (PR_Single)
InForChanA Input change selection for Accel/Decel trip Accel, Accel2, Accel3, Accel4.
. . .
DiagSo1PwrA When using TRPL/S, Sol Power, Bus A, Diagnostic enable. Enable, Disable
. . .

Parameter Description Choices


YTUR_PR_Cfg
PRType Selects the type of pulse rate input, n (for proper Unused, Speed, Flow, Speed_LM
resolution)
PRScale Pulses per revolution (outputs RPM) 0 to 1,000
SysLim1Enabl Enable system limit 1 fault check Enable, Disable
SysLim1Latch Latch system limit 1 fault Latch, Not Latch
SysLim1Type System limit 1 check type (= or <=) = or <=
SysLimit1 System limit 1 - RPM 0 to 20,000
SysLim2Enabl Enable system limit 2 fault check (as above) Enable, Disable
. . .
TMRDiffLimit Diag Limit, TMR input vote difference, in Eng units 0 to 20,000
YTUR_ShV_Cfg Shaft voltage monitor
SysLim1Enabl Enable system limit 1 Enable, Disable
SysLim1Latch Latch system limit 1 fault Latch, Not Latch
SysLim1Type System limit 1 check type (= or <=) = or <=
SysLimit1 Select alarm level in frequency Hz 0 to 100
SysLim2Enabl Select system limit 2 (as above) Enable, Disable
TMRDiffLimt Diag limit, TMR input vote difference, in Hertz 0 to 100
YTURShC_Cfg Shaft current monitor

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Parameter Description Choices
ShuntOhms Shunt ohms 0 to 100
ShuntLimit Shunt maximum test ohms 0 to 100
BrushLimit Shaft (Brush + Shunt) maximum ohms 0 to 100
SysLim1Enable Select system limit 1 Enable, Disable
SysLim1Latch Select whether alarm will latch Latch, Not Latch
SysLim1Type Select type of alarm initiation = or <=
SysLimit1 Current Amps, select alarm level in Amps 0 to 100
SysLim2Enable Select system limit 2 Enable, Disable
. . .
YTUR_PT_Cfg Generator potential transform
PT_Input PT primary in Eng units (kv or percent) for PT_Output 0 to 1,000
PT_Output PT output in volts rms, for PT_Input - typically 115 0 to 150
SysLim1 Select alarm level in k volts rms 0 to 1,000
SysLim2 Select alarm level in k volts rms 0 to 1,000
YTUR_CB_Cfg Circuit Breaker
System Frequency Select frequency in Hz 50 or 60
CB1CloseTime Breaker 1 closing time, ms 0 to 1,000
CB1 AdaptLimit Breaker 1 self adaptive limit, ms 0 to 1,000
CB1 AdaptEnabl Enable breaker 1 self adaptive adjustment Enable, Disable
CB1FreqDiff Breaker 1 special window frequency difference, Hz 0.15 ... 0.66
CB1PhaseDiff Breaker 1 special window phase Diff, degrees 0 to 20
CB2CloseTime Breaker 2 closing time, ms (as above) 0 to 1,000
. . .
YTUR_Flm_Cfg
FlmDetTime Flame detector time interval 0.160, 0.080, 0.040 sec
FlameLimitHI Flame threshold LimitHI with higher detection counter
provides lower sensitivity.
1 … 160
FlameLimitLOW Flame threshold LimitLOW with lower detection counter
provides higher sensitivity.
Flame_Det Flame detector used or unused Used, Unused
YTUR_Rly1_Cfg
PTR_Output Primary protection relay used or unused Unused, used
DiagVoteEnab Enable voting disagreement diagnostic Enable, Disable
YTUR_Estop_Cfg
DiagVoteEnab Enable voting disagreement diagnostic Enable, Disable

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11.3.5.1 YTUR Signal Space Outputs
Output Description Function
Sync_Perm_AS Auto sync permissive Traditionally known as L83AS
Sync_Perm Sync permissive mode, L25P Traditionally known as L25P; interface to control the K25P
relay
Sync_Monitor Auto Sync monitor mode Traditionally known as L83S_MTR; enables the Auto Sync
function, except it blocks the K25 relays from picking up
Sync_Bypass1 Auto Sync bypass Traditionally known as L25_BYPASS; to pickup L25 for
Dead Bus or Manual Sync
Sync_Bypass0 Auto Sync bypass Traditionally known as L25_BYPASSZ; to pickup L25 for
Dead Bus or Manual Sync
CB2 Selected #2 Breaker is selected Traditionally known as L43SAUTO2; to use the breaker
close time associated with Breaker #2
AS_WIN_SEL Special Auto Sync window New function, used on Synchronous condenser
applications to give a more permissive window
When true, selects the special auto sync window
Sync_Reset Auto Sync reset Traditionally known as L86MR_TCEA; to reset the Sync
Lockout function

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11.3.5.2 YTUR Signal Space Inputs
Input Description Function
Ckt_BKR Breaker State (feedback) Traditionally known as L52B_SEL
CB_Volts_OK Breaker Closing Coil Voltage is Used in diagnostics
present
CB_K25P_PU Breaker Closing Coil Voltage is Used in diagnostics
present downstream of the K25P
relay contacts
CB_K25_PU Breaker Closing Coil Voltage is Used in diagnostics
present downstream of the K25
relay contacts
CB_K25A_PU Breaker Closing Coil Voltage is Used in diagnostics
present downstream of the K25A
relay contacts
Gen_Sync_LO Sync Lock out Traditionally known as L30AS1 or L30AS2; it is a latched
signal requiring a reset to clear (Sync_Reset). It detects a
K25 relay problem (picked up when it should be dropped
out) or a slow Sync Check (relay K25A) function
L25_Comand Breaker Close Command to the K25 Traditionally known as L25
relay
GenFreq Generator frequency Hz
BusFreq Bus frequency Hz
GenVoltsDiff Difference Voltage between the Engineering units, kV or percent
Generator and the Bus
GenFreqDiff Difference Frequency between the Hz
Generator and the Bus
GenPhaseDiff Difference Phase between the Degrees
Generator and the Bus
CB1CloseTime Breaker #1 measured close time ms
CB2CloseTime Breaker #2 measured close time ms
GenPT_Kvolts Generator Voltage Engineering units, kV or percent
BusPT_Kvolts Bus Voltage Engineering units, kV or percent
J4:IS200TRPGS1A TRPG terminal board, 8 flame Connected, not connected
detectors

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11.3.5.3 Board Point Signals
Board Points Signals Description - Point Edit Direction Type
L3DIAG_YTUR I/O Diagnostic Indication Input BIT
LINK_OK_YTUR I/O Link Okay Indication Input BIT
ATTN_YTUR I/O Attention Indication Input BIT
ShShntTst_OK Shaft voltage monitor shunt test OK Input BIT
ShBrshTst_OK Shaft voltage brush + shunt test OK Input BIT
CB_Volts_OK L3BKR_VLT circuit breaker coil voltage available Input BIT
CB_K25P_PU L3BKR_PERM sync permissive relay picked up Input BIT
CB_K25_PU L3KBR_GES auto sync relay picked up Input BIT
CB_K25A_PU L3KBR_GEX sync check relay picked up Input BIT
Gen_Sync_LO Generator sync trouble (lockout) Input BIT
L25_Command —————— Input BIT
Kq1_Status —————— Input BIT
: : Input BIT
Kq6_Status —————— Input BIT
FD1_Flame —————— Input BIT
: : Input BIT
FD16_Flame —————— Input BIT
SysLim1PR1 —————— Input BIT
: : Input BIT
SysLim1PR4 —————— Input BIT
SysLim1SHV Ac shaft voltage frequency high L30TSVH Input BIT
SysLim1SHC Ac shaft current high L30TSCH Input BIT
SysLim1GEN —————— Input BIT
SysLim1BUS —————— Input BIT
SysLim2PR1 (same set as for Limit1 above) Input BIT
GenFreq Hz frequency Input FLOAT
BusFreq Hz frequency Input FLOAT
GenVoltsDiff KiloVolts rms-Gen Low is negative Input FLOAT
Gen Freq Diff Slip Hz-Gen Slow is negative Input FLOAT
Gen Phase Diff Phase Degrees-Gen Lag is negative Input FLOAT
CB1CloseTime Breaker #1 close time in milliseconds Input FLOAT
CB2CloseTime Breaker #2 close time in milliseconds Input FLOAT
Accel1 RPM/SEC Input FLOAT
: : Input FLOAT
Accel4 RPM/SEC Input FLOAT
FlmDetPwr1 335 V dc Input FLOAT
ShTestAC L97SHAFT_AC SVM_AC_TEST Output BIT
ShTestDC L97SHAFT_DC SVM_DC_TEST Output BIT
FD1_Level 1 = high detection counts level Output BIT
: : Output BIT

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Board Points Signals Description - Point Edit Direction Type
FD16_Level 1 = high detection counts level Output BIT
Sync_Perm_AS L83AS - auto sync permissive Output BIT
Sync_Perm L25P - sequencing sync permissive Output BIT
Sync_Monitor L83S_MTR - monitor mode Output BIT
Sync_Bypass1 L25_BYP-1 = auto aync bypass Output BIT
Sync_Bypass0 L25_BYPZ-0 = auto sync permissive Output BIT
CB2_Selected L43SAUT2 - 2nd breaker selected Output BIT
AS_Win_Sel L43AS_WIN - special window selected Output BIT
Sync_Reset L86MR_SYNC - sync trouble reset Output BIT
Kq1 L20PTR1 - primary trip relay Output BIT
: : Output BIT
Kq6 L20PTR6 - primary trip relay Output BIT

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11.4 YTUR Specific Alarms
32–34
Description Solenoid #[ ] Relay driver Feedback Incorrect

Possible Cause The I/O pack monitors the relay command for the correct state and termination into the expected trip
board impedance. The I/O pack internal feedback of relay command output does not match the desired state.

Solution

• Check the mounting of the I/O pack on the terminal board.


• Check the cable from the TTUR to the trip board, if used.
• Replace the I/O pack.
• Replace the TRPx trip board.

38–40
Description Solenoid #[ ] Contact Feedback Incorrect

Possible Cause The contact state feedback from the trip board does not match the relay command.

Solution

• Check the mounting of the I/O pack on the terminal board.


• Check the cable from the TTUR to the TRPx.
• Check the operation of the relay.

44
Description Trip Board Solenoid Power Absent

Possible Cause

• The I/O pack has detected the absence of solenoid power as indicated by the connected TRPx board.
• The issue could be with the power source applied in the TRPx terminal boards.

Solution

• Verify that the TRPx on the J1 connector is receiving power.


• Verify that the voltage at the J1 cable is at an acceptable range. If it is out of range, there could be a problem with the
source or the cable connected between source and the terminal board.
• Check the cabling to the TRPx.
• If the voltage source is good, change the cable between the power source and TRPx boards.
• If the problem persists, replace the cable between the TRPx and the TTUR or STUR board.
• If the problem persists, replace the TRPx board.

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46
Description TRPG Flame Detector Volts Lower than 314.9 V

Possible Cause The voltage is less than 314.9 V dc and any flame detector is configured as Used.

Note The 335 V dc power required for the Honeywell flame detector is provided by the Flame Detector Power Supply
(PSFD). This nominal 335 V power enters the TRPG through the J3, J4, and J5 connectors.

Solution

• If no flame detector is being used, verify that all the Flame_Det parameters are set to Unused.
• If only two PSFDs are being used, set the No_T_PS_Req parameter to True. This disables the check for power on TRPG
J5.
• If the PSFD voltage is less than 314.9 V dc, replace the PSFD.
• Check the voltage at the TRPG side (J3, J4, and J5). If the voltage is above 314.9 V dc, replace TRPG.
• If the voltage reading at TRPG side (J3, J4, and J5) is below 314.9 V dc and the voltage at PSFD is nominal, replace the
cable connected between the TRPG and the PSFD.

47
Description TRPG Flame Detector Volts Higher than 355.1 V

Possible Cause This power comes into the TRPG through the J3, J4, and J5 connectors. If the voltage is greater than
355.1 V dc, this fault is declared.

Solution

• If the voltage is higher than 355.1 V dc, check the power supply.
• Check the voltage on the TRPG. If the voltage is above 355 V, the monitoring circuitry on the TRPG or the cabling to the
TRPG may be the problem.

50
Description L3BKRGXS - Sync Check Relay Is Slow

Possible Cause

• The K25 (auto sync) has picked up but the Sync check relay L3BKRGXS, known as K25A, on the TTUR has not picked
up.
• There is no breaker closing voltage source.
• The K25A relay is not enabled on the YPRO I/O module.

Solution

• Attempt to perform a Sync Reset (set Synch_Reset to True).


• Check the breaker to verify closure.
• Verify that the K25A relay is enabled on the YPRO I/O module.
• Replace the TTUR.

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51
Description L3BKRGES - Auto Sync Relay Is Slow

Possible Cause

• The Auto Sync relay L3BKRGES, also known as K25, on the TTUR has not picked up when it should have.
• The K25P is not picked up.
• There is no breaker closing voltage source.

Solution

• Attempt to perform a Sync Reset (set Synch_Reset to True).


• Check the breaker to verify closure.
• Replace the TTUR.

52–53
Description Breaker #[ ] Slower Than Adjustment Limit Allows

Possible Cause

• The self-adaptive function adjustment of the Breaker Close Time has reached the allowable limit and cannot make further
adjustments to correct the Breaker Close Time.
• The breaker is experiencing a problem, or the operator should consider changing the configuration. Both the nominal
close time and the self-adaptive limit in milliseconds can be configured.

Solution

• Increase the limit setting of CBxCloseTime for the breaker in question.


• Review breaker feedback timing to verify that it meets the documented specifications.
• Verify that there are no interposing relays causing a delay.
• Replace the terminal board.

54
Description Synchronization Trouble - K25 Relay Locked Up

Possible Cause

• The K25 relay is picked up when it should not be.


• K25 on TTUR is most likely stuck closed, or the contacts are welded together.

Solution

• Attempt to perform a Sync Reset (set Synch_Reset to True).


• Isolate which relay (K25A or K25) is causing a problem by checking the diagnostics and correcting the source of the
issue.
• Replace TTUR.

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55
Description Trip Board required by Main Terminal Board

Possible Cause When the YTUR is used with a TTUR, STURH3, or STURH4 terminal board, an auxilliary trip board is
required. However, the YTUR does not detect that a required trip board has been connected.

Solution

• Verify that the proper terminal board and trip board has been configured in the ToolboxST application. Rebuild the
application, then download the firmware and application code to the affected I/O pack.
• Verify the trip board cable connections at both ends.

57
Description Hardware and Configuration Incompatibility - Main Terminal Board

Possible Cause The YTUR configuration does not match the actual terminal board hardware.

Solution

• Verify that the ToolboxST configuration matches the actual hardware.


• Rebuild the application, then download the firmware and application code to the affected I/O pack.
• Verify that the YTUR is fully seated on the terminal board.
• Verify that the installed ToolboxST version supports the configured hardware.

58
Description Hardware and Configuration Incompatibility - Trip Board

Possible Cause The configuration does not match the connected trip board.

Solution

• Review the hardware compatibility information and correct, if necessary.


• Check the I/O pack configuration to verify that the TTUR board hardware form matches the installed terminal board.
• Rebuild the application, then download the firmware and application code to the affected I/O pack.
• If the configuration is correct, rebuild the device and download the firmware and parameters to the affected I/O pack.
• Verify the trip board cable connections at both ends.
• Verify that the cable between the TTUR/STUR board and the TRPx terminal board is properly seated.
• Verify that the installed ToolboxST version supports the configured hardware.

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67
Description Speed Trip

Possible Cause

• I/O pack has detected that a speed input has exceeded the overspeed threshold
• Acceleration threshold has been exceeded
• De-acceleration speed has been exceeded
• Overspeed configuration is set too low
• Acceleration limit has been enabled and is set too low
• Noisy pulse input signal

Solution

• Verify that the overspeed configuration is correct.


• Verify that the acceleration configuration is correct.
• Check the speed sensor.
• Determine the cause of the overspeed condition; for example, input signal, configuration, or noise.

68
Description TRPA - K1 solid state relay shorted

Possible Cause TRPA provides voltage-based detection of stuck-on relays in the six voting contacts used to provide K1.
Zero voltage has been detected on one or more contacts of K1 when voltage should be present.

Solution Replace the TRPA.

69
Description TRPA - K2 solid state relay shorted

Possible Cause TRPA provides voltage-based detection of stuck-on relays in the six voting contacts used to provide K2.
Zero voltage has been deleted on one or more contacts of K2 when voltage should be present.

Solution Replace the TRPA.

70
Description Pack internal reference voltage out of limits

Possible Cause The calibration reference voltage is beyond the expected value, indicating a hardware failure.

Solution

• Cycle power on the I/O pack.


• Replace the I/O pack.

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71
Description Pack internal null voltage out of limits

Possible Cause The calibration null voltage is beyond the expected value, indicating a hardware failure.

Solution

• Cycle power on the I/O pack.


• Replace the I/O pack.

128–223
Description Logic Signal [ ] Voting Mismatch

Possible Cause A problem exists with a status input between the R, S, and T I/O packs. This could be the device, the
wire to the terminal board, or the terminal board.

Solution

• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and networking.
• Check the I/O pack mounting on the terminal board.
• Verify the operation of the device generating the specified signal.
• Verify the terminal board wiring and connections.
• Replace the I/O pack.

224–252
Description Input Signal [ ] Voting Mismatch, Local=[ ], Voted=[ ]

Possible Cause A problem exists with a status input between the R, S, and T I/O packs. This could be the device, the
wire to the terminal board, or the terminal board.

Solution

• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and networking.
• Check the I/O pack mounting on the terminal board.
• Verify the operation of the device generating the specified signal.
• Verify the terminal board wiring and connections.

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11.5 TTURH#C, S1C TMR Primary Turbine Protection
Terminal Board
The Primary Turbine Protection (TTUR) terminal board inputs and outputs are as follows:

• 12 pulse rate devices sensing a toothed wheel to measure the turbine speed
• Generator voltage and bus voltage signals taken from external potential transformers
• 125 V dc output to the main breaker coil for automatic generator synchronizing
• Inputs from shaft voltage and current sensors to measure induced shaft voltage and current
• Three overspeed trip signals to the trip board
• Additional I/O signals from the trip board
TTUR has three relays, K25, K25P, and K25A, that all have to close to provide 125 V dc power to close the main breaker
52G. The signals to the I/O pack use the PR3 and JR4 connector for simplex systems. For TMR systems, signals fan out to the
PR3, PS3, PT3, JR4, JS4, and JT4 connectors.

TTUR Primary Turbine Protection

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Compatibility

Board Revision Mark VIe Control Mark VIeS Safety Control Comments
IS220PTUR IS200YTUR
TTURH1C Supports connection of TRPG, TRPS, TRPL, or
TRPA
TTURH2C No Contains altered internal power distribution for
Yes special applications and is not interchangeable with
a TTURH1C
TTURS1C Yes Supports connection of TRPGS, TRPAS, and is IEC
61508 safety certified with YTUR

11.5.1 Installation
Pulse rate pick ups, shaft pick ups, potential transformers, and the breaker relay are wired to the two terminal blocks TB1 and
TB2. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield terminal strip
attached to chassis ground is located immediately to the left of each terminal block.

In 240 V ac applications, do not inadvertently cross-connect the 240 V ac and the dc


voltages. The peak voltage will exceed the Transorb rating, resulting in a failure.

Most ac supplies operate with a grounded neutral, and if an inadvertent connection


between the 125 V dc and the ac voltage is created, the sum of the ac peak voltage and
the 125 V dc is applied to Transorbs connected between dc and ground. However, in
Caution 120 V ac applications, the Transorb rating can withstand the peak voltage without
causing a failure.

Jumpers JP1 and JP2 select either simplex or TMR for relay drivers K25 and K25P. Removing wire jumper WJ1 isolates the
K25A control line to the J8 connector on the terminal board. TB3 is for optional TTL connections to active speed pickups;
these devices require an external power supply. Simplex systems use connectors PR3 and JR4. TMR systems use all six
connectors.

Note Passive or active Pulse rate devices can be used.

The I/O pack plugs into the TTUR as displayed in the following figure. Either one or three I/O packs can be used. The turbine
primary trip board connects to the J4 connectors.

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TTUR Terminal Board Wiring

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 581
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11.5.2 Operation
In simplex applications, up to four pulse rate signals can be used to measure turbine speed. Generator and bus voltages are
brought into TTUR for automatic synchronizing in conjunction with the PTUR or YTUR, the turbine controller, and the
excitation system. The TTUR has permissive generator synchronizing relays and controls the main breaker relay coil 52G. All
three relays have two normally open contacts in series with the breaker close coil.
In TMR applications, all inputs, except speed, fan to the three PTURs or YTURs. Control signals coming into TTUR from R,
S, and T are voted before they actuate permissive relays K25 and K25P. The sync check relay driver (located on TREG,
TREL, or TRES) is connected to the K25A relay coil (located on TTUR) through cabling from the J2 connector to TRPG,
TREL, or TRES. It then goes through JR1 (and JS1, JT1) to JR4 (and JS4, JT4) on TTUR. This is the primary path. An
optional path is through J8 on TREG. Relay K25A is controlled by the PPRO or YPRO.

Note The Mark VIeS YTUR does not support the TREL or TRES.

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TTUR and I/O Packs, TMR system

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 583
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11.5.3 Specifications
Item TTUR Specification
12 passive speed pickups
1 shaft voltage and 1 shaft current measurement
Number of inputs
1 generator and 1 bus voltage. Generator breaker status contact.
Signal to K25A relay from Mark VIe PPRO or Mark VIeS YPRO

Generator breaker coil, make (close) 10 A at 125 V dc,


Number of outputs
break (open) 0.6 A at 125 V dc

Power supply voltage Nominal 125 V dc to breaker coil


MPU pulse rate range 2 Hz to 20 kHz
MPU pulse rate accuracy 0.05% of reading

Speed input sensitivity


Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 24 mV p-p
Turning gear speed can be observed
20 kHz requires 276 mV p-p
on a typical turbine application.

Shaft voltage monitor Signal is frequency of ±5 V dc (0 – 1 MHz) pulses from 0 to 2,000 Hz

Shaft voltage wiring Up to 300 m (984 ft), with maximum two-way cable resistance of 15 Ω

This applies a 5 V dc source to test integrity of the circuit. The circuit reads a
differential resistance between 0 and 150 Ω within ±5 Ω. Readings above the
Shaft voltage dc test
BrushLimit ohms setting indicate a fault. The returned signal is filtered to provide 40
dB of noise attenuation at 60 Hz.
Applies a test voltage of 2 kHz to the input of the Mark VIe PTUR or Mark VIeS
Shaft voltage ac test
YTUR shaft voltage circuit.

Shaft current input Measures shaft current in amps ac (shunt voltage up to 0.1 V pp)

Two single phase potential transformers, with secondary output supply a nominal
115 V rms. These PTs are external to the TTUR.
Generator and bus voltage sensors Each PT input on the TTUR has less than 3 VA of loading.
Each PT input on the TTUR is magnetically isolated with a 1,500 V rms barrier.
Cable length can be up to 1,000 ft. of 18 AWG wiring.

External circuits should have a voltage range within 20 to 140 V dc. The external
Generator breaker circuits circuit must include a NC breaker auxiliary contact to interrupt the current. Circuits
(synchronizing) are rated for NEMA class E creepage and clearance. 250 V dc applications require
interposing relays.

20 V dc indicates high and 6 V dc indicates low. Each circuit is optically isolated and
Contact voltage sensing
filtered for 4 ms.
Size 33.0 cm high x 17.8 cm wide (13 in x 7 in)

Technology Surface mount

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11.5.4 Diagnostics
Diagnostic tests are made on the terminal board as follows:

• Feedback from the solenoid relay drivers is checked; if there is a problem with the control signal a fault is created.
• Feedback from the relay contacts; if there is a problem with the control signal a fault is created.
• Loss of solenoid power creates a fault.
• Slow sync check relay, slow breaker, and locked up K25 relay; all of these create a fault.
• If any one of the above signals goes unhealthy, a composite diagnostic alarm occurs. The diagnostic signals can be
individually latched and then reset with the RESET_DIA signal if they go healthy.
• Terminal board connectors have their own ID device that is interrogated by the I/O pack. The ID device is a read-only
chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read
by the I/O pack and a mismatch is encountered, a hardware incompatibility fault is created.

11.5.5 Configuration
Jumpers JP1 and JP2 select either simplex (SMX) or TMR for relay drivers K25 and K25P. Wire jumper WJ1 is installed;
removing this will isolate the K25A control line to the J8 connector on the TTUR board. There are no switches on the board.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 585
GE Internal
11.6 STURH#A Simplex Primary Turbine Protection
Terminal Board
The Simplex Primary Turbine Protection Input (STUR) terminal board is a simplex S-type terminal board version of the
turbine terminal board (TTUR). It provides a connection for the turbine specific primary trip (PTUR), speed and
synchronizing inputs, and trip relay outputs or a cable to drive a primary trip board.

Note The STUR terminal board is not compatible with the Mark VIeS YTUR I/O pack.

STUR is used for the following:

• Mechanical drives requiring overspeed protection but no synchronizing function.


• Generator drive systems requiring overspeed and primary synchronization.
• Other applications requiring the four pulse input circuits of PTUR.
This terminal board has the same physical size, customer terminal locations, and I/O pack mounting as other S-type terminal
boards. There will be no components higher than an attached PTUR I/O pack permitting double stacking of terminal boards.
There are four groups:

• IS200STURH1 omits synchronizing hardware and includes trip relays.


• IS200STURH2 includes synchronizing hardware and trip relays.
• IS200STURH3 omits synchronizing hardware and includes a DC-37 pin connector for a cable leading to a trip terminal
board.
• IS200STURH4 includes synchronizing hardware and includes a DC-37 pin connector for a cable leading to a trip
terminal board.

Note Boards revisions prior to version STURH3ADB and STURH4ADB do not support the third trip relay.

STUR provides the following major functions:

• Provides a DC-62 pin connector for mounting a single PTUR I/O pack.
• Accepts up to four speed input signals.
• A 48 terminal Euro style box-type terminal blocks for customer connection points is supplied on the board.
• Provides two trip solenoid outputs, K1 and K2, with each composed of a safety relay (H1, H2).
• Provides a DC-37 pin connector for connecting a TPRG or TPRS primary trip relay (H3, H4).
• Accepts two PT inputs supporting primary synchronization (H2, H4). They accept generator voltage and bus voltage
signals taken from potential transformers.
• Provides two relay outputs supporting primary synchronization (H2, H4). Two relays, K25 and K25P, have to close to
provide 125 V dc power needed to close the main breaker 52G.

Note STUR contains no provisions for an E-stop circuit.

11.6.1 Installation
STUR and a plastic insulator mount on a sheet metal carrier. The carrier is then mounted to a cabinet by screws.

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Customer Terminal Assignments

Terminal Signal Name Description


STURH1A STURH2A STURH3A STURH4A
1 K1_NO1_In K1_NO1_In Parallel connection to terminal 2.

2 K1_NO1_In K1_NO1_In Relay K1 Normally Open contact #1

3 K1_Centertap K1_Centertap Relay K1 Common

4 K1_NC_Out K1_NC_Out Relay K1 Normally Closed

5 K1_NO2_In K1_NO2_In Relay K1 Normally Open Contact #2 in

6 K1_NO2_Out K1_NO2_Out Relay K1 Normally Open Contact #2 ret.

7 K1_NO2_Out K1_NO2_Out Parallel connection to terminal 6

8 K2_NO1_In K2_NO1_In Parallel connection to terminal 9

9 K2_NO1_In K2_NO1_In Relay K2 Normally Open contact #1

10 K2_Centertap K2_Centertap Relay K2 Common

11 K2_NC_Out K2_NC_Out Relay K2 Normally Closed

12 K2_NO2_In K2_NO2_In Relay K2 Normally Open Contact #2 in

13 K2_NO2_Out K2_NO2_Out Relay K2 Normally Open Contact #2 ret.

14 K2_NO2_Out K2_NO2_Out Parallel connection to terminal 13

15 SOL1_In SOL1_In Solenoid 1 voltage sensor + input

16 SOL1_Ret SOL1_Ret Solenoid 1 voltage sensor - input

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 587
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Customer Terminal Assignments (continued)

Terminal Signal Name Description


17 SOL2_In SOL2_In Solenoid 2 voltage sensor + input

18 SOL2_Ret SOL2_Ret Solenoid 2 voltage sensor - input

19 no connect

20 no connect
21 GENH GENH Generator PT input high

22 GENL GENL Generator PT input low

23 BUSH BUSH Bus PT input high

24 BUSL BUSL Bus PT input low

25 B52GH B52GH Output (PGEN) to B52G feedback contact

26 B52GL B52GL Return side of B52G feedback contact


27 PGEN PGEN Positive breaker coil power input

28 AUTO AUTO Output of K25P contact closure

29 MAN MAN Output of K25 contact closure

30 BKRH BKRH 52G Breaker Coil positive output.

31 BKRH BKRH Parallel connection to terminal 30


32 NGEN NGEN Negative breaker coil power connection

33 no connect
34 no connect

35 no connect
36 no connect
37 TTL1 TTL1 TTL1 TTL1 Active speed pickup input 1

38 PR1_H PR1_H PR1_H PR1_H Passive speed pickup input 1

39 PR1_L PR1_L PR1_L PR1_L Speed pickup 1 return (active and passive)

40 TTL2 TTL2 TTL2 TTL2 Active speed pickup input 2

41 PR2_H PR2_H PR2_H PR2_H Passive speed pickup input 2

42 PR2_L PR2_L PR2_L PR2_L Speed pickup 2 return (active and passive)

43 TTL3 TTL3 TTL3 TTL3 Active speed pickup input 3

44 PR3_H PR3_H PR3_H PR3_H Passive speed pickup input 3

45 PR3_L PR3_L PR3_L PR3_L Speed pickup 3 return (active and passive)

46 TTL4 TTL4 TTL4 TTL4 Active speed pickup input 4

47 PR4_H PR4_H PR4_H PR4_H Passive speed pickup input 4

48 PR4_L PR4_L PR4_L PR4_L Speed pickup 4 return (active and passive)

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11.6.2 Operation

11.6.2.1 Board Groups


STUR is available in four distinct configurations. STUR is not available with fixed box terminals. It uses pluggable type
terminals. Two groups offer on-board trip relays and two groups offer DC-37 pin connectors for using an external trip board.
Components supporting generator applications will be omitted from two groups used for mechanical applications and added
for groups used for generator applications.

STUR Board Variations


Board Version Generator Trip Application
Application Connections
STURH1A No Trip relays Mechanical drive turbines

STURH2A Yes Trip relays Generator drive turbines

STURH3A** No DC-37 pin connector Pulse inputs only, mechanical drive requiring
features provided by a separate primary trip board.

STURH4A** Yes DC-37 pin connector Generator drive turbines requiring features
provided by a separate primary trip board.

** Boards revisions prior to version STURH3ADB and STURH4ADB do not support the third trip relay.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 589
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STUR Schematic

11.6.2.2 Speed Input


STUR provides four speed input circuits that accept passive speed sensors or active speed sensors. When passive sensors are
used the signal is applied between terminals PR#_H and PR#_L where # is 1 through 4. Sensitivity of the passive sensor input
is such that the PTUR I/O pack is able to sense speeds as low as 2RPM. When active speed sensors are used the signal is
applied between terminals TTL# and PR#_L.

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11.6.2.3 Trip Relays
STUR version H1 and H2 provides two trip solenoid outputs, K1 and K2, with each composed of a safety relay that uses
forcibly guided contacts. Relay position feedback is provided to PTUR using one of the contact pairs in the relay.

Note The ControlST* software suite V03.01 or later is required for the K1 and K2 trip function.

11.6.2.4 Primary Synchronizing


STURH2 and STURH4 used with PTUR provides support for synchronized closure of a 52G primary breaker. Two PT inputs
are provided for Bus and Generator voltage on terminals 21 through 24. Breaker positive power at 24, 48, or 125 V dc is
applied to terminal 27 (PGEN) and the return is applied to terminal 32 (NGEN). The presence of this voltage is indicated by
the BKRVLT signal. Positive power passes through a permissive relay K25P to terminal 28 (AUTO) with power indicated by
the BKRPRM signal. Power then passes through the synchronizing pilot relay K25 to terminal 29 (MAN) as indicated by the
BKRGES signal.

Note All voltage based feedback of synchronizing relay status is based on a voltage return path through terminal 32.

If a backup sync-check relay is used it is to be wired between terminals 29 and 30 (BKRH) with closure indicated by signal
BKRGXS. If a backup sync-check is not used a jumper between terminals 29 and 30 is used to complete the circuit and
BKRGXS and BKRGES both indicate that power is applied to the breaker coil. The breaker coil or a pilot relay is to be wired
between terminals 31(BKRH) and 32 (NGEN).

Note Refer to the PTUR Operation section, Synchronizing System.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 591
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11.6.2.5 Feedback Signals
Feedback signals are dependent on the group of STUR. Possible signals include the following:

• Relay position feedback from STUR K1 and K2 trip relays.


• Solenoid voltage feedback associated with K1 and K2.
• Five voltage feedbacks associated with the sync function. The following signals are formed by testing the voltage
between the desired signal and the return side of the power bus or N125GEN.
− BKRVLT – Voltage status of the power bus used to close the breaker.
− L52G – Voltage feedback from an auxiliary contact on the 52G breaker. A separate set of customer screw terminals
provides input.
− BKRPRM – Voltage status of the breaker close permissive relay contact, K25P.
− BKRGES – Voltage status of the combination of the K25P contacts wired in series with the K25 contacts.
− BKRGXS – Voltage status of the series combination of K25P, K25, and an auxiliary backup sync check relay
(K25A) which equals the voltage applied to the breaker coil or a pilot relay.
• Two sync relay coil drive feedback signals.
• Feedback signals provided by a trip card wired to J2

Relationship between Feedback and STUR Group

STUR Relay Position Solenoid Volts Sync Circuit Sync Relay Trip Card
Group Volts Coils Feedback
STURH1 Yes Yes
STURH2 Yes Yes Yes Yes
STURH3 Yes
STURH4 Yes Yes Yes

11.6.2.6 Failure Detection


An external test signal is required for speed input testing. Normal running speed signal failure detection is achieved through
redundant signals applied to STUR. PT inputs require external test signals for proper feedback. Trip relays, depending on
which STUR version is being tested, use forcibly guided contacts ensuring a feedback contact accurately represents the power
contact position. Breaker closure relay contact logic includes voltage based status feedback announcing any unexpected
behavior.

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11.6.2.7 Trip Board Comparison
The following table compares existing primary trip boards to STUR.

Board TMR/Simplex Output Output E-Stop Sync Support Trip Output


Contacts 125 Contacts 24 V Count
V
TRPGH1B TMR 1A No No Yes 3
TRPGH2B Simplex 1A 3A No Yes 3

TRPLH1A TMR 1A 3A Yes Yes 3


TRPSH1A TMR/Simplex 1A 3A Yes Yes 3

TRPAH1A TMR No 5A Yes No 2


TRPAH2A TMR 1A No Yes No 2
STURH1A Simplex 0.5A 5A No No 2

STURH2A Simplex 0.5A 5A No Yes 2

STURH3A** Simplex (TRPx) (TRPx) No No (TRPx)

STURH4A** Simplex (TRPx) (TRPx) No Yes (TRPx)

** Boards revisions prior to version STURH3ADB and STURH4ADB do not support the third trip relay.

11.6.2.8 Simplex Turbine Applications


In simplex applications STUR accepts up to four pulse rate signals used to measure turbine speed. The PT signals provide
voltage input from both sides of a 52G circuit breaker permitting automatic synchronization to be performed. The on-board
trip relays provided by the H1 and H2 groups of STUR create a self-contained overspeed and synchronizing function. It is
also possible to use the H3 or H4 group of STUR in a simplex application with a simplex trip terminal board cabled into
STUR using the DC-37 pin connection.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 593
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11.6.3 Specifications
Item STUR Specification
Number of inputs 4 passive or active speed pickups
1 generator and 1 bus voltage potential transformer (H2, H4)
1 generator breaker status contact. (H2, H4)

Number of outputs 2 Primary trip relays (H1, H2)


2 Synchronizing relays (H2, H4)
1 DC-37 connector for primary trip terminal board (H3, H4)

MPU pulse rate range 2 Hz to 20 kHz

MPU pulse rate accuracy 0.05% of reading

Speed input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 24 mV p-p
Speed input sensitivity is such that turning 20 kHz requires 276 mV p-p
gear speed may be observed on a typical
turbine application.

Generator and bus voltage sensors Two single phase 115 V ac rms potential transformer inputs. Each input has
less than 3 VA of loading.
Each PT input is magnetically isolated with a 1,500 V rms barrier.
Cable length can be up to 1,000 ft. of 18 AWG wiring.

Generator breaker circuits (synchronizing, External circuits should have a voltage range within 20 to 140 V dc. Circuits are
K25, K25p) rated for NEMA class E225 creepage and clearance. 250 V dc applications
require interposing relays.
Contact rating 3.15 A at 24 V dc, 1.2 A at 48 V dc, 0.4 A at 125 V dc, resistive.

Contact voltage sensing 20 V dc indicates high and 6 V dc indicates low. Each circuit is optically isolated
and filtered for 4 ms. Circuits will accept up to 140 V dc input.

Trip Relays (K1, K2) Contact Rating: 4 A at 24 V dc, 4 A at 48 V dc, 2 A at 125 V dc for normally
open contacts resistive. 4 A at 24 V dc, 4 A at 48 V dc, 0.3 A at 125 V dc for
normally closed contacts resistive.
Minimum contact load >50 mW.
Maximum Switching Rate: 3 operations/minute at rated load, 60
operations/minute at minimum load
Associated printed circuit board designed for minimum of 20 A surge rating for
10 ms.
Size 15.9 cm high x 17.8 cm, wide (6.25 in x 7 in)

Technology Surface mount

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11.6.4 Diagnostics
Diagnostic tests are made on the STUR as follows:

• Feedback from the solenoid relay drivers is checked; if there is a problem with the control signal a fault is created.
• Feedback from the relay contact position is checked; if there is a problem with the control signal a fault is created.
• Loss of solenoid power creates a fault.
• Slow synch check relay, slow breaker, and locked up K25 relay; all of these create a fault.
• If any one of the above signals goes unhealthy, a composite diagnostic alarm L3DIAG_PTUR occurs. The diagnostic
signals can be individually latched and then reset with the RESET_DIA signal if they go healthy.
• Terminal board connectors have their own ID device that is interrogated by the I/O pack. The ID device is a read-only
chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read
by PTUR and a mismatch is encountered, a hardware incompatibility fault is created.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 595
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11.7 TRPA_#A Aeroderivative Turbine Primary Trip Board
The Aeroderivative Turbine Primary Trip (TRPA) terminal board inputs and outputs are as follows:

• Twelve passive pulse rate devices (four per R/S/T section) sensing a toothed wheel to measure the turbine speed. Or, six
active pulse rate inputs (two per TMR section)
• Two 24 V dc (H1A) or 125 V dc (H2A) TMR voted output contacts to the main breaker coil for trip coil.
• Four 24-125 V dc voltage detection circuits for monitoring trip string.
• One 24-125 V dc ‘Fail-safe’ ESTOP input for removing power from trip relays.
With three I/O packs, signals fan out to the PR3, PS3, PT3, JR4, JS4, and JT4 connectors.

Compatibility

Board Revision Mark VIe control Mark VIeS Safety control Comments
IS220PTUR IS200YTUR
TRPAH1A 24 V dc output contact rating
No
TRPAH2A 125 V dc output contact rating

TRPAS1A 24 V dc output contact rating, IEC 61508


Yes
safety certified with YTUR
Yes
TRPAS2A 125 V dc output contact rating, IEC 61508
safety certified with YTUR

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11.7.1 Installation
In 240 V ac applications, do not inadvertently cross-connect the 240 V ac and the dc
voltages. The peak voltage will exceed the Transorb rating, resulting in a failure.

Most ac supplies operate with a grounded neutral, and if an inadvertent connection


between the 125 V dc and the ac voltage is created, the sum of the ac peak voltage and
the 125 V dc is applied to Transorbs connected between dc and ground. However, in
Caution 120 V ac applications, the Transorb rating can withstand the peak voltage without
causing a failure.

TTL pulse rate pick ups, voltage detection, E-Stop, and the breaker relay are wired to the I/O terminal blocks TB1. Passive
pulse rate pick-ups are wired to TB2. Each block is held down with two screws and has 24 terminals accepting up to #12
AWG wires. A shield termination strip attached to chassis ground is located immediately to the left of each terminal block.
The TRPA must be configured for the desired speed input connections using the following table. Jumpers JP1 and JP2 select
fanning of the R section pulse rate pickups to the S and T I/O packs.

Speed Input Connections Function Jumper


Wire to all 12 pulse inputs: Each set of (4) pulse inputs goes to its own Cannot use jumper:
PR1_R – PR4_T dedicated I/O pack. Place in STORE position

Wire to TTL pulse inputs: Each set of (2) pulse inputs goes to its own Cannot use jumper:
TTL1_R – TTL2_T dedicated I/O pack. Place in STORE position

Wire to bottom 4 pulse inputs only: The same set of signals are fanned to all the Use jumper:
PR1_R – PR4_R I/O packs. Place over pin pairs
NO wiring to TTL1_R-TTL2_T or
PR1_S-PR4_T

Wire to bottom 2 pulse inputs: Cannot fan the TTL signals. Only the R I/O Cannot use jumper:
TTL1_R – TTL2-R pack will receive data. Place in STORE position

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 597
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TRPA Terminal Board Wiring

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11.7.1.1 Contact Outputs
• The contact outputs are polarity sensitive. Wire the circuit carefully to avoid damaging the relays.
• There is no contact or solenoid suppression, user must add external solenoid suppression to avoid damaging the relays
and their contacts.

Connection to TRPA contact output

11.7.1.2 E-Stop/TRP Input


• The TRP inputs must be powered for the relays to operate. If the user does not need or use an ESTOP, then jumper the
local TRP power source (P24O and P24R) to the respective TRP inputs at the terminal board.
• The ESTOP must be connected to a CLEAN dc source – battery or filtered (< 5% ripple) rectified ac.
• There must be a minimum of 18 V dc at the TRP inputs for proper operation. The current required was kept low to
minimize drop on long cable runs.
• As the TRP is very fast < 5 ms and the output relay contacts are also fast (< 15 ms), best wiring practices should be
utilized to avoid misoperation. Use twisted-pair cable when possible and avoid running with ac wiring and so on.

The E-Stop signal that is reported in the ToolboxST E-Stop Tab is latched by firmware
and needs a Master Reset to clear that status. A true indicates a completed E-Stop
circuit. A false indicates a loss of the E-Stop since the last Master Reset, not the
current state of the E-Stop circuit.
Attention

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 599
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Typical E-Stop connection options

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11.7.2 Operation

11.7.2.1 System Design


The TRPA board is designed for application in two different ways. When a TTUR terminal board is used to hold three I/O
packs, the TRPA terminal board may be connected using three cables with DC-37 pin connectors on each end. In this mode of
operation the TRPA provides two contact voted trip relay outputs, ESTOP, and four voltage sensors. TTUR provides the
normal set of features described for that board. The TRPA speed inputs are not active and should not be connected with this
board arrangement.

The TRPA board can also be used with three I/O packs mounted directly to it. In this mode of operation the speed inputs to
TRPA become active paths into the I/O pack, allowing for a single terminal board primary trip solution. Simplex operation is
not possible.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 601
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11.7.2.2 Speed Inputs
When used with I/O packs mounted directly on the TRPA, the speed inputs provide two options. Each I/O pack can receive a
dedicated set of four speed inputs from their respective TRPA terminal points as is done on TTUR. As an option, jumpers P1
and P2 can be placed on the TRPA to take the first four speed inputs (those for the R pack) and fan them to the S and T packs.
When this is selected the terminal board points for S and T speed input become no-connects and should not be used.

11.7.2.3 Voltage Monitors


The trip relays on TRPA can be freely located anywhere in a trip string. Because the trip string circuit is not fixed, there are
four general-purpose isolated voltage sensor inputs on TRPA. These can be used to monitor any points in the trip system and
drive the voltage status into the system controller where action can be taken. Typical use of these inputs may be to sense the
power supply voltage for the two trip strings and to sense the solenoid voltage of the device being driven by the relays. This
set of applications is used in the wording of the board symbol, but the sensors can be freely applied to best serve the
application.

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11.7.2.4 E-Stop
The TRPA includes an E-Stop function. This consists of an optically isolated input circuit designed for a dc input in the range
of 24 V to 125 V nominal. When energized the circuit enables coil drive power in the R, S, and T relay circuits through
independent hardware paths. The response time of this circuit (less than five milliseconds) plus the response time of the trip
relays (less than one millisecond) yields a very fast E-Stop response. E-Stop is monitored by the I/O pack, but the action to
remove trip relay coil power is entirely in the hardware of TRPA.

The E-Stop signal that is reported in the ToolboxST E-Stop Tab is latched by firmware
and needs a Master Reset to clear that status. A true indicates a completed E-Stop
circuit. A false indicates a loss of the E-Stop since the last Master Reset, not the
current state of the E-Stop circuit.
Attention

TRPA E-Stop Function

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 603
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11.7.2.5 TRPA Trip Relays
The trip relays are made using sets of six individual form A devices arranged in a voting pattern. Any two controllers that
vote to close will establish a conduction path through the set. Because detection of a shorted relay is important to preserve
tripping reliability there is a sensing circuit applied to each of the sets of relays. When the relays are commanded to open and
voltage is present across the relays the circuit will detect if one or more relays are shorted. This signal goes to the I/O pack to
create an alarm. The TRPA sensing circuit uses the relay commands from all three packs to avoid a false indication in the
event that one I/O pack votes to close the relay while the other two I/O packs vote to open.

TRPA and I/O Pack, TMR System


The following figure is simplified with many circuit paths omitted for clarity. Refer to the sections, E-Stop/TRP Input and
E-Stop.

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TTLn _ T Pulse Rate Inputs
TRPA
P3T

MPU MnTH 8

MnTL S
Four of above
circuits to T,

I/ O p a c k s g o h er e
except for TTL,
TTLn _S ID
see Table .
P3S
MnSH 8

MnSL S
Four of above
circuits to S ,
except for TTL ,
TTLn _R ID
see Table.

P3 R
MnRH 8

MnR S
Four of above
L
circuits to R , Circuit duplicated
except for TTL, for S and T

KR 1 KS1 see Table . K4 R


K1DCN Relay V Monitor
Pin 9 ID
KS 1 KT1 KR 1 RD

KT 1 KR 1
JR 4
KR2 RD
K1DCP
Pin 10
KR 2 KS2

C a bl e s t o
K2DCN
Pin 13 Relay V Monitor
KS 2 KT2

KT 2 KR 2
ID JS4
K2DCP

T T U R
Pin 14

Refer to the figure ,

g o h ere
Primary ID
E - STOP TRPA E- Stop
Function. P 28 R 1 JT4

P 28 S1 P 28 T1

Monitor
Monitor
Solenoid Monitor
ID
Voltage
Monitor x 2 Monitors go to TTUR and I /O pack

Power < R >, <S >, < T > connectors


Voltage
Monitor x 2

TRPA Typical Voted Contact Configuration

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 605
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11.7.2.6 TRPA Terminal Board Connectors
Pin # Signal Name Pin # Signal Name
1 VSEN1_A 2 VSEN1_B

3 VSEN2_A 4 VSEN2_B

5 VSEN3_A 6 VSEN3_B

7 VSEN4_A 8 VSEN4_B

9 K1DCN 10 K1DCP
11 No connection 12 No connection
13 K2DCN 14 K2DCP
15 E-TRP 16 E-TRPR
17 P24O 18 P24R
19 TTL2_T 20 TTL1_T

21 TTL2_S 22 TTL1_S

23 TTL2_R 24 TTL1_R

25 PR1_TH 26 PR1_TL

27 PR2_TH 28 PR2_TL

29 PR3_TH 30 PR3_TL

31 PR4_TH 32 PR4_TL

33 PR1_SH 34 PR1_SL

35 PR2_SH 36 PR2_SL

37 PR3_SH 38 PR3_SL

39 PR4_SH 40 PR4_SL

41 PR1_RH 42 PR1_RL

43 PR2_RH 44 PR2_RL

45 PR3_RH 46 PR3_RL

47 PR4_RH 48 PR4_RL

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11.7.3 Specifications
Item TRPA Specification
Number of inputs 3x4 passive (magnetic) speed pickups or 3x2 active (TTL) speed pickups.
4 voltage detection circuits
1 ESTOP/TRP input

Number of outputs 2 trip contacts:


1 ESTOP/TRP power source.

Contact ratings NEMA class F. Minimum operations: 100,000

IS200TRPA_1A Voltage: 24 V dc nominal


5 A dc resistive
3 A dc with L/R = 7 ms and no suppression
3 A dc with L/R = 100 ms with suppression
Active Voltage Clamp Limiting max. voltage ≤60 V dc

IS200TRPA_2A Voltage: 125 V dc nominal


1 A dc resistive
1 A dc with L/R = 7 ms and no suppression
1 A dc with L/R = 100 ms with suppression
Active Voltage Clamp Limiting max. voltage ≤ 200 V dc

Voltage detection inputs Min/max input voltage rating: 16/140 V dc max pk


Current Loading (Max leakage): 3 mA
Detection delay (max): 60 ms
Voltage isolation: Optically isolated: 2500 V rms isolation, for one min
Surge/Spike rating: 1000 V pk for 8.3 ms

ESTOP/TRP voltage source 24 V dc no-load, 0.3 to 1K source impedance

ESTOP/TRP detection Input Voltage: 24-125 V dc ±10% (18/140 V pk Min/Max)


Loading (max): 12 mA (5 typical)
Delay (max): 5 ms (<1 typical)

MPU pulse rate range 2 to 20 kHz

MPU pulse rate accuracy 0.05% of reading

Speed input sensitivity Required peak-peak (p-p) voltage rises as a function of frequency:
2 Hz requires 24 mV p-p
Turning gear speed can be observed on 20 kHz requires 276 mV p-p
a typical turbine application.

Size 33.0 cm high x 17.8 cm, wide (13 in x 7 in)

Technology Surface mount

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 607
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11.7.4 Diagnostics
Diagnostic tests are made on the terminal board:

• Feedback from the shorted contact detector checked; if there is a problem with the control signal an alarm should be
created.
• Feedback from the ESTOP/TRP input is checked; if there is a problem with the signal a fault should be created.
• Feedback from speed pickup fanning jumpers is checked; if there is a mismatch between intention and actual position, an
alarm should be created.
• If any one of the above signals goes unhealthy, a composite diagnostic alarm occurs. The diagnostic signals can be
individually latched and then reset with the RESET_DIA signal if they go healthy.
• Terminal board connectors have their own ID device that is interrogated by the I/O pack. The ID device is a read-only
chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read
by the I/O pack and a mismatch is encountered, a hardware incompatibility fault is created.

11.7.5 Configuration
Jumpers JP1 and JP2 select the fanning of the 4 R section passive speed pickups to the S and T section I/O packs. Place the
jumper over the pin pairs to fan the 4 R speed input to the other two TMR sections.

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11.8 TRPG_#B Gas Turbine Primary Trip Board
The Gas Turbine Primary Trip (TRPG) terminal board is controlled by Primary Turbine Protection PTUR or YTUR I/O packs
that are mounted on the TTUR terminal board, which is cabled to TRPG. The TRPG contains nine magnetic relays in three
voting circuits to interface with three trip solenoids (ETDs). The TRPG works in conjunction with the TREG to form the
primary and backup sides of the interface to the ETDs. The TRPG also accommodates inputs from eight flame detectors for
gas turbine applications.

TRPG Terminal Board and Cabling

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 609
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11.8.1 Compatibility
Board Revision Mark VIe control Mark VIeS Safety Comments
IS220PTUR control IS200YTUR
TRPGH1B Yes No TMR applications, has three voting
TRPGH3B relays per trip solenoid

TRPGH2B Yes No Simplex applications

TRPGS1B Yes Yes IEC 61508 safety certified TMR


application with YTUR and
TTURS1C, has three voting relays
per trip solenoid

TRPGS2B Yes Yes IEC 61508 safety certified simplex


applications with YTUR and
TTURS1C, has one relay per trip
solenoid

Version Difference
Board TMR Simplex Output contact, Output contact, 28 V Power use
125 V dc, 1 A 24 V dc, 3 A
TRPGH1B Yes No Yes Yes Normal
TRPGS1B
TRPGH2B No Yes Yes Yes Normal
TRPGS2B
TRPGH3B ** Yes No Yes Yes Special

** TRPGH3B features special handling of 28 V control power and is otherwise identical to a TRPGH1B.

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11.8.2 Installation
➢ To install the TRPG board
1. Connect the wires for the three trip solenoids directly to the first I/O terminal block.
2. Connect the wires for the flame detectors (if used) to the second terminal block. Connect the power for the flame
detectors (if used) to the J3, J4, and J5 plug.
3. Connect the 125 V dc power for the trip solenoids to the J1 plug.
4. Transfer power to the TREG board using the J2 plug.

Turbine Primary Trip Terminal Board TRPG


125V dc
J1
JT1
x
x x 1 125 V dc (P)
Trip Solenoid1 or 4 2
x x 3 125 V dc (P)
Trip Solenoid 2 or 5 4
x x 5 125 V dc (P)
Trip Solenoid 3 or 6 6
x x 7
8
x 9 125 V dc (N)
125 V dc (N) x 10
x 12 x 11 J Port Connections
x x 13 JS1
14 Cables to TTUR
x x 15
16
x 17
x 18
x 19
x 20
x 22 x 21
x x 23
24
x

JR1
x
x x 25
26
x x 27
28
x x 29 J2
30
x x 31
32
Flame1 (L) x x 33 Flame1 (H)
34
x 36 x 35 Flame2 (H) Cable to TREG
Flame2 (L)
x x 37 Flame3 (H)
Flame3 (L) 38
x 39 Flame4 (H)
Flame4 (L) x 40
x 41 Flame5 (H) J4
Flame5 (L) x 42 335 V dc
Flame6 (L) x 43 Flame6 (H)
x 44 is provided
x 45 Flame7 (H) J5
Flame7 (L) x 46 from PSFD
PSVP
x 47 Flame8 (H)
Flame8 (L) x 48 J3 power supply
x

Up to two #12 AWG wires per Terminal blocks can be unplugged


point with 300 V insulation from terminal board for maintenance

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 611
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11.8.3 Operation
The I/O pack provides the primary trip function by controlling the relays on TRPG, which trip the main protection solenoids.
In TMR applications, the three inputs are voted in hardware using a relay ladder logic two-out-of-three voting circuit. The I/O
pack monitors the current flow in its relay driver control line to determine its energize or de-energize, vote or status of the
relay coil contact status. Supply voltages are monitored for diagnostic purposes. A normally closed contact from each relay on
TRPG is monitored by the diagnostics to determine its proper operation.

Note A metal oxide varister (MOV) and a current limiting resistor are used for noise suppression in each ETD circuit.

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The primary overspeed trip comes from the controller and is passed to the PTUR or YTUR, and then to TRPG. TRPG works
in conjunction with the TREG board, which is controlled by the PPRO or YPRO backup overspeed function. This
TRPG/TREG combination can drive three ETDs.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 613
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11.8.3.1 Flame Detectors
With the TRPG primary trip terminal board, the primary protection system monitors signals from eight flame detectors. With
no flame present the detector charges up to the supply voltage. The presence of flame causes the detector to charge to a level
and then discharge through the TRPG. As the flame intensity increases, the discharge frequency increases. When the detector
discharges, the primary protection system converts the discharged energy into a voltage pulse. The pulse rate varies from 0 to
1,000 pulses/sec. These voltage pulses are fanned out to all three modules. Voltage pulses above 2.5 V generate a logic high.
Pulses are counted over a 40 ms period in a counter to generate the flame detector pulse rate.

Note Refer to GEH-6721_Vol_II, the chapter Power Distribution Modules, the section, PSFD Flame Detector Power Supply.

11.8.4 Specifications
Item TRPG Specification
Trip solenoids 3 solenoids per TRPG
Solenoid rated voltage/current 125 V dc standard with up to 1 A draw
24 V dc is alternate with up to 3 A draw
Solenoid response time L/R time constant is 0.1 sec
Current suppression MOV on TREG
Current economizer Terminals for optional 100 Ω, 70 W economizing resistor on TREG
Control relay coil voltage supply Relays are supplied with 28 V dc from JR1, JS1, and JT1
Flame detectors 8 detectors per TRPG
Flame detector supply voltage/current 335 V dc with 0.5 mA per detector

11.8.5 Diagnostics
The I/O pack runs the TRPG diagnostics. These include feedback from the trip solenoid relay driver and contact, solenoid
power bus, and the flame detector excitation voltage too low or too high. A diagnostic alarm is created if any one of the
signals go unhealthy (beyond limits). Connectors JR1, JS1, and JT1 on the terminal board have their own ID device, which is
interrogated by the I/O pack, and if a mismatch is encountered, a hardware incompatibility fault is created. The ID device is a
read-only chip coded with the terminal board serial number, board type, revision number, and the plug location.

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11.9 TRPL Large Steam Turbine Primary Trip Board
The Large Steam Turbine Primary Trip (TRPL) terminal board is used for the primary overspeed protection of large steam
turbines. TRPL is controlled by the Primary Turbine Protection PTUR, and contains nine magnetic relays in three voting
circuits to interface with three trip solenoids (ETDs). TRPL works in conjunction with the TREL terminal board to form the
primary and emergency sides of the interface to the ETDs. These two terminal boards are used in a similar way as TRPG and
TREG are used on gas turbine applications.

Note The TRPL is not compatible with the Mark VIeS YTUR.

Up to three trip solenoids can be connected between the TREL and TRPL terminal boards. TREL provides the positive side of
the 125/24 V dc to the solenoids and TRPL provides the negative side. In addition, two manual emergency stop functions can
be connected.

11.9.1 Installation
The TRPL is controlled by PTUR I/O packs on the TTURH1C, and it only supports TMR applications. The I/O packs plug
into the D-type connectors on TTURH1C, which is cabled to TRPL.

➢ To install the TRPL board


1. Connect the wires for the three trip solenoids directly to the first I/O terminal block.
2. Connect the wires for the primary emergency stop and optional secondary emergency stop to the second terminal block.
3. Connect the trip solenoid power to plugs JP1, JP2, and JP3.
4. Install a jumper across terminals 9 and 11 for the PTR3 trip.
5. If a second emergency stop is required, remove the jumper from terminals 46 and 47 and connect the wires there.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 615
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TRPL Terminal Board Wiring

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11.9.2 Operation
TRPL is used for TMR applications only. Three separate power buses, PwrA, PwrB, and PwrC for solenoid power, are
brought in through connectors JP1, JP2, and JP3, and then distributed to TREL through connector J2.
The power buses have a nominal voltage of 125 V dc (70 to 140 V dc) or 24 V dc (18 to 32 V dc). The board includes power
bus monitoring (three buses). The maximum current per bus is 3 A.
Each of the three trip solenoids is controlled by three relays using 2 out of 3 contact voting. The relay output rating (for
100,000 operations) is as follows:

• At 24 V dc, 3 A, L/R = 100 ms, with suppression


• At 125 V dc, 1.0 A, L/R = 100 ms, with suppression
The trip circuits include solenoid suppression, associated solenoid voltage monitoring, and trip relay contact monitoring. In
the TRPL, the hardwired trip (E-Stop) and associated monitoring provides approximately 6.6 V dc to the PTUR when the K4
relays are picked up.

The E-Stop signal that is reported in the ToolboxST E-Stop Tab is latched by firmware
and needs a Master Reset to clear that status. A true indicates a completed E-Stop
circuit. A false indicates a loss of the E-Stop since the last Master Reset, not the
current state of the E-Stop circuit.
Attention

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 617
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TRPL Terminal Board

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11.9.3 Specifications
Item TRPL Specification
Trip solenoids 3 solenoids per TRPL

Solenoid rated voltage/current 125 V dc standard with up to 1 A draw


24 V dc is alternate with up to 3 A draw

Solenoid response time L/R time constant is 0.1 sec with suppression

Current suppression MOVs

Control relay coil voltage supply Relays are supplied with 28 V dc from JR1, JS1, and JT1

Primary Emergency Stop, manual One with optional secondary E-Stop

11.9.4 Diagnostics
The PTUR runs the TRPL diagnostics. These include feedback from the trip solenoid relay driver and contact, solenoid
voltage, and solenoid power bus. A diagnostic alarm is created if any one of the signals goes unhealthy (beyond limits). The
Jx1 connectors on the terminal board have their own ID device, which is interrogated by the PTUR, and if a mismatch is
encountered, a hardware incompatibility fault is created.

Note The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the
plug location.

11.9.5 Configuration
There are no switches or hardware settings on the terminal board. Terminals 9 and 11 must use a jumper to include the PTR 3
trip. Terminals 46 and 47 must use a jumper if only one manual emergency stop is required.

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 619
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11.10 TRPS Small Steam Turbine Primary Trip Board
The Small Steam Turbine Primary Trip (TRPS) terminal board is used for the primary overspeed protection of small and
medium size steam turbines. The TRPS is controlled by the Primary Turbine Protection (PTUR) I/O pack, and it contains
three magnetic relays to interface with three trip solenoids (ETDs). The TRPS works in conjunction with the TRES terminal
board to form the primary and emergency sides of the interface to the ETDs. These two terminal boards are used in a similar
way as TRPG and TREG are used on gas turbine applications, except with the following differences:

• Two-out-of-three voting is done in the relay drivers and not using relay contacts as with TRPG and TRPL.
• In a simplex application, the voting is bypassed and the relay drivers are controlled by a single signal from JA1.
• There are no economizing relays.
• There are no flame detector inputs.

Note The TRPS is not compatible with the Mark VIeS YTUR.

Up to three trip solenoids can be connected between the TRES and TRPS terminal boards. TRES provides the positive side of
the 125/24 V dc to the solenoids and TRPS provides the negative side. In addition, two manual emergency stop functions can
be connected.

11.10.1 Installation
The TRPS is controlled by PTUR I/O packs on the TTURH1C, and it supports simplex and TMR applications. The I/O packs
plug into the D-type connectors on TTURH1C, which is cabled to the TRPS.

➢ To install the TRPS board


1. Connect the wires for the three trip solenoids to the first I/O terminal block.
2. Connect the wires for the primary emergency stop and optional secondary emergency stop to the second terminal block.
3. Connect the trip solenoid power to plugs JP1, JP2, and JP3.
4. If a second emergency stop is required, remove the jumper from terminals 46 and 47, and connect the wires there.

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TRPS Terminal Board Wiring

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 621
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11.10.2 Operation
The TRPS is used for TMR and simplex applications. Three separate power buses, PwrA, PwrB, and PwrC for solenoid
power, are brought in through connectors JP1, JP2, and JP3, and then distributed to TRES through connector J2.
The power buses have a nominal voltage of 125 V dc (70 to 140 V dc) or 24 V dc (18 to 32 V dc). The board includes power
bus monitoring (three buses). The maximum current per bus is 3 A.
Each of the three trip solenoids is controlled by a relay driver. The relay output rating (for 100,000 operations) is as follows:

• At 24 V dc, 3 A, L/R = 100 ms, with suppression


• At 125 V dc, 1.0 A, L/R = 100 ms, with suppression
The trip circuits include solenoid suppression, associated solenoid voltage monitoring, and trip relay contact monitoring. In
the TRPS, the hardwired trip (E-Stop) and associated monitoring provides approximately 6.6 V dc to the I/O board when the
K4 relays are picked up.

The E-Stop signal that is reported in the ToolboxST E-Stop Tab is latched by firmware
and needs a Master Reset to clear that status. A true indicates a completed E-Stop
circuit. A false indicates a loss of the E-Stop since the last Master Reset, not the
current state of the E-Stop circuit.
Attention

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TRPS Terminal Board

PTUR, YTUR Turbine Specific Primary Trip GEH-6721_Vol_III_BG System Guide 623
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11.10.3 Specifications
Item TRPS Specification
Trip solenoids 3 solenoids per TRPS
Solenoid rated voltage/current 125 V dc standard with up to 1 A draw

24 V dc is alternate with up to 3 A draw


Solenoid response time L/R time constant is 0.1 sec with suppression
Current suppression MOVs
Control relay coil voltage supply Relays are supplied with 28 V dc from JR1, JS1, and JT1
Primary Emergency Stop, manual One with optional secondary E-Stop

11.10.4 Diagnostics
The PTUR runs the TRPx diagnostics. These include feedback from the trip solenoid relay driver and contact, solenoid
voltage, and solenoid power bus. A diagnostic alarm is created if any one of the signals goes unhealthy (beyond limits).
The Jx1 connectors on the terminal board have their own ID device, which is interrogated by the PTUR, and if a mismatch is
encountered, a hardware incompatibility fault is created.

Note The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the
plug location.

11.10.5 Configuration
There are no switches or hardware settings on the terminal board. Terminals 46 and 47 must use a jumper if only one manual
emergency stop is required; remove jumper if secondary E-Stop is used.
To enable the solenoid voltage feedback inputs in the ToolboxST application, connect the SUS#A and SUS#B pins on the
TRPS terminal board. If you are not using a TRES for emergency protection, connect a jumper between SUS1A and PwrA_
P1, SUS2A and PwrB_P1, and SUS3A and PwrC_P1. This connection is normally supplied through the J2 connector to the
TRES terminal board. SUS#B should be connected to the solenoid in the configuration. The solenoids may be connected to
the NO or NC contacts of the PTR, and the SUS#B pin should be connected to the same contact to enable the voltage
monitoring input.

Note For jumper configurations needed to enable solenoid voltage feedback, refer to GEI-100596 Mark VIe Control Backup
Turbine Protection (PPRO) Module Description, the section, TRES Turbine Emergency Trip.

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12 YSIL Core Safety Protection Module
12.1 YSIL Overview
The Mark VIeS Safety controller is used in a wide range of process control and turbo-machinery applications. When applied
as a control, protection, and monitoring system for heavy duty and aero-derivative gas turbines, it is configured with primary
and backup protection systems for tripping reliability. The YSIL module requires ControlST V5.04 or later.
The YSIL backup protection is a triple redundant SIL 3 capable system that will trip the turbine independent of the primary
protection system. Although it is independent, YSIL monitors each of the primary controllers for speed differential detection,
watchdog diagnostics, and to provide cross-tripping capability. In addition, all diagnostics are communicated to the main
controllers on the I/O network (IONet), which also facilitates operator-initiated tests such as online and offline overspeed
tests.
Turbine trips are generated from each of the three YSIL sections, which feed voted relay drivers and trip relays on the TCSA
board, and separate hydraulic trip solenoids in the trip manifold. Each trip solenoid is connected between one-out-of-three
primary trip sections on the TRPG or TRPA primary trip board and one-out-of-three backup trip sections on the TCSA
backup trip board. Therefore, each trip solenoid will de-energize to trip if either its primary trip relay or backup trip relay
de-energizes. Then, the turbine will trip if two-out-of-three trip solenoids de-energize. Due to the wide voltage range allowed,
external suppression should be provided at the solenoid coil.
The backup protection system consists of the following:

• TCSA is the main terminal board for the backup protection system.
• YSIL I/O packs (three total) with local processors and data acquisition boards mount on the TCSA board.
• WCSA is the required daughter board on the TCSA board.
• SCSAs are I/O extension boards (three are required) that connect to the WCSA by serial bus.
The YSIL module can only be used to control the positive side of the solenoids. YSIL is always used with either a
YTUR/TRPx or a PTUR/TRPx primary trip module for control of both sides of the solenoid. This is displayed in the
following figure.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 625


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PTUR I /O packs

YTUR can be used with
TTUR a Shared IONet
system.

I/O IONet

Primary
Protection
System

TRPG or TRPA

I/O

-V dc

Three Trip Solenoids


Backup Sync
Check Protection
+V dc

TCSA YSIL
<T>
WCSA
I/O IONet
< S>
I/O

<R>
Backup
Protection
Serial Buses
System
<T>
I/O SCSA
< S>
SCSA
I/O
<R>
SCSA
I/O

Turbine Protection with YSIL and YTUR or PTUR

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The backup protection system monitors up to nine (9) passive magnetic speed pickups, which enable inputs for up to three (3)
sets of three (3) redundant speed sensors from HP, IP, and LP shafts. It also supports interface for up to ten (10) Rueter-Stokes
flame detectors with 4-20 mA inputs or eight (8) inputs from Honeywell flame detectors with 335 V dc wetting.
Backup trip protection I/O includes:

• One E-Stop input (TCSA)


• Nine trip solenoid outputs (TCSA)
• Two TMR-voted drive contact outputs (TCSA)
For synchronizing, YSIL monitors two (2) single-phase PT inputs for the generator and line busses, and performs phase-lock
loop calculations for the K25A backup synch check function. Since the tuning constants are adjustable, limit checks are
provided to verify:

• Generator under-voltage
• Bus under-voltage
• Voltage error
• Frequency error (slip)
• Phase error
The synch check arms logic to enable the function, and provides bypass logic for dead-bus breaker closure scenarios.
Calculations for the primary phase-slip window are performed in the YTUR I/O packs and are independent of the backup
protection with separate PT inputs and a different methodology (zero voltage crossing to calculate phase, slip, and
acceleration). Different methodologies provide a more robust backup protection system to the primary synchronizing
calculations.
Additional inputs are available for general-purpose use including:

• 24, 48, 125 V dc contact inputs with optical isolation (TCSA and SCSA)
− Sequence of Events (SOEs), 1 ms time stamps
• 4-20 mA inputs for loop powered differential inputs and single-end inputs with +24 V dc sensor power provided. Support
for HART® communications is provided (SCSA).
• Thermocouple inputs (SCSA)

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 627


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YSIL I/O Types

Board I/O Type Quantity † Configuration


TCSA E-Stop Input 1 Fanned
3 Fanned
TCSA Solenoid Contact Outputs 9
6 Discrete
TCSA Voted Contact Outputs 2 Fanned

TCSA PT Inputs 2 Fanned

TCSA + WCSA Contact Inputs 20 Fanned

TCSA Speed Inputs 9 Discrete

TCSA Honeywell Flame Detectors 8 Fanned


GE Flame Detectors
WCSA or 10 Fanned
Analog Inputs

WCSA Speed Repeater Outputs 6 Discrete

SCSA Contact Inputs 3 / SCSA Discrete

SCSA Contact Outputs 2 / SCSA Discrete

SCSA Externally Powered Analog Inputs 6 / SCSA Discrete

SCSA Loop Powered Analog Inputs 10 / SCSA Discrete

SCSA Thermocouple Inputs 3 / SCSA Discrete


†Fanned Inputs: a field device signal is distributed in parallel to the three protection sections.
Fanned Outputs: output signals from the three protection sections are voted to create a singular field output.
Discrete Inputs: each signal from three field devices is connected to each of three protection sections.
Discrete Outputs: each signal from three protection sections is connected to each of three field devices.

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12.2 Mark VIeS YSIL Core Protection I/O Pack
The Core Safety Protection YSIL I/O pack and associated terminal boards provide an
independent backup overspeed protection system with a backup check for generator
synchronization to a utility bus. They also provide an independent watchdog function
for the primary control. The YSIL has Ethernet connections for IONet communications
with the control modules. This backup protection system consists of three TMR YSIL
I/O packs mounted to one TCSA terminal board with serial cables from the WCSA
connected to the three SCSA I/O expansion boards.

The YSIL I/O pack accepts three speed signals. It monitors the operation of the primary
control, and can monitor the primary speed as a sign of normal operation. The I/O pack
monitors the status and operation of the trip board through a comprehensive set of
feedback signals. If a problem is detected, YSIL activates the backup trip relays on the
trip board and activates a trip on the primary control. YSIL can drop out power to the
backup side of the trip relays. It can also send a cross trip signal to the primary
protection system.

The following redundancy options are supported:

• Triple Main Control with TMR backup protection, two out of three (2oo3), is
supported. Connect the first YSIL I/O pack to the R IONet, the second to the S
IONet, and the third to the T IONet.
• Dual Main Control with TMR backup protection is supported. Connect the first
YSIL I/O pack to the R IONet, the second to the S IONet, and the third to the R and
S IONets.

S CS
A I/
TCSA Main Board OE
xpa
+ nsio
WCSA Daughter Board n Bo
ar d
s

YSIL Backup Protection System

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 629


GE Internal
12.1.1 Installation
Three YSIL I/O packs mount directly on the TCSA terminal board. Connect the WCSA to the three SCSA I/O expansion
boards with shielded Cat 6 patch cords plugged into the RJ-45 jacks.

➢ To install the YSIL module


1. Securely mount the TCSA terminal board.
2. Mount the three SCSA boards, and connect the shielded Cat 6 patch cords between them and the WCSA daughter board.
For the serial cables, use shielded Cat 6 with a length not more than 2 meters.
3. Directly plug all three I/O packs into the J-ports on the TCSA.
4. Slide the threaded posts on the I/O packs (located on each side of the Ethernet ports) into the slots on the terminal
board-mounting bracket.
5. Securely tighten the nuts on the threaded posts locking the I/O pack in place.
6. Connect each YSIL I/O pack Ethernet port to the IONet with shielded Cat 6 patch cords based on network redundancy.
7. Refer to the TCSA and SCSA installation sections of this document for field wiring instructions.
8. Connect P1 on each YSIL I/O pack and SCSA module to the appropriate 28 V dc power supply and apply power. Each
one has inherent soft-start capability that permits plugging into a live 28 V dc power supply without affecting the rest of
the system.
9. Use the ToolboxST* application to configure the I/O pack as necessary.

12.1.2 Operation
Refer to the following sections in the GEH-6721_Vol_II, the chapter, Common Module Content:

• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• Common Safety Module Alarms

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12.1.2.1 Application-specific Hardware
The YSIL I/O pack has an internal, application-specific circuit board (BPRO) that contains hardware needed for the backup
trip function. This application board connects to the BPPC processor.

Pulse Rate ID Chip


Input
Conditioning
PT Input
BPPC
Digital Signal Processor
Inputs, E-Stop
Connect Isolated
to TCSA Contact Inputs
Relay
Command
BPPC
Outputs Processor

Pass Through to Local Power


Supplies
Option
Option Header

BPRO Application Board

12.1.2.2 Connectors
• A DC-62 pin connector on the YSIL I/O pack connects directly to the TCSA terminal board.
• An RJ-45 Ethernet connector named ENET1 on the side of the I/O pack is the primary IONet interface port.
• The second RJ-45 Ethernet connector named ENET2 on the side of the I/O pack only used to interface a second
redundant IONet for Dual Main Control configurations.
• The 3-pin P1 power connector on the side of the I/O pack is for supplying power to the I/O pack and TCSA and WCSA
terminal boards. Each YSIL module requires a power supply of 28 V dc, 1 A.

Note Solenoid output and contact input circuits are powered through a separate terminal board connector, not from the I/O
pack 28 V dc power source.

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GE Internal
12.1.3 YSIL I/O Pack Specifications
Feature Description
Speed Input Quantity Three input signals provided

Speed Input Range Pulse rate frequency range 2 Hz to 20 kHz

Speed Input Accuracy Pulse rate accuracy 0.05% of reading

Speed Input Sensitivity 2 to 2000 Hz, 25 mV pk


20 kHz, 300 mV pk

Scan rate 1200 Hz


Size 8.26 cm High x 4.19 cm Wide x 12.1 cm x Deep (3.25 in. x 1.65 in. x 4.78 in.)

Relative humidity 5 to 95% non-condensing

Micro-environment Pollution Degree 2


†Rated local ambient operating -30 to 65ºC (-22 to 149 ºF)
temperature (for enclosure design)

Shipping and Storage Temperature -40 to 85ºC (-40 to 185 ºF)

Vibration, seismic Universal Building Code (UBC) – Seismic Code section 2312 Zone 4 with operation without trip

Vibration, shipping Bellcore GR-63-CORE Issue 1, 1995 0.5 g, 5-100 Hz, 10 min. per octave,
1 sweep/axis x 3 axes, ~ 42 min./axis
3 shocks of 15 g, 2 ms impulse each repeated for all axes

Vibration, operating 1.0 g horizontal. 0.5 g vertical at 15 to 120 Hz, IEC 60721-3-2

Power supply 28 V dc, 1 A dc

Safety standards UL 508 Safety Standard Industrial Control Equipment


CSA 22.2 No. 14 Industrial Control Equipment
EN 61010-1 Safety Requirements for Electrical Equipment for Measurement, Control, and
Laboratory Use
IEC 61508:2010 parts 1-7 Functional Safety of Electrical/Electronic/Programmable Electronic
Safety-Related Systems

Printed Wire Board Assemblies UL 796 PWB Components Recognition


ANSI/IPC/EIA guidelines

Electromagnetic Compatibility (EMC) EN 61000-4-2 Electrostatic Discharge Susceptibility


EN 61000-4-3 (ENV 50140) Radiated RF Immunity
EN 61000-6-2 Generic Immunity Industrial Environment
EN 61000-4-4 Electrical Fast Transient Susceptibility
EN 61000-4-5 Surge Immunity
EN 61000-4-6 Conducted RF Immunity
EN 55011 Radiated and Conducted RF Emissions
ANSI/IEEE C37.90.1 Surge

Note † For further details, refer to the Mark VIe and Mark VIeS Control Systems System Guide, Volume I (GEH-6721_Vol_
I), the chapter Technical Regulations, Standards, and Environments.

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12.1.4 Diagnostics
The YSIL module performs the following self-diagnostic tests:

• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the analog feedback currents
• A comparison between the commanded state of each relay drive and the feedback from the commanded output circuit
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set

Note Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be
individually latched, and then reset with the RESET_DIA signal if they go healthy.

Trip Status LEDs


During normal I/O pack operation, all six trip application LEDs display green. An additional feature, rotating LEDs, can be
configured for the I/O pack. Using this feature, only one LED is turned on at a time, and walked up and down the six LEDs
creating a synchronized motion. The walking is regulated by the controller IONet, and synchronized across a set of three I/O
packs. This provides a quick visual indication of the system time synchronization status. There are six LEDs on the front left
side of the I/O pack to indicate trip status. All six LEDs stay off until the I/O pack is completely online.
RUN is green any time the I/O pack has energized the emergency trip relays. RUN turns red any time the I/O pack has
removed power from the emergency trip relays, voting to trip.
ESTP is green when the ESTOP input (if applicable) is in the run state. ESTP turns red any time ESTOP is invoked to
prevent pick up of the emergency trip relays. If the selected trip terminal board does not support ESTOP, then the LED
defaults to green.
OSPD turns red any time the I/O pack votes to trip in response to a detected overspeed condition on any of the three speed
inputs. OSPD is green when an overspeed condition is not present or latched.
WDOG is green when the trip status of all features is cleared. WDOG turns red when any of the following I/O pack trip
functions are enabled and active:

• Control Watchdog
• Speed Difference Detection
• Stale Speed Detection
• Frame Sync Monitor
SYNC is green when generator and bus voltage is synchronized and matched in amplitude. SYNC turns red when the I/O
pack determines that ac bus and generator bus voltage does not satisfy the synchronization requirements, and synchronization
has been requested by the system.
OPT is used for Composite Analog Trip status. If an SCSA Analog Trip is asserted, this LED will be red. When the trip is
reset, this LED will be green.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 633


GE Internal
12.1.5 YSIL Configuration

12.1.5.1 Parameters
Default values are in blue.

Name Value Description


PRGrouping 2Shafts_3Sensors Select grouping of speed inputs: 2 Shafts (3 speed sensors/shaft), 3 shafts (2
3Shafts_2Sensors speed sensors/shaft), 3 shafts (3 speed sensors/shaft)
3Shafts_3Sensors

LMTripZEnabl Enable On LM machine,when no PR on Z, Enable a vote for Trip


Disable
TA_Trp_Enab1 Enable Steam, Enable Trip Anticipate on ETR1
Disable
TA_Trp_Enab2 Enable Steam, Enable Trip Anticipate on ETR2
Disable
TA_Trp_Enab3 Enable Steam, Enable Trip Anticipate on ETR3
Disable
SpeedDifEn Enable Enable Trip on Speed Difference between Controller & YSIL
Disable
StaleSpdEn Enable Enable Trip on Speed from Controller Freezing
Disable
No_T_PS_Req Enable No Flame Detect Power Supply required for T
Disable
RotateLeds Enable Rotate the Status LEDs if all status are OK
Disable
LedDiags Enable Generate diag alarm when LED status lit
Disable
TurbineType Unused Turbine Type and Trip Solenoid Configuration
GT_1Shaft
GT_2Shaft
LargeSteam
LM_2Shaft
LM_3Shaft
MediumSteam
SmallSteam
Stag_GT_1Sh
Stag_GT_2Sh

RatedRPM_TA 3600 is default Rated RPM, used for Trip Anticipater and for Speed Diff Protection

AccelCalType 70 is default Select Acceleration Calculation Time (msec)

OS_Diff 5.0 is default Absolute Speed Difference in Percent For Trip Threshold

AMS_Mux_Scans_Permitted Enable AMS mulitplexer scans for command 1 and 2 are allowed (command 3 always
Disable allowed). Refer to the section, Asset Management System Tunnel Command for
more information.

Min_MA_Input 3.8 is default Minimum mA for Healthy 4–20 mA Input

Max_MA_Input 20.5 is default Maximum mA for Healthy 4–20 mA Input

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Name Value Description
Excitation_Volt 125V Contact Input Excitation (wetting) Voltage (SCSA and TCSA must use the same
24V voltage level)
48V
TemperatureUnits °C Used for SCSA Thermocouples and Cold Junctions
°F
SystemFreq 50Hz System frequency in Hz
60Hz

12.1.5.2 Variables

Name Direction Data Type Variable Description


L3DIAG_YSIL_R, S, or T Input BOOL I/O Diagnostic Indication

LINK_OK_YSIL_R, S, or T Input BOOL I/O Link Okay Indication

ATTN_YSIL_R, S, or T Input BOOL I/O Attention Indication

PS18V_YSIL_R, S, or T Input BOOL I/O 18V Power Supply Indication

PS28V_YSIL_R, S, or T Input BOOL I/O 28V Power Supply Indication

SCSA_Comm_Status_R, S, or T Input BOOL SCSA Serial Communication Status


L3SS_Comm Input BOOL Controller Communication Status
GT_1Shaft Input BOOL Config – Gas Turb,1 Shaft Enabled

GT_2Shaft Input BOOL Config – Gas Turb,2 Shaft Enabled

LM_2Shaft Input BOOL Config – LM Turb,2 Shaft Enabled

LM_3Shaft Input BOOL Config – LM Turb,3 Shaft Enabled

LargeSteam Input BOOL Config – Large Steam, Enabled

MediumSteam Input BOOL Config – Medium Steam Enabled

SmallSteam Input BOOL Config – Small Steam Enabled

Stage_GT_1Sh Input BOOL Config – Stage 1 Shaft, Enabled

Stage_GT_2Sh Input BOOL Config – Stage 2 Shaft, Enabled

IOPackTmpr_R, S, or T AnalogInput REAL IO Pack Temperature (deg F)

LockedRotorByp Output BOOL LL97LR_BYP - Locked Rotor Bypass

HPZeroSpdByp Output BOOL L97ZSC_BYP - HP Zero Speed Check Bypass

RefrFreq - Drive (Gen) Freq (Hz), used for non standard drive
DriveFreq AnalogOutput REAL config
Can be used for zero speed logic in Dead Bus Closure of breaker

Speed1 AnalogOutput REAL Shaft Speed 1 in RPM

ControllerWdog Output DINT Controller Watchdog Counter

CJBackup_R, S, or T AnalogOutput REAL CJ Backup Value °C/°F Based on configured TemperatureUnits

CJRemote_R, S, or T AnalogOutput REAL CJ Remote Value °C/°F Based on configured TemperatureUnits

TA_StptLoss Input BOOL (L30TA) True if Trip Anticipate overspeed setpoint from TR_Spd_
Sp is too far from rated RPM RatedRPM_TA

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GE Internal
12.1.5.3 Vars-Al Trip

Name Direction Data Type Vars-Al Description


AnalogInput01_Trip_R, S, or T Input BOOL SCSA Analog Input Trip Status

AnalogInput16_Trip_R, S, or T Input BOOL SCSA Analog Input Trip Status

12.1.5.4 Vars-Trip

Name Direction Data Type Vars-Trip Description


WatchDog_Trip Input BOOL Enhanced diag - Watch Dog trip

StaleSpeed_Trip Input BOOL Enhanced diag - Stale Speed trip

SpeedDiff_Trip Input BOOL Enhanced diag - Speed Difference trip

FrameMon_Flt Input BOOL Enhanced diag - Frame Monitor Fault

OverSpd1_Trip Input BOOL L12HP_TP - HP overspeed trip

OverSpd2_Trip Input BOOL L12LP_TP - LP overspeed trip

OverSpd3_Trip Input BOOL L12IP_TP - IP overspeed trip

Decel1_Trip Input BOOL L12HP_DEC - HP de-acceleration trip

Decel2_Trip Input BOOL L12LP_DEC - LP de-acceleration trip

Decel3_Trip Input BOOL L12IP_DEC - IP de-acceleration trip

Accel1_Trip Input BOOL L12HP_ACC - HP acceleration trip

Accel2_Trip Input BOOL L12LP_ACC - LP acceleration trip

Accel3_Trip Input BOOL L12IP_ACC - IP acceleration trip

HW_OverSpd1_Trip Input BOOL L12HP_HTP - HP Hardware detected overspeed trip

HW_OverSpd2_Trip Input BOOL L12LP_HTP - LP Hardware detected overspeed trip

HW_OverSpd3_Trip Input BOOL L12IP_HTP - IP Hardware detected overspeed trip

TA_Trip Input BOOL Trip Anticipate Trip,L12TA_TP

TSCA_Contact01_Trip Input BOOL Contact Trip (L5Cont01_Trip)


TSCA_Contact20_Trip Input BOOL Contact Trip (L5Cont20_Trip)

LPShaftLock Input BOOL LP Shaft Locked

PR1_Zero Input BOOL L14HP_ZE - HP shaft at zero speed

PR2_Zero Input BOOL L14LP_ZE - LP shaft at zero speed

PR3_Zero Input BOOL L14IP_ZE - IP shaft at zero speed

CompositeAnalog_Trip Input BOOL Composite Analog Trip Status

CompositeTrip Input BOOL Composite Trip Status

Estop_Trip Input BOOL ESTOP Trip (L5ESTOP1)

Config1_Trip Input BOOL HP Config Trip(L5CFG1_Trip)

Config2_Trip Input BOOL LP Config Trip(L5CFG2_Trip)

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Name Direction Data Type Vars-Trip Description
Config3_Trip Input BOOL IP Config Trip(L5CFG3_Trip)

Cross_Trip Output BOOL L4Z_XTRP - Control Cross Trip

12.1.5.5 Vars-Flame
Name Direction Data Type Vars-Flame Description
FlameDetPwrStat Input BOOL 335 V dc status

FD1_Flame Input BOOL Flame Detect present


FD8_Flame Input BOOL Flame Detect present

FD1_Level Output BOOL 1 = High Detection Cnts Level


FD8_Level Output BOOL 1 = High Detection Cnts Level

12.1.5.6 Vars-Contacts
Name Direction Data Type Description
TCSA_Contact01_TripEnab
↓ Input BOOL Config – Contact Trip Enabled – Direct

TCSA_Contact20_TripEnab

12.1.5.7 Vars-Speed

Name Direction Data Type Vars-Speed Description


Accel1_TrEnab Input BOOL Config – Accel 1 Trip Enabled

Accel2_TrEnab Input BOOL Config – Accel 2 Trip Enabled

Accel3_TrEnab Input BOOL Config – Accel 3 Trip Enabled

HW_OverSpd1_Setpt_Pend Input BOOL Hardware HP overspeed setpoint changed after power up

HW_OverSpd2_Setpt_Pend Input BOOL Hardware LP overspeed setpoint changed after power up

HW_OverSpd3_Setpt_Pend Input BOOL Hardware IP overspeed setpoint changed after power up

HW_OverSpd1_Setpt_CfgErr Input BOOL Hardware HP Overspd Setpoint Config Mismatch Error

HW_OverSpd2_Setpt_CfgErr Input BOOL Hardware LP Overspd Setpoint Config Mismatch Error

HW_OverSpd3_Setpt_CfgErr Input BOOL Hardware IP Overspd Setpoint Config Mismatch Error

OverSpd1_Setpt_CfgErr Input BOOL HP Overspd Setpoint Config Mismatch Error

OverSpd2_Setpt_CfgErr Input BOOL LP Overspd Setpoint Config Mismatch Error

OverSpd3_Setpt_CfgErr Input BOOL IP Overspd Setpoint Config Mismatch Error

PR1_Accel AnalogInput REAL HP Accel in RPM/SEC

PR2_Accel AnalogInput REAL LP Accel in RPM/SEC

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 637


GE Internal
Name Direction Data Type Vars-Speed Description
PR3_Accel AnalogInput REAL IP Accel in RPM/SEC

PR1_Max AnalogInput REAL HP Max Speed since last Zero Speed in RPM

PR2_Max AnalogInput REAL LP Max Speed since last Zero Speed in RPM

PR3_Max AnalogInput REAL IP Max Speed since last Zero Speed in RPM

PR1_Spd AnalogInput REAL PR1 - Speed sensor 1 (1A if three or two groups, see
PRGrouping parameter)

PR2_Spd AnalogInput REAL PR2 - Speed sensor 2 (2A if three groups, 1B if two groups,
see PRGrouping parameter)

PR3_Spd AnalogInput REAL PR3 - Speed sensor 3 (3A if three groups, 2A if two groups,
see PRGrouping parameter)

PR4_Spd AnalogInput REAL PR4 - Speed sensor 4 (1B if three groups, 1C if two
groups, see PRGrouping parameter)

PR5_Spd AnalogInput REAL PR5 - Speed sensor 5 (2B if three or two groups, see
PRGrouping parameter)

PR6_Spd AnalogInput REAL PR6 - Speed sensor 6 (3B if three groups, 2C if two
groups, see PRGrouping parameter)

OverSpd1_Test_OnLine Output BOOL L97HP_TST1 - OnLine HP Overspeed Test

OverSpd2_Test_OnLine Output BOOL L97LP_TST1 - OnLine LP Overspeed Test

OverSpd3_Test_OnLine Output BOOL L97IP_TST1 - OnLine IP Overspeed Test

OverSpd1_Test_OffLine Output BOOL L97HP_TST2 - OffLine HP Overspeed Test

OverSpd2_Test_OffLine Output BOOL L97LP_TST2 - OffLine LP Overspeed Test

OverSpd3_Test_OffLine Output BOOL L97IP_TST2 - OffLine IP Overspeed Test

TripAnticipateTest Output BOOL L97A_TST - Trip Anticipate Test

PR_Max_Reset Output BOOL Max Speed Reset

OnLineOverSpd1X Output BOOL L43EOST_ONL - On Line HP Overspeed Test,with auto


reset
OverSpd1_Setpt AnalogOutput REAL HP Overspeed Setpoint in RPM

OverSpd2_Setpt AnalogOutput REAL LP Overspeed Setpoint in RPM

OverSpd3_Setpt AnalogOutput REAL IP Overspeed Setpoint in RPM

OverSpd1_TATrip_Setpt AnalogOutput REAL PR1 Overspeed Trip Setpoint in RPM for Trip Anticipate Fn

HWOverSpd_Setpt1 AnalogOutput REAL HP Hardware Overspeed Setpoint in RPM

HWOverSpd_Setpt2 AnalogOutput REAL LP Hardware Overspeed Setpoint in RPM

HWOverSpd_Setpt3 AnalogOutput REAL IP Hardware Overspeed Setpoint in RPM

Repeater1 Input BOOL Speed Repeater Fault Status


Repeater6 Input BOOL Speed Repeater Fault Status

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12.1.5.8 Vars-Relay
The following are the contact feedbacks for the electromechanical safety relays. They must be closed (feedback True) for
current to flow in the ETRs.
Contact Feedbacks
Name Direction Data Type Description
Mech1_Fdbk Input BOOL Mechanical relay feedback, controls group 1 (K1–3)

Mech2_Fdbk Input BOOL Mechanical relay feedback, controls group 2 (K4–6)

Mech3_Fdbk Input BOOL Mechanical relay feedback, controls group 3 (K7–9)

The following are the Output Bits, which can be used to open ETR Relays. They are only available when the ETRs are
configured as Used and TripMode configuration as Enable (from the ETR Relay tab).

Output Bits
Name Direction Data Type Description
ETR1_Open Output BOOL ETR1 Open Command, True de-energizes relay

ETR2_Open Output BOOL ETR2 Open Command, True de-energizes relay

ETR3_Open Output BOOL ETR3 Open Command, True de-energizes relay

ETR4_Open Output BOOL ETR4 Open Command, True de-energizes relay

ETR5_Open Output BOOL ETR5 Open Command, True de-energizes relay

ETR6_Open Output BOOL ETR6 Open Command, True de-energizes relay

ETR7_Open Output BOOL ETR7 Open Command, True de-energizes relay

ETR8_Open Output BOOL ETR8 Open Command, True de-energizes relay

ETR9_Open Output BOOL ETR9 Open Command, True de-energizes relay

Note When the relay outputs are configured as TripMode Disable, the associated mechanical relay will pick up when any
of the three solid state relays pick up within that group, and drops when all the solid state relays are False in that group.

12.1.5.9 Vars-Sync

Name Direction Data Type Vars-Sync Description


GenFreq AnalogInput REAL DF2 hz

BusFreq AnalogInput REAL SFL2 hz

GenVoltsDiff AnalogInput REAL DV_ERR KiloVolts rms - Gen Low is Negative

GenFreqDiff AnalogInput REAL SFDIFF2 Slip hz - Gen Slow is Negative

GenPhaseDiff AnalogInput REAL SSDIFF2 Phase degrees - Gen Lag is Negative

SyncCheck_Enab Output BOOL L25A_PERM - Sync Check Permissive

SyncCheck_ByPass Output BOOL L25A_BYPASS - Sync Check ByPass


Used for dead bus breaker closure feature

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GE Internal
12.1.5.10 TSCA Contacts
Default values are in blue.

Name Direction Data Type Description ContactInput SeqOfEvents DiagVoteEnab TripMode

TCSA_Contact01 Contact Input 1


Used Enable Enable Disable
↓ Input BOOL ↓
Unused Disable Disable Enable
TCSA_Contact20 Contact Input 20

12.1.5.11 EStop
Default values are in blue.

Name Direction Data Type Description DiagVoteEnab


ESTOP_Fdbk Input BOOL ESTOP, inverse sense, True = Run Enable
Disable

12.1.5.12 ETR Relay


Default values are in blue.

Name Direction Data Type Description RelayOutput TripMode



K4 Output BOOL K4 Relay Ouput, Emergency Trip Relay when Trip Enable
Mode Enabled Disable ‡
K5 Output BOOL K5 Relay Ouput, Emergency Trip Relay when K4 N/A
Trip Mode Enabled

K6 Output BOOL K6 Relay Ouput, Emergency Trip Relay when K4 N/A


Trip Mode Enabled Used
K7 Output BOOL K7 Relay Ouput, Emergency Trip Relay when Trip Unused Enable
Mode Enabled Disable ‡
K8 Output BOOL K8 Relay Ouput, Emergency Trip Relay when K7 N/A
Trip Mode Enabled

K9 Output BOOL K9 Relay Ouput, Emergency Trip Relay when K7 N/A


Trip Mode Enabled

Note † TripMode on ETR Relay can only be selected in groups. K4-K6 are in one group, and K7-K9 are in another group.

Note ‡ When the relay outputs are configured as TripMode Disable, the associated mechanical relay will pick up when any
of the three solid state relays pick up within that group, and drops when all the solid state relays are False in that group.

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12.1.5.13 ETR Fdbk
Default values are in blue.

Name Direction Data Type Description SeqOfEvents DiagVoteEnab


K1_Fdbk Input BOOL Trip Relay Feedback

K2_Fdbk Input BOOL Trip Relay Feedback

K3_Fdbk Input BOOL Trip Relay Feedback

K4_Fdbk Input BOOL Normal / Trip Relay Feedback


Enable Enable
K5_Fdbk Input BOOL Normal / Trip Relay Feedback
Disable Disable
K6_Fdbk Input BOOL Normal / Trip Relay Feedback

K7_Fdbk Input BOOL Normal / Trip Relay Feedback

K8_Fdbk Input BOOL Normal / Trip Relay Feedback

K9_Fdbk Input BOOL Normal / Trip Relay Feedback

12.1.5.14 TSCA Relay


Default values are in blue.

Name Direction Data Description RelayOutput Output_State Output_Value


Type
TCSA_Relay01 Output BOOL Under control of SyncCheck if
SyncCheck is configured for
Relay01 HoldLastVal
Used On
Output_Value
TCSA_Relay02 Output BOOL Under control of SyncCheck if Unused Off
PwrDownMode
SyncCheck is configured for
Relay02

12.1.5.15 TCSA Relay Fdbk


Default values are in blue.

Name Direction Data Description SeqOfEvents DiagVoteEnab


Type
TCSA_Relay01Fdbk Input BOOL Relay Feedback Enable Enable
TCSA_Relay02Fdbk Input BOOL Relay Feedback Disable Disable

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 641


GE Internal
12.1.5.16 K25A
Default values are in blue.

Name Direction Data Type Description SynchCheck DiagVoteEnab


K25A_Cmd_Status Input BOOL Synch Check Relay Relay01 Disable
Relay02 Enable
Unused

GenFreqSource TurbRPM VoltageDiff FreqDiff PhaseDiff GenVoltage BusVoltage


PR_Std Default is Default is 2.8 Default is Default is Default is 6.9 Default is 6.9
SgSpace 3600 0.30 10.0

12.1.5.17 Pulse Rate


Default values are in blue.

Name Direction Data Description PRType PRScale HwOverSpd_Setpt OverSpd_Setpt


Type

PulseRate1 AnalogInput REAL HP speed Unused


Speed Default is
PulseRate2 AnalogInput REAL LP speed Default is 0 Default is 0
Speed_High 60
PulseRate3 AnalogInput REAL IP speed
Speed_LM

OverSpd_Test_Delta Zero_Speed Min_Speed Accel_Trip Accel_Setpt TMR_DiffLimt Dual_DiffLimit

Enable Default is 25
Default is 0 Default is 0 Default is 0 Default is 0 Default is 5
Disable

12.1.5.18 PT Inputs
The following PT inputs on the TCSA are fanned, single phase (75 to 130 V rms).

Name Direction Data Description PT_Input PT_Output TMR_DiffLimt


Type
GenPT_KVolts AnalogInput REAL Kilo-Volts RMS (Active only if
K25A is Enabled)
Default is 13.8 Default is 115 Default is 1
BusPT_KVolts AnalogInput REAL Kilo-Volts RMS (Active only if
K25A is Enabled)

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12.1.5.19 TCSA Analog Inputs
Default values are in blue.

Name Direction Data Type Description Input Low_Input Low_Value


FlameAnalogInput01
Used
↓ AnalogInput REAL Flame Analog Input Default is 4 Default is 0
Unused
FlameAnalogInput10

High_Input High_Value InputFilter DiagHighEnab DiagLowEnab TMR_DiffLimt


Used Enable Enable
Default is 20 Default is 100 Default is 5
Unused Disable Disable

12.1.5.20 Flame
Name Direction Data Type Description FlmDetTime
FlameInd1 0.040sec
Flame Intensity
↓ AnalogInput REAL 0.080sec
(Hz)
FlameInd8 0.160sec

FlameLimitHi FlameLimitLow Flame_Det TMR_DiffLimt


Used
Default is 5 Default is 3 Default is 5
Unused

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 643


GE Internal
12.1.5.21 SCSA Analog Inputs
Default values are in blue.

Name Data Type Description Input Low_Input Low_Value High_Input High_Value InputFilter
AnalogInput01_ REAL 4–20 mA Default is 4 Default is 0 Default is 20 Default is 100 0.75hz
R, S, or T 1.5hz

↓ 4–20ma 3hz
Unused 6hz
AnalogInput16_ REAL 4–20 mA Default is 4 Default is 0 Default is 20 Default is 100
12hz
R, S, or T
Unused

DiagHighEnab TripEnab TripSetPoint TripDelay HART_Enable HART_MfglD


DiagLowEnab HART_DevType
HART_DevID
Enable Enable Default is 0 Default is 100 Enable
Default is 0
Disable Disable (milliseconds) Disable

644 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
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12.1.5.22 SCSA Thermocouple Inputs
Default values are in blue.

Name Type ReportOpenTC


Thermocouple01_R, S, or T Unused
Type_J Fail_Hot
Thermocouple02_R, S, or T
Type_K Fail_Cold
Thermocouple03_R, S, or T ReportOpenTC sets the failed state of an open
Type_S
Type_T thermocouple to either hot (high) or cold (low). This does
Type_E not apply when Type = mV.
mV

12.1.5.23 SCSA Cold Junction


Default values are in blue.

Name Direction Data Description ColdJuncType


Type
ColdJunction_R, S, or T AnalogInput REAL Cold Junction for TCs 1 to 3 Local
Remote

12.1.5.24 SCSA Relay


Default values are in blue.

Name Direction Data Type RelayOutput Output_State Output_Value


SCSA_Relay01_ Output BOOL
R, S, or T HoldLastVal
Used On
Output_Value
SCSA_Relay02_ Output BOOL Unused Off
PwrDownMode
R, S, or T

12.1.5.25 SCSA Relay Fdbk

Name Direction Data Type Description


SCSA_Relay01Fdbk_R, S, or T Input BOOL Relay Feedback

SCSA_Relay02Fdbk_R, S, or T Input BOOL Relay Feedback

12.1.5.26 SCSA Contacts


Default values are in blue.

Name Direction Data Type Description ContactInput SignalInvert SignalFilter


SCSA_Contact01_ Input BOOL Contact Input
100ms
R, S, or T
10ms
Used Invert
↓ 20ms
Unused Normal
SCSA_Contact03_ Input BOOL Contact Input 50ms
R, S, or T Unfiltered

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 645


GE Internal
12.1.6 Asset Management System Tunnel Command
The Asset Management System (AMS) scans the HART-enabled field devices to determine health. This scan command
decision is made in the AMS (not the I/O pack). The AMS can send scan commands over channels 1, 2, or 3. The YSIL I/O
pack (or if using PHRA/YHRA) can be configured to either only allow for the scan command to occur on the default channel
3 or it can allow these scan commands to occur on any of the three channels (as determined by the AMS). By changing the
parameter, AMS_Mux_Scans_Permitted to Enable (it is disabled by default), the I/O pack will accept a change from channel
3 (which is the default channel).
From the perspective of the AMS, the multiplexer is the I/O pack (YSIL, YHRA, or PHRA). † In electronics, a multiplexer (or
mux) is a device that selects one of several analog or digital input signals and forwards the selected input into a single line.

Note † Retrieved Nov 13, 2014 from http://en.wikipedia.org/wiki/Multiplexer

HMI
Asset Management
System (AMS)
WorkstationST
Application

UDH

YSIL
TCSA

WCSA
IONet

Serial B us
TMR Mark VIeS
SCSA Controller Set
HART SCSA
Field Tunnel command sent from AMS to
Device S CSA I/O pack, then I /O pack sends status
of HART field devices to AMS
Example of YSIL HART Communications

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12.3 YSIL Specific Alarms
The following diagnostic alarms are specific to the YSIL I/O pack.

32
Description Control Watchdog Protection Activated

Possible Cause
An alarm indicates that the variable ContWdog has not changed for five consecutive frames. The alarm clears if changes are
detected for 60 seconds.

Solution

• Verify that the ContWdog is connected to the output of a DEVICE_HB block and that the block is located in a task which
is run at frame rate.
• Verify that the output signal from the block is changing at least once a frame.

33
Description Speed Difference Protection Activated

Possible Cause
This alarm only occurs if the parameter SpeedDifEn has been enabled. An alarm indicates that the difference between the
output signal Speed1 and the first I/O pack pulse rate speed is larger than the percentage of parameter Os_Diff for more than
three consecutive frames. The percentage is based off of the parameter RatedRPM_TA. The alarm clears if the difference is
within limits for 60 seconds for more than three consecutive frames.

Solution
Verify that the Speed1 signal is set up correctly in the ToolboxST Component Editor and that the source of the signal reflects
the primary (PTUR/YTUR) pulse rate speed.

34
Description Stale Speed Protection Activated

Possible Cause
The speed trip protection may be stale. This alarm can only occur if the parameter StaleSpdEn has been enabled. An alarm
indicates that the variable Speed1 has not changed for 100 consecutive frames. The alarm clears if the speed dithers for 60
seconds.

Solution
Verify that the Speed1 signal is set up correctly in the ToolboxST configuration, and that the source of the signal reflects the
primary (PTUR/YTUR) pulse rate speed.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 647


GE Internal
35
Description Frame Sync Monitor Protection Activated

Possible Cause
This alarm indicates that the communication with the controller was lost for at least five consecutive frames after the I/O pack
was online. The alarm clears if the frame synch is established for at least 60 seconds. This indicates that the I/O pack is not
synchronized with the Mark VIeS controller start-of-frame signal.

Solution
Verify that the IONet is healthy.

36
Description Configuration changed after power up - running with old configuration

Possible Cause
SIL related configuration parameters have changed after going online. The following parameters must not change after going
online:

• Pulse Rate tab, PRType


• Pulse Rate tab, PRScale
• TCSA Contacts tab, TripMode

Solution

• Set the parameters to their original state and download them to the YSIL if they have been changed inadvertently.
• If changes are required, cycle power from the I/O pack to get the hardware to accept the new values.

Note View the error log to determine which parameter may have changed. From the ToolboxST Component Editor Tree
View, right-click the I/O pack and select Troubleshooting–>Advanced Diagnostics–>Error log. Expand the tree menu and
double-click the error log.

37
Description [ ] SCSA Power supply unhealthy

Possible Cause The SCSA power monitor circuit detected a drop in voltage or a failed power supply.

Solution

• If the PPDA is available to monitor control cabinet power, check the PPDA for active alarms.
• Troubleshoot the power within the control cabinet. Begin with the power supplies and work towards the affected YSIL
module.
• Replace the SCSA.

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2400-2415
Description SCSA Analog Input [ ] Unhealthy

Possible Cause

• wetting to the transducer is wrong or missing.


• The transducer may be faulty.
• The analog input, current input is beyond the specified range.
• There may be an open or short-circuit on the input.
• Serial link to the SCSA is faulty.

Solution

• Check the field wiring and connections to the indicated analog input channel.
• Check the field device for failure.
• Check the serial link connection to the SCSA.

2416-2425
Description TCSA Analog Input [ ] Unhealthy

Possible Cause

• wetting to the transducer is wrong or missing.


• The transducer may be faulty.
• The current input is beyond the specified range.
• There may be an open or short-circuit on the input.
• WCSA daughter board is not seated properly.

Solution

• Check the field wiring and connections to the indicated analog input channel.
• Check the field device for failure.
• Verify that the WCSA daughter board is seated properly.

2426-2441
Description HART Input [ ] Not Initialized

Possible Cause An enabled HART input channel does not respond.

Solution

• Verify that the field device is attached to the correct I/O point.
• Using a HART handheld communicator, confirm that the field device is operating correctly and communicating.

2442-2457
Description HART Input [ ] Address Mismatch

Possible Cause The device ID in the ToolboxST configuration does not match the field device.

Solution

• Verify that the correct field device is connected to the I/O point.
• If so, either set the three ID fields to zero, or upload the device ID from the field device.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 649


GE Internal
2458-2473
Description HART Input [ ] Field Device Modified

Possible Cause The configuration of the HART field device was externally modified with either an Asset Management
System (AMS) or a HART handheld communicator.

Solution Determine what change was made and if OK, issue a system diagnostic reset to acknowledge the change and
clear the fault.

➢ To unlatch this diagnostic


1. From the ToolboxST application, Component Editor, Software tab, navigate to the SYS_OUTPUTS block (this block
is part of the Standard or SIL block library depending on controller type).
2. Set the RSTDIAG input BOOL to TRUE.
3. Wait for the I/O pack diagnostics to become inactive, and then set the RSTDIAG to FALSE.
4. From the Diagnostics tab, click Reset Alarms (as usual) to clear the alarm.

2474-2489
Description HART Input [ ] - field device not write protected in locked mode

Possible Cause The field device for this channel is not in a write-protected or secured mode while the controller is in
locked mode.

Solution Refer to the field device manual to determine how to place the device in the write-protected mode. All devices
used in a safety-protected system must be able to be placed in a read-only mode.

2490
Description HART Module Modified

Possible Cause The configuration of the HART multiplexer on the I/O pack was externally modified with either an Asset
Management System (AMS) or a HART handheld communicator.

Solution Determine what change was made and if OK, issue a system diagnostic reset to acknowledge the change and
clear the fault.

➢ To unlatch this diagnostic


1. From the ToolboxST application, Component Editor, Software tab, navigate to the SYS_OUTPUTS block (this block
is part of the Standard or SIL block library depending on controller type).
2. Set the RSTDIAG input BOOL to TRUE.
3. Wait for the I/O pack diagnostics to become inactive, and then set the RSTDIAG to FALSE.
4. From the Diagnostics tab, click Reset Alarms (as usual) to clear the alarm.

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2491
Description Flame Detector 335 V dc Voltage Supply Is Low

Possible Cause

• The 335 V dc voltage is low, (FlameDetPwrStat is False) and any flame detector is configured as Used.
• The WCSA daughter board is not seated properly.

Note The 335 V dc power required for the Honeywell flame detector is provided by the Flame Detector Power Supply
(PSFD). Refer to the ExtraCircuits tab for proper 335 V screw connections.

Solution

• If no flame detector is being used, verify that all the Flame_Det parameters are set to Unused.
• If only two PSFDs are being used, set the No_T_PS_Req parameter to Enable. This disables the check for power on the
HV335T connection (ExtraCircuits tab).
• If the PSFD voltage is low, replace the PSFD.
• Check the connections from the PSFD to the TCSA terminal board.
• Check the voltage at the TCSA side. If the voltage is reading proper value, replace TCSA.
• Verify that the WCSA daughter board is seated properly.

2492-2494
Description Overspeed [ ] firmware setpoint configuration error

Possible Cause There is a firmware overspeed limit mismatch between IO signal space limit and the configuration. The
current configuration file downloaded from the ToolboxST application has a different overspeed limit than the IO signal
OverSpd[ ]_Setpt.

Solution From the ToolboxST Component Editor, change the output signal designated in Vars-Speed tab,
OverSpd[ ]_Setpt to match the configuration value in Pulse Rate tab, OverSpd_Setpt.

2495-2497
Description Overspeed [ ] hardware setpoint configuration error

Possible Cause There is a hardware overspeed limit mismatch between IO signal space limit and the configuration. The
current configuration file downloaded from the ToolboxST application has a different overspeed limit than the IO signal
HWOverSpd_Setpt[ ].

Solution From the ToolboxST Component Editor, change the output signal designated in HWOverSpd_Setpt[ ] to
match the configuration value in Pulse Rate tab, HwOverSpd_Setpt.

2498-2500
Description Overspeed [ ] hardware setpoint changed after power up

Possible Cause This alarm always occurs when PulseRate[ ] HwOverSpd_Setpt is changed and downloaded to the I/O
pack after the turbine has started. It can also change if PRScale is changed to a decimal value and downloaded to the I/O
pack after the turbine has started.

Solution Confirm that the limit or scale change is correct. Restart the I/O pack to force the hardware overspeed to
re-initialize the limit.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 651


GE Internal
2501-2503
Description ETR [ ] local driver from hardware does not match commanded state

Possible Cause The driver output of the I/O pack for ETR relay does not match the commanded state. This indicates that
the I/O pack does not detect the relay driver feedback from the hardware.

Solution

• Reboot the I/O pack.


• Replace the I/O pack that has the diagnostic.

2510-2518
Description ETR [ ] voted relay driver feedback does not match commanded state

Possible Cause

• Feedback from the voted ETR relay driver feedback does not match the commanded state. This indicates that the
feedback from the TCSA (for ETRs 1-3) and WSCA hardware (for ETRs 4-9) does not agree with the commanded state
sent to the hardware.
• For ETR 4-9, the serial communications to WSCA could be faulty.

Solution

• Verify I/O packs are seated properly.


• Verify the WSCA is seated properly on the TSCA terminal board.
• Verify that the serial cables from SCSA to WCSA are properly connected.
• Replace the I/O pack that has the diagnostic.
• Replace the TSCA/WSCA terminal board set.

2529
Description LED - Turbine RUN Permissives Lost

Possible Cause The RUN LED is lit red on the I/O pack because one of the RUN permissives for the turbine has been
lost. The LedDiags parameter must be set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiags parameter.


• From the Vars-Trip tab, identify the condition that caused the trip.
• The trip condition must be cleared, and a master reset issued.

2530
Description LED - Overspeed Fault Detected

Possible Cause The Overspeed LED is lit on the I/O pack because of a detected Trip condition. The LedDiags
parameter must be set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiags parameter.


• The trip condition must be cleared, and a master reset issued.

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2531
Description LED - ESTOP Detected

Possible Cause The ESTOP LED is lit on the I/O pack because of a detected E-Stop signal. The LedDiags parameter
must be set to Enable to get this alarm.

Solution

• Verify the configuration of the LedDiags parameter.


• Remove the E-Stop condition, and issue a master reset.

2532
Description LED - Synch Fault Detected

Possible Cause The Synch LED is lit on the I/O pack because of a failure to synchronize. The LedDiags parameter
must be set to Enable to get this alarm. The K25A Relay must be enabled to support synchronization.

Solution

• Verify the configuration of the LedDiags parameter.


• Verify the K25A Relay is enabled.
• Issue a master reset to clear the alarm until the next failed attempt to synchronize.

2533-2534
Description SCSA Relay [ ] Driver does not match commanded state

Possible Cause SCSA Relay driver output does not match commanded state.

Solution

• Check for a serial communication problem (another diagnostic).


• Replace the SCSA terminal board.

2535-2536
Description TCSA Relay [ ] Driver does not match commanded state

Possible Cause TCSA Relay driver output does not match commanded state.

Solution

• Verify that the I/O pack is seated properly.


• Check the I/O pack configuration.
• Replace the I/O pack.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 653


GE Internal
2537-2538
Description SCSA Relay Contact [ ] Failure

Possible Cause SCSA relay contact feedback does not match the commanded state.

Solution

• Check the serial cable between WCSA and SCSA.


• Replace the I/O pack.
• Replace the SCSA.

2539-2540
Description TCSA relay [ ] command does not match voted output command

Possible Cause TCSA relay command does not match voted output command.

Solution

• Verify that the I/O pack is seated properly.


• Replace the I/O pack.
• Replace the TCSA terminal board.

2541
Description SCSA Wetting Voltage Not Valid, SCSA Contact Inputs Not Valid

Possible Cause

• The contact wetting voltage may not be connected to the SCSA through JE1 connector.
• The contact wetting voltage does not match the Excitation_Volt parameter.
• The contact wetting voltage applied to the SCSA is not within the acceptable range for the board.

Solution

• Check the contact wetting voltage connections to the SCSA.


• Verify the applied contact wetting voltage matches the Excitation_Volt parameter setting.
• Check the power distribution and wiring to ensure that correct wetting voltage is applied to the SCSA.

2542
Description TCSA Wetting Voltage Not Valid, TCSA Contact Inputs Not Valid

Possible Cause

• The contact wetting voltage may not be connected to the TCSA through J1 connector.
• The contact wetting voltage does not match the Excitation_Volt parameter.
• The contact wetting voltage applied to the TCSA is not within the acceptable range for the board.

Solution

• Check the contact wetting voltage connections to the TCSA.


• Verify the applied contact wetting voltage matches the Excitation_Volt parameter setting.
• Check the power distribution and wiring to ensure that correct wetting voltage is applied to the TCSA.

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2543-2545
Description SCSA Contact Input [ ] Unhealthy

Possible Cause The digital input self-test has failed on the SCSA.

• Serial link issue.


• Internal hardware issue.

Solution

• Check for other diagnostics related to serial links and resolve.


• Replace the SCSA.

2546-2565
Description TCSA Contact Input [ ] Unhealthy

Possible Cause The digital input self-test has failed.

• Serial link issue with the WCSA (for Contact inputs 8-20)
• Internal hardware issue.

Solution

• Check for other diagnostics related to serial links and resolve.


• Verify that the WCSA is seated properly on the TCSA.
• Replace the I/O pack.
• Replace the TCSA/WCSA board.

2566
Description LED - Composite Analog Trip

Possible Cause The Composite Analog Trip LED is lit on the I/O pack because an Analog Trip is detected. The
LedDiags parameter must be set to Enable to get this alarm.

Solution

• Verify that the LedDiags parameter should be set to Enable or Disable.


• From the Vars-AI Trip tab, examine the analog input that has tripped.
• Remove the Analog Trip condition, and issue a master reset.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 655


GE Internal
2594
Description SCSA Communication Failure

Possible Cause

• SCSA is not connected


• Serial link cable is faulty or too long
• Hardware failure on SCSA terminal board

Solution

Note To clear this diagnostic alarm, first correct the issue that is causing the serial communication failure and then reboot
the I/O pack.

• Verify that power is applied to the SCSA.


• Verify that the proper serial cable type and length are being used.
• Replace the serial cable.
• Replace the SCSA.

2595
Description WCSA Communication Failure

Possible Cause

• WCSA is not properly seated on the TCSA terminal board


• Serial link cable between WCSA and SCSA is faulty
• Hardware failure on WCSA daughter board

Solution

Note To clear this diagnostic alarm, first correct the issue that is causing the serial communication failure and then reboot
the I/O pack.

• Check for and resolve other diagnostics.


• Verify that the WCSA is properly seated on the TCSA.
• Verify that proper serial cable type and length are being used.
• Replace the serial cable.
• Replace the TCSA/WCSA terminal board.

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2596-2601
Description Speed Repeater [ ] Unhealthy

Possible Cause

• Speed repeater output is shorted.


• Hardware failure on WCSA daughter board

Solution

• Check the speed repeater wiring connections.


• Verify that the proper speed repeater jumper settings are being used.
• Replace the TCSA/WCSA terminal board.

2602
Description SCSA not connected on power up

Possible Cause

• The SCSA is not physically connected when the I/O pack powers on.
• Serial link cable between SCSA and WCSA is faulty

Solution

• Verify that the SCSA is connected to the WCSA in the correct serial link connector for R, S, or T.
• Verify that power is applied to the SCSA.
• Replace the serial link cable.
• Replace the SCSA terminal board.
• Replace the TCSA/WCSA terminal board.

2603
Description SCSA Barcode Mismatch

Possible Cause

• Bar code of the connected SCSA terminal board does not match the configuration in the ToolboxST application
• Failure in the electronic ID on SCSA

Solution

• Verify that the bar code configuration matches the hardware connected.
• Verify that the SCSA is connected to the WCSA in the correct serial link connector for R, S, or T.
• Replace the serial cable.
• Replace the SCSA terminal board.

2604
Description WCSA not connected on power up

Possible Cause WCSA daughter board is not properly seated on TCSA terminal board

Solution

• Verify that the WCSA is properly seated on the TCSA terminal board.
• Replace the TCSA/WCSA terminal board.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 657


GE Internal
2605–2606
Description SynchCheck is enabled with TCSA relay [ ], TCSA relay [ ] needs to be configured as Used

Possible Cause Synch Check is enabled and has selected one of the TCSA relays for driving K25A relay. The selected
TCSA relay is configured as Unused.

Solution Enable the respective TCSA relay as Used.

2607
Description Dual speed sensors mismatch: PR 1=[ ], PR 4=[ ]

Possible Cause The dual speed sensors are reporting speeds that differ by more than the configured Dual_DiffLimit
value.

Solution

• Verify that the Dual_DiffLimit value is set correctly.

Note The value is given in engineering units.

• Verify the connection and correct operation of the speed sensors.

2608
Description Dual speed sensors mismatch: PR 2=[ ], PR 5=[ ]

Possible Cause The dual speed sensors are reporting speeds that differ by more than the configured Dual_DiffLimit
value.

Solution

• Verify that the Dual_DiffLimit value is set correctly.

Note The value is given in engineering units.

• Verify the connection and correct operation of the speed sensors.

2609
Description Dual speed sensors mismatch: PR 3=[ ], PR 6=[ ]

Possible Cause The dual speed sensors are reporting speeds that differ by more than the configured Dual_DiffLimit
value.

Solution

• Verify that the Dual_DiffLimit value is set correctly.

Note The value is given in engineering units.

• Verify the connection and correct operation of the speed sensors.

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2610-2615
Description Speed sensor mismatch for PulseRate[ ]: Voted= [ ], PR{2:F0}_Spd= [ ]

Possible Cause A speed sensor is reporting speeds that differ by more than the configured Dual_DiffLimit value from
the voted PulseRate value.

Solution

• Verify that the Dual_DiffLimit value is set correctly.

Note The value is given in engineering units.

• Verify the connection and correct operation of the speed sensors.

2616-2618
Description Mechanical Relay [ ] driver feedback does not match commanded state

Possible Cause The driver output feedback for mechanical relay does not match the commanded state.

Solution

• Verify that the I/O pack is seated properly.


• Verify that the WCSA is properly seated on the TCSA.
• Replace the I/O pack.
• Replace the TCSA/WCSA terminal board.

2619-2621
Description Mechanical Relay [ ] contact feedback does not match commanded state

Possible Cause Feedback from mechanical relay contacts does not match the commanded state.

Solution

• Verify that the I/O pack is seated properly.


• Replace the I/O pack.
• Replace the TCSA/WCSA terminal board.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 659


GE Internal
2622
Description Invalid TCSA Analog Input Calibration, using defaults. Error [ ]

Possible Cause

Note Error number is for factory use only.

• Calculated constants are out of range of full scale analog value.


• Calculated constants are corrupted or not found on board.
• Cannot retrieve constants from board, board disconnected

Solution

• Check the hardware connections and reboot the I/O pack.


• Replace the TCSA/WCSA terminal board.
• Replace the I/O pack.

2623
Description Invalid SCSA Analog Input Calibration, Using Defaults - Error [ ]

Possible Cause

Note Error number is for factory use only.

• Calculated constants are out of range of full scale analog value.


• Calculated constants are corrupted or not found on board
• Cannot retrieve constants from board, board disconnected

Solution

• Check the hardware connections and reboot the I/O pack.


• Replace the SCSA terminal board.
• Replace the I/O pack.

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2624-2626
Description Thermocouple [ ] Unhealthy

Possible Cause

• Thermocouple mV input on terminal board exceeded thermocouple range or hardware limit.


• Thermocouple is configured as wrong type.
• Thermocouple is not connected or broken wire.
• Serial link to the SCSA is faulty.

Solution

• Verify that the thermocouple type matches the configuration.


• Check the field wiring, including shields.
• Verify that the I/O pack is seated properly.

Note The problem is usually not an I/O pack or terminal board failure if other thermocouples are working correctly.

• Check the thermocouple for an open circuit.


• Measure incoming mV signal and verify that it is not less than -63 mV.
• Check for serial communication problem (another diagnostic).

2627
Description Cold Junction Unhealthy, using backup

Possible Cause Local cold junction signal from SCSA is out of range. The normal range is -50 to 85 °C (-58 to 185 °F).

• If hardware is in the normal temperature range, then possible hardware failure of cold junction sensor on the SCSA
board.
• Serial link to the SCSA is faulty.

Solution

• Check for serial communication problem (another diagnostic).


• Replace the SCSA.

2628
Description Cold Junction [ ] value beyond specified temperature range

Possible Cause Cold junction temperature exceeded range of linearization (lookup) table. Refer to documentation for
specified cold junction ranges.

Solution

• Reboot the I/O pack.


• Replace the SCSA terminal board.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 661


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2629
Description Could not load programmable logic on TCSA: Error [ ]

Possible Cause

• Corrupted firmware download


• Corrupted programmable hardware image
• Hardware failure

Solution

• Download the firmware and application files.


• Reboot the I/O pack.
• Cycle power to all three I/O packs at the same time.
• Replace the TCSA/WCSA terminal board.

2630
Description Could not load programmable logic on SCSA: Error [ ]

Possible Cause

• Corrupted firmware download


• Corrupted programmable hardware image
• Hardware failure

Solution

• Download the firmware and application files.


• Reboot the I/O pack.
• Replace the SCSA.

2631-2686
Description Input Signal $V Voting Mismatch, Local=[ ], Voted=[ ]

Possible Cause Within the TMR I/O pack set, one of the same input signals does not match the other two of the same
input signals.

Solution

• Adjust the TMR threshold limit or correct the cause of the difference.
• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and network connections.
• Verify that the I/O pack is seated properly.
• Verify the operation of the device generating the specified signal.
• Verify the TCSA wiring and connections.
• Replace the I/O pack.
• Replace the TCSA terminal board.

662 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
2687-2978
Description Logic Signal $V Voting Mismatch

Possible Cause

• Within the TMR I/O pack set, one of the same logic signals does not match the other two of the same logic signals.
• A mismatch in ETR relay feedbacks could be due to a failure of the mechanical relay.

Solution

• Verify that the R, S, and T I/O pack configurations are equal to the ToolboxST configuration.
• Check the I/O pack power and network connections.
• Verify that the I/O pack is seated properly.
• Verify the operation of the device generating the specified signal.
• If mismatch in ETR relay feedback, verify proper operation of the mechanical relay.
• Check the TCSA wiring and connections.
• Replace the I/O pack.
• Replace the TCSA terminal board.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 663


GE Internal
12.4 TCSA + WCSA Core Protection Terminal Board
The Mark VIeS Core Protection TCSA main terminal board hosts three YSIL I/O packs, includes a WCSA daughter board
that has serial links to the SCSA I/O expansion boards, and provides the inputs and outputs as listed in the table, YSIL I/O
Types.

12.1.1 Installation
The TCSA accepts three I/O packs that are mounted directly onto it. This module assembly forms a self-contained backup trip
function. The WCSA daughter board comes assembled to TCSA, and is therefore not installed or replaced as a separate part.
The WCSA provides serial links to the three SCSAs. Attach a good common ground to the TCSA board. Refer to GEH-6721_
Vol_I for grounding practices.

664 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
GEH-6721_Vol_III_BG System Guide 665
to the SCSA Boards
Serial Connections

Top

WCSA Daughter Board


    



      







         

 


     
         

        


   

 

  
 


      


  

   

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YSIL Core Safety Protection Module


 
          
 
       
 
          
  
       

 

 

 




 

 





 

 

 

 

 

 
    
  

 

 

 
  


 
 
  
 
           
  
     
             

    
  
    

 

 

 

 
      





 

 



 


          
    
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1 25 











 



 
 

  

TB 1 24 TB 2   


 
 

 
 
 


  


48  

 
 

 
 
               
12.1.1.1

GE Internal
Mark VIe and VIeS Control Systems for GE Industrial Applications
YSIL I/O pack

YSIL I/O pack

YSIL I/O pack


Connector for

Connector for

Connector for
4 to 9
1 to 3
solenoids:
Power for

JR1
JS1
JT1

 

  
    
 
  

 
          


   
  
 
            
    
      

   

   

   
   


  
 
 
    
      
         
       
     
          
 
  
  
 
  
 
  
 
    
      
 
 
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contact inputs

        


 

 

 
   
      
      
  
   

  

  

   

  
       

  

  

  

  

   
  
   
 

   

 
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666 GEH-6721_Vol_III_BG
  
TB4

TB6 TB7 TB8
TB5 

  


 


      
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GE Internal
12.1.1.2 TCSA Field Wiring Terminal Definitions

Point Name Description Screw TCSA


Name Screw #
Relay01 Under control of SyncCheck if SyncCheck is configured for Relay01 DO1_NO 1
Relay01 Under control of SyncCheck if SyncCheck is configured for Relay01 DO1_COM 3
Relay01 Under control of SyncCheck if SyncCheck is configured for Relay01 DO1_NC 5
Relay02 Under control of SyncCheck if SyncCheck is configured for Relay02 DO2_NO 2
Relay02 Under control of SyncCheck if SyncCheck is configured for Relay02 DO2_COM 4
Relay02 Under control of SyncCheck if SyncCheck is configured for Relay02 DO2_NC 6

Contact01 Contact Input 1 CI1 7

Contact01 Contact Input Wetting Power EXCT1 9

Contact02 Contact Input 2 CI2 8

Contact02 Contact Input Wetting Power EXCT2 10

Contact03 Contact Input 3 CI3 11

Contact03 Contact Input Wetting Power EXCT3 13

Contact04 Contact Input 4 CI4 12

Contact04 Contact Input Wetting Power EXCT4 14

Contact05 Contact Input 5 CI5 15

Contact05 Contact Input Wetting Power EXCT5 17

Contact06 Contact Input 6 CI6 16

Contact06 Contact Input Wetting Power EXCT6 18

Contact07 Contact Input 7 CI7 19

Contact07 Contact Input Wetting Power EXCT7 21

Contact08 Contact Input 8 CI8 20

Contact08 Contact Input Wetting Power EXCT8 22

Contact09 Contact Input 9 CI9 23

Contact09 Contact Input Wetting Power EXCT9 25

Contact10 Contact Input 10 CI10 24

Contact10 Contact Input Wetting Power EXCT10 26

Contact11 Contact Input 11 CI11 27

Contact11 Contact Input Wetting Power EXCT11 29

Contact12 Contact Input 12 CI12 28

Contact12 Contact Input Wetting Power EXCT12 30

Contact13 Contact Input 13 CI13 31

Contact13 Contact Input Wetting Power EXCT13 33

Contact14 Contact Input 14 CI14 32

Contact14 Contact Input Wetting Power EXCT14 34

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 667


GE Internal
Point Name Description Screw TCSA
Name Screw #
Contact15 Contact Input 15 CI15 35

Contact15 Contact Input Wetting Power EXCT15 37

Contact16 Contact Input 16 CI16 36

Contact16 Contact Input Wetting Power EXCT16 38

Contact17 Contact Input 17 CI17 39

Contact17 Contact Input Wetting Power EXCT17 41

Contact18 Contact Input 18 CI18 40

Contact18 Contact Input Wetting Power EXCT18 42

Contact19 Contact Input 19 CI19 43

Contact19 Contact Input Wetting Power EXCT19 45

Contact20 Contact Input 20 CI20 44

Contact20 Contact Input Wetting Power EXCT20 46

ESTOP Wetting power for E-Stop TRP1H 64

ESTOP E-Stop input TRP1L 66

K1 K1 Relay Output, ETR, positive SOL1 47

K1 K1 Relay Output, ETR, negative N125XYZ 49

K2 K2 Relay Output, ETR, positive SOL2 48

K2 K2 Relay Output, ETR, negative N125XYZ 50

K3 K3 Relay Output, ETR, positive SOL3 51

K3 K3 Relay Output, ETR, negative N125XYZ 53

K4 K4 Relay Output, Normal or ETR, positive SOL4 52

K4 K4 Relay Output, Normal or ETR, negative N125B 54

K5 K5 Relay Output, Normal or ETR, positive SOL5 55

K5 K5 Relay Output, Normal or ETR, negative N125B 57

K6 K6 Relay Output, Normal or ETR, positive SOL6 56

K6 K6 Relay Output, Normal or ETR, negative N125B 58

K7 K7 Relay Output, Normal or ETR, positive SOL7 59

K7 K7 Relay Output, Normal or ETR, negative N125B 61

K8 K8 Relay Output, Normal or ETR, positive SOL8 60

K8 K8 Relay Output, Normal or ETR, negative N125B 62

K9 K9 Relay Output, Normal or ETR, positive SOL9 63

K9 K9 Relay Output, Normal or ETR, negative N125B 65


PulseRate1 HP speed PR1TTL 67

PulseRate1 HP speed PR1H 69

PulseRate1 HP speed PR1L 71

668 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
Point Name Description Screw TCSA
Name Screw #
PulseRate1 /
HP speed / LP speed PR2TTL 68
PulseRate2
PulseRate1 /
HP speed / LP speed PR2H 70
PulseRate2
PulseRate1 /
HP speed / LP speed PR2L 72
PulseRate2
PulseRate1 /
PulseRate2 / HP speed / LP speed / IP speed PR3TTL 73
PulseRate3
PulseRate1 /
PulseRate2 / HP speed / LP speed / IP speed PR3H 75
PulseRate3
PulseRate1 /
PulseRate2 / HP speed / LP speed / IP speed PR3L 77
PulseRate3
PulseRate1 /
HP speed / LP speed PR4TTL 74
PulseRate2
PulseRate1 /
HP speed / LP speed PR4H 76
PulseRate2
PulseRate1 /
HP speed / LP speed PR4L 78
PulseRate2
PulseRate2 LP speed PR5TTL 79

PulseRate2 LP speed PR5H 81

PulseRate2 LP speed PR5L 83


PulseRate2 /
PulseRate3 LP speed / IP speed PR6TTL 80
PulseRate2 /
PulseRate3 LP speed / IP speed PR6H 82
PulseRate2 /
PulseRate3 LP speed / IP speed PR6L 84

PulseRate3 IP speed PR7TTL 85

PulseRate3 IP speed PR7H 87

PulseRate3 IP speed PR7L 89

PulseRate3 IP speed PR8TTL 86

PulseRate3 IP speed PR8H 88

PulseRate3 IP speed PR8L 90

PulseRate3 IP speed PR9TTL 91


Not connected Not used 92

PulseRate3 IP speed PR9H 93

PulseRate3 IP speed PR9L 95


GenPT_KVolts Kilo-Volts RMS (Active only if K25A is Enabled) GENH 94

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 669


GE Internal
Point Name Description Screw TCSA
Name Screw #
GenPT_KVolts Kilo-Volts RMS (Active only if K25A is Enabled) GENL 96
BusPT_KVolts Kilo-Volts RMS (Active only if K25A is Enabled) BUSH 97
BusPT_KVolts Kilo-Volts RMS (Active only if K25A is Enabled) BUSL 98

FlameInd1 Flame Intensity (Hz) FL1H 99

FlameInd1 Flame Intensity (Hz) FL1L 101

FlameInd2 Flame Intensity (Hz) FL2H 100

FlameInd2 Flame Intensity (Hz) FL2L 102

FlameInd3 Flame Intensity (Hz) FL3H 103

FlameInd3 Flame Intensity (Hz) FL3L 105

FlameInd4 Flame Intensity (Hz) FL4H 104

FlameInd4 Flame Intensity (Hz) FL4L 106

FlameInd5 Flame Intensity (Hz) FL5H 107

FlameInd5 Flame Intensity (Hz) FL5L 109

FlameInd6 Flame Intensity (Hz) FL6H 108

FlameInd6 Flame Intensity (Hz) FL6L 110

FlameInd7 Flame Intensity (Hz) FL7H 111

FlameInd7 Flame Intensity (Hz) FL7L 113

FlameInd8 Flame Intensity (Hz) FL8H 112

FlameInd8 Flame Intensity (Hz) FL8L 114


335V_R Flame 335V R source HV335R 115
335V_R Flame 335V R source COM 116
335V_S Flame 335V S source HV335S 117
335V_S Flame 335V S source COM 118
335V_T Flame 335V T source HV335T 119
335V_T Flame 335V T source COM 120

670 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
12.1.1.3 WCSA Field Wiring Terminal Definitions

Point Name Description Screw WCSA


Name Screw #
SCOM 1
SCOM 2
SCOM 3
SCOM 4
FlameAnalogInput01 Flame Analog Input AI1_20MA 5
FlameAnalogInput01 Flame Analog Loop Power AI1_P24V 7
FlameAnalogInput02 Flame Analog Input AI2_20MA 6
FlameAnalogInput02 Flame Analog Loop Power AI2_P24V 8
FlameAnalogInput03 Flame Analog Input AI3_20MA 9
FlameAnalogInput03 Flame Analog Loop Power AI3_P24V 11
FlameAnalogInput04 Flame Analog Input AI4_20MA 10
FlameAnalogInput04 Flame Analog Loop Power AI4_P24V 12
FlameAnalogInput05 Flame Analog Input AI5_20MA 13
FlameAnalogInput05 Flame Analog Loop Power AI5_P24V 15
FlameAnalogInput06 Flame Analog Input AI6_20MA 14
FlameAnalogInput06 Flame Analog Loop Power AI6_P24V 16
FlameAnalogInput07 Flame Analog Input AI7_20MA 17
FlameAnalogInput07 Flame Analog Loop Power AI7_P24V 19
FlameAnalogInput08 Flame Analog Input AI8_20MA 18
FlameAnalogInput08 Flame Analog Loop Power AI8_P24V 20
FlameAnalogInput09 Flame Analog Input AI9_20MA 21
FlameAnalogInput09 Flame Analog Loop Power AI9_P24V 23
FlameAnalogInput10 Flame Analog Input AI10_20MA 22
FlameAnalogInput10 Flame Analog Loop Power AI10_P24V 24
Not connected Not used 25
Not connected Not used 26
Not connected Not used 27
Not connected Not used 28
SCOM SCOM 29
SCOM SCOM 30
Repeater1 Speed Repeater Positive SPD1_P 31
Repeater1 Speed Repeater Negative SPD1_N 33
Repeater1 Speed Repeater COM SCOM 35
Repeater2 Speed Repeater Positive SPD2_P 34
Repeater2 Speed Repeater Negative SPD2_N 36

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 671


GE Internal
Repeater2 Speed Repeater COM SCOM 32
Repeater3 Speed Repeater Positive SPD3_P 37
Repeater3 Speed Repeater Negative SPD3_N 39
Repeater3 Speed Repeater COM SCOM 41
Repeater4 Speed Repeater Positive SPD4_P 40
Repeater4 Speed Repeater Negative SPD4_N 42
Repeater4 Speed Repeater COM SCOM 38
Repeater5 Speed Repeater Positive SPD5_P 43
Repeater5 Speed Repeater Negative SPD5_N 45
Repeater5 Speed Repeater COM SCOM 47
Repeater6 Speed Repeater Positive SPD6_P 46
Repeater6 Speed Repeater Negative SPD6_N 48
Repeater6 Speed Repeater COM SCOM 44

12.1.2 E-Stop Input


The TCSA provides one E-Stop input signal that may be used to initiate a trip and open all solenoid outputs. When the E-Stop
input voltage drops below 22 V dc, FPGA logic on the BPRO board in the YSIL I/O pack first opens the solid state relays
(ETR K1–K9) in less than 10 ms, and then opens the series-redundant electromechanical safety relays ensuring that power is
disconnected from all of the solenoid outputs. The E-Stop trip is not included in the CompositeTrip signal.
The E-Stop input must be pulled up to a voltage above 22 V dc to close the solenoid trip relays. This may be accomplished by
connecting an external contact or a wire jumper from the E-Stop input field wiring terminal 66 to terminal 64, a 24 V dc, 100
mA output. This regulated E-Stop power output is fed from the TCSA 28 V dc power bus which is fed from the three YSIL
I/O pack 28 V dc power supplies through or-ing diodes on the TCSA.
TCSA shunt JP7 is used to select the safety relay coil power source. When JP7 is in position 1-2, coil power is fed from
E-Stop input terminal 66. When JP7 is in position 2-3, coil power is fed from the TCSA 28 V dc power bus.
The E-Stop input signal ESTOP_Fdbk is monitored by the YSIL I/O pack firmware and is always available in signal space.
There is no way to disable that input from within the I/O pack configuration. The user is required to connect a variable to
ESTOP_Fdbk (under the ToolboxST Estop tab) or a build error will occur.

E-Stop Input Specifications

Feature Description
Input filter ac voltage rejection Hardware filter, 50/60 Hz, applies ~7 ms delay for E-Stop function

Sequence of events (SOEs) 1 ms resolution (a connected variable to ESTOP_Fdbk is required)

Voter Disagreement Diagnostic Detection (VDDD) Enable/Disable


E-Stop input 18 to 32 V dc to run, 12 mA max.

E-Stop wetting power output 24 V dc, 100 mA dc

Delay to trip 10 milliseconds max.

672 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
LINEAR VOLTAGE
REGULATOR TB6.64
P28W TRP1H

24 V

7.5 V +
<R> <R>
CP FPGA
ATTEN.
TB6.66 TRP1L -
0.5

170 V 7.5 V +
<S> <S>
CP FPGA
-

7.5 V +
<T> <T>
CP FPGA
-

P28W

<R>
FPGA

2oo3
<S> VOTED
K6
FPGA RELAY
DRIVER

<T>
FPGA

<R>
FPGA

2oo3
<S> VOTED
K7
FPGA RELAY
DRIVER

<T>
FPGA

<R>
FPGA

2oo3
<S> VOTED
K8
FPGA RELAY
DRIVER

<T>
FPGA

E-Stop Input

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 673


GE Internal
12.1.3 Contact Inputs
The TCSA + WCSA provides 20 fanned TMR contact inputs rated for 140 V dc. These contact inputs are used to interrupt the
trip solenoid coil power. The trip logic includes a permissive bit and supports both normally closed (NC) and normally open
(NO) contacts.

TCSA Contact Input Specifications

Feature Description
Quantity 20
Optical isolation 1500 V rms, 2500 V rms for 1 minute

Input filter ac voltage rejection 60 V rms, 50/60 Hz

Loss of contact input wetting voltage

fault detection Non-responding contact input in test mode

Incorrect terminal board


Configuration Enable/Disable
Configurable SOEs 1 ms resolution
Voter Disagreement Diagnostics
Configurable
Detection (VDDD)

Trip mode Direct


Direct Trip Mode Trips directly when contact input is False.

Contact Inputs 140 V dc max., 3 mA

Input voltage surge withstand 1000 V pk for 8.3 milliseconds

Contact wetting power supply input 18-140 V dc, 60 mA

674 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
12.1.4 Solenoid Contact Outputs
Nine solid-state relay (SSR) outputs for controlling external solenoids are rated for up to 125 V dc. All nine of these outputs
can be used as Emergency Trip Relays (ETR K1-K9). K1-K3 are 2 out of 3 (TMR) voted. Outputs 4-9 can be used as regular
relay outputs when not in trip mode. Enabling K4 for trip mode enables ETRs on outputs 4-6. Enabling K7 for trip mode
enables ETRs on outputs 7-9. Each individual relay (even if in trip mode) can be disabled. From the ETR Relay tab, a variable
can be connected to signal space for use in controller application logic when these relays are in normal mode instead of trip
mode.

The contact outputs are polarity sensitive. Wire the circuit carefully to avoid
damaging these solid state relays. There is no contact or solenoid suppression. Add
external solenoid suppression to avoid damaging contacts and the TCSA.
Caution
TCSA Solenoid Contact Output Specifications

Feature Description
Number of relay channels 9
Rated voltage on relays 140 V dc max.
The solenoid power supply (125 V dc battery, for example) must be floating with respect to
earth. Refer to GEH-6721_Vol_II, the chapter PDM Power Distribution Modules.

Max load current 3.0 A at 40 °C


Above 40 °C, de-rate linearly to 2.0 A at 65 °C
8 A max combined load for K1–K3
8 A max combined load for K4-K9
Off-state leakage 4 mA max
Relay contact inrush 20 A for 10 milliseconds
Loss of relay solenoid wetting current

Coil current disagreement with command


Fault detection
Unplugged cable or loss of communication with I/O board: relays de-energize if
communication with associated I/O board is lost
Enable/Disable
Configuration
Configurable VDDD

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 675


GE Internal
P125XYZ
<J2.1

<R>
FPGA
SSR KA
2oo3
<S> VOTED
FPGA RELAY
DRIVER I A
V D
<T>
FPGA
SOL1 TB5.47

<R>
FPGA
SSR KA
2oo3
<S> VOTED
FPGA RELAY
DRIVER I A
V D
<T>
FPGA
SOL2 TB5.48

<R>
FPGA
SSR KA
2oo3
<S> VOTED
FPGA RELAY
I A
DRIVER V D
<T>
FPGA
SOL3 TB6.51

TCSA Solenoid Contact Outputs 1–3

676 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
P125B
<J3.1

SSR KB

FPGA
I A
V D

SOL4 TB6.52
P28W

SSR KB

<R> FPGA
FPGA I A
V D
2oo3
<S> VOTED
KA
FPGA RELAY SOL5 TB6.55
DRIVER

<T>
FPGA KB
SSR

<R> FPGA
FPGA I A
V D
2oo3
<S> VOTED
KB
FPGA RELAY SOL6 TB6.56
DRIVER

<T>
FPGA KC
SSR

<R> FPGA
FPGA I A
V D
2oo3
<S> VOTED
KC
FPGA RELAY SOL7 TB6.59
DRIVER

<T>
FPGA KC
SSR

FPGA
I A
V D

SOL8 TB6.60

SSR KC

FPGA
I A
V D

SOL9 TB6.63

TCSA Solenoid Contact Outputs 4–9

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 677


GE Internal
12.1.5 Speed (Pulse Rate) Inputs
The YSIL module provides nine speed inputs, magnetic pickup type. These pulse inputs can be configured to support a
variety of sensors per shaft applications (pulse rate groupings and turbine types).

TCSA Speed Input Specifications

Feature Description
Input Voltage -15 V to +15 V pk, max.

Speed input Range Pulse rate frequency range 2 Hz to 20 kHz

Speed Input Accuracy Pulse rate accuracy 0.05% of reading

2 to 2000 Hz, 30 mV pk
Speed Input Sensitivity
20 kHz, 300 mV pk

I/O pack firmware functions for the TCSA pulse inputs (speed inputs) are as follows:

• Pulse inputs have multiple PR types, including: Speed, Speed_High, Speed_LM. These configurations are different gears
that are used as part of the gear speed algorithm.
• A parameter to scale the Pulse inputs into engineering units
• H/W overspeed
• F/W overspeed
• Offline overspeed testpoint
• Zero speed threshold
• Min Speed threshold
• Acceleration trip enable and setpoint
• VDDD diagnostics
TCSA speed inputs are used in the YSIL firmware within the following protective speed functions:

• Firmware overspeed trip


• Hardware overspeed trip – performed by the FPGA
• LP Shaft Locked Detection
• Speed Difference Detection
• Maximum Speed Hold
• Overspeed test logic, large steam turbine, heavy-duty gas turbine, and aeroderivative gas turbine
• Zero speed
• Min speed
• Speed Deceleration and Trip
• Speed Acceleration and Trip
• Trip anticipate function

12.1.5.1 3Shafts_2Sensors, 2Shafts_3Sensors Pulse Rate Grouping


With 3Shafts_2Sensors and 2Shafts_3Sensors, only the first six speed sensors are used. All six speed inputs are
displayed by each YSIL I/O pack. Since the I/O pack is voting (not the Mark VIeS controller), fewer sensors are needed. This
allows for fanning of inputs and better diagnostics without relying on VDDD. This functionality is similar to the Mark VIe
PPRA I/O pack. Speed sensor connections are dependant on the PRGrouping configuration.

678 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
In 3 x 2 configuration, PulseRate(HP, LP, IP) each have two Pulse inputs. The I/O pack selects the max of the available pulse
inputs. There are nine terminal board points for these connections as displayed in the following table.

3 x 2 Configuration

Shafts Sensors/Pulse Inputs


1 2
PR1 PR4
HP PulseRate1
TB Pins
69 – 71 76 – 78

1 2
PR2 PR5
LP PulseRate2
TB Pins
70 – 72 81 – 83

1 2
PR3 PR6
IP PulseRate3
TB Pins
75 – 77 82 – 84

3 Shafts with 2 Sensors Per Shaft

Customer wiring connections


TB 3 / T B 4
Si g n a l I n V a r - Sp e e d
Internal YSIL connections
P R1 H , L
S1 P R 1 _ Sp d 6 9 ,7 1

YSIL <R>
P R2 H , L
H P Sh a f t S2 PR
4_ 7 0 ,7 2
Sp
d
P R3 H , L
d 7 5 ,7 7
_ Sp
P R2
P R4 H , L

S3 7 6 ,7 8
YSIL <S>
P R5 H , L
LP Sh a f t S4
PR 5 _ Sp d 8 1 ,8 3
d

P R6 H , L
Sp
3_

8 2 ,8 4
PR

S pd
6_ NC
PR
S5 8 7 ,8 9
YSIL <T>
NC
I P Sh a f t S6
8 8 ,9 0

NC
9 3 ,9 5

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 679


GE Internal
In 2 x 3 configuration, PulseRate(HP, LP) each have three Pulse inputs. The I/O pack selects the median of the available pulse
inputs. There are nine terminal board points for these connections as displayed in the following table.

2 x 3 Configuration

Shafts Sensors/Pulse Inputs


1 2 3
PR1 PR2 PR4
HP PulseRate1
TB Pins
69 – 71 70 – 72 76 – 78

1 2 3
PR3 PR5 PR6
LP PulseRate2
TB Pins
75 – 77 81 – 83 82 – 84

2 Shafts with 3 Sensors Per Shaft

Cust om er w ir in g co nn ect ion s


TB3/ TB4
Sign al In Var-Sp eed In t ern al YSIL co n nect io ns
PR1H,L
PR1_Spd
S1 69,71
YSIL <R>
PR2H,L
HP Sh af t S2 PR2_Spd
70,72

S3 d PR3H,L
_ Sp
P R3 75,77

PR4 PR4H,L
_ Sp
S4 d 76,78
YSIL <S>
PR5H,L
LP Sh af t S5 PR5_Spd
81,83

S6 PR6H,L
PR6_Spd
82,84

NC
87,89
YSIL <T>
NC
88,90

NC
93,95

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12.1.5.2 3Shafts_3Sensors Pulse Rate Grouping
With 3Shafts_3Sensors, all nine speeds are used, and are voted in the controller so that only PR1_Spd through PR3_Spd
are used. To view the individual speed signals, look at the prevote values. Each YSIL I/O pack only displays three speed
inputs. This PRGrouping is available for applications that want to support protection functions similar to PPRO, YPRO, or
VPRO. Speed sensor connections are dependant on the PRGrouping configuration.
In 3 x 3 configuration, PulseRate(HP, LP, IP) each have three Pulse inputs. The I/O pack selects the median of the available
pulse inputs. There are nine terminal board points for these connections as displayed in the following table.

3 x 3 Configuration

Shafts Sensors/Pulse Inputs


1 2 3
PR1 PR2 PR3
HP PulseRate1
TB Pins
69 – 71 70 – 72 75 – 77

1 2 3
PR4 PR5 PR6
LP PulseRate2
TB Pins
76 – 78 81 – 83 82 – 84

1 2 3
PR7 PR8 PR9
IP PulseRate3
TB Pins
87 – 89 88 – 90 93 – 95

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 681


GE Internal
Three Shafts with Three Sensors Per Shaft

Customer wiring connections


TB3/ TB 4
Sign al In Va r-Sp e e d
PR1 H,L In t e r n al YSIL co n n ec t i o n s
PR1 _Sp d -R
S1 6 9 ,7 1
YSIL <R>
PR2 H,L
HP Sh af t S2 PR1 _Sp d -S
7 0 ,7 2

S3 PR3 H,L
PR1_Sp d -T
7 5 ,7 7

PR4 H,L
PR2 _Sp d -R
S4 7 6 ,7 8
YSIL <S>
PR5 H,L
LP Sh af t S5 PR2 _Sp d -S
8 1 ,8 3

S6 PR6 H,L
PR2_Sp d -T
8 2 ,8 4

PR7 H,L
PR3 _Sp d -R
S7 8 7 ,8 9
YSIL <T>
PR8 H,L
IP Sh a ft S8 PR3 _Sp d -S
8 8 ,9 0

S9 PR9 H,L
PR3_Sp d -T
9 3 ,9 5

12.1.6 Speed Repeater Outputs

RS-232 TB2 of the WCSA (pins 31–48) provides six speed repeater outputs that support the
JP2 3Shafts_2Sensors and 2Shafts_3Sensors configurations. These speed repeaters correspond to
RS-485 speed inputs 1–6 (not 7–9). Each speed repeater output consists of an RS-232/RS-485 line driver
IC. The RS-232 output is a bipolar output, ± 5 V minimum, up to 250 mA, which can drive three
JP1 RS-232
typical Mark VIe magnetic speed pickup input circuits in parallel with acceptable signal fidelity.
RS-485 This class of circuit is well protected against disturbances on the output wiring. The repeater
output is a hardware reflection of the associated speed signal inputs, no firmware or software is
JP4 RS-232
required.
RS-485
The following information applies to the jumpers for speed repeaters:
JP3 RS-232
• Jumpers JP1 to JP6 apply to the six corresponding Vars-Speed signals, PR#_Spd.
RS-485
• The default position is RS-232, and is the only recommended position.
JP6 RS-232 • The RS-485 interface is only useful for connection to a RS-485 receiver.
RS-485

JP5 RS-232

RS-485
Jumpers

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12.1.7 Flame Detectors
There are two options for flame detector inputs:

• Honeywell Type
− Eight inputs on TCSA
− Uses the 335 V dc supply (PSFD). Refer to GEH-6721_Vol_II, the chapter PDM Power Distribution Modules for
information on the PSFD Flame Detector Power Supply.
• GE Reuter Stokes* Type
− Ten inputs on WCSA
− Uses 4-20 mA signal, loop powered

Note If not used for flame detectors, these 4-20 mA inputs are available as conventional analog inputs on the WCSA.

12.1.7.1 Honeywell Flame Detector


Eight flame detector inputs and a 335 V monitor is provided on the TCSA. These flame detector inputs are simple circuits
with clamped inputs.

Honeywell Flame Detector Input Specifications

Feature Description
Input Voltage 352 V pk, max.

Flame detector quantity 8


TB Low threshold 153 Volts
TB High threshold 168 Volts
Pulse rate range 0-20,000 Hz

The I/O pack firmware supports Honeywell flame detectors as follows:

• Pulses counted over a configurable, specified period generate a flame signal (Hz)
• Configurable parameters specify a high and low flame threshold
• Configurable VDDD
• Boolean Signals indicating presence of flame
• Analog signal (Hz) indicating flame intensity
The No_T_PS_Req parameter is related to 335 V flame detector power supply used for Honeywell flame inputs. The TCSA
allows for the connect of three (R,S, and T) 335 V power supply (PSFD inputs) that are used as wetting for Honeywell flame
detection. If using two 335 V power sources (R and S only), set the No_T_PS_Req parameter to Enable to prevent the <T>
I/O pack from annunciating the 335 V failure diagnostic. The diagnostic for Flame Detector Voltage Lower than 314.9 V is
also disabled on the <T> I/O pack.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 683


GE Internal
12.1.7.2 WCSA 4-20 mA Inputs
WCSA provides ten 4-20 mA inputs used for GE flame detectors. These 4-20 mA inputs are biased to 0 mA measurement on
an open wire / input.

Reuter Stokes Flame Detector Input Specifications

Feature Description
Transducer Power Output 24 V dc, 21 mA

Quantity 10
Input converter resolution 16-bit ADC, minimum
Range 0 to 20 mA (22.5 mA over-range)

Scan time Normal scan ≤ 5 ms (≥ 200 Hz)

Measurement accuracy 0.1% of full scale over the full operating temperature range

Noise suppression on inputs Uses a two-pole low pass filter, configurable for: 0.75, 1.5 Hz, 3 Hz, 6 Hz, 12 Hz

Common mode rejection AC is ≥ 60 dB at 60 Hz, with up to ±5 V common mode voltage


(CMR) DC is ≥ 80 dB with -5 to +7 peak V common mode voltage

Configuration Loop powered

12.1.8 Voted Contact Outputs


TCSA provides two TMR-voted drive contact outputs.

P 28

NC

COM
RLY
PLD
Drive
NO

Dry
Contacts

Contact Output
If configured under the sync check feature, the TCSA contact output cannot be driven through the application code. The sync
check feature has control of configured TCSA contact output relay and drive whenever the sync check permissive is met. The
connected variable output of this YSIL contact output can be connected to PTUR/YTUR to achieve sync functionality.

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CMD _ R

CMD _ S
P28

CMD _ T

P28
Coil

TMR Votes Drive Example


The I/O pack firmware functions for the TCSA contact outputs are as follows:

• Enable/Disable
• SOEs on relay feedbacks (10 ms resolution)
• Configurable action on loss of communication with Mark VIeS controller

TCSA Voted Contact Output Specifications

Feature Description
5 A, 30 V dc, resistive load
0.5 A, 100 V dc, resistive load
Contact ratings
0.3 A, 125 V dc, resistive load
5 A, 120 V ac, resistive load
Max response time on 25 ms

Contact life Electrical operations: 100,000

Fault detection Unplugged cable or loss of communication with I/O board

Input voltage 138 V ac, max.


Frequency 5 to 66 Hz

12.1.8.1 BUS and GEN Inputs


The TCSA provides BUS and GEN inputs for the sync check function. A description of this functionality is provided in the
YSIL chapter introduction. The configuration for these PT Inputs is also provided.

BUS and GEN Input Specifications


Feature Description
Input voltage 138 V ac, max.

Frequency 5 to 66 Hz

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 685


GE Internal
12.1.9 Diagnostics
Diagnostic tests are made on the TCSA terminal board as follows:

• Feedback from the shorted contact detector is checked, if a shorted relay is detected, an alarm is annunciated.
• Feedback from speed pickup fanning jumpers is checked. If there is a mismatch, then an alarm is annunciated.
• If any one of the above signals goes unhealthy, a composite diagnostic alarm occurs. The diagnostic signals can be
individually latched and then reset with the RESET_DIA signal if they go healthy.
• Terminal board connectors have their own ID device that is interrogated by the I/O pack. The ID device is a read-only
chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read
by the I/O pack and a mismatch is encountered, a hardware incompatibility fault is created.

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12.5 SCSA I/O Expansion Board
The YSIL module requires three SCSA I/O expansion boards be connected through serial links to the TCSA terminal board.
Each SCSA provides ten 4-20 mA inputs and ten 24 V dc transmitter power outputs, six 4-20 mA inputs for externally
powered transmitters, three thermocouple inputs, three contact inputs, and three contact outputs. Removable high-density,
Euro-style terminal blocks provide termination for field wiring. An on-board ID chip identifies the board to the YSIL I/O
packs for system diagnostic purposes. Each SSCA board requires a power supply of 28 V dc, 0.75 A.

12.1.1 Installation
The SCSA plus a plastic insulator mounts on a sheet metal carrier that then mounts on a DIN-rail. Optionally, the SCSA plus
insulator mounts on a sheet metal assembly and then bolts directly to a cabinet. I/O cable shield termination is provided
adjacent to the terminal blocks. Attach a good common ground to all SCSA boards. Refer to GEH-6721_Vol_I for grounding
practices. For the serial cables, use shielded Cat 6 with a length not more than 2 meters.

Equipment damage may result from reversed connections of wetting voltage, so verify
that the connects are correct before applying power. Some panels contain a mixture of
ac and dc wetting voltages. To prevent misoperation and damage to these terminal
boards, care must be taken to avoid connecting the ac wetting voltages to the terminal
board wetting voltage inputs. Furthermore, verify that the ac wetting voltages and the
Caution dc wetting voltages are not inadvertently cross-connected.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 687


GE Internal
12.1.1.1 Connectors

28 V dc power During power off, first remove JE1 wetting power, then remove P1 power.
This will maintain the life of the constant wetting current circuit. Wetting power

1 J1
Serial
P1
Port  1
3 connector
to WCSA JE1

 3

48

SCSA I/O Expansion Board

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12.1.1.2 SCSA Terminal Block Pin Definitions

Point Name Description Screw Name SCSA Screw #


AnalogInput01_R, S, or T Analog 4-20mA AI1_24V 1
AnalogInput01_R, S, or T Analog 4-20mA AI1_20MA 3
AnalogInput02_R, S, or T Analog 4-20mA AI2_24V 2
AnalogInput02_R, S, or T Analog 4-20mA AI2_20MA 4
AnalogInput03_R, S, or T Analog 4-20mA AI3_24V 5
AnalogInput03_R, S, or T Analog 4-20mA AI3_20MA 7
AnalogInput04_R, S, or T Analog 4-20mA AI4_24V 6
AnalogInput04_R, S, or T Analog 4-20mA AI4_20MA 8
AnalogInput05_R, S, or T Analog 4-20mA AI5_24V 9
AnalogInput05_R, S, or T Analog 4-20mA AI5_20MA 11
AnalogInput06_R, S, or T Analog 4-20mA AI6_24V 10
AnalogInput06_R, S, or T Analog 4-20mA AI6_20MA 12
AnalogInput07_R, S, or T Analog 4-20mA AI7_24V 13
AnalogInput07_R, S, or T Analog 4-20mA AI7_20MA 15
AnalogInput08_R, S, or T Analog 4-20mA AI8_24V 14
AnalogInput08_R, S, or T Analog 4-20mA AI8_20MA 16
AnalogInput09_R, S, or T Analog 4-20mA AI9_24V 17
AnalogInput09_R, S, or T Analog 4-20mA AI9_20MA 19
AnalogInput10_R, S, or T Analog 4-20mA AI10_24V 18
AnalogInput10_R, S, or T Analog 4-20mA AI10_20MA 20
AnalogInput11_R, S, or T Analog 4-20mA AI11_20MA 21
AnalogInput11_R, S, or T Analog 4-20mA AI11_RET 23
AnalogInput12_R, S, or T Analog 4-20mA AI12_20MA 22
AnalogInput12_R, S, or T Analog 4-20mA AI12_RET 24
AnalogInput13_R, S, or T Analog 4-20mA AI13_20MA 25
AnalogInput13_R, S, or T Analog 4-20mA AI13_RET 27
AnalogInput14_R, S, or T Analog 4-20mA AI14_20MA 26
AnalogInput14_R, S, or T Analog 4-20mA AI14_RET 28
AnalogInput15_R, S, or T Analog 4-20mA AI15_20MA 29
AnalogInput15_R, S, or T Analog 4-20mA AI15_RET 31
AnalogInput16_R, S, or T Analog 4-20mA AI16_20MA 30
AnalogInput16_R, S, or T Analog 4-20mA AI16_RET 32
Thermocouple01_R, S, or T Thermocouple Input TCH_CH1 38
Thermocouple01_R, S, or T Thermocouple Input TCL_CH1 40

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 689


GE Internal
Point Name Description Screw Name SCSA Screw #
Thermocouple02_R, S, or T Thermocouple Input TCH_CH2 41
Thermocouple02_R, S, or T Thermocouple Input TCL_CH2 43
Thermocouple03_R, S, or T Thermocouple Input TCH_CH3 42
Thermocouple03_R, S, or T Thermocouple Input TCL_CH3 44
Relay03_R, S, or T K1NC 45
Relay03_R, S, or T K1C 47
Relay03_R, S, or T K1NO 49
Relay04_R, S, or T K2NC 46
Relay04_R, S, or T K2C 48
Relay04_R, S, or T K2NO 50
Contact21_R, S, or T Contact Input EXCT1 33
Contact21_R, S, or T Contact Input CI1 35
Contact22_R, S, or T Contact Input EXCT2 34
Contact22_R, S, or T Contact Input CI2 36
Contact23_R, S, or T Contact Input EXCT3 37
Contact23_R, S, or T Contact Input CI3 39

12.1.2 Loop Powered 4-20 mA Inputs


The YSIL modules provides a total of 30 loop-powered 4-20 mA inputs, grouped as 10 separate simplex inputs on three
SCSAs. The Mark VIeS controllers use these inputs from three separate dedicated sensors/measurements as R, S, and T TMR
application voted signal inputs. On the SCSA terminal board, HART communication is available with the 4-20 mA inputs.
The following are I/O pack firmware configuration options for both loop and externally powered SCSA inputs.

• Inputs can be Enabled or Disabled


• Inputs can be scaled from mA to engineering units (Low/High mA and Low/High Value)
• Inputs have a configurable 2-pole low pass filter
• Inputs have a configurable high/low range health diagnostics
• Inputs can be HART-enabled
• I/O pack tripping functionality can be enabled to provide a configurable threshold and time delay for if the SCSA analog
input value goes above the threshold.
• The Analog Input tripping is TMR voted, which means the analog input for R, S, and T must be configured to match.

4-20 mA Loop Powered Input Specifications

Feature Description for 4-20 mA Loop Powered Inputs


Quantity 10 simplex analog inputs (YSIL module uses three SCSAs for a total of 30)

Redundancy Type 3 separate dedicated inputs, Mark VIeS controller application voted

Input converter resolution 16-bit ADC


Range 0 to 20 mA (22.5 mA over-range)

Transducer power output 24 V dc ± 3, 21 mA

Scan time Normal scan 5 ms (≥ 200 Hz)

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4-20 mA Loop Powered Input Specifications (continued)

Feature Description for 4-20 mA Loop Powered Inputs


Measurement accuracy 0.1% of full scale over the full operating temperature range

The I/O pack firmware has a configuration for the SCSA 2-pole low pass filter, configurable for:
Noise suppression on
0.75, 1.5 Hz, 3 Hz, 6 Hz, 12 Hz.
inputs
This filter is appropriate for use with HART messaging.

Common mode rejection AC is ≥ 60 dB at 60 Hz, with up to ±5 V common mode voltage


(CMR) DC is ≥ 80 dB with -5 to +7 peak V common mode voltage

12.1.3 Externally Powered 4-20 mA Inputs


The YSIL module provides 18 externally powered 4-20 mA inputs, grouped as six separate simplex inputs on three SCSAs.
The Mark VIeS controllers use these inputs from three separate dedicated sensors/measurements as R, S, and T TMR
application voted signal inputs. These 4-20 mA inputs are biased to 0 mA measurement on an open wire/input. The I/O pack
firmware provides configuration options for these inputs.

20mAx S

A2D +
250 ohms PLD
HART

S
Retx
Each SSCA has 6 of the above circuits

4-20 mA Externally Powered Input Specifications

Feature Specification
Quantity 6 simplex analog inputs (YSIL module uses three SCSAs for a total of 18 inputs)

Redundancy Type 3 separate dedicated inputs, Mark VIeS controller application-voted

Input converter resolution 16-bit ADC


Range 0 to 20 mA (22.5 mA over-range)

Transducer power output 24 V dc ± -3, 21 mA

Scan time Normal scan 5 ms (≥ 200 Hz)

Measurement accuracy 0.1% of full scale over the full operating temperature range

The I/O pack firmware has a configuration for the SCSA 2-pole low pass filter, configurable for:
Noise suppression on
0.75, 1.5 Hz, 3 Hz, 6 Hz, 12 Hz.
inputs
This filter is appropriate for use with HART messaging.

Common mode rejection AC is ≥ 60 dB at 60 Hz, with up to ±5 V common mode voltage


(CMR) DC is ≥ 80 dB with -5 to +7 peak V common mode voltage

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 691


GE Internal
12.1.4 SCSA Contact Outputs
The YSIL module provides six contact outputs, grouped as two separate simplex outputs each on the three SCSAs.

Channel -1 Channel -2

Normally Closed (NC) Normally Closed (NC)

TB1-45 TB1-46
K1 K2
COM Form-C COM Form-C
TB1-47 Dry Contacts TB1-48 Dry Contacts
K1 K2
TB1-49 TB1-50

Normally Open (NO) Normally Open (NO)

SCSA Contact Outputs

The following are I/O pack firmware configuration options for SCSA contact outputs:

• Outputs can be Enabled or Disabled


• Configurable action on loss of communication with the Mark VIeS controller. De-energize if loss of communication with
the I/O pack.

SCSA Contact Output Specifications

SCSA Feature Contact Output Description


Quantity 2 simplex contact outputs per SCSA (YSIL module consists of 3 SCSAs for a total of 6 contact outputs)

5 A, 30 V dc, resistive load


0.5 A, 100 V dc, resistive load
Relay contact rating
0.3 A, 125 V dc, resistive load
5 A, 120 V ac, resistive load

Max response time on 25 ms typical

Max response time off 25 ms typical

Contact material Silver cad-oxide


Electrical operations: 100,000
Contact life
Mechanical operations: 10,000,000

Loss of coil power

Fault detection Coil current disagreement with command

Relays de-energize if communication with associated I/O pack is lost

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12.1.5 SCSA Contact Inputs
A total of nine contact inputs are grouped as three separate simplex inputs each on the three SCSAs. Contact inputs are
powered by 24, 48, or 125 V dc and have optical isolation.

-
JE1
+

+
TB1

The following are I/O pack firmware configuration options for SCSA contact inputs:

• Inputs can be Enabled or Disabled


• The signal can be inverted
• Sequence of Events (SOEs) are configurable with 1 ms resolution
• Configurable de-bounce filter at 10, 20, 50, and 100 ms

SCSA Contact Input Specifications

SCSA Feature Contact Input Description


Contact inputs 140 V dc, max., 3 mA

Contact wetting power supply 18 to 140 V dc, 9 mA

Quantity 3 simplex contact inputs per SCSA (YSIL module consists of 3 SCSAs for a total of 9 contact inputs)

Input isolation from I/O pack Optical isolation min 1500 V on all inputs

Hardware filter
Input filter ac voltage rejection
60 V rms, 50/60 Hz at 125 V dc wetting

System dependent scan rate for control purposes


Frame rate
1,000 Hz scan rate for sequence of events monitoring

Loss of contact input wetting voltage

I/O pack fault detection Non-responding contact input in test mode

Incorrect terminal board

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 693


GE Internal
12.1.6 Thermocouple Inputs
Item Specification
Number of channels Three
Thermocouple Types E, J, K, S, T

Span -8 mV to +45 mV
Temperature Resolution 0.0625ºC (32.1125 ºF)

High/Low limit check


Fault Detection
Open wire detection

Cold Junction Sensor Range -40 to 125ºC (-40 to 257 ºF)

Cold Junction Resolution 12 bits


Scenario 1: ± 2.2ºC (4 ºF) range -20 to 100ºC (-4 to 212 ºF)

Scenario 2: -0.56 to -3.3ºC (-1 to -6 ºF) from -20 to 100ºC (-4 to 212 ºF)
Cold Junction Accuracy (ECJ)
Refer to the following sections for further details on these scenarios and temperature reading
accuracy options.
Conformity Error (EC) Maximum software error 0.14ºC (0.25 ºF)

53 µV (0.053 mV) (excluding Cold Junction reading and conformity error)


Measurement Accuracy (EM) Thermocouple reading error = ECJ + EC + EM * (T/mV)
where T/mV comes from NIST lookup tables for given thermocouple type and temperature

Cold Junction Accuracy Scenarios


Scenario 1: Assumes a 12 mA average for all 4-20 mA analog inputs and contact I/O loading has an insignificant effect. It
also assumes that the SCSA is using a plastic cover.
Scenario 2: Same I/O usage as Scenario 1 except the SCSA does not have a plastic cover and the cabinet uses forced-air
cooling. In this mode, the user should add + 2.2ºC (4 ºF) to thermocouple reading in the blockware, resulting in an accuracy
of ± 1.7ºC (3 ºF).

Cold Junction Internal or Remote Configuration


The YSIL provides the option to use either the internal Cold Junction sensor with the accuracy specification provided in the
Thermocouple Inputs table or read the Cold Junction temperature from the controller using the System Output variables,
CJRemote_R,S,T.
If the application needs better accuracy than provided by the internal Cold Junction, change the YSIL configuration parameter
ColdJuncType from Local to Remote (from the SCSA Cold Junction tab). Next, attach a more accurate Cold Junction signal
to the System Output variables CJRemote_R,S,T for the YSIL to use.

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12.1.7 Diagnostics
The YSIL I/O pack mounted on TCSA monitors the following functions on SCSA:

• Monitoring for loss of contact input wetting voltage or invalid wetting voltage for 24, 48, or 125 V dc on the terminal
board
• Detecting a non-responding contact input during diagnostic test
− In this test, the threshold is pulsed high and low and the response of the opto-couplers is checked. The test typically
runs once every four seconds.
• A test is run each frame to compare the commanded state of each relay drive and the feedback from the command output
circuit.
• Relay board specific feedback is read by the pack and processed every frame.
• Each input has system limit checking based on configurable high and low levels. These limits can be used to generate
alarms, to enable and disable, and as latching and non-latching. RSTSYS resets the out of limits.

YSIL Core Safety Protection Module GEH-6721_Vol_III_BG System Guide 695


GE Internal
Notes

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13 Application-specific Functions
13.1 Mark VIeS Safety Controller Black Channel
GE Oil & Gas can use black channel communications between two Mark VIeS Safety controllers to provide a SIL2 safety
loop for their off shore drilling application. The use of the Mark VIeS Safety controller in a subsea environment allows us to
introduce a series of safety functions locally to the well in the event of shutdown modes as defined by the client. Using the
controller locally gives the potential of creating a complete SIL2 rated loop that can perform safety functions with or
independently of the surface controller. Communication is made through DSl modems utilising a black channel for safety
instructions.

Note This application uses the Black_RX and Black_TX controller blocks. Refer to GEI-100691, Mark VIeS Safety
Controller Block Library.

13.2 Mark VIe PAIC Compressor Stall Detection


PAIC firmware includes gas turbine compressor stall detection, run at 200 Hz. Two stall algorithms can be selected. Both use
the first four analog inputs, scanned at 200 Hz. One algorithm is for small LM gas turbines and uses two pressure transducers.
The other algorithm is for heavy-duty gas turbines and uses three pressure transducers.
Real-time inputs are separated from the configured parameters for clarity. The parameter CompStalType selects the type of
algorithm required, either two transducers or three. PS3 is the compressor discharge pressure. A drop in this pressure (PS3
drop) indicates possible compressor stall. The algorithm also calculates the rate of change of discharge pressure, dPS3dt, and
compares these values with configured stall parameters (KPS3 constants).
The compressor stall trip is initiated by PAIC, which sends the signal to the controller where it is used to initiate a shutdown.
The shutdown signal can be used to set all the fuel shut-off valves (FSOV) through any relay output.

Application-specific Functions GEH-6721_Vol_III_BG System Guide 697


GE Internal
Small (LM) Gas Turbine Compressor Stall Detection Algorithm

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Heavy Duty Gas Turbine Compressor Stall Detection Algorithm

Application-specific Functions GEH-6721_Vol_III_BG System Guide 699


GE Internal
Stall Detection Variables
Variable Description
PS3 Compressor discharge pressure

PS3I Initial PS3


KPS3_Drop_S Slope of line for PS3I versus dPS3dt

KPS3_Drop_I Intercept of line for PS3I versus dPS3dt

KPS3_Drop_Mn Minimum value for PS3I versus dPS3dt

KPS3_Drop_Mx Maximum value for PS3I versus dPS3dt

KPS3_Delta_S Slope of line for PS3I versus Delta PS3 drop

KPS3_Delta_I Intercept of line for PS3I versus Delta PS3 drop

KPS3_Delta_Mx Maximum value for PS3I versus Delta PS3 drop

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Compressor Stall ToolboxST Configuration

Tab Item Description Choices or Type


Parameters CompStallType Select compressor stall algorithm (# of Unused, two_xducer, three_xducer
transducers)

Variables CompStall Compressor Stall variable Input BIT

Variables CompPressSel Selected Compressor Press, by Stall Algor. Input FLOAT

Variables PressRate Sel Selected Compressor Press rate, by Stall Algor. Input FLOAT

Variables CompStallPerm Compressor Stall Permissive Output BIT

13.3 PIOA ARCNET Interface Module


This module (without the PMVE) has been used for some retrofit jobs (outside of the Mark V migration projects) where a
new Mark VIe controller can interface with legacy exciters and static starters. For more information on this equipment, refer
to GEH-6800, Mark VIe Control Migration from Mark V and Mark V LM Control Application Guide.

Application-specific Functions GEH-6721_Vol_III_BG System Guide 701


GE Internal
Notes

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14 Remote Services
GE Measurement and Diagnostics (M&D) equipment can be installed at sites to provide remote services to customers. Refer
to GEH-6721 Volume I, the chapter Ethernet Networks for example network topologies.

14.1 On-Site Monitor (OSM)


The On-Site Monitor (OSM) is a computer used as a GE services portal to provide warranty and contractual service offerings.
The OSM has no operator interface and does not expose its data directly to the end user. The OSM monitors turbine-operating
data and continuously uploads the data to the GE Services Operations Center in Atlanta for analysis. Fleet analysis data is
collected to improve overall system availability, performance, and for root cause analysis. The computer uses local rules and
anomaly functions for events (for example events from vibration monitors or thermocouples) to enable a fast response and
quick notification to provide corrective actions.

Note Sites that are using all Mark VIe series controllers (turbine controllers, static starters, excitation) can have the OSM
also function as the RSG.

14.2 OnSite Support* Remote Services Gateway (RSG)


Remote diagnostics equipment can be installed at customer sites for the following purposes:

• Commissioning support during the initial startup/installation


• Diagnosing and troubleshooting of past and present control systems issues
The remote diagnostics equipment consists of a Remote Services Gateway (RSG), which is a diagnostics computer used for
remote support of GE control systems, a lockbox to restrict Ethernet traffic to the RSG, and various cable and connection
materials required for the site. The RSG is not intended to be used to make changes to the control system configuration.
Changes to the control system configuration should be made from the Mark VIe HMI, which is the customer owned
computer.

Note Refer to GEI-100760, OnSite Support Remote Diagnostics Equipment Installation Guide.

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Notes

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15 Legacy Equipment
15.1 UCCx Controllers

Note Mark VIeS Safety Controller V05.03 is the most current firmware version that still supports the UCCx platform.
Beginning with ConstrolST V07.02, the UCCx is installed from the ControlST Software Suite DVD by selecting the
ControlST Supplement Package installation option. Refer to the ToolboxST User Guide for Mark Controls Platform
(GEH-6703), the section Installation for more information.

The UCCx controller is a single-board computer that run the application code. The
controller mounts in a CompactPCI (CPCI) enclosure, and communicates with the I/O
packs through onboard I/O network interfaces. The CPCI enclosure typically consists
of a 6U high rack, one or two 3U high power supplies, a 6U high single board, and a
cooling fan. The rack backplane is CPCI compliant, but is used only to provide power
from the power supply(s) to the controller and cooling fan. The CPCI power supply
converts the bulk incoming power to ±12 V dc, 5 V dc, and 3.3 V dc. These voltages
are distributed to the controller(s) and fan through the backplane.

The CPCI power supply takes the incoming bulk power from the CPCI backplane and
creates ±12, 5, and 3.3 V dc. This power is provided to the backplane through one or
two Mate-N-Lok® connectors, for use by the power supply(s), controller(s) and cooling
fan. The power supply is a CPCI hot swap compliant 3U power supply using the
standard CPCI 47-pin connector. Two power supplies can be used to provide power
supply redundancy in an optional rack.

The controller operating system (OS) is QNX® Neutrino®, a real-time, multitasking OS


designed for high-speed, high-reliability industrial applications. The following
communication ports provide links to I/O modules, operator, and engineering
interfaces:

• Ethernet connection for the Unit Data Highway (UDH) for communication with
HMIs, and other control equipment. The UCCC controller has an additional
Ethernet connection for the Control Data Highway (CDH).
• RS-232C connection for setup using the COM1 port
• Ethernet connection for the R, S, and T I/O network
The I/O networks are private, special-purpose Ethernet that support only the I/O modules
and the controllers.

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15.1.1 Installation
The enclosure contains (at a minimum) a controller and a four-slot CPCI rack with either one or two power supplies. The
primary controller must be placed in the left-most slot (slot 1). A second, third, and fourth controller can be placed in a single
rack. If the slot 1 controller is removed, the other controllers will stop operating.
The CMOS battery is disconnected using a processor board jumper during storage to extend the life of the battery. When
installing the board, the battery jumper must be reinstalled. Refer to the specific UCCx module drawing for jumper location.
The battery supplies power to the CMOS RAM settings and the internal date and real-time clock. There is no need to set
CMOS settings since the settings are defaulted to the proper values through the BIOS. Only the real-time clock must be reset.
The initial date and time can be set using a system NTP server or ToolboxST* application.
If the board is the system board (slot 1 board) and other boards are in the rack, ejection of the system board will cause the
other boards to stop operating. It is recommended that power be removed from the rack when replacing any board in the rack.
Rack power can be removed by one of the following methods:

• In a single power supply unit, a switch is provided to disable the power supply outputs.
• In a dual power supply unit, both power supplies can be safely ejected to remove power.
• Unplug the bulk power input Mate-N-Lok connector(s) on the bottom of the CPCI enclosure.
• Use a remote disconnect switch.

Note Unlike the Mark VI control VME boards that provided only ejectors, the UCCC has injectors/ejectors at the bottom
and top of the module.

Before sliding the board in the rack, the top ejector should be tilted up and the bottom ejector should be tilted down. When the
connector on the backside of the board connects with the backplane connector, the injectors should be used to fully insert the
board. This is done by pushing down on the top injector and pulling up on the bottom ejector. Remember to finish the
installation by tightening the top and bottom injector/ejector screws. This provides mechanical security as well as a chassis
ground connection.

Note Failing to lock the injectors will prevent the controller from booting. When extracting the board, perform the insertion
process in reverse. See the next section on configuration before connecting the Ethernet cables. If a previous application is
loaded in the module, mis-operation can occur if the Ethernet addresses collide with other operating equipment.

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15.1.2 Operation
With the Mark VIeS Safety controller, if controller application code is changed and downloaded, a Branding of the new code
will be required. Changes that are not downloaded may cause a Brand change. Refer to GEH-6723, Mark VIeS Safety Control
Safety Instruction Guide, the section Application Code Branding. Minor modifications to the control software may be made
online without requiring a restart.
The controller is loaded with software specific to its application, which includes but is not limited to steam, gas, and
land-marine aeroderivative (LM), or balance-of-plant (BOP) products. It can run rungs or blocks. The IEEE® 1588 protocol is
used through the R, S, and T IONets to synchronize the clock of the I/O packs and controllers to within ±100 micro seconds.
External data is transferred to and from the control system database in the controller over the R, S, and T IONets.
In a simplex system, this includes process inputs/outputs to the I/O packs.
In a dual system:

• Process inputs/outputs to the I/O packs


• Internal state values and initialization information from the designated controller
• Status and synchronization information from both controllers
In a triple modular redundant (TMR) system:

• Process inputs/outputs to the I/O packs


• Internal state values from for voting and status and synchronization information from all three controllers
• Initialization information from the designated controller

15.1.2.1 Controller Battery


The UCCC uses a lithium battery to supply power to the CMOS (which contains the BIOS settings for the CPU board) and
the real-time clock when the controller is not on. Default CMOS settings are also stored in flash memory, so when the battery
reaches end-of-life, only the real-time clock functions are lost.
The lithium battery for the UCCC has a service life of 10 years. The battery is disabled in stock and can be disabled when
storing a controller. If the controller is stored with the battery disabled, its life expectancy is 10 years, minus the time the
controller has been in service. If the controller is stored with the battery enabled, the life expectancy drops to seven years
minus the time the controller has been in service. An expired battery can be replaced on the controller board.

➢ To replace the controller battery


1. Power down the CPCI rack. If the rack has a single power supply (version P1), turn off the power switch located on the
panel above the power supply.
2. Loosen the screws at the top and bottom of the controller.
3. Press down on the top ejector tab and pull up on the bottom ejector tab to disconnect the controller from the backplane.
Carefully pull the controller out of the CPCI rack.
4. Locate the battery near the top, inboard side of the controller.
5. Loosen the screw on the tab holding the battery and move it out of the way.
6. Slide the expired battery out of its enclosure, making note that the positive (+) side faces away from the controller.
7. Insert the new battery. Reposition the holding tab and tighten the screw.
8. Slide the controller back into the CPCI rack and secure it in place.
9. From the ToolboxST application, reset the real-time clock.

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15.1.2.2 Cooling Fan
A cooling fan is located in a tray at the bottom of the CPCI rack. The cooling fan can fail, causing temperatures to rise to a
level that will damage the controllers and power supplies. The cooling fan can be replaced without removing power to the
rack.

Note The controller automatically monitors the CPU core temperature and can be configured to continue to run, or to reboot
the controller into a low power failure state. Refer to the Mark VIe Controller Standard Block Library (GEI-100682), the
section Temperature Status (TEMP_STATUS).

➢ To replace the cooling fan


1. Loosen the two screws at the top of the door located at the bottom of CPCI rack.
2. Open the door and slide the old cooling fan out of the rack. There are no cables to remove. The fan assembly plugs
directly into the backplane.
3. Insert a new cooling fan into the guides in the compartment and push in firmly. If the fan is not completely in place, the
compartment door will not close.
4. Close the door and tighten the two screws at the top.

Replacing CPCI Cooling Fan

15.1.2.3 EPMC
The CPCI controllers support a single PCI Mezzanine Card (PMC) daughterboard called the IS200EPMC.
The IS200EPMC contains specific controller hardware functions as follows:

• Power supply monitoring


• Flash backed SRAM
• IONet Ethernets
• Ethernet physical layer packet snooping for precision time synchronization
The EPMC board plugs onto one of the PMC sites and communicates to the processor board through the PCI bus. The PCI
interface on the EPMC is PCI Rev 2.2 compliant and supports both 3.3 V and 5 V signal levels.

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15.1.2.4 UCCA Processor
The UCCA (IS215UCCAH3) is a single-slot board using a 650 MHz Intel® Celeron® processor. A 10Base-TX/100Base-TX
(RJ-45) Ethernet port provides connectivity to the Unit Data Highway (UDH). There are two PCI Mezzanine Card (PMC)
sites and a watchdog timer. The processor board is the compute engine of the Mark VIe controller. The IS215UCCAM03 is a
module assembly that includes the IS215UCCAH3 combined with 128 MB of flash memory, 128 MB of DRAM, and the
IS200EPMC.

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15.1.2.5 UCCC Processor
The IS215UCCCH4 is a single-slot CPCI controller board containing a 1.6 GHz Pentium® M processor. Two
10/100/1000Base-TX Ethernet ports provide connectivity to the UDH and an optional Control Data Highway (CDH). The
IS215UCCCM04 is a module assembly that includes the IS215UCCCH4 combined with 128 MB of flash memory, 256 MB
of DRAM, and the IS200EPMC.

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15.1.3 Specifications

15.1.3.1 UCCAM03 Specifications

Item UCCA Specification


Microprocessor Intel Ultra Low Voltage Celeron 650 MHz (8.3 Watts max)

128 MB DDR SDRAM through one SODIMM


Memory 256 KB L2 cache
Flash-backed SRAM - 8K allocated as NVRAM for controller functions
Flash 128 MB ComactFlash module (GE part #336A5196AAP8)

Operating System QNX Neutrino


Control block language with analog and discrete blocks; Boolean logic represented in relay
ladder diagram format. Supported data types include:
Boolean
16-bit signed integer
Programming 16-bit unsigned integer
32-bit signed integer
32-bit unsigned integer
32-bit floating point
64-bit long floating point

TCP/IP protocol for communication between controller and ToolboxST application


TCP/IP protocol used for alarm communication to HMIs
Primary Ethernet interface Ethernet Global Data (EGD) protocol for application variable communication with
(one port) CIMPLICITY® HMI and Series 90-70 programmable logic controllers (PLCs)
Ethernet Modbus® protocol supported for communication between controller and third-party
distributed control system (DCS)

EPMC Ethernet Interface Twisted pair 10Base-TX/100Base-TX, RJ-45 connectors:


(three ports) TCP/IP protocols used to communicate between controllers and I/O modules

Two micro-miniature 9-pin D connectors:


COM1 Reserved for diagnostics, 9600 baud, 8 data bits, no parity, 1 stop bit
COM2 Not used
For cabling, use one of the following:
COM ports GE-provided Ethernet cables, which are specifically designed for use in the Mark* controller
product family (GE part #342A4931ABP1) and a controller connector (GE part
#342A4931ABP2),
or a miniature D shell, null modem serial cable (GE part #336A3582P1), connected with a
micro-miniature pigtail (GE part #336A4929G1)

3.3 V dc, 3.5 A typical, 4.25 A maximum


Power requirements
5 V dc, 150 mA typical, 300 mA maximum
†Ambient rating for enclosure
0 to 60°C (32 to 140 ºF)
design
† Refer to GEH-6721_Vol_I, the chapter Technical Regulations, Standards, and
Technical Regulations,
Environments for additional equipment rating information depending on application
Standards, and Environments
requirements.

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15.1.3.2 UCCC Specifications

Item UCCC Specification


Microprocessor Intel Pentium M processor 1.6 GHz

256 MB DDR SDRAM through one SODIMM


128 MB CompactFlash Module
Memory
256 KB L2 cache
Flash-backed SRAM - 8K allocated as NVRAM for controller functions
Flash 128 MB ComactFlash module (GE part #336A5196AAP8)

Operating System QNX Neutrino


Control block language with analog and discrete blocks; Boolean logic
represented in relay ladder diagram format. Supported data types include:
Boolean
16-bit signed integer
Programming 16-bit unsigned integer
32-bit signed integer
32-bit unsigned integer
32-bit floating point
64-bit long floating point

Twisted pair 10Base-TX/100Base-TX, RJ-45 connectors:


TCP/IP protocol used for communication between controller and toolbox
TCP/IP protocol used for alarm communication to HMIs
Primary Ethernet Interface (2) EGD protocol for application variable communication with CIMPLICITY HMI and
Series 90-70 PLCs
Ethernet Modbus protocol supported for communication between controller and
third-party DCS

Twisted pair 10Base-TX/100Base-TX, RJ-45 connectors:


EPMC Ethernet Interface (3 ports)
TCP/IP protocols used to communicate between controllers and I/O packs

One accessible through RJ-45 connector on front panel


COM port For cabling use GE-provided Ethernet cables, which are specifically designed for
use in the Mark* controller product family (GE part #342A4931ABP1)

5 V dc (5%, -3%, 4.5 A (typical), 6.75 maximum)


3.3 V dc, (5%, -3%, 1.5 A (typical), 2.0 A maximum)
Power Requirements
12 V dc (5%, -3%), 50 mA maximum
-12 V dc (5%, -3%), 50 mA maximum

Shock: 10 Gs, 16 ms half sine, 6 axis, 10 pulses each


Mechanical Specifications
Vibration: 6 Gs rms (20-2000 Hz) random, 0.0185 G2 per Hz
† Ambient rating for enclosure design 0 to 50°C (32 to 122 °F)
† Refer to GEH-6721_Vol_I, the chapter Technical Regulations, Standards, and Environments for additional equipment rating
information depending on application requirements.

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15.1.4 Diagnostics
Refer to the figures in the UCCA Processor and UCCC Processor sections for an explanation of LEDs.

15.1.5 Configuration
The controller must be configured with a TCP/IP address prior to connecting to the UDH or CDH Ethernet. This is achieved
through the ToolboxST application and the COM1 serial port.

15.1.5.1 UCCA Jumper Settings

Airflow requirements as measured at the output side of the heat sink must be greater
than 400LFM to prevent overheating and potential damage to the board.

Caution

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UCCA Jumper

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15.1.5.2 UCCC Jumper Settings

Airflow requirements as measured at the output side of the heat sink must be greater
than 300LFM to prevent overheating and potential damage to the board.

Caution

UCCC Jumper

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15.1.6 CPCI Rack
The CPCI rack provides an enclosure for the controller, an enclosure for the power supplies(s), and a cooling system. The
rack backplane is only used to connect the power supplies to the controller and cooling fans.

CPCI Rack

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15.1.6.1 Installation
The CPCI rack is designed to be wall-mounted. Use the following drawing to determine the placement of the mounting
hardware and the enclosure space required.

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15.1.6.2 Operation
Bulk incoming power is supplied to the rack using one or two power connectors. The CPCI power supply converts the bulk
input to ±12 V dc, 5 V dc, and 3.3 V dc. These voltages are distributed to the controllers and fans through the backplane.

Available Rack Parts


Catalog # # Power Supplies Ports Power Inputs
336A4940CTP1 1 1
336A4940CTP2 2 2

The P1 version contains a on/off switch located in the upper right panel. The switch is connected to the disable outputs pin of
the power supply, which turns off power to the controllers and fans. The P2 version does not have a switch so power is
removed by ejecting the power supplies, disconnecting the incoming bulk power plugs or using a remote disconnect.

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15.1.6.3 Specifications

Item CPCI Rack Specification


Air flow provided 90 linear m (300 linear ft) per minute

Technical Regulations, Standards, Refer to GEH-6721_Vol_I, the chapter Technical Regulations, Standards, and
and Environments Environments for additional equipment rating information depending on application
requirements.

15.1.6.4 CPCI Component Replacement


➢ To replace the CPCI controller
1. Power down the CPCI rack. If the rack has a single power supply (version P1), turn off the power switch located on the
panel above the power supply. The power can also be removed by disconnecting the bulk power plug from the bottom of
the rack or by using a remote disconnect.
2. When two power supplies are used (version P2), loosen the top and bottom screw on each one. Press down the red tab in
the black release lever on each power supply. Press down on the black release lever and pull out to disconnect both power
supplies from the CPCI rack backplane. The power can also be removed by disconnecting the bulk power plugs from the
bottom of the rack or by using a remote disconnect.
3. Disconnect the IONet cables.
4. Disconnect the VLAN cable.
5. Loosen the screws at the top and bottom of the controller.
6. Press down on the top ejector tab and pull up on the bottom ejector tab to disconnect the controller from the backplane.
Carefully pull the controller out of the CPCI rack.
7. If still functional, remove the CompactFlash® from the old controller, and install it into the new one.
8. Carefully slide the new controller module into the CPCI enclosure.
9. Press up on the top injector/ejector tab and push down on the bottom injector/ejector tab to seat the controller connectors
with the receptacles on the backplane.
10. Tighten the screws at the top and bottom of the controller, securing it in the CPCI enclosure.
11. Power up the controller by turning on the power switch on CPCI enclosure with a single power supply or pushing in on
both power supplies and securing them on a CPCI enclosure using dual supplies.
12. Connect the IONet cables.
13. Connect the VLAN cable.
14. If using new flash memory, configure the new controller’s TCP/IP address.
15. From the ToolboxST application, verify the status of the controller. It should be in the controlling state with no warnings
or errors and online.
16. If the ToolboxST application does not go online or the controller is not in the controlling state, download to the controller
using the Download Wizard. Refer to GEH-6700, ToolboxST* User Guide for Mark VIe* Control.

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15.1.7 CPCI Power Supply(s)
The CPCI power supply takes the incoming bulk power from the CPCI rack and creates ±12, 5, and 3.3 V dc. This power is
provided to the backplane for use in the rack, mainly for the controller(s) and cooling fan.
The CPCI rack can hold one or two power supplies. The power supplies plug directly into the backplane using CPCI 47-pin
connector. The power supply(s) are hot swap compliant and can be safely removed with powering down CPCI rack.

15.1.7.1 Installation
➢ To remove the CPCI power supply(s)
1. Loosen the two screws holding the power supply in the rack. The bottom screw is located beneath the black ejection lever
at the bottom of the power supply faceplate.
2. Press down on the red tab inside the black ejection lever to release it.
3. Push the black release lever down to unplug the power supply from the backplane.
4. Slide the power supply out of the CPCI rack.

➢ To install a new CPCI power supply(s)


1. Slide the new power supply(s) into CPCI rack. Ensure the front of the power supply is flush with other components in the
enclosure.
2. Push the black ejection lever up. The red tab in the black ejection lever will snap up when the power supply is fully
inserted.
3. Tighten the top and bottom screws.

CPCI Power Supply

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15.1.7.2 Operation
The power supply is a CPCI Rev 2.11 hot swap compliant 3U power supply using the standard Positronic® 47-pin connector.
Remote sense and active current share on the +5 and +3.3 V dc outputs along with o-ring FETs allow it to be used in the dual
power supply CPCI rack. The ±12 V dc outputs use regular o-ring diodes for parallel operation in the dual rack.

Supported Power Supply

Catalog # Input Voltage


342A4920 20-36 V dc

15.1.7.3 Specifications

Item CPCI Power Supply Specification


Vibration Random vibration 10 Hz to 2 kHz, 3 axis (1 GRMS)

Incoming power 20-36 V dc

Output power 150 W (De-rated for 65°C [149 °F] operation and 3,000 m [10,000 ft] altitude)

Over temperature protection System shut down due to excessive internal temperature, automatic reset

Over voltage protection Latch style over-voltage protection


(110% minimum to 130% of V nom)

Overload protection Fully protected against output overload and short circuit. Automatic recovery upon
removal of overload condition
Agency Approvals UL 1950, UL 1950, EN60950 (TUV)

Dielectric withstand voltage Input to output per EN60950 (minimum 1500 V dc)

ESD susceptibility Per EN61000-4-2, level 4 (minimum 8 kV)

Radiated Susceptibility Per EN61000-4-3, level 3 (minimum 10 V/M)

EFT Burst Per EN61000-4-4, level 3 (minimum ±2 kV)

Input Surge Per EN61000-4-5, level 3. (Line to Line minimum 1 kV) (Line to Ground minimum 2 kV)

Conducted Disturbance Per EN61000-4-6, level 2 (maximum 3 V)

Insulation Resistance Input to Output (Nominal 10 M Ω)

Technical Regulations, Refer to GEH-6721_Vol_I, the chapter Technical Regulations, Standards, and
Standards, and Environments Environments for additional equipment rating information depending on application
requirements.

15.1.7.4 Diagnostics
20-36 dc Power Supply LEDs
LED Description
Power Solid green if all power supply outputs are OK

LED will turn off on any output failure


Alarm Solid red if one or more of the outputs have failed

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15.1.7.5 Power Supply Replacement
➢ To replace the CPCI power supply(s)
1. Loosen the two screws holding the power supply in the rack. The bottom screw is located beneath the black ejection lever
at the bottom of the power supply faceplate.
2. Press down on the red tab inside the black ejection lever to release it.
3. Push the black release lever down to unplug the power supply from the backplane.
4. Slide the power supply out of the CPCI rack.
5. Slide the new power supply(s) into the CPCI rack. Ensure the front of the power supply is flush with the other
components in the enclosure.
6. Push the black ejection lever up. The red tab in the black ejection lever will snap up when the power supply is fully
inserted.
7. Tighten the top and bottom screws. Refer to the figure CPCI Power Supply.

15.2 IONet Switches and SMF


For control system IONet topologies that span across panels, over longer distances, requiring the use of single mode fiber
(SMF), GE recommends using the ESWx switch with 65G2100–008 IR SFP single-mode transducer installed, however the
N-TRON® 508FXE2-SC-15 switch has also been used in the past.

Use of any other switch in this application may cause miss operation and/or damage to
the associated equipment.

Caution

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15.3 PAMB Acoustic Monitoring
The Acoustic Monitoring Input (PAMB) I/O module supported combustion dynamics for all frame 6, 7, and 9 gas turbines. It
included a UCCA processor. This equipment has reached end of life. The PAMC module is currently being used for acoustic
monitoring. Refer to GEI-100591, Mark VIe Control Acoustic Monitoring Input (PAMB) Module Description.

PAMB Specific Alarms


Alarm Alarm Description Possible Cause
ID
38 Flashdisk error: Unable to revert to flash Permanent configuration data on card is corrupted.
configuration after remote access Download firmware to card or replace UCCA.

41-58 Chan x: Open circuit test failed Open circuit detected for terminal board signal Sig x,
where x is the identified point. Check wiring and sensor.

61-78 Chan x: Bias nulling error Dc bias designated for sensor type is outside of range
detected for sensor. Check sensor type in configuration
parameter InputUse or check dc bias voltage on signal.

81-98 Chan x: Input signal saturated Peak input voltage is saturating input. Decrease
configuration parameter Gain for designated signal or
check for sensor problem.

101-118 Chan x: Sensor limit exceeded Peak input voltage exceeds limit for selected sensor type.
Check sensor type in configuration parameter InputUse or
check for sensor problem.

120 BAPA ADC reference input calibration failure BAPA failed calibration test at power up. Replace BAPA.

121-138 BAPA Chan x ADC calibration failure BAPA failed calibration test at power up. Replace BAPA.

139-156 BAPA Chan x DAC calibration failure BAPA failed calibration test at power up. Replace BAPA.

212 Communication failure with remote acquisition Link The PAMB/UCCA cannot communicate with remote
1 Code x acquisition hardware (terminal board and BAPA) through
the HSSL cable. Cable may be disconnected or connected
to wrong device, the BAPA may be powered down or bad,
or UCCA interface to the HSSL may be bad. Code
indicates specific failure type. Common codes include:
51xxxxxx: Remote acquisition target returning bad id
52xxxxxx: Download to BAPA failed
53xxxxxx: Link loss detected
54xxxxxx: Receive packet error detected
55xxxxxx: Transmit packet error (excessive naks)
57xxxxxx: No data received from BAPA in 5 seconds
213 EPMC H3 missing or bad on link Top mezzanine (EPMC) card on UCCA is missing or bad.

214 Serial Link 1 Configuration failure code x PAMB/UCCA failed to setup HSSL properly. Replace
UCCA.

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16 Replacement
16.1 Replacement Precautions
Replacement parts may contain static-sensitive components. Therefore, GE ships replacement parts in anti-static bags. When
handling electronics, make sure to store them in anti-static bags or boxes and use a grounding strap (per the following Caution
criteria).

To prevent component damage caused by static electricity, treat all boards with
static-sensitive handling techniques. Wear a wrist grounding strap when handling
boards or components, but only after boards or components have been removed from
potentially energized equipment and are at a normally grounded workstation.
Caution

To prevent personal injury or damage to equipment, follow all GE safety procedures,


Lockout Tagout (LOTO), and site safety procedures as indicated by Employee Health
and Safety (EHS) guidelines.
Warning

This equipment contains a potential hazard of electric shock, burn, or death. Only
personnel who are adequately trained and thoroughly familiar with the equipment
and the instructions should install, operate, or maintain this equipment.
Warning

Replacement GEH-6721_Vol_III_BG System Guide 725


GE Internal
16.1.1 Replacement Procedures
Troubleshooting should be done at the system component level. The failed system component (least replaceable part) should
be removed, returned to GE, and replaced with a known good spare. Do not attempt to repair system components.

To prevent electric shock, turn off power to the equipment, then test to verify that no
power exists in the board before touching it or any connected circuits.
Warning

To prevent equipment damage, do not remove, insert, or adjust board connections


while power is applied to the equipment.

Caution

Replacement of the terminal board requires full reconfiguration of the changed


component using the ToolboxST application. For this reason, it is generally preferable
to replace only the I/O pack unless the terminal board is known to be the point of
failure.
Attention

726 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
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16.1.1.1 Replacing a PCAA Module
➢ To replace the module
1. Verify that the replacement PCAA is compatible with one being replaced by comparing the model numbers on their
faceplates. The model number begins with an IS230P prefix. Most times the numbers will match, but sometimes newer
revisions are used to replace older PCAAs. Refer to the PCAA, Compatibility section for a list of hardware versions.
2. If replacing a PCAAH1A with a functionally compatible PCAAH1B:
a. The ControlST* software suite must be version 4.04 or higher. Verify the version and upgrade if needed. Refer to
GEI-100694, ControlST Upgrade Instruction Guide.
b. If needed, download the BPPC I/O Upgrade package from the GE Intelligent Platforms Support website or check the
version of ControlST software suite at site to verify that it contains the required I/O pack firmware version.
c. If needed, install the required I/O pack firmware to the HMI.
d. From the ToolboxST application, perform a Upgrade of the firmware. This modifies the .tcw system file on the HMI.
Do this prior to physically replacing the I/O pack hardware. Refer to GEH-6700 for help with this Upgrade feature.
3. Lockout tagout the field equipment and isolate the power source.
4. Check the voltage on each terminal and ensure no voltage is present.
5. Remove the power from connector P5.
6. If used, remove the cables to TCAT from connectors P1 and P2.
7. Unplug the Ethernet cables and mark the positions of the cables to remove.
8. Remove the JGPA power cable from PCAA connector P4.
9. Unplug all field wires from the PCAA module and fold them back out of the way.
10. Remove the screws securing the JGPA board from the PCAA base sheet metal and fold the JGPA board plus wiring out
of the way. Alternately the wires may be removed from JGPA and re-terminated once the PCAA is replaced.

Note In some applications, the JGPA is electrically isolated from the sheet metal to define a shield ground point other than
the sheet metal. If this is done, it is important to observe the correct mounting hardware and return the hardware to the same
condition when replacement is finished.

11. Remove the top and bottom mounting screws from the PCAA base sheet metal and remove the module.
12. For ease of access before mounting replacement module, copy all configuration jumper positions from the module that
has been removed to the replacement module.
13. If JGPA plus shield wires were left in place, remove the JGPA board from the replacement module if it is installed on the
module.
14. Mount the replacement module using the top and bottom mounting screws.
15. Mount JGPA on the module base sheet metal.
16. Plug the field wire terminals into the new PCAA module. It is always a good idea to quickly check that no wires became
loose in a terminal due to flexing and movement.
17. Replace the cables on P1, P2, and the Ethernet connection(s).
18. Complete the lockout and/or tagout procedure to re-establish power to the system.
19. Apply power to the module through the P4 connector.
20. If replacing a PCAAH1A with a PCAAH1B, use the ToolboxST application to change the hardware form.
21. Build and Download the application code and then the I/O pack firmware. PCAA does not auto-reconfigure.

Replacement GEH-6721_Vol_III_BG System Guide 727


GE Internal
16.1.1.2 Replacing a PAMC
➢ To replace the BAPA
1. Lockout tagout the field equipment and isolate the power source.
2. Unplug the HSSL Ethernet cable from the module to be removed. Cut loose any cord ties fastening the cable to the
module.
3. Unscrew the retaining hardware on the BAPA module and remove the module.
4. Place the new module in the location of the old module and securely tighten retaining hardware.
5. Plug the HSSL Ethernet cable into the module and secure the cable.

➢ To replace the UCSA (PAMC processor)


1. Lockout or tagout the field equipment and isolate the power source.
2. Disconnect the power cable at the top of the UCSA.
3. Unplug the Ethernet cables from the UCSA to be removed. Cut any cord ties fastening the cables to it.
4. Unscrew the retaining hardware on the UCSA, then remove it.
5. If the CompactFlash is still good, remove the flash part from the top of the UCSA. Insert the removed flash (from the old
UCSA) into the new UCSA.
6. If the old CompactFlash card cannot be put into the new UCSA, then setup the new PAMC for IONet communication.
Refer to GEH-6700, the chapter Special I/O Functions.
7. Place the new UCSA in the old location and securely tighten the retaining hardware.
8. Plug the Ethernet cables into the UCSA, then secure the cables.
9. Connect the power cable to the top of the UCSA.

➢ To replace the SAMB


1. Lockout and/or tagout the field equipment and isolate the power source.
2. Check the voltage on each terminal to ensure there is no voltage present.
3. Disconnect the power cables from P28-1 and P28-2.
4. Remove the BAPA module(s).
5. Gently pry the segments of the terminal blocks, containing the field wiring, away from the part attached to the terminal
board, leaving the wiring in place. If necessary, tie the blocks to the side out of the way.
6. Remove the screws securing the shield ground bus, leaving the shield grounds in place. If necessary, tie the shield bus to
the side out of the way.
7. Loosen the four mounting screws and remove the SAMB module.
8. Install a new IS210SAMB terminal board. Check to ensure all jumpers are in the same position as the ones on the old
board. If the new module has an attached shield ground bus, then remove the bus from the new module and discard.
Securely tighten the module to the panel.
9. Attach the shield ground bus to the SAMB.
10. Slide the segments containing field wiring into the terminal block. Ensure the numbers on the segment with the field
wires match the numbers on the terminal block. Press together firmly. Ensure all field wiring is secure.
11. Replace the BAPA modules and reconnect the power cables to P28-1 and P28-2.

728 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
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16.1.1.3 Replacing Other I/O Packs
Replacement of the terminal board requires full reconfiguration of the changed component using the ToolboxST application.
For this reason, it is generally preferable to replace only the I/O pack unless the terminal board is known to be the point of
failure.

➢ To replace an I/O pack


1. Verify that the replacement I/O pack is compatible with one being replaced.
2. If replacing a BPPB-based I/O pack with a functionally compatible BPPC-based I/O pack:
a. The site’s ControlST* software must be minimum V04.04. Verify the version and upgrade the site if needed.
b. If needed, download the BPPC I/O Upgrade package from the GE Intelligent Platforms Support website or check the
version of ControlST software suite at site to verify that it contains the required I/O pack firmware version.
c. If needed, install the required I/O pack firmware to the HMI.
d. From the ToolboxST application, perform an upgrade of the firmware. This modifies the .tcw system file on the
HMI. Do this prior to physically replacing the I/O pack hardware. Refer to the ToolboxST User Guide for Mark
Controls Platform (GEH-6703) for help with this upgrade feature.
3. Lockout tagout the field equipment and isolate the power source.
4. Remove the power to the I/O pack. For the PSVP, turn SW1 on the SSVP to the P28OFF position. For other I/O packs,
remove the power plug located in the connector on the side of the I/O pack.
5. Unplug the Ethernet cables and mark the positions of the removed cables.
6. Loosen the two mounting nuts on the I/O pack threaded shafts.
7. Unplug the I/O pack.
8. Plug in the replacement I/O pack. Make sure the I/O pack connector is fully seated on all sides, then properly tighten
mounting nuts.
9. Plug the Ethernet and power cables back into the I/O pack and re-energize the equipment.
10. If replacing a BPPB-based I/O pack with a functionally compatible BPPC-based I/O pack: from the ToolboxST
application, change the hardware form, build, and download the application code to the Mark VIe controller.
11. If replacing a Mark VIe PCAA: from the ToolboxST application, download the application code to the controller and then
download the firmware to the I/O pack (auto-reconfiguration is not available).
12. If replacing a Mark VIe P-pack (not PCAA) and the Auto-Reconfiguration feature is enabled, the Mark VIe controller
detects the I/O module running with a different configuration, and a reconfiguration file is automatically downloaded
from the controller to the new I/O module.

Replacement GEH-6721_Vol_III_BG System Guide 729


GE Internal
16.1.1.4 Replacing the SCLS
➢ To replace the board
1. Lockout and/or tagout the field equipment and isolate the power source.
2. Check the voltage on each terminal and ensure no voltage is present.
3. Remove the power from connector P1 on PCLA.
4. Unplug the Ethernet cables and mark the positions of the cables to remove.
5. Unplug SCLT connection-cable from J2 connector.
6. Unplug all field wires from the SCLS module and fold them back out of the way.
7. Loosen the two mounting screw-nuts on the pack sides.
8. Unplug the PCLA and install the new PCLA. Tighten the side screw-nuts back.
9. Remove the top and bottom-mounting screws from the SCLS base sheet metal and remove the module.
10. For ease of access before mounting replacement module, copy all configuration jumper positions from the module that
has been removed to the replacement module.
11. Mount the replacement SCLS using the corner mounting screws. Check that all jumpers are set correctly (the same as on
the old board).
12. Install the pack on new SCLS. Tighten the side screw-nuts back.
13. Plug the field wire terminals into the new SCLS board. It is always a good idea to quickly check that no wires became
loose in a terminal due to flexing and movement.
14. Replace the cables from SCLT on J2 connector.
15. Replace the Ethernet connection(s) on the pack.
16. Complete the lockout and/or tagout procedure to re-establish power to the system.
17. Apply power to the module through the P1 connector on PCLA.

16.1.1.5 Replacing the SCLT


➢ To replace the board
1. Lockout and/or tagout the field equipment and isolate the power source.
2. Check the voltage on each terminal and ensure no voltage is present.
3. Unplug the 68 pin cables on JR/ JS / JT to one or more PCLA modules. Be sure to pull the connector straight off of the
board to avoid damaging a connector pin.
4. Unplug all field wires from the SCLT terminals and fold them back out of the way.
5. Remove the terminal board and replace it with a spare board. Check that all jumpers are set correctly (the same as on the
old board).
6. Plug the field wire terminals into the new SCLT terminal board. Verify that no wires became loose due to flexing and
movement.
7. Replace the cables on JR / JS / JT and the Ethernet connection(s). Be sure to insert the connector straight into the board to
avoid connector pin damage.
8. Complete the lockout and/or tagout procedure to re-establish power to the system.

730 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
16.1.1.6 Replacing Other S-type Boards
➢ To replace the S-type terminal board
1. Perform lockout/tagout procedures and isolate the power sources.
2. Check the voltage on each terminal to ensure that there is no voltage present.
3. Unplug the I/O cable (J-plugs)
4. If applicable, unplug JF1, JF2, and JG1.
5. If applicable, remove the TB3 power cables.
6. If removable terminal block, gently pry the segment of the terminal block containing the field wiring away from the part
attached to the terminal board, leaving the wiring in place. If necessary, tie the block to the side out of the way.
7. Remove the mounting screws and terminal board.
8. Install a new terminal board. Check to ensure that all jumpers (if applicable) are in the same position as the ones on the
old board.
9. Tighten it securely to the cabinet.
10. If removable terminal block, from the new board, gently pry the segment of the terminal block that would contain the
field wiring away from the part attached to the terminal. Then, slide the segment containing the field wiring from the old
board into the new terminal block. Ensure that the numbers on the segment with the field wires match the numbers on the
terminal block. Press together firmly. Ensure that all field wiring is secure.

16.1.1.7 Replacing a TCAT board


➢ To replace the board
1. Lockout and/or tagout the field equipment and isolate the power source.
2. Check the voltage on each terminal and ensure no voltage is present.
3. Unplug the 68 pin P1 and P2 cables to one or more PCAA modules. Be sure to pull the connector straight off of the board
to avoid damaging a connector pin.
4. Remove the JGPA power cable from PCAA connector P3 or P4.
5. Unplug all field wires from the TCAT terminals and fold them back out of the way.
6. Remove the terminal board and replace it with a spare board. Check that all jumpers are set correctly (the same as on the
old board).
7. Plug the field wire terminals into the new TCAT terminal board. It is always a good idea to quickly check that no wires
became loose in a terminal due to flexing and movement.
8. Replace the cables on P1, P2, and the Ethernet connection(s). Be sure to insert the connector straight into the board to
avoid connector pin damage.
9. Complete the lockout and/or tagout procedure to re-establish power to the system.

Replacement GEH-6721_Vol_III_BG System Guide 731


GE Internal
16.1.1.8 Replacing TGNA

Do not open a CT circuit because dangerous high voltages will result. Use the isolation
switches before disconnecting CT wiring.
Warning

➢ To replace the board


1. Lockout and/or tagout the field equipment and isolate the power source.
2. Remove I/O pack as described above.
3. Check the voltage on each terminal and ensure no voltage is present.
4. Verify that all cables are labeled with the correct connector name and terminal point (as marked on the board) to simplify
reconnection.
5. If applicable, remove the CT inputs from TB2, TB3, and TB4.
6. Remove the terminal blocks on TB1, leaving the field wiring attached.
7. Remove the terminal board and replace it with a spare board, verifying that all jumpers are set correctly (as in the old
board).
8. Plug the terminal blocks back in place and connect the cables to TB2, TB3, and TB4, as before, making sure that the
original polarity is maintained.

16.1.1.9 Replacing Other T-type Boards


1. Lockout tagout the field equipment and isolate the power source.
2. Check the voltage on each terminal and ensure no voltage is present.
3. Unplug the I/O cable (J-Plugs).
4. If applicable, unplug JF1, JF2, and JG1.
5. If applicable, remove TB3 power cables.
6. Loosen the two screws on the wiring terminal blocks and remove the blocks, leaving the field wiring attached.
7. Remove the terminal board and replace it with a spare board, check that all jumpers are set correctly (the same as in the
old board).
8. Screw the terminal blocks back in place and plug in the J-plugs and connect cable to TB3 as before.

732 GEH-6721_Vol_III_BG Mark VIe and VIeS Control Systems for GE Industrial Applications
GE Internal
GE Internal

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