Total No. of Questions : 8] SEAT No.

8
23
PA-1237 [Total No. of Pages : 2

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[5925]-259

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S.E. (Computer Engineering)

2s
6:4
DIGITAL ELECTRONICS AND LOGIC DESIGN

02 91
3:3
(2019 Pattern) (Semester - III) (210245)

0
31
1/0 13
Time : 2½ Hours] [Max. Marks : 70
0
2/2
Instructions to the candidates:
.23 GP

1) Attempt Q1 or Q2, Q3 or Q4, Q5 or Q6, Q7 or Q8.

E

2) Neat diagrams must be drawn wherever necessary.

80

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C

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3) Assume suitable data, if necessary.

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16

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8.2

2s
Q1) a) What are sequential circuits? Explain excitation table of JK flipflop. [6]
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6:4
b) Convert Following Flipflops: [6]
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3:3
i) SR to JK
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ii) JK to D
01
02

c) What is MOD counter? Design MOD - 24 counter using 7490. [6]

2/2
GP

OR
1/0
CE
80

Q2) a) What are sequential circuits? Explain SR flipflop using a suitable example.[6]

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b) Convert Following Flipflops: [6]

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i) JK to T
8.2

2s

ii) SR to D
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6:4
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c) Design sequence detector using MS JK flipflop for sequence 1101. [6]

49

3:3
30
31
01

Q3) a) Draw ASM chart for 2-bit UP counter using multiplexer controller method.[6]
02
2/2
GP

b) Draw a block diagram of the PLA device and explain. [6]

1/0

c) Implement following Boolean function using PAL. [5]

CE
80

F1 =  m ( 0,2,3,4,5,6,7,8,10,11,15 )
.23

F2 =  m (1,2,8,12,13)
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8.2

OR
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P.T.O.
Q4) a) What is an ASM Chart? Design the ASM chart for a 2-bit binary counter

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23
having one enable line E such that when: [6]

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E = 1 (count enabled) and

tat
E = 0 (counting is disabled).

2s
b) Implement 3 bit binary to gray code converter using PLA. [6]

6:4
c) A combinational Circuit is defined by the following function: [5]

02 91
3:3
F1( A,B,C ) =  m ( 0,1,3,7 )

0
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1/0 13
F2 ( A,B,C ) =  m (1,2,5,6 )
0
2/2
.23 GP

Implement this circuit with PLA.

E
80

8
Q5) a) Explain the operation of TTL NAND gate. [6]
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b) Compare TTL and CMOS families and also draw CMOS-NOR Gate.[6]

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c) Define the following terms and mention the standard values for TTL
8.2

logic Family: [6]

2s
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6:4
i) Noise Margin
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ii) Power Dissipation

3:3
30

iii) Propagation Delay

31

OR
01
02
2/2

Q6) a) Explain TTL open collector. [6]

GP

b) Draw and explain the circuit diagram of the CMOS Inverter. [6]
1/0
CE

c) Draw two input standard TTL NAND gate circuit and explain their
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operation. [6]
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Q7) a) What is Microprocessor? Explain the system bus in brief. [6]
8.2

2s

b) Which are various functional units of microprocessors? Explain ALU in

.24

6:4

brief. [6]
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3:3

c) How Basic Arithmetic operations are performed using ALU IC 74181?[5]

30
31

OR
01
02

Q8) a) What is Microprocessor? Explain various operations of the

2/2

microprocessor. [6]
GP
1/0

b) Explain the Memory organization of the microprocessor. [6]

CE
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c) Explain the 4-bit Multiplier circuit using ALU and shift registers in brief.[5]
.23
16


8.2
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[5925]-259
49

2
Total No. of Questions : 8] SEAT No. :

8
23
P-1530 [Total No. of Pages : 3

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[6002]-159

tat
8s
S.E. (Computer Engineering)

7:3
02 91
DIGITAL ELECTRONICS AND LOGIC DESIGN

0:3
0
(2019 Pattern) (Semester - III) (210245)

31
Time : 2½ Hours] 0/0 13 [Max. Marks : 70
0
6/2
Instructions to the candidates:
.23 GP

1) Attempt Q1 or Q2, Q3 or Q4, Q5 or Q6, Q7 or Q8,

E

2) Neat diagram must be drawn wherever necessary.

82

8
C

23
3) Assume suitable data jf necessary.

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16

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8.2

8s
Q1) a) Distinguish between combinational and sequential switching circuits also
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7:3
write examples of both. [6]
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0:3
b) Convert Following Flip flops: [6]
30
31

i) SR to T
01
02
6/2

ii) JK to D
GP
0/0

c) What is MOD counter ? Design MOD 7 counter using IC 7490. [6]

CE
82

8
23
OR
.23

Q2) a) Draw and explain 3-bit asynchronous up-counter using JK flip flop. Also ic-
16

tat
draw the necessary timing diagram. [6]
8.2

8s
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7:3

b) What do you mean by excitation table of flip flop? Write the excitation
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0:3

table of [6]
30
31

i) S-R flip flop

01
02

ii) J-K flip flop

6/2
GP

c) With neat diagrams explain the working of the following types of shift
0/0

registers [6]
CE
82

i) Serial-in, serial-out
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16

ii) Parallel-in, serial-out

8.2
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P.T.O.
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Q3) a) Draw the state diagram, state table, and ASM chart for a 2-bit binary

8
23
counter having one enable line E such that E = l counting enabled,and E = 0

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counting disabled. [6]

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b) Implement following Boolean function using PAL [6]

8s
Fl = Σm (0,2,4,6,8,12)

7:3
02 91
0:3
F2 = Σm (2,3,8,9,12,13)

0
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F3 = Σm (l,3,4,6,9,11,12,14,15)
0/0 13
0
c) Draw a block diagram of the PLA device and explain.
6/2 [5]
.23 GP

OR
E
82

8
Q4) a) What is an ASM Chart? Name the elements of an ASM chart and define
C

23
each of them. [6]

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16

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b) Implement BCD to Excess-3 code converter using PAL. [6]
8.2

8s
c) What is the difference between PAL and PLA. [5]
.24

7:3
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0:3
Q5) a) With the help of a neat diagram, explain the working of two-input TTL
30
31

NAND gate. [6]

01
02

b) Draw and explain the circuit diagram of CMOS inverter. [6]

6/2
GP
0/0

c) Define the following terms and mention the standard values for TTL logic
CE
82

Family [6]

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23
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i) Fan-out
16

tat
8.2

ii) Power Dissipation

8s
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7:3

iii) Propagation Delay.

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0:3
30

OR
31
01
02

Q6) a) What is the advantage of open collector output? Justify your answer with
6/2

suitable circuit. [6]

GP
0/0

b) Compare TTL and CMOS logic family. [6]

CE
82

c) What is logic family? Give the classification of logic family and also write
.23

important characteristics of .CMOS. [6]

16
8.2
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[6002]-159 2
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Q7) a) Draw and explain the basic building of an ideal microprocessor based

8
23
system with the help of neat diagram. [6]

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b) What is system bus? Draw microprocessor bus structure and explain in

8s
brief. [6]

7:3
02 91
0:3
c) Write a short note on ALU IC 74181. [5]

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0/0 13 OR
0
6/2
.23 GP

Q8) a) With the help of a block diagram explain the fundamental units of a
microprocessor. [6]
E
82

8
C

23
b) Explain the Memory organization of the microprocessor. [6]

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16

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c) What is microprocessor? List different applications of microprocessor.[5]
8.2

8s
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7:3
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
0:3
30
31
01
02
6/2
GP
0/0
CE
82

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8.2

8s
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7:3
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0:3
30
31
01
02
6/2
GP
0/0
CE
82
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[6002]-159 3
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