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Que:-Why fast adder is required, explain with the help of carry look ahead adder.

What is adder:-

In electronics, an adder or summer is a digital circuit that performs addition of numbers. In


many computers and other kinds of processors, adders are used not only in the arithmetic logic
units, but also in other parts of the processor, where they are used to calculate addresses, table
indices, increment and decrement operators, and similar operations.
Although adders can be constructed for many numerical representations, such as binary-coded
decimal or excess-3, the most common adders operate on binary numbers. In cases where two's
complement or ones' complement is being used to represent negative numbers, it is trivial to
modify an adder into an adder–subtractor. Other signed number representations require a more
complex adder.
Carry Look-ahead Adder:-
A carry-lookahead adder (CLA) is a type of adder used in digital logic.
A carry-lookahead adder improves speed by reducing the amount of time required to determine
carry bits.
It can be contrasted with the simpler, but usually slower, ripple carry adder for which the carry
bit is calculated alongside the sum bit, and each bit must wait until the previous carry has been
calculated to begin calculating its own result and carry bits.
The carry-lookahead adder calculates one or more carry bits before the sum, which reduces the
wait time to calculate the result of the larger value bits.
To reduce the computation time, there are faster ways to add two binary numbers by using carry
lookahead adders.
They work by creating two signals P and G known to be Carry Propagator and Carry Generator.
The carry propagator is propagated to the next level whereas the carry generator is used to
generate the output carry , regardless of input carry.

The block diagram of a 4-bit Carry Lookahead Adder is shown here below -

The number of gate levels for the carry propagation can be found from the circuit of full adder.
The signal from input carry Cin to output carry Cout requires an AND gate and an OR gate,
which constitutes two gate levels.
So if there are four full adders in the parallel adder, the output carry C 5 would have 2 X 4 = 8
gate levels from C1 to C5. For an n-bit parallel adder, there are 2n gate levels to propagate
through.
Carry lookahead depends on two things:
1. Calculating, for each digit position, whether that position is going to propagate a carry if
one comes in from the right.
2. Combining these calculated values to be able to deduce quickly whether, for each group
of digits, that group is going to propagate a carry that comes in from the right.

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