register contains the value X.

State how Z, is calculated from the other addresses if the

addressing mode of the instruction is (a) direct (b) Indirect (c) relative (d) indexed.

Q.7 Discuss instruction sequencing. 2006

Ans.- The time or steps required to complete the execution of instruction is called instruction
cycle or sequencing. Each instruction is subdivided into a sequence of sub-cycles or phases. In
the basic computer each instruction cycle consists of the following phases- Fetch an instruction
from memory (FI), decode the instruction
(DI), read the effective address (FO) from
memory if the instruction has an indirect
address, execute the instruction (EI).
Fetch and decode sub cycle- Initially, the
program counter PC is loaded with the
address of the first instruction in the
program. The sequence counter SC is
cleared to 0, providing a decoded timing
signal T0. After each clock pulse, SC is
incremented by one. At T0, content of PC
is transferred to register AR which locates
the location of code of the instruction. At
T1, the instruction read from memory is
then placed in the instruction register IR.
At the same time, PC is incremented by
one to prepare it for the address of the next
instruction in the program. At time T2, the
operation code in IR is decoded, the
indirect bit is transferred to flip-flop I, and
the address part of the instruction is
transferred to AR.
The timing signal that is active after the
decoding is T3. During time T3, the control unit determines the type of instruction that was just
read from memory. If D7=1, the instruction must be a register-reference or input-output type.
D7=0, the operation code must be one of the other seven values 000 through 110, specifying a
memory-reference instruction. Control then inspects the value of the first bit of the instruction,
which is now available in flip-flop I. If d7=0 and I=1, we have a memory reference instruction
with an indirect address. It is then necessary to read the effective address from memory. The
microoperation for the indirect address condition can be symbolized by the register transfer
statement AR  M [AR]. The three instruction types are subdivided into four separate paths.
The selected operation is activated with the clock transition associated with timing signal T3.
This can be symbolized as follows:
D7’IT3: AR  M[AR]
D7’I’T3: Nothing
D7IT3: Execute an input-output instruction
D7I’T3: Execute a register-reference instruction
Execution of the memory-reference instruction can be continued with timing variable T4. A
register-reference or input-output instruction can be executed with the clock associated with
timing signal T3. After the instruction is executed, SC is cleared to 0 and control returns to the
fetch phase with T0=1.

Q.8 Design an arithmetic circuit with one selection variable S and two n bit
data inputs A and B. The circuit generates the ahead four arithmetic
operations in conjunctions with the input carry Cin. Draw the logic
diagram for the first two stages.

Ans.-

S Cin X Y
0 0 A B (A+B)
0 1 A 0 (A+1)
1 0 A 1 (A-1)
1 1 A B' (A-B)

Q.9 Draw and explain the logic diagram of Arithmetic Logic Unit (ALU) 2005

Ans.- The arithmetic, logic and shift circuits can be combined into one ALU with common
selection variables. One stage of an arithmetic logic shift unit is shown in below. The subscript i
designates a typical stage. Inputs Ai and Bi are applied to both the arithmetic and logic units. A
particular micro operation is selected with inputs S1 and S0. A 4x1 multiplexer at the output
chooses between an arithmetic output in Ei and a logic output in Hi. The data in the multiplexer
are selected with the S3 and S2. The other two data inputs to the multiplexer receive inputs Ai-1
for the shift right operation and Ai+1 for the shift-left operation. The circuit must be repeated n
times for an n-bit ALU. The output carry Ci+1 of a given arithmetic stage must be connected to
the input carry Cin of the next stage in sequence. The input carry to the first stage is the input
carry Cin, which provides a selection variable for the arithmetic operations. Table shows the 14
operations of the ALU. The first eight are arithmetic operation, four logic operations and two
shift operations. Each operation is selected with the five variables S3, S2, S1, S0 and Cin.

Operation select
Operation Function
S3 S2 S1 S0 Cin
0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
 0 0 0 1 0 F=A+B Addition
0 0 0 1 1 F=A+B+1 Add with carry
Subtract with
0 0 1 0 0 F = A + B'
borrow
0 0 1 0 1 F = A + B' + 1 subtraction
0 0 1 1 0 F=A-1 Decrement A
0 0 1 1 1 F=A Transfer A
0 1 0 0 X F=AʌB AND
0 1 0 1 X F=A˅B OR
0 1 1 0 X F = A  XOR
0 1 1 1 X F = A' Complement A
1 0 X X X F = shr A Shift right A into F
1 1 X X X F = shl A Shift left A into F

Q.10 Draw an arithmetic circuit to multiply two 4-bit numbers and discuss 2006
the operations

Ans.- Multiplication process involves successive shift and add operations. The procedure shows
that if the multiplier bit is a 1, the multiplicand is copied down, otherwise zeros are copied down.
The numbers copied down in successive lines are shifted one position to the left from the
previous number. Finally, the numbers are added and their sum makes the product.
Multiplication of Two 4-bit number produce 8 bit result.

A3 A2 A1 A0
B3 B2 B1 B0
A3B0 A2B0 A1B0 A0B0
 A2B2 A2B1 A1B1 A0B1
A3B2 A2B2 A1B2 A0B2
A3B3 A2B3 A1B3 A0B3
S7 S6 S5 S4 S3 S2 S1 S0

Note use of parallel carry-outs to form higher order sums. 12 adder, if full adders, this is 6 gates
each = 72 gates. 16 gates form the partial products. So, total 88 gates.

Q. 5 Write short notes on the following: 2012,

(a) ALU and control units 2010
(b)Mother board and SMPS
Ans.- (a) ALU and control units-
ALU is already discussed in previous
section.
The block diagram of the control unit is
shown in figure. It consists of decoders, a
sequence counter, and a number of control
logic gates. An instruction read from
memory is placed in the instruction register
(IR). The IR is divided into three parts: the I
bit, the operation code, and bits 0 through
11. The operation code in bits 12 through 14
are decoded with 3x8 decoder. The eight
outputs of the decoder are designated by the
symbols D0 through D7. The subscripted
decimal number is equivalent to the binary
value of the corresponding operation code.
Bit 15 of the instruction is transferred to a
flip-flop designated by the symbol I. Bits 0
through 11 are applied to the control logic
gates. The 4-bit sequence counter can count in binary from 0 through 15. The outputs of the
counter are decoded into 16 timing signals T0 through T15.

(b) Motherboard and SMPS-

Motherboard- A motherboard also known as the main board, system board, planar board or
logic board is a printed circuit board found in all modern computers which holds many of the
crucial components of the system, such as CPU, memory, various controllers and provides
connectors for other peripherals. An important component of a motherboard is the
microprocessor’s supporting chipset, which provides the supporting interfaces between the CPU
and the various buses and external components. This chipset determines to an extent, the features
and capabilities of the motherboard.
Modern motherboard include, at a minimum:

 Sockets (or slots) in which one or more microprocessors may be installed. Generally, ZIF
(Zero insertion force) pin oriented and pin less sockets are for microprocessor. A CPU
socket type and motherboard chipset must support the CPU series and speed.
 A chipset which forms an interface between the CPU’s front-side bus, main memory, and
peripheral buses.
 Non-volatile memory chips
(usually Flash ROM in modern
motherboard) containing the system’s
firmware or BIOS.
 A Clock generator which
produces the system clock signal to
synchronize the various components.
 Slots for expansion cards (these
interface to the system via the buses
supported by the chipset)
Power connectors, which receive
electrical power from the computer
power supply and distribute it to the
CPU, chipset, main memory, and
expansion cards.
SMPS- Power supply is the device that transfers electric power from a source to a load using
electronic circuits. A typical application of power supplies is to convert utility’s AC input power
into regulated DC voltages required for electronic equipment. Depending on the mode of
operation of power semiconductors PSU can be linear or switching (SMPS). SMPS stands for
switched power supply. In such a device power handling electronic components are continuously
switching on and off with high frequency in order to provide the transfer of electric power via
energy storage components (inductors and capacitors). The frequency range of an SMPS is from
20 kHz to several MHz. The major feature of SMPS is the elimination of physically massive
power transformers and other power line magnetic. The net result is smaller, lighter package and
reduced manufacturing cost, reducing primarily from the elimination of the 50 Hz components.
Rectification- First stage is to convert the AC input to DC. This is called rectification. The
rectifier circuit can be configured as a voltage doubler by the addition of a switch operated either
manually or automatically.

Filter- The rectifier produces an unregulated DC voltage which is then sent to a large filter
capacitor.
Inverter stage- The inverter stage converts DC, whether directly from the input or from the
rectifier stage to AC by running it through a power oscillator, whose output transformer is very
small with few windings at a frequency of tens or hundreds of kilohertz. The switching is
implemented as a multistage MOSFET amplifier.
Voltage converter and output rectifier- If the output is required to be isolated from the input
the inverted AC is used to drive the primary winding of a high-frequency transformer. This
converts the voltage up or down to the required output level on its secondary winding. If a DC
output is required, the AC output from the transformer is rectified. The rectified output is then
smoothed by a filter consisting of inductors and capacitors.
Regulation- A feedback circuit monitors the output voltage and compares it with a reference
voltage.
 Features of SMPS-
 Size and weight- Smaller transformer due to higher operating frequency
(typically 50 kHz-1Mhz)
 Output voltage- Any voltages available, limited only by transistor breakdown
voltages in many circuits. Voltage varies little with load.
 Efficiency, heat and power dissipation- Output is regulated using duty cycle
control, the transistors are switched fully ON or fully OFF, so very little resistive
losses between input and the load. The only heat generated is in the non-ideal
aspects of the components.
 Complexity- Consists of a controller IC, one or several power transistors and
diodes as well as a power transformer, inductors, and filter capacitors. Some
design complexities present.
 Radio frequency interference- EMI/RFI produced due to the current being
switched ON and OFF sharply. Therefore, EMI filters and RF shielding are
needed to reduce the disruptive interference.
 Electronic noise at the output terminals- Noisier due to the switching frequency
of SMPS. An unfiltered output may cause glitches in digital circuit.
Linear Power supply