Chinese Journal of Electrical Engineering, Vol.5, No.

3, September 2019

Review of Si IGBT and SiC MOSFET Based on

Hybrid Switch*
Puqi Ning 1, 2*, Tianshu Yuan 1, 2, Yuhui Kang 1, 2, Cao Han 1, 2 and Lei Li 1, 2
(1. Key Laboratory of Power Electronics and Electric Drive, Institute of Electrical Engineering,
Chinese Academy of Sciences, Beijing 100190, China;
2. University of Chinese Academy of Sciences, Beijing 100190, China)

Abstract: SiC Hybrid switch (HyS) combines low conduction loss of Si IGBT and low switching loss of SiC MOSFET, and the
cost is closer to that of Si IGBT. The promising high performances of HyS will bring considerable achievement in terms of enhancing
power density of a converter system. By reviewing the gate drive pattern, gate drive hardware, current sharing, module design,
converter design, and cost, this paper introduces state-of-the-art SiC HyS.
Keywords: Hybrid module; SiC device; Si IGBT; SiC MOSFET

of Si MOSFETs are limited to small values when the

1 Introduction1
voltage is over 900 V. To overcome these challenges,
In recent years, the silicon carbide (SiC) power the combination of Si IGBT and Si MOSFET devices
semiconductor has emerged as an attractive alternative was investigated by compensating disadvantages 20
for silicon (Si) devices [1-5]. Some manufacturers have years ago [4]. In recent years, hybrid switches (HyS)
successfully developed SiC metal-oxide-semiconductor based on Si IGBT and SiC MOSFET have been
field-effect transistor (MOSFET) products, which have studied [5-26].
demonstrated high blocking voltage, high switching Tab. 1 Price comparison of SiC and Si discrete devices
frequency, and high temperature abilities.
Part number Type & voltage Rated current Price
Although the advanced properties of SiC ST 1 200 V 65 A @ 25℃ $35.13 for 1 pc.
MOSFET will lead converters to higher power SCT50N120 SiC MOSFET 50 A @ 100℃ $30.95 for 25 pc.
densities, it is challenging to increase the current IXYS 1 200 V 68 A @ 25℃ $109 for 1 pc.

rating and reduce the cost in a short time [5]. Cost IXFN70N120SK SiC MOSFET 48 A @ 100℃ $99.14 for 25 pc.
CREE 1 200 V 90 A @ 25℃ $69.8 for 1 pc.
comparisons between SiC MOSFET and Si insulated-
C2M0025120D SiC MOSFET 60 A @ 150℃ $67.12 for 100 pc.
gate bipolar transistors (IGBT) with the same ratings Rohm 1 200 V 72 A @ 25℃ $44.21 for 1 pc.
are listed in Tab. 1 [6]. SCT3030KL SiC MOSFET 51 A @ 150℃ $39.52 for 25 pc.
In many applications, for example, wireless Microsemi 1 200 V 56 A @ 25℃ $78.36 for 1 pc.
APT80SM120J SiC MOSFET 40 A @ 125℃ $66.49 for 100 pc.
power transmission (WPT) for electric vehicles (EV),
Infineon 1 200 V 100 A @ 25℃ $7.12 for 1 pc.
more electric aircraft (MEA), and solid-state
IGW60T120FKSA1 Si IGBT 60 A @ 100℃ $5.33 for 100 pc.
transformers (SST), converters require high-speed IXYS 1 200 V 160 A @ 25℃ $13.44 for 1 pc.
switching, medium/high power, and low on-resistance. IXYH82N120C3 Si IGBT 82 A @ 110℃ $8.52 for 1 000 pc.
A reasonable price impacts and delays the application
of SiC devices. This is especially true for grid The schematic of the hybrid switch is shown in
applications, wherein it would baffle engineers to use Fig. 1. It consists of a low power SiC MOSFET and a
10 kV/20 A SiC devices in a grid-related project. high-power Si IGBT. Power devices in the hybrid
Unlike SiC MOSFETs, Si IGBTs are difficult to
be switched to over 20 kHz because of bipolar carriers
and tail current. On the other hand, the rated currents

* Corresponding Author, Email:npq@mail.iee.ac.cn

* Supported by the National Key Research and Development Program of China
(2016YFB0100600), the Key Program of Bureau of Frontier Sciences and
Education, and Chinese Academy of Sciences (QYZDBSSW-JSC044).
Digital Object Identifier: 10.23919/CJEE.2019.000017 Fig. 1 HyS parallels SiC MOSFET and Si IGBT
 Puqi Ning et al.: Review of Si IGBT and SiC MOSFET Based on Hybrid Switch 21

switch have different gate signals. Si IGBT is switched many publications, co-pack devices that contain a Si
on later than SiC MOSFET and is switched off prior to IGBT and a Si diode have been used to reduce the
SiC MOSFET. With proper gate control patterns, printed circuit board (PCB) routing work.
zero-voltage switching (ZVS) operation of the Si
IGBT can be obtained.
During the conduction period, Si IGBT will
conduct most of the current when the current is large.
At this time, the conduction loss is close to that of pure
Si IGBT devices. With ZVS, the switching loss of the
hybrid switch is very close to that of pure SiC
MOSFET devices. Fig. 2 shows the conduction loss Fig. 3 Si discrete and SiC discrete hybrid with PCB
comparison and switching loss comparison [6]. The
However, because of limitations with the PCB
promising performance of HyS may result in the
connection, it is very tough to reduce parasitic
considerable achievement of enhancing the power
parameters to below 12 nH, especially the
density of a converter system.
commutation path. Large parasitic parameters will
impact the fast switching ability of HyS. On the other
hand, the thermal management of a discrete device is
also a crucial issue for over 5 kW applications.
Ref. [11] provided another method, which used
SiC MOSFET discrete devices plus a Si IGBT module
(Fig.4). The hybrid connection was implemented with
a carefully designed busbar.

Fig. 2 Losses comparison

In this paper, Section 2 reviews the hybrid

method, Section 3 reviews the gate drive hardware
design, Section 4 reviews the gate drive pattern
optimization, Section 5 reviews gate drive hardware
with miller clam, Section 6 reviews the the current
sbaring strategy, Section 7 reviews the HyS based
converter, and Section 8 reviews the HyS cost.
2 Hybrid method
The most fundamental hybrid method uses SiC
MOSFET discrete devices plus Si IGBT discrete
devices [14], as shown in Fig. 3. It is easy to combine
devices with different current sharing ratios and
investigate novel control strategies. According to
Fig. 4 Si module and SiC discrete hybrid with busbar
For higher power, SiC MOSFET modules plus Si
IGBT module methods can be used, as shown in Fig. 5 [20].
In this design, the low parasitic busbar design is very
important in guaranteeing fast switching and
commutation.
However, in some cases, the busbar solution still
cannot assure a very fast switching. A hybrid module
solution with SiC dies and Si dies can help to reduce
parasitic parameters to a minimum value and helps
 22 Chinese Journal of Electrical Engineering, Vol.5, No.3, September 2019

with an integrated cooling design.
Fig. 5 Si module and SiC module hybrid with busbar
Ref. [6] designed a 1 200V/200A hybrid
phase-leg module(Fig.6). In this module, each HyS
included two Si IGBTs, one SiC MOSFET, and one Si
Diode. To reduce parasitic parameters and prevent
interference from the main power, Kelvin source pins
of gates were added.
high-speed switching was required for this module,
power terminals and gate signal terminals were
bonded to direct bond copper (DBC) via ultrasonic
bonding methods [6].
In the layout design, a genetic algorithm
(GA)-based layout optimization was utilized to
generate a high-performance design [18]. The design
space of the module layout was fully searched. With
the reduction of the parasitic parameters considered,
the footprint minimized, and the thermal dissipation
path, decoupling gate paths, and power paths balanced,
devices were placed and routed on the substrate.
To analyze the optimization result, FEA
Simulation Tool Q3D was used in Ref. [18] to abstract
parasitic parameters, which are shown in Fig. 7[18].

Fig. 6 Si die and SiC die hybrid in a module

3 HyS module design Fig. 7 Parasitic inductances of the HyS power module

To meet the requirements of high-speed switching When Si IGBT and SiC MOSFET are paralleled,
and power rating, a power module design is required there are two basic layout patterns, as shown in Fig.
for the hybrid switch. Limited by Si IGBT safe 8[25]. To better balance current sharing during the
operation ability, modules usually targeted for a transient, patternⅠis a better option [25].
reliable 175℃ operation and possible 200℃
operation. Based on a comprehensive survey and lab
evaluation, materials for each part of the power
module package were compared and selected. The
final materials selection is listed in Tab. 2[6]. Because
Tab. 2 Material selection for 200℃ module
Material Attribute Fig. 8 Basic paralleled die layout
Baseplate Aluminum Silicon Carbide (AlSiC), 3 mm thick
Aluminum nitride (AlN) direct bond copper (DBC) In Ref. [25], a 1 200 V/400 A 3-ph HyS module
Substrate
with 15 mils thick AlN, 8 mils thick copper was designed, as shown in Fig. 9. The size was 140
Die attachment Au-Sn solder (280℃ melting point)
mm × 105.6 mm × 18 mm, which was very close to
6 mils aluminum wire for gate pads
Wirebond
15 mils aluminum wire for other pads
that of a 650V/400A HP1 module.
Encapsulant Nusil R-2188 For high voltage applications, a power module is
Power terminal 0.8 mm thick copper terminal preferred for HyS even when the current rating is
Signal terminal 1 mm diameter copper pin small. Fig. 10[23] and Fig. 11[15] illustrate a 3.3 kV HyS
 Puqi Ning et al.: Review of Si IGBT and SiC MOSFET Based on Hybrid Switch
Fig. 9 Dimension comparison
module and a 4.5 kV module, respectively, from Ref.
[23] and Ref. [15]. These modules need to consider
partial discharge issues in the packaging design.
Fig. 10 Layout design of 3.3 kV hybrid module
Fig. 11 Layout design of 4.5 kV XT hybrid module
4 Gate drive pattern optimization
In a regular HyS gate drive sequence, to eliminate
large switching losses and realize zero-voltage
switching (ZVS) of Si IGBT, SiC MOSFET is
expected turn on earlier than Si IGBT, and Si IGBT is
expected turn off prior to SiC MOSFET.
Fig. 12 shows the most commonly discussed
switching patterns for HyS. Option 1 (Fig. 12a) is the
most preferred pattern with ideal devices [12]. Option 2
(Fig. 12b) has similar losses to that of Option 1 if the
input capacitance of the SiC MOSFET is far smaller
23
than that of the Si IGBT. If the HyS is built using
discrete semiconductors, large parasitic parameters will
impede and delay the commutation process of the Si
IGBT; under this condition, Option 3 (Fig. 12c) can be
used [14]. In some gate drive hardware, the Miller effect
of Si IGBT is noticeable, so Option 4 (Fig. 12d) can be
chosen for this situation [10]. However, Option 4 cannot
give full ZVS, and the losses will increase substantially.
Fig. 12 Switching patterns for HyS
In Ref. [22], a novel gate signal pattern, in which
the current commutates between the SiC and Si
devices twice, was presented, as shown in Fig. 13.
Fig. 13 Gate drive pattern with SiC MOSFET switching twice
With this pattern, the SiC MOSFET loss in the
HyS was reduced. However, the IGBT loss increased
instead, and the total loss was higher than that of
Option 1(Fig. 12a).
In Ref. [18], a fast turn-on was realized when SiC
MOSFET and Si IGBT were driven by a certain time
delay. The delay definition is shown in Fig. 14.
In Fig. 15[18], the delay configuration of case 1 is
tdon_IGBT −ton_MOS < ton_delay ≤ tdon_IGBT − tdon_MOS. The
delay configuration of case 2 is tdon_IGBT − tdon_MOS <
ton_delay ≤ ton_IGBT − tdon_MOS. Case 3 is a balanced case
of case 1 and case 2, and it can obtain the fastest
turn-on, which is very close to that of pure SiC
MOSFET module.
 24 Chinese Journal of Electrical Engineering, Vol.5, No.3, September 2019
Fig. 14 Delay definition
Fig. 15 Turn-on transient
Ref. [24] further discussed the relationship
between gate drive patterns and short-circuit
ruggedness. In short-circuit mode, the turning off of
the IGBT induced a large gate voltage oscillation of
the SiC MOSFET, and the SiC MOSFET accidentally
turned OFF within 1 μs.
As shown in Fig. 16[24], the HyS has the same
short circuit withstanding time (SCWT) at different
turn-off gate signals’ delaying times. When the
turn-off gate signals’ delaying time between the IGBT
and the SiC MOSFET increased from 0 to 1.6 μs and 3
μs, the critical SC energy of the SiC MOSFET reduced
from 0.372 J to 0.365 J and 0.361 J, respectively.
Fig. 16 SCWT and critical energy at different delaying times
5 Gate drive hardware with miller clam
During the turn-off phase, the Miller effect can be
clearly observed. For fast switching of SiC MOSFET,
a high dv/dt will bring electrical interference to the Si
IGBT drive path. A Miller current will appear, and the
gate voltage of Si IGBT device (VGE) will increase.
Once the voltage exceeds the threshold voltage, a fault
re-turn-on will happen. The Si IGBTs will share the
current from the SiC MOSFET, and the tail current
will be observed again.
It means that IGBT chips are turned on in ZVS
mode but are not fully ZVS in the turn off phase.
Although the length of the tail current is shorter than
that of a conventional IGBT module, the power loss is
much larger than that of a pure SiC MOSFET device.
As shown in Fig. 2, gate drive pattern Option 4 was
used in Ref. [10]; the Miller effect was alleviated, but
the losses were increased substantially.
Negative off-state gate voltage is generally used
to prevent the Miller effect. However, in each
phase-leg of the Hys, the SiC MOSFET and Si IGBTs
share the same ground. SiC MOSFET can accept only
a −5 V negative off-gate voltage. However, −5 V
cannot fully mitigate the Miller effect and tail current
of Si IGBTs. At the same time, additional isolated DC
source should be added to the gate drive, which
increases the complexity and the cost.
In Ref. [6], commercial chips ACPL-332J with
built-in turn-on/turn-off path separators were utilized.
When IGBT was off, a low-impedance path was
established inside the gate drive chips, and the gate
voltage spikes were able to be reduced.
The gate drive conceptual diagram is shown in
Fig. 17[6]. For Si IGBT gate, a gate drive chip A332J
was used, and for SiC MOSFET, a HCNW3120 chip
was used to reduce the complexity and cost.
Fig. 17 Gate drive conceptual diagram (with Miller clamp)
 Puqi Ning et al.: Review of Si IGBT and SiC MOSFET Based on Hybrid Switch 25

The improved gate drive circuit was evaluated to which was able to allow easy adjustment of
compare the switching losses. A 1 200 V/200 A hybrid independent turn on delay and turn off delay. Protection
module was tested up to 600 V/200 A [6]. The gate function was added in the circuit with desaturation
resistor of SiC MOSFET was at 47 Ω, and the gate detection, as shown in Fig. 19[24].
resistor of Si IGBT was at 15 Ω. The experimental
results are shown in Fig. 18[6]. It is noticeable that the
Miller effect was mitigated within an acceptable range,
and no obvious tail current can be found.

Fig. 19 HyS gate drive with protection

6 Current sharing strategy

The ratio of SiC current rating to Si current rating
(SiC/Si current ratio) is commonly used to design HyS.
Fig. 18 HyS turn off at 600 V/200 A A low ratio, e.g., 1: 6, will bring more electrical and
A detailed comparison is listed in Tab. 3[6]. It can thermal stresses to the SiC MOSFET, but the cost can
be learned that, with Miller clamps and proper be cut substantially. On the other hand, a high ratio,
gate-resistor selection, the switching loss of HyS is e.g., 1: 2, can reduce the stresses but increase the cost.
close to that of a pure SiC MOSFET device, and it is In Ref. [20], a comprehensive cost analysis was
much less than that of a pure Si IGBT device. performed using commercial 1.2 kV devices, to
demonstrate the cost viability of a 1: 4 or 1: 6 SiC/Si
Tab. 3 Double-pulse test results comparison
current ratio HyS compared to that of a SiC MOSFET
Hybrid module Hybrid Hybrid module
(Fig.20)[20]. An algorithm using dynamic junction
Item without Miller module with with only IGBT
clamp Miller clamp operated
temperature prediction, to select an optimum SiC/Si
VCC /V 600 600 600
current ratio, which ensures reliable HyS operation,
IC /A 200 200 200 was presented. This selection was based on discrete
L /μH 50 50 50 devices.
MOS 20 MOS 20 MOS 0
Vge_on /V
IGBT 15 IGBT 15 IGBT 15
Vge_off /V 0/0 0/0 0/0
MOS 5 MOS 47
Rg_ext /Ω IGBT 15
IGBT 15 IGBT 15
trv /ns 296.8 120 400
tfi /ns 104.8 200 83
toff /ns 537.6 460 1 861
Eoff /mJ 34.11 11.03 40.26 Fig. 20 Peak junction temperature of SiC in
VCEpk /V 676 664.81 676 HyS with power module
tri /ns 68 100 62
Dynamic junction temperature prediction is
tfv /ns 72.8 120 207
conducted via transient thermal simulation, using the
ton /ns 134.4 160 307
Eon /mJ 8.16 10.99 12.14
thermal equivalent network of the SiC device package.
However, a 50 A SiC MOSFET may not support 300 A
Ref. [24] presented a novel integrated gate driver, operation for 500 ns. The selection should be
 26 Chinese Journal of Electrical Engineering, Vol.5, No.3, September 2019
combined with gate drive pattern design.
In Ref. [18], a novel index considering the
tradeoff between HyS power loss and SiC MOSFET
junction temperature, to select the current ratio, was
proposed. This method can be used to select suitable
Si IGBT dies and SiC MOSFET dies, and also the
number of dies. This procedure is depicted in Fig.
21[12].
Fig. 21 Index to select the current ratio
7 HyS based converter
So far, there are not too many HyS based
converter designs and developments. In most of the
literature, the demonstrations stopped at double-pulse
test because of the complex connection of discrete
devices. Most HyS based converters can be classified
as hard-switched dc-dc converters, resonant converters,
and three-phase converters.
The first case of hard switched DC-DC converter
was a boost converter with discreet HyS [18], as shown
in Fig. 22. A 650 V Si IGBT and SiC MOSFET based
HyS with a 1: 5 SiC/Si current ratio was successfully
demonstrated. In this paper, comprehensive
Fig. 22 DC-DC boost converter with HyS
electromagnetic interference (EMI) measurements and
analysis were presented. Limited by thermal issues,
the converter was operated at only 20 kHz and the
power was not reported.
In the second case, HyS was used as a core
element of a DC-DC converter within a solid-state
transformer. It was based on a Si module plus SiC
discrete version, as shown in Fig. 23[11]. A loss
reduction higher than 50% was obtained with the HyS.
Fig. 23 DC-DC converter with Si module plus SiC discrete
For the resonant converter, the first case was a 3.4
kW wireless power transmission system that was
developed to verify the high switching frequency
ability of the HyS module, as shown in Fig. 24, 50
kHz switching frequency was realized, which is
difficult for pure IGBT modules to realize. The ZVS of
the Si IGBT was realized during the test [6].
Fig. 24 Wireless power transmission system with HyS module
The second resonant converter case was also a
high-performance dynamic wireless power transfer
system for electric vehicles [27], as shown in Fig. 25.
An efficiency of 98% at 5 kW was obtained with
discrete-version HyS in some test point. According to
the figure in the paper, the test realized close to 90 kHz
switching frequency.
 Puqi Ning et al.: Review of Si IGBT and SiC MOSFET Based on Hybrid Switch
Fig. 25 Dynamic wireless charging system with HyS
For three-phase converter applications, the first
case was a forced air cooled three phase motor drive.
The inverter with three 1 200V/200A hybrid modules
was tested up to 5 kW with 30 kHz switching
frequency [18]. Fig. 26 depicts the hardware[16].
Fig. 26 Forced-air-cooled three-phase inverter based on HyS
To further demonstrate the operation ability, the
inverter was modified with water cooling. The motor
drive was tested up to 30 kW with 30 kHz switching
frequency. Fig. 27 depicts the improved hardware.
Fig. 27 Motor drive hardware
The second case used three-level T-Type power
electronics building blocks with HyS [20], as shown in
Fig. 28. A 28 kHz and 17.5 kVA operation was
27
demonstrated. Product SiC MOSFET modules and Si
IGBT modules were used in this work.
Fig. 28 Three-level T-Type power electronics building block
All the reported HyS based converters showed
promising test results. These developments could be
major steps to improve the overall performance of
converters.
8 HyS cost analysis
Fig. 29 directly shows the price comparison of
SiC MOSFET and Si IGBT discrete devices with
different power ratings. For SiC modules, a 1 200
kV/880 A module was estimated to be about $2 500, a
1 200 V/300 A HP1 three-phase module may cost
$7 000, and a 1 200 V/400 A Int-A-Pak module may
cost $5 000 [16]. The costs of some product SiC
modules are listed in Tab. 4[16]. All of these modules
are too expensive for regular applications.
HyS can cut the cost to about 1/4 that of a pure
SiC module for a SiC/Si 1: 3 ratio, as shown in Fig. 30 [18].
Ref. [20] analyzed the possibility of a low-ratio 1:6
SiC/Si combination. The cost of HyS can be cut
substantially, close to that of pure Si devices. However,
the thermal design for this high ratio is tough and may
survive only a double-pulse test. A more comprehensive
analysis is required by fully considering the SiC
MOSFET thermal stress.
In the high voltage version of HyS, the cost
prediction and current sharing ratio is similar to that of
the low voltage version [20], as listed in Tab. 5.
However, limited by the real costs of 6.5 kV Si IGBT
and 6.5 kV SiC JFET/MOSFET, the predicted cost
may have a large discrepancy.
 28 Chinese Journal of Electrical Engineering, Vol.5, No.3, September 2019

design, and cost are introduced and reviewed. The

promising test results demonstrate the possibility of
HyS being used in medium power applications, which
require high-switching frequencies. Some practical
considerations in HyS development are also presented.
The proven high performances of HyS will bring
considerable achievement in terms of enhancing the
power density of a converter system.

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wireless charging system for electric vehicles based on
DC/AC converters with SiC MOSFET-IGBT switches and
resonant gate drive. IEEE IECON, 2016: 4465-4470.
Puqi Ning received B.S. and M.S. degrees in
Electrical Engineering from Tsinghua University,
Beijing, China, in 2004, and 2006, respectively,
and Ph.D. degree in Electrical Engineering from
Virginia Tech, Blacksburg, US, in 2010.
From 2010 to 2013, he was with Oak
National Laboratory, Knoxville, TN, USA. Since
2013, he has been a full professor in the Institute of Electrical
Engineering, Chinese Academy of Sciences. Dr. Ning has been involved
in high-temperature packaging and high-density converter design for
more than 10 years.
Tianshu Yuan received his B.S. degree in
Electrical Engineering from Shandong University,
Jinan, China, in 2016. He is presently working
towards his M.S. degree at the Institute of
Electrical Engineering, Chinese Academy of
Sciences, Beijing, China.
He has been working on power-device
modeling and high-density converter design for 2
years.
Yuhui Kang received a B.S. degree in Electrical
Engineering and Automatization Specialty from
Shijiazhuang Tiedao University, Hebei, China, in
2015. She also received an M.S. degree from the
Institute of Electrical Engineering, Chinese
Academy of Sciences, Beijing, China in 2019.
Her research interests are in packaging
technology of power electronic devices.
Cao Han received his B.S. degree in Electrical
Engineering from Harbin Engineering University,
Harbin, China, in 2016. He is presently working
towards his Ph.D. degree at the Institute of
Electrical Engineering, Chinese Academy of
Sciences, Beijing, China.
He has been working on power-device modeling
and high-density converter design for 3 years.
Lei Li received a B.S. degree in Electrical
Engineering from the Beijing Institute of
Technology, Beijing, China, in 2014. He also
received his Ph.D. degree from the Institute of
Electrical Engineering, Chinese Academy of
Sciences, Beijing, China in 2019.
His research interests include power-device
packaging and reliability, power-device modeling,
and high-density converter design.