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tl-o8-23

Loqital Design:
besgn Speofcaten
Behavoal Deoiption
RTL Desviptien HDLe
Furctonal vertcation
and Testiy
Logic Sthesis
Gat-oel Nettst
Logial veifiation Tertiy

Floo plannig
planig utomathe e
plae & Rbu te

Phykal toyout
layout veRihato,

Imlemetalion
Design Methodologies
a) Top Down Appoch:
top loal
Block

ub
Sub bloclc4
block bloctn bleck?

(eo Call call Cell,

() Botten.up App ch
.Top leel
Block
ma rao mao maCno
maco

all call al: colé cole

q2

2.

mde
tLory dfptiep
’ Modul’ey DEF
endmodule. <module_names(emodue
tmindbi)
<module
motuendmodule.
lo nttinay module An
en inpatmocuk
utput A,
B;
elemet
cc;
=A AnD TFF(2, Mocule, to
& (A, (t14) Countee,
a
B, qoy
B,
);
tlock,
d Df
elementr
veet), tiveatea
Gale:
DFF

a
When a modulo 'nuokod. Vailog
OCehaviBal Q3) Algorthm bel (veatrj a unique objrct havig rta oon hme.
yohlaHes, naiamefoy Ond zo intafae. The pooees
vaniabes, p?olor.
by vesilog HDL.A modue Can be imlee
in tehmy d the deshed deagn algost
toithot Con cooen fr the hondw ae imlerat2 ’ It is, igpal fo deßine
dofine Ghe
modulo in anotee
at this leuel is modle.
dowgn.Oesgnig ehyilal to
Componer o a s thulafon
(Skimulus block)/

Rine Caly
(ii)

dclk

Caily
shiukey Broch:
mocule ippletetw Ceunteu( t, clt ee),

LEF tAo ( lo clk, resc9

TEF ttf2(1(1, clt, tent),


4-o8-23
TFF ttt3 (4[,clt, ewt); Basics Verileg HDL:
endmodule
module f Tfliptto p Commentr,- Commatt ae, br eádabilihy
two back.
*One line Commet startt wth
module TfF (e,ck, E). 7\Ts s a Commet,
2

input clt, eolt * Mulbleine Commett

roe4,
DFFdO(2, d, clh multleUne commet
not na(a, ); mot i-veilg pn udey In gne mutie line coment anote
end modue. multtleline Commont ot be ncsteo, but
in multle Line co met aa relne
Com met Can be neyted.

This.is llegal |Commont


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te
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decmel
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neg value; valyis dentte If two sst then e
inpuf clk;
I6-08-23
’ dote tyyies
(Nets
() Value Seti ’ Netr 0epaeneti Connectin bluo tus handaale
elemet he Netr ul! be b/e.
values Conthpay,de
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Nectot,(9) Regiskeu:()
’ ’ y
scct in
Valu a Regis
Nett vasabk hg'nlibe
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a (haduale). stey wtten key wihe whe
e9 sinulatt
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be ale. noed some
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lated oBe'valy
clock vala

Vooade
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bust:o.Thee Vectos
harelan
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[a,0]
selaci o bs
vctr
b.
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vector
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it
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but
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1f3:
deta14} i[:)data byte bye byte byte bte hegasS:data o tu'dte
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data datat has
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ector
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erample;- examplerr dedargte
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data; Envitonmot
wlih
t idetifey
port).tonal, a
Out exome Contol
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or
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netstate; = e triggc
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lock c Toig9cicd
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hy Edge
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clock C
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endcauy=O; Su=inital
begin Asign fissignmort
nitial keyJjmulathbm
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fssigomct
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word han
et
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mulbnle ini "aurgr! to
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end Sumbepn inital af
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20
-’ 2l-08- 23
-’A Non-
e Quluale 4he
Assgnentr
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exe nßn- initial
wihl Blockiy inoraley #end;
begin
all' Cufion C=l;
4e
d dt
rsignment aie
ngt othen cxeatod
hend sta
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a2
in
hond te
in not
ile orde/ise.
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ot

ocleiy(owae
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(@) () ex
nicdMor ’ ’ ’
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e Sthu end;
C<=B
begialways
n
ton fous blockctunal DC, B(=A;
A

Transe modinein
code @
Moolelil diagra deta:
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tibuf
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sum,
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tavy:
jum,ina outpit
sun,
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addenb
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int, );
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Addeh degigo Garteaddess int, DL
Veloy
uiouhal
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end sum 9o/cowy,
flbw lemoc
end module
modulo inut Qisign
module
Stufural
Data module 26
and end Neasuly
exra
t

etetminethe

De 23-08-23: end on module Venilog
sigr Digitat a,bcd;
int (TTL)
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cicuts Ond(otZo,
of aoi(o, Code
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b,c, And fox
d9; Ti,-
no. ZhvetaOn A0T4
d b
dy
binationalGeltCom ’ -,
ilp gue-Bial
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aula ciruit
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1 Tnutstable 3
bit erpttoi
boolra
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chCu

|25
l6-2
7

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+9,9,4o

vetauiwelDen
module ao
-þo
oput
.= sqr
(araits,3,
(0,
^
ai)
&
ao;
A A
4,,
yo
moculegend module module
end
and and A3 wihe and (o,o);butintpurta2
not a;not ia);notao ,41,o; utpat
sp
(95)
ysi94 (ys
tu,h,
3,
,y,b;

Tuta bk
Ta IAddoraf
fodder(*,ttre;
XOR module NoNo
d dy
oulyt:inputs

? 2
(a,
ca)
(+h)2x

Lompaupu
''s
ra4?

S
module Cout
atiate it [3:s
Cout;
PAwites output
FA
Xo( Co ybit ubit_R CA
,
B:A.
so, Ctj
Co,RCA:]s,os,
ro,&o, B:0}8,
Cin);
Ch
FA Ao
fo
3:o]4,

8:js,
a)

endodule
F

V;
+ 28-08-22
S? bit
3
Cout
M
(ubtaciom)
M: S brnahy
A)
S
Cout So A
4. y-btRcA M odde
bit
1
kcA Skto
A
A
M
Bo
B, A,tfor.
Ao
Lhil x-bit
2-bit
mutp
A1

x
2
bit
A
ulbeliea. HA

1
Co

B,Ao
B
Bo
B,
B
(1O10) -lof Co BofAo
Co

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A,
Ao
Bo Ao

Cormyact |-bt
(sAoBot R)
A Lo

Co
conanato
2-bitmoduule.end Sate duleendmo Vemilog
(de:
Aoc,
wie
Boc;
module leul; Cutput
0
Se,lo;Eo, inputBo;Ar,
end hot N
9
otbiBCmyr
Bo
B
(As,eo,
eo,
ho, fl
l); An,f

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ene bito t

onebi torp"
Bo

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