SPICE Modeling of Memristors

Hisham Abdalla Matthew D. Pickett

Hewlett Packard Laboratories Hewlett Packard Laboratories
Palo Alto, California 94304 Palo Alto, California 94304
hisham.abdalla@hp.com matthew.pickett@hp.com

Abstract—In this paper we present a SPICE model for the

titanium dioxide memristor device from its modeling equations
as described in [1] and compare the SPICE simulations to the
experimental data.

I. I NTRODUCTION
In 1971 Leon Chua reasoned that in addition to the three
known circuit elements, resistors, capacitors and inductors,
there should be a fourth fundamental element which he called
a memristor [2]. Strukov et al. [3] proposed a simple one-
dimensional model for bipolar resistance switching in TiO2
which was shown to be equivalent to a memristor element.
Several articles have since appeared in the literature presenting
SPICE models for memristors [4][5][6][7][8][9] based on the
Fig. 1. Shown is a layer of titanium dioxide (TiO2 ) sandwiched between
physical models put forward by Strukov et al. [3] and Yang two platinum electrodes. After an electroforming process oxygen vacancies
et al. [10], both of which utilize Chua’s first linear memristor are formed resulting in a highly conductive channel (TiO2−X ) that shunts
element [3]. A more detailed model was presented in [1] which most of the oxide film except for a narrow tunnel barrier w.
accounts for the nonlinearities observed in TiO2 conduction
and switching behavior and is based on the later and more
general memristive system framework of Chua and Kang [11]. voltage v across the device and the state variable w. Equation
Here we present the implementation of the memristive model (2) describes the dynamics of the state variable w as a function
of [1] in SPICE and compare the SPICE simulations to the of the current i, and w itself. The current i through the device
experimental data. has been modeled after that of a tunneling junction [12] and
its functional form is given by:
II. T HE M EMRISTOR jo A  √ √ 
Shown in Fig. 1 is the schematic of the two-terminal mem- i= 2
φI e−B φI − (φI + e |vg |)e−B φI +e|vg | (3)
w
ristor [1]. A thin film of titanium dioxide (TiO2 ) is sandwiched
where
between two platinum electrodes. After an electroforming
process, oxygen vacancies are formed resulting in a highly e 1.2λw
jo = , w1 = , w = w2 − w1 (4)
conductive channel (TiO2−X ) that shunts most of the oxide 2πh φ0
film except for a narrow tunnel barrier w. The tunnel barrier w1 + w2 1.15λw w2 (w − w1 )
width (w) can be modulated by applying a voltage across the φI = φ0 −e |vg | ( )−( ) ln ( )
w w w1 (w − w2 )
device. (5)
√
4πw 2m
III. D EVICE E QUATIONS B= (6)
h
The memristor is a non-linear time-varying device. The i-v
9.2λ
characteristic of this device can be described by two coupled w2 = w1 + w(1 − ) (7)
equations: (3φ0 + 4λ − 2e |vg |)
i = G(w, v)v (1) e2 ln(2)
λ= (8)
dw 8πκε0 w
= f (w, i) (2)
dt where A is the channel area of the memristor, e is the
where i is the current through the device, v is the voltage electron charge, vg is the voltage across the tunnel barrier,
across the device, and w is a state variable. Equation (1) m is the mass of the electron, h is Planck’s constant, κ is
describes the static i-v characteristic of the device where G the dielectric constant, and φ0 is the barrier height in electron
is the conductance of the device which is a function of the volts [1]. This model is defined to be symmetric about zero

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in terms of the current versus voltage behavior. For the sake V. M ODIFYING THE C URRENT E QUATION
of simplicity, the model neglects the experimentally observed To implement the SPICE model of the memristor, equation
diode-like asymmetry for which the positive side is more (3) was modified such that the barrier height φI is in volts
conductive than the negative side. The tunnel barrier width w is instead of electron volts and the time-varying tunnel barrier
time-varying and has been modeled according to the following width w, which is modeled as a voltage node, is in nanometers
equations: instead of meters. The modified equations are given by:
In the case of off switching (i > 0)
jo Ae  √ √ 
i= 2
φI e−B φI − (φI + |vg |)e−B φI +|vg | (11)
dw |i| w − aof f |i| w w
= f of f sinh ( ) exp(− exp( − )− )
dt iof f wc b wc w1 + w2 1.15λw w2 (w − w1 )
(9) φI = φ0 −|vg | ( )−( ) ln( ) (12)
w w w1 (w − w2 )
with the fitting parameters fof f =3.5 ± 1 μs, iof f =115 ± 4 √
μA, aof f =1.2 ± 0.02 nm, b=500 ± 70 μA and wc =107 ± 4 4πw ∗ 10−9 2me
B= (13)
pm, whereas in the case of on switching (i < 0) h
|i| aon − w |i| 9.2λ
dw
= −f on sinh ( ) exp(− exp( − )−
w
) w2 = w1 + w(1 − ) (14)
dt ion wc b wc (3φ0 + 4λ − 2 |vg |)
(10) e ln(2)
with the fitting parameters fon =40 ± 10 μs, ion =8.9 ± 0.3 λ= (15)
8πκε0 w ∗ 10−9
μA, aon =1.8 ± 0.01 nm, b=500 ± 90 μA and wc =107 ± 3
pm. In our SPICE model we use the mean value of these where φ0 and φI are in volts, w1 , w2 , and w are in nm
parameters. and (4) remains unmodified. Using the mean value of the
parameters A=104 ± 2500 nm2 , k=5 ± 1, and φ0 =0.95 ± 0.03
IV. C IRCUIT M ODEL eV ([1]), the equations can be written as
0.0617  √ √ 
Fig. 2 shows the schematic of the two-terminal memristor i= 2
φI e−B φI − (φI + |vg |)e−B φI +|vg | (16)
w
device. The device has been assigned a polarity to indicate
that the behavior of the device depends on the polarity of the w1 + w2 0.1148 w2 (w − w1 )
φI = φ0 − |vg | ( )−( ) ln( ) (17)
applied voltage. The memristor has been modeled as an ohmic w w w1 (w − w2 )
resistance Rs in series with an electron tunnel barrier where 9.2λ
w is the width of the tunnel barrier [1]. w2 = w1 + w(1 − ) (18)
(2.85 + 4λ − 2 |vg |)
0.0998
B = 10.24634w, w1 = 0.1261, λ = (19)
w
It can be shown from (18) that the maximum allowable
voltage across the tunnel barrier is
Fig. 2. Schematic of the two-terminal memristor device. The response of
the device depends on the polarity of the applied voltage. 2.85 − 5.2λ
vg (max) = (20)
2
Fig. 3 shows our circuit model for the memristor where which approximately equals 1.2V at w=1.2nm. At this voltage,
the electron tunnel barrier is modeled as a voltage dependent w2 = w1 , and the current becomes infinite.
current source i and the conducting (TiO2−X ) channel is
VI. M ODELING THE S TATE E QUATIONS
modeled as a series resistance Rs . The voltage V across the
entire device is split into two parts: vg across the tunnel barrier The state equations (9) and (10) that govern the width of the
and vR across the resistance Rs such that V = vg + vR . tunnel barrier w are modeled using the circuit shown in Fig. 4.
The voltage w across the capacitor represents the instantaneous
width of the tunnel barrier and is implemented by the equation
dw 1
= (Gof f − Gon ) (21)
dt C
where the current source Gof f models the right hand side of
(9) while the current source Gon models the right hand side
of (10). The capacitor C was set at 1nF to take into account
that w is in nm. The current source Gof f is turned on in the
off switching mode (i > 0), while Gon is turned on in the on
Fig. 3. Circuit model of the two-terminal memristor device. The memristor
can be modeled as a voltage-dependent current source in series with a fixed
switching mode (i < 0). The parameters aof f , aon , and wc
resistance Rs (215Ω). int is an internal node which is not accessible by the were scaled such that aof f =1.2, aon =1.8, and wc =107e-3, to
external circuitry. take into account that w is in nm.

1833
 experiment if i-v curves are to be compared. The qualitative
switching behavior is captured by the model, but the simula-
tion deviates quantitatively for the on-switching portion of the
curve. The nature of this discrepancy is noted below.

Fig. 4. Modeling the state variable equations governing the rate of change of
w. The tunnel barrier width w is modeled as the voltage across a capacitor C.
The current sources Gof f and Gon can increase or decrease w respectively.
The initial condition of the capacitor C in volts corresponds to the initial value
of the tunnel barrier width w in nm.

Fig. 5. Schematic of circuit used in the simulations. Vext is the externally

VII. SPICE M ODEL
The following is the SPICE model for the memristor:
.SUBCKT modelmemristor plus minus PARAMS:
+phio=0.95 Lm=0.0998 w1=0.1261 foff=3.5e-6
+ioff=115e-6 aoff=1.2 fon=40e-6 ion=8.9e-6
+aon=1.8 b=500e-6 wc=107e-3
G1 plus internal value={sgn(V(x))*(1/V(dw))^2*0.0617*
(V(phiI)*exp(-V(B)*V(sr))-(V(phiI)+abs(V(x)))*
exp(-V(B)*V(sr2)))}
Esr sr 0 value={sqrt(V(phiI))}
Esr2 sr2 0 value={sqrt(V(phiI)+abs(V(x)))}
Rs internal minus 215
Eg x 0 value={V(plus)-V(internal)}
Elamda Lmda 0 value={Lm/V(w)}
Ew2 w2 0 value={w1+V(w)-
(0.9183/(2.85+4*V(Lmda)-2*abs(V(x))))}
EDw dw 0 value={V(w2)-w1}
EB B 0 value={10.246*V(dw)}
ER R 0 value={(V(w2)/w1)*(V(w)-w1)/(V(w)-V(w2))}
EphiI phiI 0 value=
{phio-abs(V(x))*((w1+V(w2))/(2*V(w)))-
1.15*V(Lmda)*V(w)*log(V(R))/V(dw)}
C1 w 0 1e-9 IC=1.2
R w 0 1e8MEG
Ec c 0 value={abs(V(internal)-V(minus))/215}
Emon1 mon1 0 value={((V(w)-aoff)/wc)-(V(c)/b)}
Emon2 mon2 0 value={(aon-V(w))/wc-(V(c)/b)}
Goff 0 w value={foff*sinh(stp(V(x))*V(c)/ioff)*
exp(-exp(V(mon1))-V(w)/wc)}
Gon w 0 value={fon*sinh(stp(-V(x))*V(c)/ion)*
exp(-exp(V(mon2))-V(w)/wc)}
.ENDS modelmemristor
VIII. S IMULATION R ESULTS
To compare our model with the experimental measurements
from [1] we simulated in PSPICE the circuit shown in Fig. 5
where the 2.4kΩ resistor accounts for the electrode resistance
in the experimental setup. Fig. 6 shows a comparison of the
simulated and experimental i-v behavior of the memristor
when excited by a +6/-3V triangular waveform with a pe-
riod of 6s. Due to the dynamical nature of the device, the
excitation waveform must be identical between simulation and
applied voltage and R accounts for the electrode resistance.
Fig. 6. The simulated i-v curve for the memristor (solid line) and the
corresponding experimental data (black dots) where imem is the current
through the memristor and Vmem is the voltage across the entire memristor.
The externally-applied voltage sweep is shown in the inset and the initial
condition for w was set at 1.2nm.
Fig. 7 shows the simulated and experimental response of the
memristor to an off-switching voltage step function of different
amplitudes based on data previously published in [1]. Fig. 7a
shows the time evolution of the state variable w (tunnel barrier
width), and Fig. 7b shows the time evolution of the current
through the memristor. The plots show agreement between
simulation and the experimental data.
Fig. 8 shows a comparable simulation of the memristor
when on-switching voltage step functions of different ampli-
tudes are applied. As anticipated by the i-v simulation, the
qualitative behavior is captured, but there is a quantitative
discrepancy between the simulated and experimental current
magnitudes. Fig. 8b shows that the current for the -1.4V input
(blue line) is off by 20μA. Due to the extreme nonlinearity
of the dynamics with respect to the current magnitude (Eq.
10), the roughly 20% error in current causes the simulated
memristor to switch substantially faster than the experimental
memristor. This issue highlights the main challenge of sim-
ulating our memristive devices: the conduction equation and
the differential state evolution equation are coupled and both
are highly nonlinear. The leads to an amplification of any

1834
errors in parameters or simplifications present in either aspect
of the model. To illustrate the sensitivity to the parameters,
the dielectric constant κ was increased by 10% resulting in
a decease in current and an order of magnitude delay in
switching transition (red line). ion was also increased by 10%
(cyan and magenta lines) resulting in a significant delay in the
switching transition.
Fig. 7. The response of the memristor to an off-switching voltage step
function (100ns rise time) of different amplitudes (see legend). The solid
lines are from simulation while the dots are experimental data from [1]. a)
The instantaneous value of the tunnel barrier width w as a function of time.
b) The current (imem ) through the memristor as a function of time (same
legend as in a). The maximum step size for this simulation was 200μs.
IX. C ONCLUSION
We presented a SPICE model of a TiO2 memristive device.
The circuit model provides a qualitatively accurate description
of switching in our devices and a quantitatively accurate
description of off-switching. When driven with a voltage
through a load-line, as the experiments were performed, the
on-switching simulations exhibit a roughly 20% overestima-
tion of current for a given memristor voltage. This error is
significantly amplified by the nonlinear dynamical switching
equation which demonstrates a key concern for simulation of
nonlinear memristive devices. Future models will incorporate
the experimentally observed asymmetry in the conduction
model in order to eliminate this 20% overestimation in current.
X. ACKNOWLEDGMENT
This work is being funded in part by the SyNAPSE program
of the Defense Advanced Research Projects Agency (DARPA)
under Agreement HR0011-09-3-00011 .
1 Approved for Public Release, Distribution Unlimited. The views, opinions,
and/or findings contained in this article/presentation are those of the author
and should not be interpreted as representing the official views or policies,
either expressed or implied, of DARPA or the Department of Defense.
1835
Fig. 8. The response of the memristor to an on-switching voltage step
function (100ns rise time) of different amplitudes (see legend). The solid
lines are simulation results while the dots correspond to experimental data
from [1]. The black dots are from three -1.25V measurements while the blue
dots are from two -1.4V measurements. The blue (-1.4V) and black (-1.25V)
simulations use the mean value of the parameters. For the red line (-1.4V,
k=5.5), the dielectric constant k was increased by 10% to 5.5. For the cyan
(-1.4V) and magenta (-1.25V) lines, the parameter ion was increased by 10%
to 9.79μA. a) The instantaneous value of the width w of the tunnel barrier as
a function of time b) The current (imem ) through the memristor as a function
of time. The maximum step size for this simulation was 20ns.
R EFERENCES
[1] M. D. Pickett, D. B. Strukov, J. L. Borghetti, J. J. Yang, G. S. Snider,
D. R. Stewart, and R. S. Williams, “Switching dynamics in titanium
dioxide memristive devices,” Journal of Applied Physics, vol. 106, no. 7,
pp. 074 508 –074 508–6, Oct. 2009.
[2] L. Chua, “Memristor-the missing circuit element,” Circuit Theory, IEEE
Transactions on, vol. 18, no. 5, pp. 507 – 519, Sep. 1971.
[3] D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams, “The
memristor found,” Nature, vol. 453, no. 7191, pp. 80–83, May. 2008.
[4] E. Lehtonen and M. Laiho, “CNN using memristors for neighborhood
connections,” feb. 2010, pp. 1 –4.
[5] D. Batas and H. Fiedler, “A memristor SPICE implementation and
a new approach for magnetic flux controlled memristor modeling,”
Nanotechnology, IEEE Transactions on, vol. PP, no. 99, pp. 1 –1, 2009.
[6] D. Biolek, Z. Biolek, and V. Biolkova, “SPICE modeling of memristive,
memcapacitative and meminductive systems,” Aug. 2009, pp. 249 –252.
[7] A. Rak and G. Cserey, “Macromodeling of the memristor in spice,”
Computer-Aided Design of Integrated Circuits and Systems, IEEE Trans-
actions on, vol. 29, no. 4, pp. 632 –636, Apr. 2010.
[8] S. Benderli and T. Wey, “On SPICE macromodelling of TiO2 memris-
tors,” Electronics Letters, vol. 45, no. 7, pp. 377–379, 2009.
[9] M. Mahvash and A. C. Parker, “A memristor SPICE model for designing
memristor circuits,” Aug. 2010, pp. 989 –992.
[10] J. J. Yang, M. D. Pickett, X. Li, D. A. Ohlberg, D. R. Stewart, and
R. S. Williams, “Memristive switching mechanism for metal/oxide/metal
nanodevices,” Nat Nanotechnol, vol. 3, pp. 429–433, Jul 2008.
[11] L. Chua and S. M. Kang, “Memristive devices and systems,” Proceed-
ings of the IEEE, vol. 64, no. 2, pp. 209 – 223, feb. 1976.
[12] J. Simmons, “Electric tunnel effect between dissimilar electrodes sep-
arated by a thin insulating film,” Journal of Applied Physics, vol. 34,
no. 9, pp. 2581–2590, 1963.