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Topic: Logic Gates

Name- Shivansh Sengar

Class- XII Super 30 B

Roll No. - 28
Certificate Of Completion

This is to certify that Shivansh Sengar of class XII, Roll No.-28

has prepared a project on the Topic “Logic Gates” and has

satisfactory completed the required physics project under the

guidance of Mr. Sandeep Jha during the session 2023-24,

towards partial fulfillment of credit for the physics practical

evaluation of CBSE 2023 and submitted satisfactory report as

complied in the following pages under my supervision.

TEACHER SIGNATURE
Acknowledgement

I would like to extend my sincere and heartfelt obligation towards


all those who have helped me in making this project. Without their
active guidance, help, cooperation and encouragement, I would
not have been able to present the project on time.
I am extremely thankful and pay my sincere gratitude to my
teacher Mr. Sandeep Jha for his valuable guidance and support
for completion of this project. I also acknowledge with deep
sense of reverence, my gratitude towards other faculty
members, my parents and my friends for their valuable
suggestions given to me in completing this project.
Contents

1. INTRODUCTION

2. TYPES OF GATE

3. NOT GATE

4. OR GATE

5. AND GATE

6. NAND GATE

7. NOR GATE

8. PROCEDURE

9. OBSERVATION

10. INFERENCE
INTRODUCTION

LOGIC GATES
A gate is a digital circuit that follows certain relationship between
the input and output voltages. Therefore, they are generally know
as logic gates-gates because they control the flow of information.

I. NOT GATE

This is the most basic gate, with one input and one output. It
produce a ‘1’ output if the input is ‘0’ and vice versa. That is, it
produces inverted version of the input as its output.
II. OR GATE

An ‘OR gate’ has two or more inputs with one output. The output is
‘1’ when either of the inputs are ‘1’ that is if any of the input is high
the output is high.
III. AND GATE

An ‘AND gate’ gas two or more inputs and one output. The output of
AND gate is 1 only when the inputs are 1.
THE ‘’NOT GATE’’

The NOT gate is a one input and output logic gate. It combines the
input A with the output Y following the Boolean expression.
Y=A
I.e. equals A. The way, the NOT gate gives the output, it is also called
invertor. It is represented by the symbol:

It produces 1 output if input is 0 and vice-versa. That is it produces an


inverted version of the input at its output.
ELECTRONIC REALIZATION OF
NOT GATE

In practice a NOT gate can be realized by using transistor as shown


in the figure below:

An electronic circuit of a NOT gate using n-p-n transistor is shown in


the above figure. The base of the transistor is connected to the input
through a resistance Rb and the emitter “E” is earthed. The collector
is connected to a 5V battery and the output Y is the voltage at C w.r.t
earth. The resistor Rb and Rc are so chosen that
If the input is at “0”voltage connected to the collector. The
operation can be understood as shown.
When input is earthed, the base of the transistor also gets earthed.
The base emitter junction is not forward biased but the base collector
junction is reversed biased. As the emitter is “1” the base current is
“0”. Hence collector current is also “0”. Under such conditions the
transistor is in cut off mode and voltage at C will be
+5V w.r.t earth due to battery in the collector circuit. Hence the
output Y=1.
When the input is connected to the positive terminal of the battery,
the base emitter junction gets forward biased. There will be emitter
current, base current and collector current. The values of resistors
Rb and Rc are so adjusted that in this arrangement a large collector
current flows. In this situation, the transistor is said to have gone to
saturation state. The voltage drop across Rc due to forward biasing
of emitter is just equal to 5V, which is equal and opposite to the
potential drop across Rc due to battery in collector circuit. Hence
voltage at C=“0” volt. Therefore the output is at
“0”level. Thus the operation of the output is based on the following
rule. The output of the NOT gate assumes “1” if both inputs are at
“0”level or vice-versa.
THE ‘’OR GATE’’
The OR gate is a two inputs and one output logic gate. It combines the
inputs A and B with output Y following the Boolean expression.
Y=A+B
I.e. Y equals A or B. The OR gate is represented by the symbol:

The output gate has two or more inputs with one output. The output Y
is 1 when either input A or input B or both are 1, that is, if any of the
input is high, the output is high.
ELECTRONIC REALIZATION OF OR
GATE
In practice an OR gate can be realized by electronic circuit making
use of 2(two) ideal p-n junction diodes D1 and D2. Here negative
terminal of the battery is grounded and corresponds to “0”level and
the positive terminal of the battery (i.e. Voltage 5V here)
corresponds to “1”level. The output Y is at voltage C w.r.t earth. The
operation of the OR gate can be understood as follows.

When both A and B are connected to earth (i.e. A-0 and B=0) both
the diodes do not conduct and therefore no voltage develops
across the resistance R. The voltage at C is “0/” w.r.t earth. Hence
the output Y=0.
When one of the terminals is connected to earth and the other
positive terminal of the battery, the junction diode with “0” input
(connected to earth) does not conduct while 5V takes place across
resistance R with C at 5V w.r.t earth. Therefore the output
Y=1.When both are connected to the positive terminal of the
battery, the two diode become forward biased and they will both
conduct. Since connected in parallel voltage drop across R cannot
exceed 5V with C at +5Vw.r.t earth. Hence the output is Y=1.
ELECTRONIC REALIZATION OF OR
GATE

TRUTH TABLE:

DIAGRAM:
THE ‘’AND GATE’’

The AND gate is also a two inputs and one output logic gate. IT
combines the inputs A and B with the output Y following the Boolean
expression.
Y=A.B
I.e. equals A and B. The AND gate is represented by the symbol

An AND gate has two or more inputs and one output. The output Y of
AMD gate is 1 only when input A and B are both 1, that is, both the
inputs should be high than the output will be high. The truth table is
given as:
Truth table
ELECTRONIC REALIZATION OF
AND GATE

DIAGRAM
PROCEDURE

 The logic gate circuit board is connected to the mains


 The power of the board is switched on.

For AND gate:


The plug wire is put inside the socket named AND gate.
 Observations are noted for input having first high and then low
value. Similarly the observations are taken for OR gate and
NOT gate.
 All the observations are recorded.
OBSERVATION

Following are the observations made from the experiment

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