(Jagrati Sharma)

Class VII F
Neehar Meera National
Sr. Secondary school
 This is to certify that Jagrati Sharma of class XII,
Section-F, Roll no- 11 has prepared a project on the
topic”Logic Gates” and has satisfactorily completed the
required physics project under the guidance of Mr. Anuj sir
during the session 2019-2020, towards partial fulfilment of
credit for the physics practical evaluation of CBSE 2020 and
submitted satisfactory report as compiled in the following
pages under my supervision.

Teacher Signature Principal Signature

 I selected this project as a part of my studies , Titled
“Logic Gates”. as a gratitude, I convey my sincere thanks to
Principal mam Mrs. Kalplata Chandrahash and physics teacher
Mr. Anuj Sir who were a constant guide during the period of
studies and my parents support, without their help it would not
have been possible for me to complete this project.

Date: (Jagrati Sharma)

Class VII F
Neehar Meera National
Sr. Secondary school
1.INTRODUCTION
2.TYPES OF GATE
3.NOT GATE
4.OR GATE
5.AND GATE
6.NAND GATE
7.NOR GATE
8.PROCEDURE
9.OBSERVATION
10.INFERENCE
11.CONCLUSION
12.BIBLIOGRAPHY
INTRODUCTION
LOGIC GATES
A gate is a digital circuit that follows certain relationship between
the input and output voltages. Therefore, they are generally know
as logic gates-gates because they control the flow of information.

I.NOT GATE
This is the most basic gate, with one input and one output. It
produce a ‘1’ output if the input is ‘0’ and vice versa. That is, it
produces inverted version of the input as its output.

II.OR GATE
An ‘OR gate’ has two or more inputs with one output. The output
is ‘1’ when either of the inputs are ‘1’ that is if any of the input is
high the output is high.

III.AND GATE
An‘AND gate’ gas two or more inputs and one output. The output
of AND gate is 1 only when the inputs are 1.
THE ‘’NOT GATE’’
The NOT gate is a one input and output logic gate. It combines
the input A with the output Y following the Boolean expression.
Y=A
i.e.Y equals A. The way, the NOT gate gives the output, it is also
called invertor. It is represented by the symbol:

It produces 1 output if input is 0 and vice-versa. That is it

produces an inverted version of the input at its output.
ELECTRONIC
REALIZATION OF NOT
GATE
In practice a NOT gate can be realized by using transistor as
shown in the figure below:

An electronic circuit of a NOT gate using n-p-n transistor is shown

in the above figure. The base of the transistor is connected to the
input through a resistance Rb and the emitter “E” is earthed. The
collector is connected to a 5V battery and the output Y is the
voltage at C w.r.t earth. The resistor Rb and Rc are so choosen
that if the input is at “0”voltage connected to the collector. The
operation can be understood as shown.
When input is earthed, the base of the transistor also gets
earthed. The base emitter junction is not forward biased but the
base collector junction is reversed biased. As the emitter is “1”
the base current is “0”. Hence collector current is also “0”. Under
such conditions the transistor is in cut off mode and voltage at C
will be +5V w.r.t earth due to battery in the collector circuit. Hence
the output Y=1.
When the input is connected to the positive terminal of the
battery, the base emitter junction gets forward biased. There will
be emitter current, base current and collector current . The values
of resistors Rb and Rc are so adjusted that in this arrangement a
large collector current flows. In this situation, the transistor is said
to have gone to saturation state. The voltage drop across Rc due
to forward biasing of emitter is just equal to 5V, which is equal
and opposite to the potential drop across Rc due to battery in
collector circuit. Hence voltage at C=“0” volt. Therefore the output
is at “0”level. Thus the operation of the output is based on the
following rule. The output of the NOT gate assumes “1” if both
inputs are at “0”level or vice-versa.
THE ‘’OR GATE’’
The OR gate is a two inputs and one output logic gate. It
combines the inputs A and B with output Y following the Boolean
expression.
Y=A+B
i.e. Y equals A or B. The OR gate is represented by the symbol:

The output gate has two or more inputs with one output. The
output Y is 1 when either input A or input B or both are 1, that is,
if any of the input is high, the output is high.
ELECTRONIC
REALIZATION OF OR
GATE
In practice an OR gate can be realized by electronic circuit
making use of 2(two) ideal p-n junction diodes D1 and D2. Here
negative terminal of the battery is grounded and corresponds to
“0”level and the positive terminal of the battery(i.e.voltage 5V
here) corresponds to “1”level. The output Y is at voltage C w.r.t
earth. The operation of the OR gate can be understood as
follows.

When both A and B are connected to earth(i.e. A-0 and B=0)both

the diodes do not conduct and therefore no voltage develops
across the resistance R. The voltage at C is “0/” w.r.t earth.
Hence the output Y=0.
When one of the terminals is connected to earth and the other
positive terminal of the battery, the junction diode with “0”
input(connected to earth) does not conduct while 5V takes place
across resistance R with C at 5V w.r.t earth. Therefore the output
Y=1.

When both are connected to the positive terminal of the battery,

the two diode become forward biased and they will both conduct.
Since connected in parallel voltage drop across R cannot exceed
5V with C at +5Vw.r.t earth. Hence the output is Y=1.
ELECTRONIC
REALIZATION OF OR
GATE

TRUTH TABLE:
DIAGRAM:
THE ‘’AND GATE’’
The AND gate is also a two inputs and one output logic gate. IT
combines the inputs A and B with the output Y following the
Boolean expression.
Y=A.B
i.e.Y equals A and B. The AND gate is represented by the symbol

An AND gate has two or more inputs and one output. The output
Y of AMD gate is 1 only when input A and B are both 1,that is
,both the inputs should be high than the output will be high. The
truth table is given as:
Truth table
ELECTRONIC
REALIZATION OF AND
GATE
In practice an AND gate can be realized by electronic circuit
making u se of 2 ideal p-n junction diodes D1 and D2 as shown in
the figure below

Here negative terminal of the battery is grounded and

corresponds to “0”level and the positive terminal of the
battery(i.e.voltage 5V here)corresponds to”1”level. The output Y
is at voltage C w.r.t earth. The operation of the AND gate can be
understood as follows.
When both A and B are connected to earth(i.e. A=0 and B=0)both
the diodes gets forward biased and hence conduct. No voltage
drop takes place across the diodes. Therefore a voltage drop of
5V takes place across the resistance R with C at “0” potential
w.r.t earth. Thus the output Y=0

When one of the two terminals is connected to earth and the

other positive terminal of the battery the junction diodes with”0”
input(connected to earth) will conduct while the other connected
to battery does not conduct. No voltage drop takes place across
diode which is earthed. Therefore, a voltage drop of 5V takes
place across resistance R having D at +5V and C at 0v w.r.t
earth. Now the output Y=0.

When both are connected to the positive terminal of the battery,

none of the diodes will conduct. There will be no current through
R. Now potential at C=0 potential at D which is +5V w.r.t earth.
Hence output Y=1.

Thus the operation of the output is based on the following rule.

The output of the AND gate assumes “1” only if all the inputs
assume “1”.
ELECTRONIC
REALIZATION OF AND
GATE

DIAGRAM
 PROCEDURE
 The logic gate circuit board is connected to the mains
 The power of the board is switched on.

For AND gate:

 The plug wire is put inside the socket named AND gate.
 Observations are noted for input having first high and then
low value. Similarly, the observations are taken for OR gate
and NOT gate.
 All the observations are recorded.
OBSERVATION
Following are the observations made from the experiment
INFERENCE
>For AND gate, when either of the inputs were low, the output
was also low. When both inputs were low, output was low but
when both the inputs were high, output was also high.
>For OR gate, when either of the inputs were low or high
alternatively, the output was high. When both inputs were low,
outputs was low but when both the inputs were high, output was
also high.

>For NOT gate, when input is high, output is low and vice versa.
It inverses the input current.
CONCLUSION
Developing such a project was an enormous task but an
enlightening one too. The project work that has perceived in our
minds and the final outcome is slightly different. While working on
this project we encountered many problems, theoretical as well
as practical which were reasonably difficult to manage. This was
partly due to my inexperience with the process of experimenting
to get the desired result and the approach in which the initial
project study was conducted.

Overall I have learnt a lot during the process of development of

this project and I have tried my level best to make it as good as
possible keeping in minds the time constrain and the project
allocated to me.
BIBLIOGRAPHY
1)Comprehensive practical for physics class 12.
2)Internet:
www.google.com
www.cbseprojects.com