UNIT 4-MEMORY ORGANIZATION :

Internal Memory:
Semiconductor main memory, Error correction, Advanced DRAM organization,
Virtual memory systems and cache memory systems.

External Memory:
Organization and characteristics of magnetic disk, Magnetic tape, Optical
memory, RAID, Memory controllers.
ROLL OF MULTIPLEXER
MEMORY AND IO DEVICES
CHARACTERISTICS OF MEMORY
CHARACTERISTICS OF MEMORY
 MEMORY HIERARCHY
How Much?
How Fast?
How Expensive?

Faster Access time—greater Cost per bit

Greater Capacity- Smallest Cost per bit
Greater Capacity- Slowest access time
MEMORY HIERARCHY
 CACHE MEMORY PRINCIPLES
-Designed to have fast access time of expensive memory with a large size
capacity of slow & less expensive memories.
-Cache basically hold some portion of main memory.
-When processor wants to read a word from memory, a check is made to
determine whether that word is present in cache if yes then it is delivered to
processor, if not then it is copied from main memory into cache and also
delivered to processor.
 LEVELS IN CACHE MEMORY AND
- CACHE STRUCTURE
 CACHE READ OPERATION
-
 SEMICONDUCTOR MEMORIES
Basic element is memory Cell
 SEMICONDUCTOR MEMORIES-DRAM
& SRAM
RAM is classified into DRAM and SRAM.
RAM is volatile memory.(Should be provided with constant
voltage supply)
RAM can be only used as temporary storage.
DRAM & SRAM are Random Access memories.(Access Time
and decoding circuit)
DRAM – Data as a charge on capacitor.(Capacitor discharge
with time-require refresh circuit)
SRAM- Use FF/Logic gates/transistors to store data.
SEMICONDUCTOR MEMORIES-DRAM
STRUCTURE
 SEMICONDUCTOR MEMORIES-SRAM
STRUCTURE
There are two types of basic electronic storage elements – latch and flip-flop.
The latch - a memory cell built from two feedback connected inverters
The set-reset flip-flop (RS-FF) - a memory cell built from two feedback connected
NOR or NAND gates.
These circuits use positive feedback to store information.
These circuits have two stable states – bistable circuits.
 SEMICONDUCTOR MEMORIES-SRAM
STRUCTURE
T1,T2,T3,T4 are cross connected produce a stable logic.

Logic 1, C1 is high , C2 is low, T1 and T4 are off.

Logic 0, C1 is Low , C2 is High, T2 and T3 are off.

Address Line control 2 transistor, T5 and T6

SEMICONDUCTOR MEMORIES-DRAM
VS SRAM
 SEMICONDUCTOR MEMORIES- ROM
 As the name suggests, a read-only memory (ROM) contains a
permanent pattern of data that cannot be changed.
 A ROM is nonvolatile
 A ROM is created like any other integrated circuit chip, with the
data actually wired into the chip as part of the fabrication process.
 This presents two problems:
 The data insertion step includes a relatively large fixed cost,
whether one or thousands of copies of a particular ROM are
fabricated.
 There is no room for error. If one bit is wrong, the whole batch of
ROMs must be thrown out….Less Expensive alternative is PROM
 SEMICONDUCTOR MEMORIES- PROM
 Like ROM, PROM is nonvolatile.
 For the PROM, the writing process is performed electrically and
may be performed by a supplier or customer at a time later than the
original chip fabrication.
 Special equipment is required for the writing or “programming”
process….called as ROM writer.
 There are three common forms of read-mostly(only) memory:
EPROM, EEPROM, and flash memory.
 SEMICONDUCTOR MEMORIES-
 EPROM
The optically erasable &read-only
programmable EEPROM memory (EPROM) is read and
written electrically, as with PROM. 
 Erasure is performed by shining an intense ultraviolet light through a window that
is designed into the memory chip.
 Thus, the EPROM can be altered multiple times and, like the ROM and PROM,
holds its data.
 For comparable amounts of storage, the EPROM is more expensive than PROM,
but it has the advantage of the multiple update capability.
 A more attractive form of read-mostly memory is electrically erasable
programmable read-only memory (EEPROM). This is a read-mostly memory that
can be written into at any time without erasing prior contents; only the byte or
bytes addressed are updated.
 Being updatable in place, using ordinary bus control, address, and data lines.
 EEPROM is more expensive than EPROM and also is less dense, supporting fewer
bits per chip.
 SEMICONDUCTOR MEMORIES- FLASH
 Flash memory -so named because of the speed with which it can be
reprogrammed.
 First introduced in the mid-1980s.
 flash memory is intermediate between EPROM and EEPROM in both cost
and functionality.
 An entire flash memory can be erased in one or a few seconds, which is much
faster than EPROM. 
 In addition, it is possible to erase just blocks of memory rather than an entire
chip.
 Flash memory gets its name because the microchip is organized so that a
section of memory cells are erased in a single action or “flash.”
 However, flash memory does not provide byte-level erasure.
ERROR DETECTING CODE- HAMMING
CODE
 ADVANCED DRAMS-ADRAM &
SDRAM

-Rising Edge?
-Trailing Edge?
 ADVANCED DRAM- SDRAM( SINGLE
DATA RATE)

-I/O Clock Frequency?

-RAM internal Clock Frequency?
-Bandwidth?.....100Mhz*8 Bytes(64) = 800Mbytes/s=
0.8Ghz/S
 ADVANCED DRAM – DDR-
SDRAM(DOUBLE DATA RATE)

-Data is transferred on rising edge as well as on trailing

edge.
-transfer rate doubled.
 ADVANCED DRAM – DDR-
SDRAM(DOUBLE DATA RATE)

-Single Channel- 64 bit

-Dual channel- 128 bit
 ADVANCED DRAM – DDR-
SDRAM(DOUBLE DATA RATE)
MEMORY ORGANIZATION
MEMORY ORGANIZATION
MEMORY ORGANIZATION
MEMORY ORGANIZATION
MEMORY ORGANIZATION
MEMORY ORGANIZATION
 A D VA N C E D D R A M O R G A N I Z AT I O N

Channel- Identified by the Memory C

DIMM- Dual In Line Memory Module
RANK- One Rank to Each Side( 8 Memory IC in one rank)
Chips- Several Chips in a rank
Bank- Several Banks in a chip
Row & Column- Identify memory location
A D VA N C E D D R A M O R G A N I Z AT I O N
A D VA N C E D D R A M O R G A N I Z AT I O N ( S T R U C T U R E A N D B A N K )
A D VA N C E D D R A M O R G A N I Z AT I O N ( S T R U C T U R E A N D B A N K )
AD VA NCE D DR AM O RG A N I Z ATI O N
EXTERNAL MEMORY:
ORGANIZATION AND CHARACTERISTICS OF MAGNETIC DISK, MAGNETIC TAPE, OPTICAL MEMORY, RAID, MEMORY
CONTROLLERS .
MAGNETIC DISK:
MAGNETIC READ AND WRITE MECHANISMS
 MAGNETIC DISK-PHYSICAL CHARACTERISTICS

Head Motion: Fixed ( One head per track)/Movable ( only one head per platter
per side)
Disk Portability: A nonremovable disk is permanently mounted in the disk drive; the
hard disk in a personal computer is a nonremovable disk.
A removable disk can be removed and replaced with another disk. Floppy
Disk
Sides of Platter: For most disks, the magnetizable coating is applied to both sides of the
platter, which is then referred to as double sided.
Some less expensive disk systems use single-sided disks.
No. of Platters: Single/Multiple
Head mechanism: Contact (Floppy) /Contactless
MAGNETIC DISK-FORMAT

In this case, each track contains 30 fixed- length sectors of 600 bytes each.
Each sector holds 512 bytes of data plus control information useful to the disk controller.
The ID field is a unique identifier or address used to locate a particular sector.
The SYNCH byte is a special bit pattern that Indicate the beginning of the field.
The track number identifies a track on a surface.
The head number identifies a head, because this disk has multiple surfaces.
The ID and data fields each contain an error-detecting code.
MAGNETIC DISK-PERFORMANCE PARAMETER
•On a movable- head system, the time it takes to position the head at the track is known as seek time.
•The time it takes for the beginning of the sector to reach the head is known as rotational delay.
•The sum of the seek time, if any, and the rotational delay equals the access time, which is the time it
takes to get into position to read or write.
•Once the head is in position, the read or write operation is then performed.
•As the sector moves under the head; this is the data transfer portion of the operation; the time required
for the transfer is the transfer time
OPTICAL MEMORY
Types:
Lased Disc- 1978
Compact Disk 1982
DVD- 1996
Blue Ray Disk- 2006.

Working: Optical
Flat Area, Pits, Laser,
Photo Electric Cell
OPTICAL MEMORY
Capacity: 1/ Wavelength
OPTICAL DISK- PRODUCTS
RAID- STRIPING- SPLITTING OF DATA FOR SPREADING DATA IN
VARIOUS DRIVES
THE MEMORY CONTROLLER IS A DIGITAL CIRCUIT THAT MANAGES THE FLOW
OF DATA GOING TO AND FROM THE COMPUTER'S MAIN MEMORY. ...
A MEMORY CONTROLLER IS SOMETIMES ALSO CALLED A MEMORY CHIP CONTROLLER (MCC)

OR A MEMORY CONTROLLER UNIT (MCU).

 THE MEMORY CONTROLLER

 -It manages read and write operations with system memory, along with keeping the RAM active by
supplying the memory with electric current.
-RAM is generally a speedier solution than other types of storage such as hard drives and optical discs.
However, one of the downfalls to RAM is that it must be supplied with a constant flow of power in order to
operate. As soon as the influx of power stops, the information stored in RAM chips is lost. The memory
controller fulfills this need by "refreshing" the RAM at a constant rate while the computer is powered on.
-During a "refresh," the memory controller sends a pulse of electronic current through the RAM chips.
-This occurs at least every 64 milliseconds, keeping the RAM active and the data stored within secure against
loss due to power interruptions. Without the memory controller, your data would be lost in fractions of a
second.
-The memory controller also manages read and write operations to the RAM chips. It acts to select the
appropriate demultiplexer circuit for data storage and retrieval.
-Dual-channel memory controllers are used in some types of memory. On these, two memory controllers
works. They are positioned on two separate "buses," also called channels, allowing multiple read and write
operations to occur concurrently. The advantage to this is that, in theory, the total bandwidth of the bus is
doubled.
 VIRTUAL MEMORY :