DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

LAB MANUAL

Course Code :
Course :
Year II
Semester IV

Prepared By,
V.Purushothaman
M.E., AP/ECE
Vision of the Institute
To Develop Globally Competitive Human Resource through Virtuous Enlightened Learning

Mission of the Institute

M1: To Impart Quality Technical Education and Research Orientation Enabling the
Technocrats to Fair Well in Global Competition

M2: To Inculcate Committed Leadership Qualities through Ethical Practices

M3: To Acquire Skills through Industry Practices and Develop the habit of life-long
learning

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Vision of the Department

To Produce Competent and Responsible Engineers to meet the growing Challenges in the
field of Electronics and Communication Engineering

Mission of the Department

M1: To impart strong technical competency to learners by using best pedagogical methods

M2: To provide industrial exposure to learners by collaboration with industries

for training, internships, and expert talks.

M3: To imbibe self-learning, collaborative learning, Ethical values and

Environment awareness through Co- curricular and Extra-curricular activities.
PEO’s
PEO 1: Adapt to dynamically evolving technologies for a successful career in
anacademia/Industry/Entrepreneur

PEO 2: Apply the knowledge of Electronics and communication Engineering to solve

real worldproblems

PEO 3: Exhibit effective communication skills and can perform as a team player
with leadershiptraits
PSO’s
PSO 1: Develop Innovative Ideas for an existing / Novel problems through information
and communication technologies.

PSO 2: Apply the Analog and Digital system Design Principles and practices for Developing
Quality products.
PROGRAM OUTCOMES [PO’s]

1. Engineering Knowledge: Apply the knowledge of mathematics, science, engineering

fundamentals, and an engineering specialization to the solution of complex engineering
problems.
2. Problem Analysis: Identify,formulate, research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.
3. Design/development of Solutions: Design solutions for complex engineering problems
and design system components or processes that meet t h e specified needs with
appropriate consideration for the public health and safety, and the cultural, societal, and
environmentalconsiderations.
4. Conduct Investigations of Complex Problems: Use research-based knowledgeand
researchmethods including design of experiments, analysis and interpretation of data,
and synthesis of the information to provide validconclusions.
5. Modern Tool usage: Create, select, and apply appropriate techniques, resources, and
modern engineering and IT tools including prediction and modeling to complex
engineering activities with an understanding of thelimitations.
6. The Engineer and Society: Apply reasoning informed by the contextual knowledge to
assess societal, health, safety, legal and cultural issues and the consequent
responsibilities relevant to the professional engineeringpractice.
7. Environment and Sustainability: Understand the impact of theprofessional
engineering solutions in societal and environmental contexts, and demonstrate the
knowledge of, and need for sustainable development.
8. Ethics: Apply ethical principles and commit toprofessional ethics and responsibilities and
norms of the engineeringpractice.
9. Individual and Team Work: Function effectively as an individual, and as a member or
leader in diverse teams, and in multidisciplinarysettings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend
and write effective reports and design documentation, make effective presentations, and
give and receive clearinstructions.
11. Project Management and Finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, asa member
and leader in a team, to manage projects and in multidisciplinaryenvironments.
12. Life-long Learning: Recognize the need for, and have the preparation and ability to
engage in independent and life-long learning in the broadest context of technologicalchange.
 COURSE OBJECTIVES

 To understand and implement basic data structures usingC

 To apply linear and non-linear data structures in problemsolving.
 To learn to implement functions and recursive functions by means of datastructures
 To implement searching and sortingalgorithms

COURSE OUTCOMES

COURSE COURSE
EC8462 Linear Integrated circuits Laboratory SEM 4
CODE NAME
On completion of the course, the students will be able to
CO1 Analyze the basic of liner integrated circuits and available ICs.
Design the oscillators,amplifiers and filters using operational amplifiers and filters
CO2
using operational amplifiers
CO3 Analyze and implement the frequency multiplier using PLL
CO4 Design dc power supply using ICs.
Analyze the performance of filters, multivibrator,A/D converter and analog
CO5
multiplier using spice

CO/P PO PO PO PO PO PO PO PO PO PO1 PO1 PO1 PSO PS

O 1 2 3 4 5 6 7 8 9 0 1 2 1 O2
CO1 3 2 2 1 1 2 2 1 3 3
CO2 3 2 2 1 1 2 2 1 3 3
CO3 3 2 2 1 1 2 2 1 3 3
CO4 3 2 2 1 1 2 2 1 3 3
CO5 3 2 2 1 1 2 2 1 3 3
C217 3 2 2 - 1 - - 1 2 2 - 1 3 3

4
 INDEX
SIGNATURE
Ex.No. DATE LIST OF THE EXPERIMENT OF THE
PAGE NO STAFF

INVERTING & NON-INVERTING

1 10
AMPLIFIERS USING OP-AMP

3 INTEGRATOR AND DIFFERENTIATOR USING 16

OP-AMP.

4 INSTRUMANTATION AMPLIFIER 23

5 ACTIVE LOWPASS, HIGH PASS AND BAND 28

PASS FILTER USINGOP-AMP.

ASTABLE, MONOSTABLE MULTIVIBRATOR,

5 SCHMITT TRIGGER 37
USING OP-AMP.

6 RCPHASE SHIFT AND WEIN BRIDGE 48

OSCILLATOR USINGOPAMP

55
7 ASTABLE AND MONOSTABLE
MULTIVIBRATOR USING IC555 TIMER

8 PLL CHARACTERISTICS 62
AND FREQUENCY MULTIPLIER USING PLL

DCPOWER SUPPLY USING LM317 AND LM723

9 70

STUDY OF SMPS
10 81

5
 SIGNATURE
Ex.No. DATE LIST OF THE EXPERIMENT OF THE
PAGE NO STAFF
SIMULATION OF EXPERIMENTS 3,4,5,6,7
USING PSPICE NETLISTS
11 88

ADDITION EXPERIMENTS AND VIVA

12 VOCE QUESTIONS & ANSWERS 102

6
 INTRODUCTION OF LINEAR CIRCUIT

A linear circuit is an electronic circuit in which, for a sinusoidal input voltage

of frequency f, any steady-state output of the circuit (the current through any
component, or the voltage between any two points) is also sinusoidal with frequency
f. Note that the output need not be in phase with the input.

An equivalent definition of a linear circuit is that it obeys the superposition

principle. This means that the output of the circuit F(x) when a linear combination of
signals ax1(t) + bx2(t) is applied to it is equal to the linear combination of the outputs
due to the signals x1(t) and x2(t) applied separately:

It is called a linear circuit because the output of such a circuit is a linear

function of its inputs. Informally, a linear circuit is one in which the electronic
components' values (such as resistance, capacitance, inductance, gain, etc.) do not
change with the level of voltage or current in the circuit. Linear circuits are important
because they can amplify and process electronic signals without distortion. An
example of an electronic device that uses linear circuits is a sound system.

Linear circuits are important because they can process analog si nals without
introducing inter modulation distortion. This means that separate frequencies in the
signal stay separate and do not mix, creating new frequencies (heterodynes).

7
8
 STUDY OF OP-AMP

An operational amplifier or op-amp is a linear integrated circuit that has a

very high voltage gain, high input impedance and low output impedance. Op-
amp is basically a differential amplifier whose basic function is to amplify the
difference between two input signals.
Op-amp has five basic terminals, that is, two input terminals, one o/p
terminal and two power supply terminals. Pin2 is called the inverting input
terminal and it gives opposite polarity at the output if a signal is applied to it. It
produces a phase shift of 180o between input and output. Pin3 is called the non-
inverting terminal that amplifies the input signal without inversion, i.e., there is
no phase shift or i/p is in phase with o/p. The op-amp usually amplifies the
difference bet een the voltages applied to its two input terminals. Two further
terminals pins 7 and 4 re provided for the connection of positive and negative
power supply voltages respectively. Terminals 1 and 5 are used for dc offset.
The pin 8 marked NC indicates ‘No Co ection’.
Study of op-amp

Offset Null 1 8 N/C

Inverting i/p 2 7 V+
IC 741
Non Inverting 3 6 O/p
i/p

V- 4 5 Offset Null

Block schematic of op-amp

-
V2
Diff Diff Buffer & level O/p
V1 amp amp translator driver V0
+

9
 CIRCUIT DIAGRAM- (INVERTING AMPLIFIER):

Rf
+15 V
10K
7
+15 V
Ri
2 7
6
IC 741
10K
-15 V
4
3
CRO
-15 V
Vin

DESIGN PROCEDURE:

 VO = -I Rf

 I =Vin /Ri _____________

 VO = - (Vi / R i)Rf _____________

 Gain AV =VO / Vi = -( Rf / Ri) ____________

10
 Ex. No : 01
DESIGN AND TESTING OF INVERTING AND NON INVERTING
DATE : AMPLIFIERS

AIM:

To design and test inverting and non inverting amplifiers using

IC µA 741

APPARATUS REQUIRED:

S.NO. APPARATUS RANGE QUANTITY

1 Dual power supply (0 - +15)V 1
2 Signal generator (0-3)MHz 1
3 CRO (0-30)MHz 1
4 IC µA 741 1

5 Resistor 10KΩ,5KΩ 2,1

THEORY:

INVERTING AMPLIFIER:

The fundamental component of any analog computer s the operational

amplifier or op-amp and the frequency configuration in which it is used as an
inverting amplifier. An input voltage Vin is applied to the input voltage. It
receives and inverts its polarity producing an output voltage (VO). This same
output voltage is also applied to a feedback resistor Rf, which is connected to the
amplifier input analog with Ri. The amplifier itself has a very high voltage gain.
If Rf=Ri then Vo=Vi

11
 TABULATION –(INVERTING AMPLIFIER):

INPUT SIGNAL OUTPUT SIGNAL

S.NO.
AMPLITUDE TIME AMPLITUDE TIME
(Vi) (T) (Vo) (T)
volts ms volts ms

MODEL GRAPH:

12
 CIRCUIT DIAGRAM –(NON INVERTING AMPLIFIER):

10k

10k

DESIGN PROCEDURE:

 Gain Av = Vo/Vi

= (Rf+Ri) / Ri _______________________

=1+ (Rf / Ri) ______________________

 Vin = Vo.Ri / (Ri+Rf) _______________________

13
 NON- INVERTING AMPLIFIER:

Although the standard op-amp configuration is as an inverting amplifier,

there are some applications where such inversion is not wanted. However, we
cannot just switch the inverting and non inverting inputs to the amplifier itself.
We will still need negative feedback to control the working gain of the circuit
.Therefore, we will need to leave the resistor structure around the op-amp intact
and swap the input and ground connections to the overall circuit. VO/VI = ( Rf/
Ri )+1
From the calculations, we can see that the effective voltage gain of the non-
inverting amplifier is set by the resistance ratio. Thus, if the two resistors are
equal value, then the gain will be 2 rather than 1.

EXPERIMENTAL PROCEDURE:
1. Connect the circuit as shown in the diagram.
2. Give the input signal as specified.
3. Switch on the dual power supply
4. Note the outputs from the CRO.
5. Draw the necessary waveforms on the graph sh t.
6. Repeat the above procedure for non-inverting amplif er circuit.
7. Compare the practical gain with theoretically designed gain.

14
 TABULATION –(NON- INVERTING AMPLIFIER ):

INPUT SIGNAL OUTPUT SIGNAL

S.NO. AMPLITUDE TIME AMPLITUDE TIME
(Vi) (T) (Vo) (T)
volts ms volts ms

MODEL GRAPH

RESULT :
Thus the inverting and non inverting amplifier circuits using operational
amplifier Ic µA 741 are designed, constructed and tested.

15
 CIRCUIT DIAGRAM_- (INTEGRATOR);
10µf

10k

10k

2k

DESIGN PROCEDURE:

 V= -1/ (Rf.Cf) [Vin(t).Vo(t)]



 T = -1/ (Rf.Cf) _____________________

16
 Ex. No : 02
INTEGRATOR AND DIFFERENTIATOR

DATE :

AIM:

To design and test the integrator and differentiator using operational

amplifier IC µA 741

APPARATUS REQUIRED:

S.NO. APPARATUS RANGE QUANTITY

Dual power
1 (0 - +15)V 1
supply
2 Signal generator (0-3)MHz 1
3 CRO (0-30)MHz 1
4 IC µA 741 1
5 Resistor 10KΩ,5KΩ 2,1
6 Capacitor 10µf 1

THEORY:

INTEGRATOR:

Op-amps allow us to make nearly perfect integrators such as the practical integrator
The circuit incorporates a large resistor in parallel with the feedback capacitor. This is
necessary because real op-amps have a small current flowing at their input terminals called
the "bias current". This current is typically a few nano amps, and is neglected in many
circuits where the currents of interest are in the micro amp to milliamp range. The feedback
resistor gives a path for the bias current to flow. The effect of the resistor on the response is
negligible at all but the lowest frequencies.

17
 TABULATION-( INTEGRATOR):

INPUT WAVEFORM OUTPUT WAVEFORM

AMP. TIME F=1/T AMP. TIME F=1/T

(V) (T) (V) (T)
volts ms KHz volts ms KHz

MODEL GRAPH:

18
 CIRCUIT DIAGRAM- (DIFFERENTIATOR):

10k

1k 10µf

DESIGN PROCEDURE:

fmax = 1 / (2πC1Rf)

 Vout = -1/Rf.Cf [DVin/ dt] ______________________

 T = - Rf.Cf _______________________

19
 DIFFERENTIATOR:

One of the simplest of the operational amplifier that contains capacitor is

differential amplifier. As the suggests, the circuit performs the mathematical
operation of differentiation. The output is the derivative of the given input signal
voltage. The minus sign indicates an 1800 phase shift of the output waveform Vo
with respect to the input signal.

20
 TABULATION –(DIFFERENTIATOR) :

INPUT WAVEFORM OUTPUT WAVEFORM

AMP. TIME F=1/T AMP. TIME F=1/T

(V) (T) (V) (T)

volts ms KHz volts ms KHz

MODEL GRAPH:

21
 EXPERIMENTAL PROCEDURE:

1 The connections are given as per the EXPERIMENTAL SETUP.

2 The supply is switched ON after checking the circuit connections
3 The input wave form is applied from the function generator and the
corresponding output waveform is noted from the CRO.
4 The above mentioned procedure is repeated for differentiator also.

RESULT :

Thus the integrator and differentiator is designed and tested using

operational amplifier IC µA 741

22
 CIRCUIT DIAGRAM-( INSTRUMENTATION AMPLIFIER):

DESIGN PROCEDURE:

V01 = (1+R2/R1)V1- (R2/R1)V2,

V02 = (1+R2/R1)V2 - (R2/R1)V1

 V0 =V02 - V01

 = (V2-V1) (1+2R2/R1)____________________

Let R1=R2=R3=R4= ___________________________

 Gain = V0/Vi

 = Vo/(V2-V1)


 Gain = _______________________________





23
 Ex. No :03
INSTRUMENTATION AMPLIFIER
DATE :

AIM:

To design and test instrumentation amplifier using ICµA 741 for the given

gain.

APPARATUS REQUIRED:

S.NO. APPARATUS RANGE QUANTITY

1 Dual power (0 - +15)V 1
supply
2 Signal generator (0-3)MHz 1
3 CRO (0-30)MHz 1
4 IC µA 741 1
5 Resistor 10kΩ 6

THEORY:

In a number of instrumentation and consumer applications o e is required

to measure and control the physical quantities. Some typical examples are
measurement and control of temperature , humidity, light, Intensity , water flow
etc.
These physical quantities are usually measured with the help of transducer.
The output of the transducer has to be amplified so that it can derive the indicator
or display system. The function performed by an instrumentation amplifier are,

24
 TABULATION –( INSTRUMENTATION AMPLIFIER):

INPUT SIGNAL OUTPUT SIGNAL

S.NO
AMPLITUDE TIME AMPLITUDE TIME
(Vi) (T) (Vo) (T)
volts ms volts ms

MODEL GRAPH:

AMP(V)
INPUT WAVEFORM

TIME(ms)

AMP(V)

OUTPUT WAVEFORM

TIME(ms)

25
  High CMRR

 High gain stability with low temperature coefficient

 Low dc offset

 Low input impedance

These are specially designed op-amp such as VA725 to meet the above
started requirement of a good instrumentation amplifier. Monolithic
instrumentation amplifiers are also available commercially such as AD521,
AD524, AD624 by analog devices L40036, and L40037 by national
semiconductors
EXPERIMENTAL PROCEDURE:

1 Circuit connections are given as per the EXPERIMENTAL SETUP.

2 The input signal is given
3 The dual power supply is switched ON.
4 The input is varied in steps and the corresponding output readings are
noted from CRO.
5 The practical gain is calculated from the readings and compared with the
theoretically designed gain.

RESULT :
Thus the instrumentation amplifier is designed and tested using ICµA 741.

26
 CIRCUIT DIAGRAM-( ACTIVE LOW PASS FILTER):

27k
47k

47k
47k

DESIGN PROCEDURE:

 fc = 1/2πRC,
Let C =

Therefore R =

Design for Gain:

 A = 1+Rf/R1, Therefore,
Rf = ___________

R1= ___________

Let A = _________________

27
28
 Ex. No :04
ACTIVE LOW PASS, HIGH PASS AND BAND PASS FILTER
DATE :

AIM:
To design and test low pass, high pass and band pass filters using IC
µA 741.

APPARATUS REQUIRED:

S.NO. APPARATUS RANGE QUANTITY

Dual power
1 (0 - +15)V 1
supply
2 CRO (0-30)MHz 1
3 IC µA 741 1
4 Resistor 10kΩ,5kΩ, 4,2
6 Capacitor 0.1µf,10µf 2,1

THEORY:

The first order low pass filter is realized RC circu t used along with an
op-amp in non-inverting configuration. A low pass filter has constant gain from)
Hz to fH.. Bandwidth of this filter is fH. Bandwidh of electric filters are used in
circuits which require the separation of signals according to their frequencies. a
first order low pass filter consists of a single RC network connected to the
positive input terminal of non-inverting op-amp amplifier. Resistors Ri and R f
determine the gain of the filter in the pass band.

29
 TABULATION-( ACTIVE LOW PASS FILTER) :

INPUT OUTPUT Vin =

FREQUENCY VOLTAGE GAIN =
S.NO (Fi) (Vo) 20LOG(V o/Vin)
Hz mV

MODEL GRAPH:

30
 CIRCUIT DIAGRAM-( ACTIVE HIGH PASS FILTER):

5k

68k

0.1µ
0 1µ
56k
56k

DESIGN PROCEDURE:
 fc = 1/2πRC, Let C =

Therefore R =

Design for Gain:

R1 = ___________

 A = 1+Rf/R1, Rf= ____________

31
 TABULATION –( ACTIVE HIGH PASS FILTER):

INPUT OUTPUT Vin =

FREQUENCY VOLTAGE GAIN =
S.NO.
(Fi) (Vo ) 20LOG(Vo/Vin)
Hz mV

MODEL GRAPH:

32
 CIRCUIT DIAGRAM –( ACTIVE BAND PASS FILTER):

Rf

5k Ri 10kΩ Rf 5k
Ri
10kΩ
R1 2-
0.01 µF 2- 3+
3+ 741 Vout
741 C1
~ C2 R2 0.01 µF
Vin 10k

33
 DESIGN PROCEDURE:

The parameters in the band pass filter are lower cutoff frequency, the
upper cutoff frequency and the bandwidth, the central frequency gain Ao and
selectivity Q. The higher the selectivity Q, the sharper the filter. Below 0.5fo all
filters roll off at -20dB/decade independent of the value of Q. This is limited by
the two RC pair of circuits.

EXPERIMENTAL PROCEDURE:

1 connections are given as per the EXPERIMENTAL SETUP

2 Supply is switched ON after checking the connections.
3 Input voltage is et to 1V and by changing the input frequency,
output voltage is measured.
4 The procedure is applied to active low pass, high pass and
band pass filters.

34
 TABULATION –( ACTIVE BAND PASS FILTER):
Vin =

INPUT OUTPUT
FREQUENCY VOLTAGE GAIN =
S.NO. (Fi) (Vo) 20LOG(Vo/Vin)
Hz mV

MODEL GRAPH:
GAIN
(dB) MAX GAIN x 0.707
3 dB

FREQ.(Hz)
f1 f2

RESULT :
Thus the active low pass, high pass and band pass filters were designed and
tested using IC µA 741 .

35
 CIRCUIT DIAGRAM-( ASTABLE MULTIVIBRATOR);
5kΩ

105k
0.1µf

8.6k

DESIGN PROCEDURE:

 f0 = 1/ (2RC) Let f0= _____________________

 R1 = _____R2 Assume , C= ____________________

R2 = ______ R=____________________

R1 = _____

36
37
 Ex. No :05
ASTABLE AND MONOSTABLE MULTIVIBRATOR
AND SCHMITT TRIGGER
DATE :

AIM:

To design and test an astable and monostable multivibrator circuits using

op-amp IC µA 741

APPARATUS REQUIRED:

S.NO. APPARATUS RANGE QUANTITY

Dual power
1 (0 - +15)V 1
supply
2 CRO (0-30)MHz 1
3 IC µA 741 1
4 Resistor 15kΩ,10kΩ 2,2
6 Capacitor 0.1µf 2

THEORY:

ASTABLE MULTIVIBRATOR:

The astable multivibrator is also known as free running oscillator. the principle
of generation of square wave output is to force an op-amp to operate in saturation
region. β = R2/(R1+R2) of the output is feedback to the positive input terminal.
the reference voltage is Vo and may take the values as +βVsat and – βVsat. The
output is also feedback to the negative input terminal after
interchanging by a low pass RC combination. Whenever input terminal just
exceeds Vref switching takes place resulting in square wave output. In this
multivibrator both sates are quasi stable state

38
39
 TABULATION-( ASTABLE MULTIVIBRATOR) :

AMPLITUDE TIME FREQUENCY

S.NO. WAVEFORM (V) (T) F=1/T
volts ms Hz
CAPACITOR
1

OUTPUT
2

MODEL GRAPH:

Vo(V)

Vsat

+βVsat
TIME (ms)

–βVsat

–Vsat

40
 CIRCUIT DIAGRAM- (MONOSTABLE MULTIVIBRATOR)_

15k

0..1µ

15k

0.1µ

15k
15k

DESIGN PROCEDURE:
T= RC ln 1+V /V
 D SAT , where β = R2/(R!+R2)

1-β

V >V
If, SAT D & R1=R2 , β= 0.5 then ,

T= _______________________

41
 MONOSTABLE MULTIVIBRATOR:

The monostable multivibrator is also called as one shot multivibrator. The

circuit produces a single pulse of specified duration in response to each external
trigger response. It is always have one stable state. When an external trigger is
applied, the output changes the state. The new state is called quasi stable state.
The circuit remain in this state for a fixed interval of time and then it returns to
the original state after this interval. this time interval is determined by the
charging and discharging of the capacitor.

EXPERIMENTAL PROCEDURE:

ASTABLE MULTIVIBRATOR:

1 Connections are given as per the EXPERIMENTAL SETUP.

2 Supply is switched ON after checking the circuit connections.
3 The output square wave form and the capacitor charging and
discharging waveforms are noted from the CRO.

MONOSTABLE MULTIVIBRATOR:

1 Connections are given as per the EXPERIMENTAL SETUP.

2 Supply is switched ON after checking the circuit connections.
3 The output square wave form and the capacitor charging and discharging
waveforms are note down from the CRO.

42
 TABULATION -( MONOSTABLE MULTIVIBRATOR):

AMPLITUDE TIME FREQUENCY

S.NO. WAVEFORM (V) (T) F=1/T
volts ms Hz

INPUT
1 (TRIGGER)

OUTPUT
2

MODEL GRAPH:

43
 CIRCUIT DIAGRAM-( SCHMITT TRIGGER):

10k

6.8k
200k

DESIGN PROCEDURE:

± V sat = _____________________

 Vutp = R2(+Vsat / (R1+R2)) ____________________

 Vltp = R2(-Vsat / (R 1+R2)) ______________________

44
SCHMITT TRIGGER:

If the positive feedback is added to the comparator circu t means gain can
be increased greatly. Consequently the transfer curve comparator becomes more
close to the ideal curve theoretically. If the loop gain βfo is adjusted to unity
then the gain with feedback average becomes extreme values of output voltage.
in practical circuits, however it may not be possible to maintain loop gain exactly
equal to unity for a long time because of supply voltage and temperature
variations so a value greater than unity is chosen. This gives the output
waveform virtually disconnected at the comparison voltage. This circuit however
exhibits phenomenon called hystersis or backlash.

TABULATION –( SCHMITT TRIGGER) :

VOLTAGE TIME
S.NO. SIGNAL (V) (T)
volts ms

INPUT
SIGNAL

OUTPUT SIGNAL

45
 MODEL GRAPH:

46
 EXPERIMENTAL PROCEDURE:

1 Connections are given as per the EXPERIMENTAL SETUP.

2 The supply is switched ON.
3 The output waveform was noted from CRO and UTP and LTP are
noted. The graph is drawn.
4 The theoretical value of UTP and LTP are verified with the practical
value.

RESULT :
Thus the astable, monostable multivibrator circuits and Schmitt Trigger
circuit using IC µA 741 was designed and tested.

47
 CIRCUIT DIAGRAM – (RC PHASE SHIFT OSCILLATOR);

Rf

680k

+15 V
R1
2 7
6
ICµA
2k
4 CRO
3
-15 V
68k

C C C
0.1µ 0.1µ 0.1µ

R R
10k 10k 10k R

DESIGN PROCEDURE:
Design for RC
 f = 1/(2π√6 RC),
Assume C = ____________
R= _____________
Design for Gain

 Av= - Rf/R1, Let R1 = ______________

Rf = ______________

48
 Ex. No :06
RC PHASE SHIFT OSCILLATOR AND WEIN BRIDGE OSCILLATOR

DATE :

AIM:

To design and test RC phase shift and wein bridge oscillators using IC µA
741.

APPARATUS REQUIRED:

S.NO. APPARATUS RANGE QUANTITY

Dual power
1 (0 - +15)V 1
supply
2 Signal generator (0-3)MHz 1
3 CRO (0-30)MHz 1
4 IC IC µA 741 1
680kΩ,6.8kΩ,220kΩ,
5 Resistor 3,2,2,1
4.7kΩ
6 Capacitor 0.1µf 3

THEORY:

RC PHASE SHIFT OSCILLATOR:

RC phase shift oscillator using op-amp, in inverting amplifier mode. Thus

it introduces a phase shift of 1800 between the input and output. The feedback
network consists of 3 RC sections producing each 600 phase shift. Such a circuit
is known as RC phase shift network. The circuit is generating its own output
signal and a stage of oscillator sustained. the phase shift produced by op-amp is
1800.the op-amp with a gain of 29 and RC network is of equal resistor and
capacitor connected feedback the op-amp output and input terminals..

49
 TABULATION-( RC PHASE SHIFT OSCILLATOR):

AMPLITUDE TIME F = 1/T

S.NO. (V) (T)
volts ms Hz

MODEL GRAPH:

AMP(V)
RC PHASE SHIFT OSCILLATOR

TIME(ms)

AMP(V)

WIEN BRIDGE OSCILLATOR

TIME(ms)

50
 CIRCUIT DIAGRAM-(WIEN BRIDGE OSCILLATOR):
5.3k

5.3k

20k
0.01µ

10k 0.01µ

DESIGN PROCEDURE:
Design for RC,

f = 1/(2πRC) ,
Assume C = __________
R = ___________

Design for Gain,

 R1 = _____ , Rf = __________



 Gain A= 1+Rf/R1

51
 WEIN BRIDGE OSCILLATOR:

It is commonly used in audio frequency oscillator. The feedback signal is

connected in the input terminal so that the output amplifier is working as an non-
inverting amplifier. The wein bridge circuit is connected between amplifier input
terminal and output terminal. The bridge has a series R network, in one arm and
a parallel RC network in the adjoining arm. in the remaining two arms of the
bridge, resistor R1 and Rf are connected. the phase angle criterion for oscillation
is that the total phase shift around the circuit must be zero. This condition occurs
when bridge is balanced. At resonance frequency of oscillation fo is exactly the
resonance frequency of balanced wein bridge and is given by f0
= 1/ (2πfC).assuming that the resistors are input impedance value and
capacitance are equal to the value in the reactive stage of wein bridge. at this
frequency, the gain required for sustai ed.

52
 TABULATION –(WEIN BRIDGE OSCILLATOR) :

AMPLITUDE TIME F = 1/T

S.NO. (V) (T)
volts ms Hz

MODEL GRAPH:

AMP(V)
RC PHASE SHIFT OSCILLATOR

TIME(ms)

AMP(V)

WIEN BRIDGE OSCILLATOR

TIME(ms)

53
 EXPERIMENTAL PROCEDURE:
RC PHASE SHIFT OSCILLATOR:

1 Circuit connections are given as per the EXPERIMENTAL SETUP.

2 Supply is switched ON.
3 3600 phase shift output is obtained at the output.
4 The inverting op-amp produce 1800 and RC network produce another
1800
5 Frequency is calculated by the formula f =1/T

WIEN BRIDGE OSCILLATOR:

1 Connections re given as per the EXPERIMENTAL SETUP.

2 Resistor and capacitor values are verified simultaneously; the
corresponding Rf value is noted.
3 The critical vale of frequency is noted corr spondingly.
4 Check whether the calculated and observ d f equency values are same.

5 Graph is drawn by taking amplitude along y-axis and time alo g x-

axis.the graph will b sine waveform.

RESULT:
Thus the RC phase shift and wien bridge oscillator was designed and
tested using IC µA 741.

54
 CIRCUIT DIAGRAM-( ASTABLE MULTIVIBRATOR):

Vcc = 5V

1k Ra 8 4

7
I
C
5 3
R 5
b
1k 5
6
CRO

1µ C
92
1 5

C1= o.o1uf

DESIGN PROCEDURE:

 Duty cycle D = TON / (TON +TOFF)


= [0.693(Ra+Rb)C ] / [0.693(Ra+2Rb)C]
= _______________________________

 f = 1.45 / [(Ra+2Rb)C]

f = ________________________

55
 Ex. No :07
ASTABLE MULTIVIBRATOR AND MONOSTABLE
DATE : MULTIVIBRATOR USING 555 TIMERS

AIM:
To design and test astable and monostable multivibrator circuits using IC 555.
APPARATUS REQUIRED:

S.NO. APPARATUS RANGE QUANTITY

Dual power
1 (0 - +15)V 1
supply
2 Signal generator (0-1)MHz 1
3 CRO (0-30)MHz 1
4 IC IC 555 1
5 Resistor 1kΩ,2kΩ 1,1
6 Capacitor 0.1µf 1

THEORY:
ASTABLE MULTIVIBRATOR:
The astable multivibrator is also called the free running multiv brator. It has two
quasi states i.e. no stable states as such the circuit conditions oscillate between
the components values used to decide the time for which circuit remains in each
stable state. The principle of square wave output is to force the IC to operate in
saturation region. Whenever input at the negative input terminal just exceeds
Vref switching takes place resulting in a square wave output. In astable
multivibrator both stable states and one quasi states are present.

56
 TABULATION-( ASTABLE MULTIVIBRATOR):

AMPLITUDE TIME F =1/T

S.NO WAVEFORM (V) (T)
VOLTS ms Hz

1 CAPACITOR

2 OUTPUT

MODEL GRAPH:(ASTABLE MULTIVIBRATOR)

57
 CIRCUIT DIAGRAM- (MONOSTABLE MULTIVIBRATOR):

1k

1µ

Design

T = 1.1*R*C, R = _________

= __________ C = ____________

58
 MONOSTABLE MULTIVIBRATOR:

These multivibrators are comprised of group of regenerative circuits that are

commonly used in timing applications. The circuit produces a single pulse of
applied duration in response to each external trigger pulse. For each circuit only
one state exists. When an external trigger is applied the output changes its state.
The new state is called quasi-stable state.

EXPERIMENTAL PROCEDURE:
1 Connections are as per the EXPERIMENTAL SETUP.
2 Supply is switched ON after checking the connections.
3 For monostable multivibrator trigger pulse is given and for stable it is
not necessary.
4 Output square wave is noted from CRO.
5 The frequency is calculated by input.

59
 TABULATION –(MONOSTABLE MULTIVIBRATOR):

AMPLITUDE TIME FREQ.

S.NO. WAVEFORM (V) (T) f=1/T
VOLTS ms Hz

1
CAPACITOR

2 TRIGGER

OUTPUT
3

MODEL GRAPH-( MONOSTABLE MULTIVIBRATOR):

60
 PIN DIAGRAM –( IC 555 TIMER ):

GND 1 8 +VCC

I
TRIGGER 2 C 7 DISCHARGE

5
3 5
OUTPUT 6 THRESHOLD
5

RESET 4 5 CONTROL
VOLTAGE

SPECIFICATIONS:

SUPPLY VOLTAGE : +5 V to +18 V

0 0
OPERATING TEMPERATURE : 0 TO 70 C

STORAGE TEMPERATURE
0 0
RANGE : 65 TO 150 C

POWER DISSIPATION : 600mW

RESULT:
Thus the Astable and Monostable multivibrators were designed and tested
using IC555.

61
 PIN DIAGRAM-( LM565);

1 14 NC
V

2 13 NC
INPUT L

3 M 12 NC
INPUT
5 NC
4 11
VCO
OUTPUT 6
5 10 +V
5
PHASE
COMPARISON EXTERNAL
INPUT 6 9 C
FOR VCO
EXTERNAL
REF. OUTPUT 7 8 R
FOR VCO

SPECIFICATIONS
:

MAXIMUM SUPPLY VOLTAGE : 2.6V

MAXIMUM POWER DISSIPATION : 330mW

SUPPLY CURRENT : 8mW

INPUT IMPEDENCE : 5KΩ

OUTPUT IMPEDENCE : 3.6KΩ

62
 Ex. No :08
PLL CHARACTERISTICS AND FREQUENCY MULTIPLIER

DATE : USING PLL

AIM:
To conduct an experiment on PLL using IC LM 565 and to draw
the frequency response characteristics and also to design and to test the
frequency multiplier using PLL.

APPARATUS REQUIRED:

S.NO. APPARATUS RANGE QUANTITY

Dual power
1 (0 - +15)V 1
supply
2 CRO (0-30)MHz 1
3 IC LM 565 1
4 Resistor 20kΩ,2kΩ,4.7kΩ,10kΩ Each 2
6 Capacitor 0.01µf,0.001µf,10µf Each 1

THEORY:

The block diagram of LM565 PLL consists of base detector

amplifier. Low pass filter and VCO as shown in the block diagram. The phase
locked loop is not connected internally. It is necessary to connect output of VCO
(pin 4) to phase comparator in pin 5 externally.

63
 CIRCUIT DIAGRAM-(LM565):

64
 In frequency multiplication applications a digital frequency driver is
inserted into loop between pin 4 and pin 5.the centre frequency of PLL is
determined by free running frequency multiplier of VCO given by free funning
frequency of VCO which is given by f0 = 1.2/(4R1C1) Hz. the value of Ri is

restricted from 2KΩ to 20KΩ but a capacitor can have any value. A capacitor C2
is connected between pin 7 and to the positive supply from a first order low pass
filter with an external resistance of 3.6 KΩ. The value of filter capacitor C2
should be large enough to eliminate positive oscillator into VCO voltage.
FL = I.8fo/V Hz.
Where, fo = free running frequency in Hz
V = +V-(-V) volts
FL = ± (f o /2π3.6x103 C2)1/2
Where, C2 is in farads

EXPERIMENTAL PROCEDURE:

1. Connections are given as per the EXPERIMENTAL SETUP.

2. Observe the waveform at pin 4 and pin 5 without any i put
signal. This is free running frequency of VCO (fo).
3. Switch ON the functional generator and give the square
waveform of 1Vpp & 1KHZ .
4. Calculate the capture range and lock range.

65
 TABULATION –(FREQUENCY MULTIPLICATION ):

FREQUENY AMPLITUDE
F=1/T (V)
S.NO. WAVEFORM
HZ volts

INPUT
1

OUTPUT
2

MODEL GRAPH:

66
 MODEL GRAPH:

Lock range
Vo in V

Capture range

FREQ. IN Hz

F4F1fo F3 F2

RESULT:

Thus the experiment on LM 565 is conducted and the frequency

response characteristic is drawn.

67
68
69
 PIN DIAGRAM-(LM 723):

1 14 NC
NC

2 13 FREQUENCY
CURRENT LIMIT L COMPARATOR

3 M 12
CURRENTSENSE +VCC

INVERTING
7
4 11 VC
INPUT
2
5 10 OUTPUT
NONINVERTING 3
INPUT
6 9 VZ
V
REF
-VCC 7 8 NC

SPECIFICATIONS:

PEAK VOLTAGE FROM +VCC TO –VCC : 50V

CONTINUOUS VOLTAGE FROM +VCC TO –VCC : 40V

INPUT TO OUTPUT VOLTAGE DIFFERENTIAL : 40V

DIFFERENTIAL INPUT VOLTAGE TO ERROR

AMLIFIER : ±5V

VOLTAGE BETWEEN NON-INVERTING INPUTS

& -VCC : 8V

CURRENT FROM VZ : 25mA

CURRENT FROM VREF : 15m

70
 Ex. No :09
DC POWER SUPPLY USING LM 723 AND LM317
DATE :

AIM:
To conduct an experiment in order to get regulated power supply
output using LM 723.
APPARATUS REQUIRED:

S.NO. APPARATUS RANGE QUANTITY

1 Dual power (0 - +15)V 1
supply
2 Resistor 5.5KΩ , Each 1
1KΩ,846Ω
3 Capacitor 100pF 1
4 Bread Board - 1
5 Volt meter (0-30)V 1

THEORY:
The basic voltage regulator in its simplest form cons sts of a) voltage
reference Vr b) error amplifier c) feedback network d) active series or shunt
control unit. the voltage reference generates a voltage level which is applied to
the comparator circuit, which is generally error amplifier. The second input to
the error amplifier obtained through feedback network. Generally using the
potential divider, the feedback signal is derived by sampling the output voltage.
The error amplifier converts the difference between the output sample and the
reference voltage into an error signal. This error signal in turn controls the active
element of the regulator circuit, in order to compensate the changes in the output
voltage. Such an active element is generally a transistor.

71
 CIRCUIT DIAGRAM –(DC POWER SUPPLY);

72
 Let , Error amplifier controls the series pass transistor Q2 which acts
as a variable resistor. The series pass transistor is small power transistor having
about 800mW power dissipation. The unregulated power supply source of (< 36
V d.c) is connected to collector of series pass transistor.
Transistor Q2 acts as current limiter in case of short circuit condition.
It senses drop across Rsc placed in series with regulated output voltage
externally.
The frequency compensation terminal controls the frequency response
of the error amplifier. The required roll-off is obtained by connecting a small
capacitor of 100pF between frequency compensation and inverting input
terminals.

EXPERIMENTAL PROCEDUR :

1 Connections are given as per the EXPERIMENTAL SETUP.

2 The input voltage is given to the circuit and the output voltage slowly
varies from zero.
3 Then the output voltage attains the designed value and then it is
irrespective of input voltage (the output becomes constant).

73
 TABULATION–(DC POWER SUPPLY):
Vin Vo
S.NO.
Volts Volts

Vo(V)

Vin vs Vo

Vin(V)

74
 PIN DIAGRAM:

SPECIFICATIONS:

MINIMUM OUTPUT VOLTAGE : 1.2 V

MAXIMUM OUTPUT VOLTAGE : 57 V

MAXIMUM OUTPUT CURRENT : 1.5mA

OUTPUT RESISTANCE : 17MΩ

RIPPLE REGECTION : 62 dB

SHORT CIRCUIT CURRENT : 750mA

75
 THEORY:
The basic voltage regulator in its simplest form consists of a) voltage
reference Vr b) error amplifier c) feedback network d) active series or shunt
control unit. the voltage reference generates a voltage level which is applied to
the comparator circuit, which is generally error amplifier. The second input to
the error amplifier obtained through feedback network. Generally using the
potential divider, the feedback signal is derived by sampling the output voltage.
The error amplifier converts the difference between the output sample and the
reference voltage into an error signal. This error signal in turn controls the active
element of the regulator circuit, in order to compensate the changes in the output
voltage. Such an active element is generally a transistor.

76
 CIRCUIT DIAGRAM-(LM317):

77
 DESIGN PROCEDURE:

 V o = 1.25(1+R2/R1)

Besides fixed voltage regulator, Ic voltage regulators are available which

allow the adjustment of the output voltage. The output voltage can be adjusted
from 1.2V to as high as 5.7V with the help of such regulators. in such regulator
IC’s common terminal plays the role of control input and hence called as
adjustment terminal. The LM 317 series is the most commonly used three
terminal adjustable regulators. These devices are available in a variety of
packages which can be easily mounted and handled. The power rating of such
regulators is 1.5Am.the maximum input voltage of LM 317 is 40V

EXPERIMENTAL PROCEDUR :

4 Connections are given as per the experimental s tup.

5 The input voltage is given to the circuit and the output voltage slowly
varies from zero.
6 Then the output voltage attains the designed value and then it is
irrespective of input voltage (the output becomes constant).

78
 TABULATION-(DC POWER SUPPLY):

Vin Vo
S.NO.
volts volts

MODEL GRAPH:

Vo(V)

Vin vs Vo

Vin(V)

RESULT :

Thus the experiment is conducted using LM 723 and LM 317 so the

regulated output is obtained using the circuit

79
 BLOCK DIAGRAM-(SMPS):

BLOCK DIAGRAM ELEMENTS ARE:

1.Rectifier
2.Transformer
3.Filter
4.Pwm Oscillator
5.Amplifier
6.Isolation

80
 Ex. No :10
STUDY OF SMPS (SG 3524 AND SG 3525)
DATE :

AIM:

To study in detail about SMPS control unit of SG 3524 and SG 3525.

APPARATUS REQUIRED:

S NO. APPARATUS QUANTITY

1 SMPS board 1
SG 3524 /
2 1
SG 3525
3 RPS (0-30)V 1

DESCRIPTION:

The monolithic Ic contains all the control circuitry for a regulating power
supply inverter or switching regulator. It also includes the error amplifi r,
oscillator, pulse width modulator, pulse steering flip flop, dual alter ating output
switches and current limiting and shut down circuitry.

The device can be used for switching regulators of either polarity,

transformer coupled AC to DC converters, transformations, voltage doubling and
polarity converters as well as other power control applications of 00C to 700C.

81
 FEATURES:

 Complete PWM power control circuitry.


 Single ended or push pull outputs

 Line and load regulation of 0.2%

 1 % maximum temperature variations.

 Total supply current is less than 10mA.

 Operation beyond 100 KHz.

CURRENT LIMITING:

The current limiting circuitry of the SG3524 is shown in the figure. By

matching the base-emitter voltages of Q1 and Q2 and also assuming a negligible
voltage drop across the R1,

Threshold = VBE(Q1) +I1R2-VBE(Q2)

= I1R2-200mV

Although this circuit provides a relatively small threshold with a

negligible temperature coefficient, there are some limitations to its use The most
important of which is ±1V common mode range which require sensi g in the
ground state. Another factor to consider is that the frequency compensation
provided by R1C1 and Q1 provides a roll off pole at approximately 300Hz.

82
 CURRENT LIMITING CIRCUITRY OF SG 3524

RAMP

I1
COMPENSATOR
ERROR AMPLIFIER
C1

R1

Q1

R1
Q2

5
+ - 4
SENSE

83
 Since the gain of this circuit is relatively low, there is a transition region as
the current limit amplifier takes over pulse width control from the error
amplifier. For testing purposes threshold is defined as the input voltage required
getting 25% duty cycle with the error amplifier signaling maximum duty cycle

THEORY OF OPERATION:

VOLTAGE REFERENCE:

All the internal series regulator provides a nominal 5V output which is used both
to generate source for all the internal timing and controlling circuitry. this
regulator may be bypassed for operation from a fixed 5V supply by connecting
pins 15 and 16 together to the input voltage of 5V
This reference regulator may be used as a 5V source for other circuitry. It
will provide up to 50mA of current itself and can easily be expanded to higher
currents with an external PNP.

EXTERNAL SYNCHRONIZATION:

If it is designed to synchronies the SG 3524 to an external clock, a pulse of

approximately ±13V may be applied to the oscillator ou tput terminal with
RTCTat slightly greater than the clock pulse. the same consideration of pulse
width is applied. The impedances to ground at this point is approximately 2KΩ.

84
 EXPANDED REFERENCE CURRENT CAPABILITY

Q1

16
100Ω SG 3524
Vin Vref
REFERENCE
SECTION

15

+
8
10µF

-
GND

IL OF 1Amp DEPENDING
ON CHOICE FOR Q1

85
 If the two or more SG 3524 must be synchronized together, one must be
designed at master with it.RTCT set for the correct period. the slaves should each
have all RTCT set for approximately 10%. Layer period than the master with the
added requirement that CT(slave) = one half CT(master).then connecting pins on
he all units together will ensure that the master output pulse, which occurs first
and has a wide pulse width will reset the slave units.

ERROR AMPLIFIER:

This circuitry is a simple differential input transconductance amplifier. the

output is the compensation terminal pin 9 which is a higher impedance mode
(RLCTMΩ) the g in is Av-gmRL-8IcRL/2KT = 0.002 RL and can be easily be
reduced from a nominal of 10,000 by an external shunt impedance shunt
resistance from pin 9 to ground.

In addition to DC gain control, the compensation terminal is also the place

for AC phase compensation.

Typically most output filter designs will introduce one or more additional
poles at a significantly lower frequency .therefore, the best stabilizing network is
a series RC combination between pin 9 and ground which introduces a zero to
cause one of the output filter poles. A good starting point is 50KΩ plus 0.001µF.

86
 TEST CIRCUIT-(SMPS);

RESULT :

Thus the SMPS control unit of SG 3524 was studied.

87
 CIRCUIT DIAGRAM –( INSTRUMENTATION AMPLIFIER):

MODEL GRAPH:

88
 Ex. No :
SIMULATION OF INSTRUMENTATION AMPLIFIER USING PSPICE
DATE :

AIM:
To simulate and analyze the instrumentation amplifier using PSPICE.

SOFTWARE REQUIRED:

Or CAD SOFTWARE

PROCEDURE:

 Switch on the computer and select ORCAD PSPICE icon.


 Open a new project to design a circuit in the file menu.

 Select the required compo e ts from the library.
 Draw the circuit as shown in Fig .
 After completing save the project a d go to simulation tool bar
 Verify the simulated output and take a print out.


















RESULT:
Thus the instrumentation amplifier using PSPICE was simulated and tested.







89
 CIRCUIT DIAGRAM-(FILTERS):

LOW PASS FILTER:

HIGH PASS FILTER:

BAND PASS FILTER

Ri 10kΩ Rf
Ri RF
10kΩ
R1
2 -
0.01 µF 2 - 3 +
3 + 741 Vout
741 C1
~ C2 R2
0.01 µF
Vin

GAIN
(dB) MAX GAIN x 0.707

FREQ.(Hz)

90
 Ex. No :
SIMULATION OF ACTIVE LOWPASS, HIGHPASS AND BANDPASS
DATE : FILTERS USING PSPICE

AIM:
To simulate and analyze the Active Low pass, High pass and Band pass
Filters using PSPICE.

SOFTWARE REQUIRED:

Or CAD software.

PROCEDURE:

 Switch on the computer and select ORCAD PSPICE icon.


 Open a new project to design a circuit in the file menu.

 Select the required compo e ts from the library.
 Draw the circuit as shown in Fig (1) &(2) tool bar.
 After completing save the project a d go to simulation tool bar
 Verify the simulated output and take a print out.

















RESULT:

Thus the Active Low pass, High pass and Band pass Filters using
PSPICE was simulated and tested.





91
 CIRCUIT DIAGRM-(ASTABLE MULTIVIBRATOR):

MODEL GRAPH:

Vo(V)

Vsat

+βVsat
TIME (ms)

–βVsat

–Vsat

92
 Ex. No :
SIMULATION OF ASTABLE & MONOSTABLE
MULTIVIBRATORS AND SCHMITT TRIGGER USING PSPICE
DATE :

AIM:

To simulate and analyze the Astable &Monostable Multivibrators and

Schmitt Trigger using PSPICE.

SOFTWARE REQUIRED:

Or CAD software.

PROCEDURE:

 S itch on the computer and select ORCAD PSPICE ion.


 Open a new project to design a circuit in the file menu.

 Select the required components from the library.

 Draw the circuit as shown in Fig (1) &(2) tool bar.
 After completing save the project a d go to simulation tool bar
 Verify the simulated output and take a print out.
































93
 CIRCUIT DIAGRAM-(MONOSTABLE MULTIVIBRATOR):

MODEL GRAPH:

94
 CIRCUIT DIAGRAM-(SCHMITT TRIGER):

MODEL GRAPH:

RESULT:
Thus the Astable & MonostableMultivibrators and Schmitt Trigger using
PSPICE was simulated and tested

95
 CIRCUIT DIAGRAM-( RC PHASE SHIFT OSCILLATOR):

Rf

+15 V
R1
2 7
6
ICµA

4 CRO
3
-15 V

C C C

R R R

96
 Ex. No :
SIMULATION OF PHASE SHIFT AND WEIN BRIDGE
OSCILLATORS USING PSPICE
DATE :

AIM:
To simulate and analyze the Phase Shift and Wein Bridge Oscillators
using op-amp using PSPICE.

SOFTWARE REQUIRED:

Or CAD software.

PROCEDURE:

 S itch on the computer and select ORCAD PSPICE ion.


 Open a new project to design a circuit in the file menu.

 Select the required components from the library.
 Draw the circuit as shown in Fig (1) &(2) tool bar.
 After completing save the project a d go to simulation tool bar
 Verify the simulated output and take a print out.































97
 CIRCUIT DIAGRAM-(WEIN BRIDGE OSCILLATOR):

MODEL GRAPH:

AMP(V)
RC PHASE SHIFT OSCILLATOR

TIME(ms)

AMP(V)

WIEN BRIDGE OSCILLATOR

TIME(ms)

98
 RESULT:

Thus the Phase Shift and Wein Bridge Oscillators using op-amp using
PSPICE was simulated and tested.

99
 CIRCUIT DIAGRAM-(ASTABLE MULTIVIBRATOR):

Vcc = 5V

Ra

7
I
C
3
5
Rb 5
5
6

MODEL GRAPH:

100
 Ex. No :
SIMULATION OF ASTABLE AND MONOSTABLE
MULTIVIBRATORS (USING NE 555 TIMER) USING PSPICE
DATE :

AIM:
To simulate and analyze the Astable and monostable multivibrators using
NE555 Timer using PSPICE.

SOFTWARE REQUIRED:

Or CAD software.

PROCEDURE:

 S itch on the computer and select ORCAD PSPICE ion.


 Open a new project to design a circuit in the file menu.

 Select the required compo e ts from the library.
 Draw the circuit as shown in Fig (1) &(2) tool bar.
 After completing save the project a d go to simulation tool bar
 Verify the simulated output and take a print out.






























101
 CIRCUIT DIAGRAM-(MONOSTABLE MULTIVIBRATOR):

SIMULATION OUTPUT:

102
 RESULT:

Thus the Astable and Monostable Multivibrators using NE555 Timer using
PSPICE was simulated and tested.

103
 SAMPLE VIVA-VOCE QUESTIONS & ANSWERS

104
 SAMPLE VIVA-VOCE QUESTIONS AND ANSWERS
EXPT NO.1:
INVERTING, NON-INVERTING AND DIFFERENTIAL
AMPLIFIERS USING OP-AMP

1. Define operationalamplifier
Ans: Op-amp is an operational amplifier capable of performing mathematical
operations such as addition, subtraction, multiplication, logarithm, anti-logarithm,
integration, differentiation etc and amplification. It is a multi stage differential
amplifier which is in wide variety of applications.

2. What is the difference between ordinary amplifier and operationalamplifier?

Ans: An ordinary amplifier can only amplify the given input signal. But, an
operational amplifier can perform many mathematical operations with enormous gain.

3. What are the different types of op-amp configurationsavailable?

Ans: Op-amp configurations are broadly subdivided into two types. They are
open-loop and Closed-loop configurations. Open loop configurations are of three
types. They are Inverting, Non-inverting and differential configuration. Closed-loop
configurations are of three types. They are Inverting, Non-inverting, buffer amplifier
and differential configuration. The differential configuration of closed-loop op-amp is
further subdivided into two types. They are configuration with one op-amp and
configuration with two op-amps.
4. Which is the basic building block of operationalamplifier?
Ans: The basic building block of op-amp is differential amplifier. A
differential amplifier amplifies the difference between two input signals.
5. Mention some of the applications ofop-amp.
Ans: Op-amps are mainly used in analog system design. They are used for
wide variety of applications such as mathematical operations, data acquisition
systems, process control, programmable gain amplifiers, automotive instrumentation
and control, communication ICs, radio/audio/video ICs, analog computers, A/D
convertersetc.
6. Can an op-amp be used for both AC and DCApplications?
Ans: Yes. Op-amps can be used for both AC and DC applications. This is one
of the important features of an op-amp. They have the ability to process both AC and
DC input signals.
7. Why negative feedback is preferred inop-amp?
Ans: In most of the op-amp application, negative feedback is preferred to
decrease the overall voltage gain. Open-loop gain is huge and this is minimized by
using two resistors. Input resistor and feedback resistor is used to control the gain and
thus suitable for many practical applications.
105
 8. List out the ideal characteristics ofop-amp.
Ans: The ideal characteristics of op-amp are
i) Open-loop gain must be infinite. Ao L =∞
ii) The input impedance must be infinite. Ri =∞
iii) The output impedance must be zero. Ro =0
iv) Common Mode Rejection Ratio must be infinite. CMRR =∞
v) Slew rate must be infinite. dvo/dt =∞
vi) It must not provide output when there is no input. Vo = 0; when Vi =0.
vii) Differential mode gain must be infinite. Ad = ∞
viii) Common mode gain must be zero. Ac =0
9. Define slew rate. What causes it? Mention the effects and methods of
minimizing Slew rate.
Ans: It is the rate at which the output voltage changes with respect to time. It tells
how fast an output of op-amp can change. Example: For a general purpose op-amp
741, the maximum slew rate is 0.5V/µs. This means, the output voltage can change a
maximum of 0.5V in 1 µs. Slew rate is a major limiting factor for op-amps operating
at high frequency.
Slew rate can also be given as the maximum current flowing through a
compensating capacitor. S.R = I/C. Op-amp with slew rate greater than 100V/µs are
termed as “High Speed Op-amps”. For special applications such as video systems, op-
amps with slew rate of 1000V/µs are available.
CAUSES OF SLEW RATE:
The worst case, or slowest slew rate, occurs at unity gain. Therefore, slew rate is
usually specified at unity gain. Slew rate depends on many factors: the amplifier gain,
Compensating capacitors, the current flowing through the compensating capacitor and
even whether the output voltage is going positive or negative.
If Vi is a sine wave, with a peak amplitude of Vp, the maximum rate of change of Vi
depends on both its frequency f and peak amplitude. It is given by 2πfVp. If this
change is larger than op-amps slew rate, the output Vo will be distorted.
If a step input is given, it is observed that above certain step amplitude the output
slope saturates at a constant value called slew rate (SR). When the frequency of a train
of square wave given to a voltage follower is constantly increased, the shape of the
output will be a triangular wave instead ofsquare.
Methods of Minimizing Slew Rate
The minimization methods can be summarized with the use of following expression.
SR = 2πIf / gm
By increasing the frequency f.
By reducing the input stage transconductance gm.
By increasing the current I flowing through the capacitor.
Or by reducing the value of compensation capacitor Cc (which increases the
frequency)

106
 10. What is the maximum voltage that can be given at theinputs?
Ans: The inputs must be given in such a way that the output should be less than V sat.

107
 11. Why op-amps cannot be used in open-loopconfiguration?
Ans: Op-amp in open loop configuration has enormous gain. For example the
op-amp 741 has a typical gain of 200,000 (106 dB) & op-amp OP-77 has a typical
gain of 12 million (141.6 dB). This huge gain is not necessary for most of the
application of op-amp. Since op-amp output will saturate at ±Vsat (positive and
negative saturation) which is approximately equal to ±V (Supplyvoltage)

12. Can a op-amp be operated using single powersupply?

Ans: No. All the general purpose op-amp must be operated with two power
supplies. Since, the differential amplifier has two supply : +Vcc and – Vee, the op-
amp which is a multi stage differential amplifier stage must also have two supply
voltages. However, op-amps with single supply voltage are also used for very few
applications.

13. Define offset voltage and state itssignificance.

Ans: When an op-amp has no inputs given, there is a possibility of getting
output because of small voltage at input terminals. This very small voltage difference
between the two terminals of op-amp results due to the slight mismatch between the
characteristics of two transistors present in the starting stage of op-amp. If a small
voltage appears across the input terminals of op-amp, then because of the huge gain of
op-amp, the amplified output will result even when there is no input. So a voltage
must be applied by the user to cancel out the effects. The voltage that must be applied
to nullify the output voltage is called as offsetvoltage.

14. List the important features of op-amp741.

Ans: Features of op-amp 741
1. No frequency compensationrequired.
2. Short circuitprotection
3. Offset voltage nullcapability
4. Large common mode and differential voltageranges
5. Low power consumption
6. Nolatch-up

15. Draw the block diagram ofop-amp.

Ans:

16. How to construct a adder circuit usingop-amp?

Ans: A two input summing amplifier may be constructed using the inverting
mode. The adder can be obtained by using either non-inverting mode or differential
amplifier. Here the inverting mode is used. So the inputs are appliedthrough resistors
to the inverting terminal and non-inverting terminal is grounded. This is called
“virtual ground”, i.e. the voltage at that terminal is zero. The gain of this summing
amplifier is 1, any scale factor can be used for the inputs by selecting proper
externalresistors.
108
 17. List all Specifications of op-amp741
Ans:
1. Voltage gain A = α typically2,00,000
2. I/P resistance RL = α Ω, practically2MΩ
3. O/P resistance R =0, practically75Ω
4. Bandwidth = α Hz. It can be operated at anyfrequency
5. Common mode rejection ratio =α
(Ability of op amp to reject noise voltage)
6. Slew rate + αV/μsec
(Rate of change of O/P voltage)
7. When V1 = V2,VD=0
8. Input offset voltage (Rs ≤ 10KΩ) max 6mv
9. Input offset current = max200nA
10. Input bias current :500nA
11. Input capacitance : typical value1.4pF
12. Offset voltage adjustment range : ± 15mV
13. Input voltage range : ±13V
14. Supply voltage rejection ratio : 150μV/V
15. Output voltage swing: + 13V and – 13V for RL>2KΩ
16. Output short-circuit current:25mA
17. supply current:28mA
18. Power consumption:85mW
19. Transient response: rise time= 0.3μs

18. Draw the pin configuration of op-amp741.

Ans:

19. What is the maximum voltage that can be given at theinputs?

Ans: The inputs must be given in such a way that the output should be less than V sat.

20. How to construct aSubtractor?

Ans: A basic differential amplifier can be used as a subtractor. Input signals
can be scaled to the desired values by selecting appropriate values for the resistors.
When this is done, the circuit is referred to as scaling amplifier. However in this
circuit all external resistors are equal in value. So the gain of amplifier is equal to
one. The output voltage Vo is equal to the voltage applied to the non-inverting
terminal minus the voltage applied to the inverting terminal; hence the circuit is called
asubtractor.
X- - - - - - X ----------X

109
 EXPT NO: 2
INTEGRATOR AND DIFFERENTIATOR USING OP-AMP.
1. Express the output voltage of anIntegrator.
Ans: The expression for the output voltage of an op-amp integrator is given as
1 t
Vo = - Vindt + C
R1Cf 0
Where R1  Input Resistance
Cf Feedback Capacitance
Vin Input Voltage and
C  Constant

2. Why op-amp integrator is called as precisionIntegrator?

Ans: The op-amp integrator has a high degree of accuracy. And it can
precisely implement the output voltage expression. Because of this, op-amp integrator
is often called as precisionintegrator.

3. Mention some of the applications ofintegrator.

Ans: Op-amp integrator finds wide application in function generators
(Triangle and sawtooth wave generators), active filters (State variable &biquad filters,
Switched Capacitor filters), Analog to Digital Converters (Dual-slope converters,
Quantized feedback converters) and Analog controllers (PIDControllers).

4. What are the problems faced by basic ideal integrator and how can we
overcome?
Ans: The input offset voltage Vio and the part of input current charging the
feedback capacitor Cf produces the error voltage at the output of the ideal integrator.
Therefore, in practical integrator, to reduce the error voltage at the output, a resistor
Rf is connected in parallel to Cf. This Rf, limits the low-frequency gain and hence
minimizes the variations in the output voltage. Both stability and the roll-off problems
in basic ideal integrator can be corrected by additional resistorRf.

5. What is other name given to practicalintegrator?

Ans: The method of preventing saturation in integrator is to place a parallel
resistance Rf with Cf. The resulting circuit is called as lossy integrator (Practical
Integrator) which can still provide integration function. But, only over a limited
frequency range. In most applications, integrators are placed in a control loop to
avoid saturation and there is no need for Rf in suchapplications.

6. What is meant by negativeresistance?

Ans: Negative resistance indicates the release of power. Negative resistance
can be used to neutralize unwanted ordinary resistance, as in the design of current
sources or to control the pole location, as in the design of active filters and oscillators.

7. Integrator is otherwise called as fixed frequency, variable gain LPF. True or

False?
Ans:True.

110
 8. Give the meaning and use of Virtualground.
Ans: If the difference input voltage is ideally zero, and non-inverting terminal
is grounded with a input signal applied to the non-inverting terminal via R1, then
voltage at the inverting terminal is approximately equal to voltage at the non-inverting
terminal. This is known as virtual ground (A terminal that is not connected to physical
ground but, assumed to be.) It is much used in closed-loop analysis of inverting
amplifier.

9. Determine the ouput for the following inputs to anintegrator.

1 t
Ans: Since, Vo = - Vindt + C, the output of integrator for the inputs
R1Cf 0
willbe Sine Wave  Clamped Cosine Wave
Cosine Wave  Negative Sine Wave
Square Wave  TriangularWave
Rectangle Wave Sawtooth Wave

10. How integrator is useful in constructing ServoAmplifer?

Ans: A Servo Amplifier is constructed when an integrator is followed by an
inverting amplifier. Servo amplifiers are used where the output is a delayed response
to the input. Example: Radar (or) Position of a xy table in a manufacturing process.

11. How to convert an op-amp integrator to op-ampdifferentiator?

Ans: To convert a op-amp integrator to differentiator, just replace the feedback
capacitor Cf as feedback resistor Rf. And replace the input resistor R1 as input
capacitor C1 of an integrator.

12. Give the output voltage expression for anintegrator.

Ans: The output voltage expression of a differentiator is givenas
dVin
Vo = - Rf C1
dt
Where Rf Feedback Resistance
C1  Input Capacitance
Vin  Input Voltage

13. How ideal differentiator suffers from instability? How can we overcome
them?
Ans: The ideal or basic differentiator‟s circuit gain (Rf/R1) increases with
increase in frequency at a rate of +20dB/decade. This makes the circuit unstable.
Also, the impedance Xc1 decreases with increase in frequency, which makes the
circuit very susceptible to high frequency noise. When amplified, this noise can
completely override the differentiated output signal. Both stability and high frequency
noise can be corrected by addition of two components R1 and Cf. This circuit is called
as practicaldifferentiator.

14. Can a differentiator be used as a High passFilter?

1
Ans: Yes, at cut-off frequency of fa = .
2 f 1c1
111
 15. What is the condition to be followed for properdifferentiation?
Ans: The input signal will be differentiated properly if the time period T of the
input signal is larger than equal to RfC1. That is T ≥ RfC1.

16. How high frequency noise affects the performance of andifferentiator?

Ans: Due to poor Stability (i.e) Circuit tends to oscillate and gain of the circuit
increases with an increase in frequency. So high frequency noise is amplified and is
dominant at the output.

17. Determine the output of differentiator for the following inputwaves.

Ans: The inputs and respective output waveform of differentiator are as follows,
Sine Wave  Negative Cosine Wave
Cosine Wave  Sine Wave
Square Wave  Spike Wave
Sawtooth Wave  Square Wave

18. Give some important applications ofdifferentiator.

Ans: Differentiator is most commonly used in wave shaping circuits to detect
high frequency components in an input signal and also as a rate-of-change detector in
FM modulators.

19. What is Unity GainFrequency?

Ans: Unity-gain frequency of op-amp differentiator is the frequency at which
the gain is unity (0 dB).

20. What isUGB?

Ans: Unity Gain Bandwidth (UGB) is the bandwidth of op-amp when the
voltage gain is 1. It is also called as Closed-loop bandwidth, Gain-Bandwidth Product
or Small signal bandwidth.

X- - - -- X --------- X

112
 EXPT NO: 3
INSTRUMENTATION AMPLIFIER
1. What are the important requirements of an instrumentationAmplifier?
Ans: The requirements of an instrumentation amplifier are low noise, low
thermal and time drifts, high input impedance, accurate closed-loop gain, high CMRR
and high Slew Rate.

2. List the characteristics of a basic three op-amp instrumentationamplifier.

Ans: For 3 op-amp instrumentation amplifier, the characteristics are
i) The voltage gain, from differential input to single ended output is set
by
only one resistor.
ii) The input resistance of both inputs are very high and does not
change as
the gain is varied.
iii) Vo does not depend on the voltage common to both inputs (Common-
mode rejection) but, only on theirdifference.

3. Mention some of the applications of an instrumentationamplifier.

Ans: Instrumentation Amplifier is used in data acquisition unit, sensing,
measurement & Control of physical parameters such as temperature, used as signal
conditioning circuit, Light-intensity meter, Measurement of flow and thermal
conductivity, Analog-weight scale, Active guard drive, digitally programmable gain
and output Offsetting.

4. What are the Different configurations of instrumentation amplifier? What are

the merits anddemerits?
Ans: There were four configurations. They are
a. Triple op-amp IAs
b. Dual op-ampIAs
c. Monolithic IAs
d. Flying-Capacitor
IAsTriple op-amp IA :
Offers high impedance because of buffer stage and too many components used.
Dual op-amp IA:
Offers less Complexity in circuit (with fewer resistors & op-amps) with
Significant boost in performance. But it treats the input asymmetrically with
Some delay.
Monolithic IA :
Better optimization of CMRR, gain linearity and noise reduction.

Flying-Capacitor IA :
Excellent CMRR, as common mode signals are completely ignored.

5. How many stages does a three op-amp instrumentation amplifier contain?

And what arethey?
Ans: A common op-amp instrumentation amplifier uses 3 op-amps and seven
resistors which is splitted into two stages. i) Buffer stage (High impedance)
Differential
input- differentialoutput stage. ii) Difference amplifierstage.
113
 6. Define CMRR of instrumentationAmplifier.
Ans: CMRR of instrumentation amplifier is defined as ratio of differential mode
gain to common-mode gain.
Ad
CMRR (dB) = 20 log │ │
Ac
The Differential mode gain is preferred than common mode gain. Common
mode gain indicates the gain of op-amp when common mode noise signals are
present.

7. What is the disadvantage of a instrumentationamplifier?

Ans: The requirement for instrumentation amplifier is too strict to follow for
general purpose applications. When the requirements are not too strict, then a general
purpose op-amp can be used in differential mode. Such amplifiers are called as
differential instrumentation amplifier.

8. Express the individual and overall gain of a instrumentationamplifier.

Ans: Gain of I stage:
Differential output of buffer stage
2R3
Vo1 – Vo2 = ( 1 + ) (V1 – V2)
RG
Where V1 - V2  the differential input
R3  feedback resistor of op-amp 1
RGGain varying resistor

Gain of II stage:
Differential output stage
R2
Vo = ( Vo2 – Vo1)
R1
Where Vo2 – Vo1  the differential input to second stage
R2  feedback resistor of op-amp 3
R1 Input resistor of op-amp3
Overall Gain :
Vo = A(V2 – V1)
R3
Where A = AI x AII = (1+2 ) x ( R2)
RG R1
9. Give some examples of a monolithicIAs.
Ans: Examples of IC Instrumentation Amplifiers from Analog Devices
AD 521/522/524/624/625
AMP - 01
AMP – 02

10. What is the use of op-ampbuffer?

Ans: Op-amp buffer or voltage follower is a unity gain, high input impedance
and very low output impedance circuit used to provide isolation between two stages
of ansystem.

114
 EXPT NO.4 :
ACTIVE FILTER (LP, HP & BP) USING OP-AMP 741

1. What is meant by passive and activefilters?

Ans: Passive filters: Uses Resistors, Capacitors and inductors as elements.
Active Filters: Uses Transistors or op-amps in addition to Resistors and Capacitors.

2. Why active filters are not suitable for high frequencyapplications?

Ans: Above MHZ range the op-amp open-loop gain rolls-off with increase in
frequency.

3. List some of the applications offilters.

Ans: Filters are an integral part of electronic networks and are used in
application from audio circuits to Digital Signal Processing (DSP) Systems such as
speech, audio, Video, Image processing etc.,

4. How Active filters are superior than passivefilters?

Ans: Advantage of active filters over passive filters
i) Gain and frequency adjustmentflexibility.
ii) No loadingproblem.
iii) LowCost.

5. How Filters are classified and what arethey?

Ans: Based on passband, stopband and cutoff frequency, filters are classified
into Lowpass, Highpass, Bandpass, Bandstop and Allpass filters.

6. What are poles andzeros?

Ans: Zeros are numerator and poles are denominator polynomials of the
transfer function of a filter. Poles and Zeros determine the characteristics of a filter.

7. Does a filter affect both amplitude and phase of the inputsignal?

Ans: Yes.

8. What is the use of bodeplot?

Ans: The Bode Plots are plots of decibels and degrees versus decades (or
Octaves).
The purpose of bode plot is to represent both logarithmic and semi-logarithmic scales.

9. In what basis the order of the filter isdecided?

Ans: Based on the parameter „n‟, the order of the filter is decided. n=1; First
order, n=2; Second order and so on. The parameter „n‟ decides the accuracy of the
filter primarily at the stopband (Rolloff). Higher the value of n, better the filter will be
and complex the design will be.

10. Define Bandwidth of afilter.

Ans: Bandwidth of a filter is defined as higher cutoff frequency minus lower
cutoff frequency. Or in other words it is the difference between Upper cutoff
frequency and Lower cutoff frequency. Bandwidth is expressed in H Z.
B.W=fH–fLHZ
115
 11. What do you understand from the frequency response offilter?
Ans: There were three cases that should be noted in any filter except allpass
filter. The three cases for LPF filter for example is given as
Case i: If the input frequency fin is less than the higher cutoff frequency fH, then
magnitude of the gain is maximum and it is given as passband gain of the filter AF.
Case iiIf the input frequency fin isequal to the cutoff frequency,then thegain
A
magnitude will be 70.7% of the maximum gain.That is, .
2
Case iii: If the input frequency fin is greater than the higher cutoff frequency fH, then
magnitude of the gain is maximum and it is given as passband gain of the filter AF.

12. What were the different types of BPF?Explain.

Ans: BPF is classified either as Narrowband and Wideband filter based on the
Quality factor (Figure of merit) Q. It is expressed as
fc fc
Q= = ; where fc= fhfl
fh fl B.W
If Q < 10 then it is termed as Wide bandpass filter (Poor Selectivity)
If Q > 10 then it is termed as narrow Bandpass filter (Good Selectivity)

13. How filters are classified according to their bandcharacteristics?

Ans: Filters are classified according to their passband and stopband
characteristics. Butterworth  Flat passband and flat stopband (Flat-Flatfilter)
Chebyshev Ripple passbad and flat stopbandCauer
 Ripple passband and RippleStopband

14. How to convert a BPF toBSF?

Ans: Swap HPF-LPF series connection of BPF to LPF-HPF series connection
toachieve Bandstop filter (BSF) which is also called as BEF(Band Elimination
Filter) or NotchFilter.

15. What is the function of aallpassfilter?

Ans: This filter passes all frequencies well but it provides phase shift between
input and Output voltage which is a function of frequency.

116
 16. List the applications ofBPF.
Ans: It acts as frequency selector, stereo-equalizer octave filter,
communication transmitter and receiver circuits, radio, TV broadcast receivers,
telephone, radar, space satellites and bio-medical equipment.

17. Write the way of constructing a I order ButterworthBPF.

Ans: I order Butterworth BPF can be constructed using I order Butterworth
HPF followed by I order Butterworth LPF.

18. Why inductors cannot be used with activefilters?

Ans: Because, inductors are bulky due to windings and cannot be fabricated
inside an IC.

19. What is the condition for stability of anetwork?

Ans: All the poles in unit circle must fall on the left half of the S-plane during
mapping for Passive network (Filter) The location of the poles determines the stability
conditions for active network. All the roots must have negative real parts for a active
network (Filter). Also there are no changes in the signs of the first column of the routh
array.
20.

ACL(LPF) = Vo= Af
Vin 1 j(f /fh)

│ ACL │ = Af /√1+ (f/fh)2 ; Ø = tan-1(f/fh)

(
ACL(HPF) = Vo= Af j( f / fl)
Vin
)
1 j(f /fl)

│ ACL │ = Af (f/fl) /√1+(f/fl)2 ; Ø = tan -1(f/fl)

Where Af is the passbandgain

117
 EXPT NO.5:
ASTABLE, MONOSTABLE MULTIVIBRATOR
ANDSCHMITT TRIGGER USING OP-AMP
1. Definemultivibrator.
Ans: A multivibrator is an oscillatory circuit capable of generating waveforms
without any Specific input signal. The circuit only has supply voltage connections,
from which the two amplifiers saturates one another to generate vibrations.

2. State the relationship between Astable multivibrator and acomparator.

Ans: Astable multivibrator is almost a comparator except the trigger or
threshold voltage will be generated on its own.

3. Express the frequency of oscillation of an AstableMultivibrator.

Ans: The frequency of oscillation of free running multivibrator is given as
1 1
fo = =
T 2RCln(1 2R1/ R2)

4. What is the major difference between astable and monostablemultivibrator?

Ans: In astable multivibrator there is no stable state and no triggering input.
But, monostable multivibrator has one stable state and works based on the triggering
pulse
input.

5. Which Determines the switching time of amultivibrator?

Ans: The threshold value determines the switching time of a multivibrator.
When ever a capacitor voltage exceeds │VT│, the output state changes.

6. List some applications of multivibrator.

Ans: Multivibrators are mostly used for timing applications. Astable
multivibrator is primarily used as square wave generator in a function generator.
Monostable
Multivibrator is used for timed control applications with the help of triggering input.

7. Say how to form a triangular wave generator usingmultivibrator?

Ans: To construct a triangular wave generator, aAstable multivibrator should
be followed by an integrator. Square wave is generated first and then converted to
triangular with the help of integrator.

8. Define stablestate.
Ans: The time over which a multivibrator output voltage stays constantly is
called as stable state. A quasi-stable in the other hand depends on the triggering input
to regain the output state.

9. Give the expression of period of oscillation of an Astablemultivibrator.

Ans: The expression for period of oscillation of a free running multivibrator is

given as T = 2RC ln (2R1 R2 R2)

118
 10. Give the relationship between tp and T of a monostablemultivibrator.
Ans: The Triggering pulse width „tp‟ must be much smaller than the ON time
„T‟ of Stable State.

11. What is a Schmitttrigger?

Ans: Schmitt trigger is the inverting comparator with positive feedback. The
other names given for Schmitt trigger circuit is regenerative comparator and squaring
circuit. It is mainly used in converting any irregular shaped waveform into square
wave or pulse. So it is used in wave shaping circuit.

12. Give the expression for the upper and lower threshold points ofSchmitt
trigger.
Ans: The expression for upper threshold point and lower threshold point are as
follows
R1
Upper threshold voltage VUT (+Vsat)
=
R1 R2
R1
Lower threshold voltage VLT = (-Vsat)
R1 R2
13. Write the truth table of acomparator.
Ans: Truth table of a Comparator
When V+ > V-  +Vsat
When V+ < V-  - Vsat
When V+ = V-  High Impedance State

14. What is Comparator chatter? And how can we eliminateit?

Ans: For slowly varying signals, comparators tend to produce multiple output
transitions, or bounces, as input crosses the threshold region. This is referred to as
comparator chatter. This phenomenon is eliminated with the help of Hysteresis. In
hysteresis the circuit snaps and activates the other threshold.

15. What happens when both threshold points in a Schmitt trigger is equalto
zero?
Ans: When VUT = VLT = 0, the Schmitt trigger behaves as a zero crossing
detector. There were two types of Schmitt trigger. They are positive andnegative
Schmitt trigger.

16. Can a Schmitt trigger can be operated with single supply & single threshold
voltage?
Ans: Schmitt trigger can also be operated with single power supply or with a
single triggering input (Either Positive or Negative)

X - - - - --X --------- X

119
 RC PHASE SHIFT AND WIEN BRIDGE
OSCILLATORUSING OP-AMP 741
1. State Barkhausen Criterion and itssignificance.
Ans: Barkhausen Criterion for oscillation gives the conditions for an oscillator
to oscillate.
i) AVβ ≤ 1; the product of forward gain AV and the feedback ratioβ
must satisfy this condition.
ii) The total phase shift of AVβ must be 0° or360°

2. According to oscillations how oscillators areclassified?

Ans: Based on how oscillations are created, oscillations are classified as under
damping, over damping and constant amplitude oscillations.

3. How oscillations are created in RC phase shift and wien Bridgeoscillator?

Ans: When the bridge is balanced and the overall phase attained is 0°, the
Wien bridge oscillator produces oscillations. RC phase shift oscillator produces 360°
of phase shift in two parts. Firstly, each and every RC pair in the feedback network
produces 60° phase shift and a totally there were three pairs, thus producing 180°
Phase shift and secondly, the feedback input is given to the inverting terminal of op-
amp to produce another 180° phase shift and a total phase shift of360°.

4. What are the merits and demerits of different types ofoscillator?

Ans: The major problem in Wien bridge oscillator is balancing the bridge
becomes very difficult when the component values drifts unfortunately due to external
or internal conditions. Poor stability and low frequency application is the demerits of
RC phase shift Oscillator. Both RC phase shift and Wien bridge oscillator have a
advantage that its operating frequency can be easily varied by just replacing the
values of either R or C to a new value. Crystal oscillator has excellent stability and
poordeviation.
5. Give the expression for frequency of oscillation of RC phase shift oscillator
and Wien bridgeoscillator.
Ans: The frequency of oscillation of RC phase shift oscillator is given as
fo = 1/(2π√6 RC)

The frequency of oscillation of a Wien bridge oscillator is given as fo = 1

2RC

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 EXPT NO.7:
ASTABLE AND MONOSTABLE MODE OF IC 555 TIMER

1. Why Timer IC is numbered as555?

Ans: The timer IC is called as 555, because the internal architecture consists of
three 5KΩ resistors.

2. What are the different operating modes of 555Timer?

Ans: There were two operating modes of 555 Timer. It operates in Astable and
Monostable mode.

3. What are the different types of packages available for 555 TimerIC?
Ans: The packages used for 555 Timer are 8-pin mini Dual-Inline-Package
(DIP) and 8-pin Metal Can.

4. List some applications of 555 timers in both Astable mode andMonostable

Mode.
Ans: In Astable mode of operation, some of the applications of 555 Timer
were: Tone- burst oscillator, Voltage controlled frequency shifter, square wave
generator etc., In Monostable or one-shot mode, some of the applications of 555 timer
were: Water-level fill control, Touch switch, Frequency divider, missing pulse
detector and manymore.

5. Define dutycycle.
Ans: Duty cycle of waveform if defined as the ration of ON time of the wave
Ton
to the total time. τ=
Ttotal
Example: If a square wave is On for 1ms of time and if the total time is 2ms,
The duty cycle is 0.5 or in terms of percentage = 50%.

6. Express the free running frequency of oscillation and total period ofAstable
mode of 555timer.
Ans: The free running frequency of oscillation is given as
1 1.44
f= = and thus the total period of oscillation T is
T (Ra 2Rb)C

T = 0.695 (Ra+2Rb)C

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 EXPT. NO: 8

122
 PLL IC 565 AND FREQUENCY MULTIPLIER USING PLL 565
1. What is aPLL?
A PLL is a Phase Locked Loop Circuit used to track any changes in the input
frequency.

2. What are the operating modes of anPLL?

A PLL functions in any in any one of the mode described here.
1) Free Runningmode
2) Capturemode
3) Lock modeand
4) Trackingmode/range

3. What are the basic building blocks of a PLLIC?

The basic building blocks of PLL IC are 1) Phase comparator 2) Low
Pass Filter and 3) Error Amplifier.

4. What is meant by free running mode of aPLL?

A PLL is said to be in this mode when there is no input frequency
given to phase comparator for comparison. When no input is given, PLL runs
freely without any locking or tracking and so it is called as free running mode
ofPLL.

5. Name some of the applications of PLL IC565.

PLL ICs are mostly used in frequency application circuits such as
Frequency synthesizer, frequency multiplier, frequency divider, phase
comparator, FM demodulator, PM demodulator, Phase magnitude comparator,
etc.,

6. Why PLL Circuit is mostly preferred in FrequencyApplications?

It is preferred in most of the frequency applications because the
frequency content of a signal is indirectly proportional to Phase of the same
signal. As we compare the phase of the two signals, we indirectly compare the
frequency of the same signal. This is due to the fact that direct phase is
nothing but indirect frequency and direct frequency is nothing but indirect
phase.

7. What happens when the two input signals given to PLL is havingsame
frequency or samephase?
When both the inputs are same, the PLL will start functioning in the
Lock mode and if once lock has been occurred, the PLL will start tracking the
Phase or frequency changes in the input signal.

8. What isVCO?
VCO is the integral part of PLL. A VCO is the Voltage Controlled
Oscillator. As the name implies it generates oscillations according to the input
voltage. This VCO is placed in the feedback path of a PLL. The output of the
VCO is changing according to the Error output voltage from the error
amplifier placed finally in the forwardpath.

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 ADDITIONAL SYLLABUS VIVA-VOCE Q & A

EXPT NO.12
DIGITAL TO ANALOG CONVERTER USING OP-AMP 741
1. Mention Some Important DACcharacteristics.
Ans: Resolution, Full-scale output Voltage, Offset
error, Gain error, Monotonocity and Relative accuracy.

2.What are the different types of D/A Converter techniquesavailable?

Ans: The different types of DAC techniques are
i) Binary weightedDAC
ii) R-2R Laddernetwork
iii) Inverted R-2R laddernetwork
iv) Current DrivenDAC

3. Define resolution of aDAC.

Ans: The resolution is nothing but the number of distinct
analog outputs that can be produced by DAC. It is given as Resolution
= 2n Where „n‟ is the number of digital inputs. Example: For 3 inputs
DAC there are 8 distinct outputs.

4. What were the practical resolutionspossible?

Ans: DACs with resolution of 8, 10, 12, 14, 16, 18 and 20 bits
were already available.

5. Define monotonicty of aDAC.

Ans: A DAC is said to be monotonic if the analog output
increases or remains the same as the digital input increases. This result
in the output always single valued.

6. What are the merits and demerits of different types of

DACconversion techniques?
Ans: The binary weighted is the simplest DAC technique. But
this technique suffers from the fact that if, number of binary inputs was
more, then the Value of resistor also increases and becomes difficult to
be implemented inside a IC.
The R-2R ladder network eliminates the above said disadvantage,
since it uses only two values of resistance R and 2R irrespective of
number of binary inputs. Ratioed emitter current is the disadvantage of
this type.
The inverted ladder type eliminates the above said disadvantage
by performing voltage ratio rather than current ratio.
Current driven DAC is mainly used when there is a base errors.
This type is mainly used to compensate base losses of a bipolar DACs.

7. Mention some monolithic DACsavailable.

Ans: DAC – 08, AD 558, PCM 52/53 nad HI-DAC 16
are some of the examples of monolithic DAC.

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