成功大學電機所電子學考古題98 107大破解

成功大學電機所考古題大破解
Copyright by @劉明彰@way-win
98 年成功大學電機、微電子
電子學試題
1. A full-wave rectifier circuit shown in the Fig.
is to deliver 0.1A and 15V (average) to a load R.
The ripple voltage is to be no larger than 0.4V
peak-to-peak. The input signal Vi is 120V
(rms) at 60Hz. Assume diode turn-on voltages
of 0.7V. Determine the required turns ratio
( N1 / N 2 ) and the filter capacitance C value. (11%) 【98 成大電機、微電子】
【解】：
2. A CMOS inverter circuit shown in the Fig. has the

parameters of VDD  5V , VTN  VTP  1V ，
K N  100μA/V 2 , and K P  50μA/V 2 .
Determine the values of noise margins
( NM L , NM H ) and the gate threshold voltage
VM . (22%) 【98 成大電機、微電子】
【解】：
3. (a)Explain briefly why BJTs and FETs can amplify ac signals? (6%)
(b) Redefine the small-signal parameters of the transistor to absorb the emitter
resistance RE in the Fig. (i.e., to find g m 2 、 r 2 , and ro 2 in terms of 、 r 1 ，
and ro1 ). (6%)
(c) A single BJT amplifier is needed that has a gain of ~0 dB and an input
resistance of 25M with a load resistance of 25k. What is the preferred choice
of amplifier configuration? Explain why you made this selection. (4%)
【解】：
1
4. (a)Derive iout and Rout for the circuit shown in the Fig.(a) Assume the
small-signal parameters of the MOSFET are g m and ro . (8%)
(b)The MOSFETs in the circuit of the Fig.(b) are matched, having
kn (W / L)1  k p (W / L)2  1.5mA/V 2 and | Vt |  0.5V . For G and D open,
find the drain currents I D1 and I D 2 . For ro   ，what is the voltage gain of
the amplifier from G to D? (10%) 【98 成大電機、微電子】
(a) (b)
【解】：
5. Consider the circuit as shown in the Fig. The circuit is

biased with Vcc  12V , and the load resistance is
RL  75 . The device parameters are:
I SD  5 1013 A for D1 and D2 ,
I SQ  2 1013 A，  n   p  60 for Qn and Q p .
(a)Neglecting base currents, determine the required
value of I Bias such that the quiescent currents in Qn
and Q p are I CQ  5mA . (6%) 【98 成大電機、微電子】
(b) Find icn , icp , VBEn , VEBp , and I D when Vo  2V . (8%)
(c)What is the power conversion efficiency for this circuit when the output is a
sinusoid and the peak output voltage reaches 80 percent of Vcc ? (8%)
【解】：
6. Consider the phase-shift oscillator shown in the Fig. with parameters

C  100 pF and R  10K . 【98 成大電機、微電子】
(a) Determine the frequency of oscillation. (6%)
(b)Find the minimum required value of R f for sustaining oscillation. (5%)
【解】：
2
-------------------------------------------------解答--------------------------------------------------
N1
1. Ans. C  2.11 103 F 、  5.34
N2
2. Ans. VM  2.24V 、 ViL  1.79V 、 ViH  2.54V
NM L  1.79V ， NM H  2.46V
3. Ans. (a) 輸入訊號自 B-E 間灌入，造成 VBE 改變，導致 I C 產生變動，即有
I C 訊號，此電流訊號可寫成 ic  g mvbe 。然後在 C 端外接負載即能得到輸出
訊號  g mvbe  RL ，亦即 vbe 被放大  g m RL 倍
(b) r 2  r 1  (1   )(RE // ro1 ) (  g m1r 1 )

 RE // ro
g m2  
r 1  (1   )(RE // ro1 ) (re  RE // ro )ro
ro 2  [1  g m1  ( R // r 1 )]  ro1
(c) Common  Collector Amplifier
4. Ans. (a) I out  0 、 Rout  R3  [1  gmro ]  R3

vd V
(b) I D1  I D 2  0.75mA 、   2999
vg V
5. Ans. (a)靜態分析： I bias  12.5mA
(b) icn  27.2mA , icp  1mA , VBEn  0.64V , VEBp  0.56V ,
I D1  12.5mA ， I D 2  12.05mA .
(c) PL  614.4mW 、 PS  1098.3mW 、  55.9%
V s2R2R f C3
6. Ans. L( s)  2  
V1 s 3 R 3C 3  6s 2 R 2C 2  5sRC  1
1 Rf
(a) f o   6.5  10 4 Hz ，(b)  29
2 6RC R
3
電子學試題
1. Determine the current I D 2 and the voltage Vo in the

diode circuit shown in the Fig. Assume the turn-on voltage of
V  0.7V for each diode. (10%) 【99 成大電機所】
【解】：
2. TTL
3.Assume the input signal to the circuit in the Fig. is Vi  75 sin(120t )V and
the diode has a cut-in voltage (V ) and 0.7V. 【99 成大電機, 微電子所】
(a)Calculate the average value of the output voltage Vo .
(5%)
(b)If a capacitor (50F ) is added in parallel with the
load resistor RL and the ripple voltage is to be  4V ,
determine the minimum value of RL for the case of V  0V and
V  0.7V , respectively. (10%)
【解】：
4. Assume the circuit in the Fig. is a symmetrical

circuit. Derive the ac component of the output
voltage vO for the case of vC1  vC 2 and
vC1  vC 2 , respectively. (10%) 【99 成大電機, 微
電子所】
【解】：
5. Plot transfer curve of the circuit in the Fig.

(a)Assume an ideal operational amplifier (op-amp). (4%)
(b)Assume the op-amp has a finite voltage gain (i.e.,
Av   ). (5%)
【解】：
4
6. A feedback amplifier is shown in the

Fig. ，neglect ro and body effect of the
MOSFET devices. The parameters of M 1
and M 2 : g m1  g m 2  5mA / V .
(a) Which topology is for this feedback
amplifier? (4%)
(b) Calculate the feedback factor  . (5%)
(c) Find the voltage gain vO / vS , the input resistance Rin , and the output
resistance Rout (9%) 【99 成大電機所】
【解】：
7. Consider the class AB Amplifier as shown in the Fig.

The circuit is biased with VCC  12V , and I BIAS  20mA , the load resistance
RL  8 . 【99 成大電機, 微電子所】
14
The device parameters are: I SD  3 10 A for
13
diodes, and I SQ  10 A for QN and QP ,
 n   p  75 .
The minimum value for diode current is to be no
less than 5mA
(a) Find the quiescent collector current I CQ for QN and QP . (8%)
(b) Calculate the maximum average power delivered to the load. (8%)
【解】：
-------------------------------------------------解答--------------------------------------------------
1. Ans. I D 2  0 , VO  VB  9.53V
2. Ans. 略
3. Ans. (a) Vo (av )  23.54V ，(b) RL (min)  6.25 103 、RL (min)  6.19 103 
4. Ans. 題意不明，無法計算
5
R
1
V R V RL
5. Ans. (a) o  1  ，(b) o 
Vi RL Vi R
1
RL
1
A
1 mA
6. Ans. (a) shunt-shunt 組態，(b)   
90 V
V V
(c) Rin  1.8K 、 Rout  0.02K 、 o   4.04
Vs V
20 9.12 2
7. Ans. (a) I CQ  mA ，(b) PL (max)  mW
1

3 2  8
75 10
電子學試題
1. Each diode cut-in voltage in the circuit in
the Figure is 0.7V. Determine I D1 , I D 2 , I D 3 ,
and vo for vI  3.0V . (12%) 【100 年成
大電機所】
【解】：
6
2. Consider the circuit shown in Figure . The threshold voltages of the n-channel
transistors are VTN  0.8V , and the threshold voltages of the p-channel
transistors are VTP  0.8V . The conduction parameters are all equal. If
vo 2  0.6V , determine the values of vo 3 , vo1 , and vI . (18%)
【解】：
3. Consider the circuit shown in Figure with transistor parameters of   120 ,

VBE ( on )  0.7V , and VA   .【100 年成大電機所】
(a)Determine the overall small-signal voltage gain Av  vo / vs .
(b)Determine the input resistance Ris and the output resistance Ro .
(c)Determine the maximum undistorted swing in the output voltage. (20%)
【解】：
7
4. Consider the amplifier whose small-signal AC equivalent circuit is shown in

Figure ， assume that the parameter values for the circuit are given as follows.
Cc  1 μF , C1  10 pF , C2  1 pF , Rs  75 , Ri  2.5 k ,
RL  1 k , g m  0.04 A / V .
(a)Find the upper and lower 3-dB frequencies of the frequency response. (10%)
(b)What is the gain-bandwidth product for this amplifier? (5%)
【解】：
5. An amplifier has a dc gain of 105 and poles at 104 Hz, 106 Hz, and 108 Hz. If
this amplifier is operated in a closed negative feedback loop with a
frequency-independent feedback factor  . (a) Is this amplifier unity-gain stable?
Please explain the reason for your answer. (7%) (b) What are the gain and phase
1
margins if the amplifier is operate with  ? (8%) 【100 年成大電機所】
100
【解】：
6. It is required to design a class B amplifier with the output voltage across a load
RL  8 shown in the Figure . Neglecting the effects of finite VBE and VCEsat .
(a) Determine the load power, the supply power, and the power-conversion
efficiency. (12%) (b) Find the maximum power dissipation PD in the transistors.
(8%) 【100 年成大電機所】
【解】：
8
-------------------------------------------------解答--------------------------------------------------
1. Ans. Vo  2.07 V 、 I D1  0.17 mA ， I D 2  0.062 mA 、 I D3  0
2. Ans. Vo3  5 V 、 Vo1  2.78 V 、 Vi  2.5 V
Vo V
3. Ans. (a)   99 ，(b) Ris  3.6 k 、 Ro  0.0475 k
Vs V
(c)  1.06V  Vo  2.53 V ，最大 swing 為 3.59 V
4. Ans. (a) f L  61.8 Hz 、 f H  33.8 MHz

9V
(b)GBW  1.31  10  Hz
V
5. Ans. (a) unstable，(b)GM= 20 dB 、PM= 22.5
6. Ans. (a) PL  6 W 、 PS  13.5 W 、  44.4% ，(b) PD (max)  7.59W
9
電子學試題
1. Determine true or false for statements related to devices BJT and MOSFET. If
false, please briefly explain to get full credits. (12%) 【101 成大電機所】
(1)BJT and MOSFET are both three-terminal devices.
(2)The emitter current of BJT is solely controlled by the BASE terminal while the
drain-to-source current of MOSFET is only controlled by the GATE terminal.
(3)The current of BJT and MOSFET in active mode/saturation region are both
driven by majority carriers in the respective device.
(4)Generally speaking, the current driving strength of BJT device is stronger than
that of MOSFET with the same device dimension.
(5)There are parasitic diodes in both BJT and MOSFET devices.
(6)Einstein relationship can be applied to both BJT and MOSFET devices.
【解】：
2. A particular MOS inverter has the following transfer characteristic curve as

shown in the Fig., where VO is the output voltage and Vi is the input voltage.
What are the values for VOH , VOL , VIH , VIL , NM H and NM L that are
used to define noise margin? (8%) 【101 成大電機所】
Vo ( volts)
Vi ( volts)
0 5
【解】：
3. For the MOSFET circuit shown in the Fig. , determine the

specified output voltage under difference cases. Consider the
long-channel process technology for which | Vtn |  | Vtp |  1V ，
tox  8nm nm，  n  450 cm 2 /V  s ，  p  150 cm 2 /V  s ，
 ox  4.0  1011 F / m，(W/L)1  4 μm/ 0.8 μm， VDD  5V .
The subscript 1 & 2 stand for parameters related transistor Q1 & Q2 ,
respectively. Channel-length modulation effect can be ignored here. (13%)
10
(a)What are the values of k n and k p including their unit?

(b)Assume k p(W/L)2  k n(W/L)1 , find VO when Vi  0 and Vi  5V ,
respectively.
(c)Assume k p(W/L)2  0.01k n(W/L)1 , find VO when Vi  2.5V .
【解】：
4. For the circuit shown in the Fig., the relative transistor areas are
AQ1  AQ 2  AQ3  AQ 4  AQ 6  1. Assume that vBE  0.7V and  is very
large for all transistors. Please find the value of resistors ( R1 , R2 and R3 ) and
A Q5 to achieve I 2  1mA , I 3  50A , I 5  3mA , and I 6  100A . (12%)
【101 成大電機所】
【解】：
5. An active-loaded MOS differential amplifier

is shown in the Fig. The NMOS transistor
parameters are Vt  2V ， V A (channel
length modulation voltage)  40V , and
VGS  4V at I D  1mA ; The PMOS
transistor parameters Vt  3V ，
are
VA  40V ，and VGS  6V at I D  1mA . Please calculate Gm ，Ro ， Ad ，
and Ac (12%) 【101 成大電機所】
【解】：
11
6. A single-pole op amp has a dc gain of 100 dB and a unity-gain frequency of 10

MHz. 【101 成大電機所】
(a)What is the upper-cutoff frequency of the op amp itself? (3%)
(b)If the op amp is used to build a non-inverting amplifier with a closed-loop gain
of 60 dB, what is the bandwidth of the feedback amplifier? (3%)
(c)Write an expression for the transfer function of the non-inverting amplifier.
(3%)
【解】：
7. A two-stage CMOS Opamp circuit is shown in the Fig.，  1.65V power

supplies are used and all transistors and Q5,6,7,8 are operated with overdrive
voltages of 0.5V magnitude; Q1, 2,3, 4 use overdrive voltages of 0.2V magnitude.
The fabrication process provides Vtn  | Vtp |  0.5V . If the first-stage bias
current I  200A , C  1.6 pF . 【101 成大電機所】
(a)Find the input common-mode range and the range allowed for Vo (6%)
(b)What is the function of the r and CC in the Fig.?(5%)
(c) Draw the simplified circuit model for the slewing process. Calculate the slew
rate of this Op-amp.

【解】：
8. Consider a circuit as shown in the Fig. assuming the

Op-amp to be ideal. Let C1  0.001F ，
C2  0.0047F ， R1  10K ， R2  20K .
(a) Derive the transfer function Vo / Vi . (9%)
(b) Plot the frequency response of the transfer function
and explain the function of this circuit. (9%)
【解】：
12
-------------------------------------------------解答--------------------------------------------------
1. Ans. (1)錯，(2) 錯，(3)對， (4)對，(5) 對，(6)對
2. Ans. VoH  5V ， VoL  0.5V ， ViL  1V ， ViH  3V ， NM L  0.5V ，
NM H  2V
mA 1 mA
3. Ans. (a) kn  1.125  10 1 2
、 k p  0.375  10
V V2
(b) Vi  0 V ： Vo  5 V ； Vi  5 V ： Vo  2.5 V
(c) Vo  0.0543 V
4. Ans. R1  28.6 k ， R3  1.5 k ， R2  0.58 k ， AQ  3 5
V V
5. Ans. Gm  0.47 mS ， Ro  90 k ， Ad  42.3 ， Ac   0.0177
V V
6. Ans. (a) f H  100 Hz ，(b) f Hf  1.01 10 4 Hz ，

103
(c) Avf 
s
1
2  1.01  104
7. Ans. (a)  1.15V  Vcm  0.45 V 、  1.15V  Vo  1.15V

(b) CC 為米勒補償電容， r 為移零電阻，可增加 PM
V
(c) S.R.  1.25  109
sec
8. Ans.
Vo
 2 s 2 R1 R2C1C2 
9.4  1010  s 2
Vi s R1R2C1C2  sR1 (C1  C2 )  1 9.4  1010  s 2  5.7  105 s  1
(高通濾波器， A  1 , o  3.26 104 , Q  0.54 )
13
電子學試題
1. Consider the circuit shown in Figure with parameters of Rs  10K ,

Ri  10 K , C1  10 pF ， R1  10K ， R2  20K ， C2  100nF and
Gm  100mA / V . (a) Find Ti (s)  Vi (s) / Vs (s) in the standard form of two
polynomial expressions and the corresponding 3dB frequency. (6%) (b) Find
T (s)  Vo (s) / Vs (s) in the standard form of two polynomial expressions and
the gain-bandwidth product. (10%) 【102 年成大電機所】
【解】：
2. Consider the circuit shown in the Figure with parameters of VDD  5V ,

 n Cox  40 μA/V 2 , and  p Cox  20 μA/V 2 , | Vtn 0 |  | Vtp 0 |  1V ,
  0.5 V 1/ 2 , 2 f  0.6V , (W / L)1  2m /1m ,
(W / L) p  2(W / L)n  5m /1m , C  10 fF . 【102 年成大電機所】
(a)Determine threshold voltage of Q1 after vi  VDD , vC  VDD and Vx
is stable. (4%)
(b)Find VOH of Q1 when vi  VDD and
vC  VDD . (4%)
(c)Determine the static current of the inverter,
its power consumption and vO when
vi  VDD and vC  VDD . (10%)
【解】：
14
3. It is required to design the circuit of the Figure to provide a constant current

I O  10A ,
(a) Determine the values of the required resistors R2 and R3 ,
assuming that I REF  100A , vBE  0.7V at a 1-mA current,
and  to be high. (6%)
(b) If   200 and VA  100V , find the value of the output
resistance, and find the change in output current corresponding
to a 5-V change in output voltage. (6%) 【102 年成大電機所】
【解】：
4. It is required to design the circuit of Figure to provide a

bias current I B  225A with Q8 and Q9 as
matched devices having W / L  60 / 0.5 . Transistors Q10 ,
Q11 , and Q13 are to be identical, with the same g m as
Q8 and Q9 . Transistor Q12 is to be four times as wide as
Q13 . Let  nCox  3 p Cox  180 μA/V 2 and
VDD  VSS  1.5V . 【102 年成大電機所】
(a) Find the required value of RB and the voltage drop across RB . (4%)
(b) Specify the W / L ratios of Q10 , Q11 , Q12 , and Q13 . (3%)
(c)Give the expected dc voltages at the gates of Q12 , Q10 , and Q8 . (6%)
【解】：
5. Consider a feedback amplifier for which the open-loop gain A(s) is given
1000
by： A( s )  ，If the feedback factor  is independent
(1  s / 10 4 )(1  s / 10 5 ) 2
of frequency, find the frequency at which the phase shift is 180  , and find the
critical value of  at which oscillation will occur. (8%) 【102 年成大電機所】
【解】：
15
6. An amplifier has a dc gain of 10 5 and poles at 5105 Hz, 10 7 Hz,

and 510 Hz. To stabilize the amplifier with unity feedback (   1) , move the
8
first pole by introducing a compensation capacitor. Assume the second pole

remains. Calculate the frequency of the first new pole to achieve a phase margin

of 45 . (5%) 【102 年成大電機所】
【解】：
7. A phase-shift oscillator is shown in Figure，where R  10K ， C  10nF .

(a)Find the loop gain by breaking the circuit at
node X. (10%)
(b)Calculate the oscillation frequency f o ，
and the minimum required value of R f for
oscillation to start in this circuit. (5%) 【102
年成大電機所】
【解】：
8. A prototype active filter with admittances Y1 through Y4 is shown in

Figure (a). Assume the Op-amp is ideal. The transfer function of this filter is as
vo ( s ) Y1Y2
follows：  A designed filter is the cascade
vi ( s) Y1Y2  Y4 (Y1  Y2  Y3 )
of the prototype circuits shown in Figure (b), where R  10 k, C  0.01 F,
C1  1.082 C , C2  0.9241C , C3  2.613C , C4  0.3825 C
(a) Calculate the zeros and poles of the transfer function for this filter. (8%)
(b)What is the type of this filter (lowpass, highpass, bandpass, bandreject, or …)?
Explain why? (5%) 【102 年成大電機所】
(a)
16
(b)
【解】：
-------------------------------------------------解答--------------------------------------------------
Vi 0.5 7 rad
1. Ans. (a)  ，對應  H  2  10  3.18  106 Hz
Vs s s
1
2  10 7
V s 9V
(b) o  ， GBP  1.062  10  Hz
Vs  s  s  V
1  1  7 
 333  2  10 
2. Ans. (a) Vt1  1.61 V ，(b) VoH  3.39 V

(c) I  0.0186 mA ， Vo  0.08 V ， Power  0.093 mW
3. Ans. (a) R2  93.6 k 、 R3  5.74 k

4
(b) Ro  3.29  10 (k) 、 I  1.52  10 mA
4
4. Ans. (a) VR  0.125 V 、 RB  0.556 k

B
W  W 
(b)    40 ,    160
 L 10,11,13  L 12
(c) VG12  Vt  1.25 、 VG10  2Vt  1 、 VG 8  1.25  | Vtp |
5. Ans. <1>以漸近波德圖解析：   0.01

<2>較精確解法：   0.02
6. Ans. 100 Hz
1 Rf
7. Ans. (a) f o   6.5  10 4 Hz ，(b)  29
2 6RC R
Vo 108 108
8. Ans. (a)  
Vi s 2  s  1.8482  10 4  108 s 2  s  0.765  10 4  108
17
對應零 s  , , , 
極 s  (0.9241  j 0.382)  10 , (0.9241  j 0.382)  10
4 4
s  (0.3825  j 0.924)  104 , (0.3825  j 0.924)  104

(b) 此為四階低通濾波器
電子學試題
1. Fig. shows a circuit that performs the high-pass transfer function.

(a)Derive the transfer function of this circuit and identify its high-frequency gain
and 3-dB frequency. (4%)
(b)Determine the values of R1 , R2 , and C to
obtain a high-frequency input resistance of 10 k,
a high-frequency gain of 40 dB, and a 3-dB
frequency of 1000 Hz. (6%)
(c)At what frequency does the magnitude of the
transfer function reduce to unity? (4%)
【解】：
2. It is required to design the active-loaded differential MOS amplifier of the Fig.

to obtain a differential gain of 50 V/V. The technology available provides
 nCox  4 p Cox  400A / V 2 ，| Vt |  0.5V ， and | VA |  20 V / m and
VDD  VSS  1V . Use a bias current I  200A
and operate all devices at | VOV |  0.2V . (a)Find
the W / L ratios of the four transistors ( Q1 , Q2 ,
Q3 , and Q4 ). (4%) (b)Specify the channel length
required of all transistors. (4%) (c) If I is delivered by a
simple NMOS current source operated at the same
VOV , for VCM  0 , what is the allowable range of
vo ? (4%)
【解】：
18
3. The open-loop gain of an amplifier has break frequencies at f p1  100KHz ,

f p 2  200KHz , and f p 3  1MHz . The low-frequency (or DC) gain is
Ao  800 , and the feedback factor is   0.5 . Please calculate
(a)The gain crossover frequency. (4%)
(b)The phase margin. (4%)
【解】：
4. An amplifier with open-loop voltage gain of 10 4 and poles at 103 Hz ，

105 Hz ，and 106 Hz is to be compensated by the addition of a dominant pole

to operate stably with a closed-loop gain of 30 dB with a 45 phase margin，
what new pole frequency should be used? (6%)
【解】：
※5.(a)A second-order filter has the transfer function T ( s)  1

s  (10   ) s  25
2
Find the range of  for which the filter can operate stably? (4%)
(b)What type of this filter can be realized as the following transfer function?
s( s 2  0.01)(s 2  4)
T (S )  2
( s  0.8s  0.52)(s 2  0.56S  0.18)(s 2  0.56s  0.86)
Explain why? (8%)
【解】：
6. A waveform generator circuit is shown in the Fig. If the op amps have

saturation voltages of  10V , given C  0.01mF ， R1  10 K ，
R2  20K，and R  50K . (a)Sketch and label the waveforms V1 and V2 .
(10%) (b)Determine the frequency of waveform Vi . (5%)
【解】：
19
7. Consider the circuit shown in Fig. with parameters of vI  5  sin(t ) volts

where   2000 radians/sec, C1  C2  1F and uncharged initially, the
cut-in voltage of both diodes V while the forward diode resistance rf  0 ,
9
reverse breakdown voltage  100V , saturation current  2.5  10 A .
(a)What are the maximum and minimum voltage of vO when V  0 for
Fig.(a)? (4%)
(b)Assume V  0 for Fig.(a). Sketch waveforms of vC1 and vO along with
vI starting from t  0 to 3ms. (10%)
(c)Assume V  0.7V for Fig.(b). What are the maximum and minimum voltage
of vO ? (4%)
【解】：
8. Consider the circuit shown in the Fig. with parameters of VDD  5V ，

 nCox  40 μA/V 2 , and  p Cox  20μA/V 2 , Vtn  | Vtp |  1V ,
(W / L)1,3  2 μm/ 1 μm , (W / L) 2, 4  4  (W / L) Q1 , (W / L) 5,6,7,8 are the
same. Note that B and B are outputs while Set, Reset, and Clk are inputs. Clk is
the clock signal. Set and Reset are complementary signals, i.e., when Set  VDD ,
Reset  0 ; vice versa.
(a)Determine the minimum W / L for both Q5 and Q6 required to ensure
that the two back-to-back inverters of the circuit will switch at half of VDD when
inputs Set and Clk are VDD . (7%)
(b)Find the minimum W / L for both Q5 and Q6 such that switching is
achieved when inputs Set and Clk are half of VDD . (8%)
【解】：
20
-------------------------------------------------解答--------------------------------------------------
Vo sR2C V R 1
1. Ans. (a) (s )   、 o (s  )   2 、 f 3dB 
Vi 1  sR1C Vi R1 2R1C
8
(b) Ri (s  )  10 k 、 R2  1 M 、 C  1.59  10 F
(c) f  10 Hz
W  W 
2. Ans. (a)    12.5 、    50
 L 1, 2  L  3, 4
(b) L  0.5 μm ，(c)  0.5 V  Vo  0.8 V
3. Ans. (a) f 0dB  20  100KHz ，(b)波德近似解： PM  58.5

4. Ans. <1> 波德近似解： f d  10Hz
<2> 精確解： f d  20Hz
5. Ans. (a)   10

(b) 原式頻響圖如下： 0.1 0.72 2
此為高階的帶通一帶斥濾波器。
6. Ans. (a) (b)振盪頻率為1 Hz
7. Ans. (a), (b) Vc1 與 Vo 波形如下：故 Vo(max)  0 ， Vo(min)   10V
21
Vo
5 Vc1
t (ms)
1 2 3
5
Vo
10
(c) Vo (max)  8.6 V , Vo (min)  0
8. Ans. (a) (W / L)5,6,7,8  8 ，(b) (W / L)5,6,7,8  97.8
電子學試題
1. In the circuit shown in the Fig. , both diodes are identical,
conducting 10mA at 0.7V and 100mA at 0.8V. For
Vo  80mV , find the value of R. Given the thermal voltage
VT  25mV . (10%)【104 成大電機】
【解】：
2. In the circuit shown in the Fig. , VS is a small

sinewave signal with zero average. Given the transistor
  100 ， ro  200kΩ , and RC  20kΩ .
(a) Find RE for a dc emitter current of 0.5mA. (5%)
(b) Find the (small-signal) voltage gain. (8%) 【104 成
大電機】
【解】：
22
3. In the circuit shown in the Fig., the two transistors have equal lengths
W
( L1  L2 ) but widths related by 2  5 . Design the
W1
W 
circuit to obtain I o  0.5mA . Let k n    0.8mA/V ,
2
 L 1
Vt  1V , and   0 .
(a) Find the required value of R . (5%) (b) What is the lowest possible Vo while
Q2 remains in the saturation region? (5%) 【104 成大電機】
【解】：
4. Fig. show a series-shunt amplifier in which the three MOSFETs are sized to
operate at | Vov |  0.2V . Let | Vt |  0.5V , | VA |  20V , I  0.1mA ,
R1  2kΩ , and R2  18k . The
current sources utilize single transistors
and thus have output resistances equal
to ro . 【104 成大電機】
(a)Calculate the overall open-loop
voltage gain A. (4%)
(b) Find feedback factor  . (3%)
Vo
(c)Find closed-loop gain Af  . (3%)
Vs
(d) Find the output resistance Rout . (3%)
【解】：
23
5. For the cascoded gain stage in the Fig., let

2I  26 μA ;  nCox  20μA/V 2 ;  pCox 
10μA/V 2 ; | Vt | 1V ; | VA | 26V ; W / L for
Q1 , Q2 , Q1C , and Q2C  130 / 8 ; W / L for Q3C
and Q4C  65 / 8 ; W / L  8 / 8 for Q3 and Q4 .
【104 成大電機】
(a) Find output impedance, Ro (5%)
 
(b) Find voltage gain, A  Vo /(Vin  Vin ) (5%)
【解】：
6. The NMOS transistor in the discrete CS amplifier circuit of the Fig. is biased to
have g m  1mA / V . Find the three poles
( p1 ,  p 2 ,  p 3 ) relative to C1  0.01F ,
C2  0.1F , C3  10F and the gain AM
in the transfer function of ：
VO s s s
 AM ( )( )( ) .
VS s   p1 s   p 2 s   p 3
(10%) 【104 成大電機】
【解】：
24
7. For the circuit shown in the Fig., assuming the threshold

voltages of all transistors to be equal in magnitude and
1 W
k1  k2 ， k3  k4  16k1 . (Note that k   Cox ). Find
2 L
the required value of I 1 to yield a bias current in Q3 and
Q4 of 1.6mA. (6%) 【104 成大電機】
【解】：
8. For the circuit shown in the Fig., assuming that the op amplifier is ideal.
v
(a)Derive the expression of voltage transfer ratio o
vs
as a function of  . (4%)
(b)Sketch the magnitude Bode plot to scale. (4%)
(c)For design requirements of DC gain=2 and cutoff frequency=500Hz，find the
values of R2 and C2 , assume R1  1k . (4%) 【104 成大電機】
【解】：
9. Consider the circuit illustrated in the Fig.

(a)Find the minimum value of R2 / R1 required for
oscillation. (4%)
(b)Find the frequency of oscillation. (4%) 【104 成大
電機】
【解】：
10. Fig. shows a circuit that performs signal

generation.
(a) Draw the waveforms of V x and Vo . (4%)
(b)What is its frequency of oscillation? (4%) 【104
成大電機】
【解】：
25
-------------------------------------------------解答--------------------------------------------------
1. Ans. R  58.6
Vo V
2. Ans. (a) RE  28.6k ，(b)   126
Vs V
3. Ans. (a) R  85k ，(b) Vo (min)   4.5V
V
4. Ans. (a)series(壓)  shunt(壓)組態，(b)   0.1
V
V V
(c) A  4950.8 ，(d) Af  9.98 、 Rout  1.75
V V
V
5. Ans. (a) Ro  1.3  105 k ，(b) Gm  0.065 、 A   8.125  103
V
rad rad rad V
6. Ans.  p1  12.3 ， p 2  667 ， p 3  150 ，AM   3.29
s s s V
7. Ans. 0.1mA
 R2
V R1
8. Ans. (a) o  ，(b) ，
Vs 1  jR2C
7
(c) R2  2k ， C2  1.59  10 F
R2 1
9. Ans. (a)  2 ，(b) f osc 
R1 2 RC
10. Ans. (a) (b) f  397 Hz
26
電子學試題
1. An ideal 9V Zener diode with zero incremental
resistance is used in the fig. for achieving voltage
regulation. (a) What is the maximum load current I L
that can be drawn from the regulator if it is to
maintain a regulated output? (5%) (b) What is the
minimum value of RL that can be used and still have a regulated output voltage?
(5%)
【解】：
2. Consider the amplifier shown in the fig., assume the transistor has
  100 ， VBEQ  0.7V ，and VA  100V . (a)
Find the bias current I CQ . (4%) (b)Calculate the
Vo
overall voltage (mid-band) gain ，assume that
VS
C1~3 are all short. (8%) (c) What are the functions
of capacitors C1 ， C 2 ，and C3 . (3%)
【解】：
3. Consider the single amplifier biquad

filter shown in the Fig. , assume ideal
operational amplifier is used.
(a)Please derive the transfer function ,
VO (s) / Vi (s) , and find out its 0 and Q.
(6%) (b)To realize a low-pass filter with f 0  4KHz and maximally flat
response , find the required values for C1 and C2 , if R1  R2  10 K . (4%)
【解】：
27
4. Consider the circuit shown in the Fig., assume ideal operational amplifier is
used.
(a)Please analysis and draw vo  vi transfer curve. (5%)
(b)For a triangular input waveform , please draw the corresponding output
voltage waveform（correct scale required）. (5%)
【解】：
5. The maximum junction temperature rating of a certain power transistor is

200 C . For a case temperature of 25 C , the maximum allowed power
dissipation is 15W. (a) Find the junction-to-case thermal resistance. (2%) (b) If this

transistor is operated with a case-to-sink thermal resistance of 1 C/W in an
ambient temperature of 75 C and with a power dissipation of 5W, find the
maximum allowed sink-to-ambient thermal resistance. (3%)
【解】：
6. As shown in the Fig. , the op amp is ideal.

(a) Find the resistance looking into node 4, R4 , in terms of R . (4%)
(b) Find the current I 4 in terms of the input current I . (4%)
(c) Find the voltage at node 4, that is V4 , in terms of (IR) . (4%)
【解】：
28
7. Considering Q2 has twice the W/L

ratio of Q1 . If vid is a small sine-wave
signal and kn  nCox , find ：(a) I D1
and I D 2 in terms of I . (4%) (b)
Vov（VGS  VTH ） for each of Q1 and
Q2 in terms of I , k n , and W / L . (4%)
d  Vod / Vid ） in terms of RD , I , and Vov . (4%)
(c) The differential gain A（
【解】：
8. Find the midband gain AM (5%) and the

upper 3-dB frequency f H (5%) of a CS
amplifier fed with a signal source having an
internal resistance Rsig  10 K . The
amplifier has ：
RG  4.7M , RD  RL  20K , g m  1mA / V ， ro  100K ，
Cgs  1 pF ，and Cgd  0.4 pF .
【解】：
9. Consider the transresistance amplifier with

feedback as shown in the fig.,
if
gm  5mA / V ， ro  50K， R f  10 K ，
and RS  2 K . (a)Find the open-loop
voltage gain A(4%) (b) Find the closed-loop
Vo . (4%) (c) Find the input
gain Af 
IS
resistance Rin . (4%) (d) Find the output resistance Rout . (4%)
【解】：
29
-------------------------------------------------解答--------------------------------------------------
1. Ans. (a) I L (max)  1.4mA ，(b) RL (min)  6.43K
V
2. Ans. (a) I CQ  1.92 mA ，(b) AM   14
V
(c) C1 , C2 為耦合電容，功能為阻隔直流。
C3 為旁通電容，功能為使 RE 旁通以提高增益。
Vo 1
3. Ans. (a)  2 ，二階低通濾波器。
Vi s R1 R2C1C2  s( R1  R2 )C2  1
9 9
(b) C1  5.63  10 F 、 C2  2.81  10 F
4. Ans. (a)  Vi  0  Vo  0 (b)輸出波形如下圖：

Vi  0  Vo  5Vi
5. Ans. (a)  JC  11.7 C/W ，(b)  SA  12.3 C/W

6. Ans. (a) R4  R ，(b) I 4   8I ，(c) V4   8IR
I 2 2 IL
7. Ans. (a) I D1  ， I D 2  I  ，(b) Vov1, 2 = 
3 3 3 k nW
8 I
(c) Ad   RD
9 Vov
V
8. Ans. (a) AM   9.07 ，(b) f H  2.95  106 Hz
V
V V
9. Ans. (a) A   69.6 ，(b) A f   8.74
mA mA
(c) Rin  0.234K ，(d) Rout  1.05K
30
電子學試題
1. (12%) As shown in the Fig., the op amp has

VOS  4mV ，and the output saturation voltages of
 12V . Consider a Miller integrator with a time constant
of 1ms and R  20K . (a) Assume that, when the
power supply is turned on, the capacitor voltage is zero,
how long does it take for the amplifier to saturate
(neglected RF )?(4%) (b) Select the largest possible
value for a feedback resistor RF so that at least  10V of output signal swing
remains available. (4%) (c) What is the corner frequency of the resulting
time-constant (STC) network ? (4%) 【106 成大電機、微電子系】
【解】：
2. The op amp in the precise rectifier circuit of the Fig(a). is ideal with output
saturation levels of  13V . Assume that when conducting the diode exhibits a
constant voltage drop of0.7V. (a) Vi  3V , find Vo and V A ? (4%) (b)
Vi  3V , find Vo and V A ? (4%) (c) Find the average output voltage obtained
when Vi is a symmetrical square wave of frequency，5V amplitude, and zero
average as shown in the Fig(b). (4%) 【106 成大電機、微電子系】
【解】：
31
3. (16%) As shown in the Fig, an IC CG amplifier is fed with a signal source with
r
Rsig  o , where ro is the MOSFET output resistance. It has a current-source
2
load with an output resistance equal to ro . The MOSFET is operated at
I D  100A and has gm  1.5mA / V , VA  10V , Cgs  0.2 pF ,
Cgd  15 fF , Cdb  20 fF , and
CL  30 fF (Neglect body effect). (a)
Determine the input resistance Rin ,
(4%) (b) Find the output resistance
Rout ,(4%) (c) Find the midband gain
Vo
A , (4%) (d)Find the upper 3-dB
VS
frequency, using the method of open-circuit time constant. (4%)
【解】：
4. (10%) Consider the multi-stage amplifier

with feedback as shown in the Fig., if all MOS
are biased to operate at g m  4mA / V . You
may neglect their ro ' s . (channel-length
modulation effect)
(a) Select a value for RF that results in a
closed-loop gain that is ideally 10V / V .(3%)
(b) Determine the loop gain A (4%), and hence the value of closed-loop gain
A f (3%). 【106 成大電機、微電子系】
【解】：
32
5. (6%) An internal compensated op amplifier has a dc open-loop gain of

105 V / V and an ac-open-loop gain of 40dB at 10KHz. Please estimate its 3dB
frequency (3%) and its gain-bandwidth product. (3%) 【106 成大電機、微電子系】
【解】：
6. An op amplifier having 106dB gain and a single-pole frequency response with

unity-gain frequency fT  2MHz is used to design a non-inverting amplifier
with nominal dc gain of 100. Please find the 3-dB frequency of the resulting
amplifier. (5%) 【106 成大電機、微電子系】
【解】：
7. (9%) For the circuit in fig. below, assume that

the op amplifier saturates at and the diodes
have a constant 0.7V drop when conducting. (a)
Sketch and label the transfer characteristic. (6%)
(b) What is the maximum diode current? (3%)
【106 成大電機、微電子系】
【解】：
33
8. (14%) For the output stage circuit in fig. below, assume VCC  15V ，
VCE ( sat )  0.2V ， VBE  0.7V (constant)，and  is very high.
(a) Find the value of R that will establish a bias current
sufficiently large to aloe the largest possible output signal
swing for RL  1K . (4%) (b) Determine the resulting
output signal range (2%) and the minimum/maximum
current for Q1 .(2%) (c) If the output voltage is 8V-peak
sinusoid, find (1) the power deliver to the load (2%)；(2)
the average power drawn from the supplies. (2%)：(3) the
power-conversion efficiency (ignore the loss in Q3 and
R ).(2%) 【106 成大電機、微電子系】
【解】：
9. (6%) For a second order bandpass filter with center frequency of 105 rad / s ,
3
a center-frequency gain of 10, and a 3-dB bandwidth of 10 rad / s . Please
derive and write down its s-domain transfer function. (6%)
【解】：
10. (10%) Consider the circuit. Break the

loop at node X and find the resulting loop
gain. (a) Find the possible frequency of
oscillation. (5%) (b) Find the minimum
value of R f / R required for oscillation.
(5%)
【解】：
34
-------------------------------------------------解答--------------------------------------------------
1. Ans. (a) t  3sec ，(b) RF  9.98M ，(c) f C  3.19Hz
2. Ans. (a) <1> V1  3V ： Vo  6V ， VA  6.7V

<2> V1  3V ： Vo  0V ， V A   13V
(b) <1> V1  1V ： Vo  2V ， V A  2.7V
<2> V1  1V ： Vo  0V ， V A   13V
 V1  0  Vo  0 , VA  13V

(c)  ， Vo 波形如下圖：
V  0  V  2V , V  2V  0.7
 1 o i A i
Vo V
3. Ans. (a) Rin  1.3245K ，(b) Rout  7650K ，(c)  1.948
VS V
(d) H  4.738  10 s ， f H  33.6  10 Hz
9 6
V
4. Ans. (a) RF  0.9K ，(b) A  31.32 、 A f  9.69
V
5. Ans. f 3dB  1Hz 、 f t  1MHz
6. Ans. f 3dB  2 104 Hz
7. Ans. (a) ，(b) I D  1.12mA
8. Ans. (a) R  0.966K ，(b)  14.8V  Vo  14.8V ； I1(min)  0mA 、

I1( m a x) 29.6mA
35
PL
(c) PL  32mW ， PS  444mW 、   7.2%
PS
s  104
9. Ans.
s 2  s  103  1010
R
V2  f
10. Ans. A   3 3 3 R
V1 s R C  6s 2 R 2C 2  10sRC  4
10
(a) f OSC  ，(b) R f / R  56
2RC
107 成大電機所電子學 (可用計算機)

1. (12%)Consider an inverting amplifier with a nominal gain of 1000 constructed
from an op amp with an input offset voltage of 4mV
and with output saturation levels of  12V which
is shown in the Fig. (a) What is the dc offset voltage
at the output? (b) What (approximately) is the peak
sine-wave signal that can be applied at the input
without output clipping? (c) If R1  1K and
R2  1M , find the value of coupling capacitor C that will ensure that the gain
will be greater than 57dB down to 100Hz? 【107 成大電機】
【解】：
2. (12%) For the bridge-rectifier circuit, use

the constant-voltage drop model with
VD ( on )  0.7V . Consider VS  12V (rms)
sinusoidal and R 100 . (a)Find the
average (or dc component) of the output
voltage. (b) Find the peak diode current? (c) Find the peak inverse voltage (PIV) of
diode D1. 【107 成大電機】
【解】：
36
3. (16%)A MOSFET differential is biased with a current source I  400A . The

transistors have W / L  16 ， kn '  400A / V ，
2
VA  20V ， Cgs  40 fF ， Cgd  5 fF ， and

Cdb  5 fF . The drain resistors are each 10K .
Also, there is a 100fF capacitive load between each
drain and ground. (a) Find the transconductance
g m . (b) Find the differential gain Ad . (c) If the input
signal source has a small resistance Rsig and thus
the frequency response is determined primary by the output pole, estimate the
3-dB frequency f H . (d) If, in a differential situation , the amplifier is fed
symmetrically with a signal source of 40K resistance (i.e., 20K in series
with each gate terminal), use the open-circuit time-constant method to estimate
f H . 【107 成大電機】
【解】：
4. (10%) The current-mirror-loaded differential amplifier in the Fig. has a

feedback divider ( R1 and R2 ) with
R1  R2  1M and the basic current of
I  200A . The devices are operate at
VOV  VGS  Vt  0.2V . For all devices,
VA  10V . The input signal source has a zero
dc component.
(a) Find the loop gain of A (3%) according to the loop gain A .
(b) Find the feedback factor  (3%), the value of R1 and R2 that result in a
closed-loop gain of exactly 5V / V . 【107成大電機】
【解】：
37
5. (10%) For the circuit as shown in the figure. Assuming the op amp is ideal with
 12V and  12V output saturation levels. (a)
What are the name and function of this circuit? (b)
Sketch and label the Vo - Vi transfer characteristic of
this circuit. (c) For a 200mV-amplitude sine-wave
input with zero average, draw and label the output
waveform of Vo . 【107 成大電機】
【解】：
6. (10%) For the circuit schematic of a 2-stage CMOS operational amplifier shown
in the fig., assuming VDD  1.5V ，  VDD  1.5V ， Vt  0.5V ，and all
transistors are operated with overdrive voltage of 0.2V magnitude. (a) Find its
input common-mode range. (3%) (b) Find its allowed range for Vo .(3%) (c) What
is the function of capacitor CC ？ (4%) 【107 成大電機】
【解】：
7. (10%) An amplifier has the following transfer function

10000
A( s) 
(1  s / 102 )(1  s / 106 )
(a) Draw the asymptotic Bode plot of A (magnitude and phase). (6%)
(b) If the amplifier is connected with unity negative feedback (i.e.,   1)，find
the resulted phase margin. (4%) 【107 成大電機】
【解】：
38
8. (20%) For the circuit as shown in the Fig. assuming the diodes have the same
junction area as the transistors. VCC  12V ， I bias  1mA ， RL 100 ，
 N  50，VCE ( sat )  0.2V . (a) What are the name
and function of the circuit? (4%) (b) What are the
quiescent current of QN and QP ? (4%) (c) What
are the possible positive and negative output signal
levels? (4%) (d) To achieve a positive peak output
level equal to the negative peak level, what value of
I bias is required? (4%) (e) For the value I bias
found in (d), what does the quiescent current
become? (4%) 【107 成大電機】
【解】：
-------------------------------------------------解答--------------------------------------------------
1. Ans. (a) Vo (dc )  4mV ，(b) Vm(max)  12mV ，(c) C  1.59 106 F
2. Ans. (a) Vo (dc )  9.4V ，(b) I D (max)  155.7mA ，(c) PIV  16.27V
3. Ans. (a) g m  1.6mA/ V ，(b) Ad  14.5V / V ，(c) f H  1.59 108 Hz
(d)  H  3.354  10 ， f H  4.75  10 Hz
9 7
R2 V
4. Ans. (a) A  50  、 A  50
R1  R2 V
R2
(b)    0.18 ， R2  180K ， R1  820K
R1  R2
5. Ans. (a) 雙穩電路(bistable) 或反向觸發器
(b)
39
(c) 輸出波形如下圖：
6. Ans. (a) VCM (min)   1.3V 、 VCM (max)  0.6V ；  1.3V  VCM  0.6V
(b)  1.3V  VCM  1.3V ，(c) 米勒補償電容
7. Ans. (a) 波德圖如下圖：
(b) PM  45
o
8. Ans. (a) 二極體偏壓 AB 類輸出級

(b) I CQ  0.98mA
(c) Vo (max)  5.1V 、 Vo (min)   11.8V
(d) I bias  2.31mA ，(e) I CQ  2.27mA
40

成功大學電機所電子學考古題98 107大破解

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成功大學電機所電子學考古題98 107大破解

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成功大學電機所考古題大破解

2. A CMOS inverter circuit shown in the Fig. has the

5. Consider the circuit as shown in the Fig. The circuit is

6. Consider the phase-shift oscillator shown in the Fig. with parameters

(b) r 2  r 1  (1   )(RE // ro1 ) (  g m1r 1 )

(c) Common  Collector Amplifier

4. Ans. (a) I out  0 、 Rout  R3  [1  gmro ]  R3

1. Determine the current I D 2 and the voltage Vo in the

4. Assume the circuit in the Fig. is a symmetrical

5. Plot transfer curve of the circuit in the Fig.

6. A feedback amplifier is shown in the

7. Consider the class AB Amplifier as shown in the Fig.

3. Consider the circuit shown in Figure with transistor parameters of   120 ,

4. Consider the amplifier whose small-signal AC equivalent circuit is shown in

2. Ans. Vo3  5 V 、 Vo1  2.78 V 、 Vi  2.5 V

4. Ans. (a) f L  61.8 Hz 、 f H  33.8 MHz

5. Ans. (a) unstable，(b)GM= 20 dB 、PM= 22.5

6. Ans. (a) PL  6 W 、 PS  13.5 W 、  44.4% ，(b) PD (max)  7.59W

2. A particular MOS inverter has the following transfer characteristic curve as

3. For the MOSFET circuit shown in the Fig. , determine the

(a)What are the values of k n and k p including their unit?

5. An active-loaded MOS differential amplifier

6. A single-pole op amp has a dc gain of 100 dB and a unity-gain frequency of 10

7. A two-stage CMOS Opamp circuit is shown in the Fig.，  1.65V power

rate of this Op-amp.

8. Consider a circuit as shown in the Fig. assuming the

6. Ans. (a) f H  100 Hz ，(b) f Hf  1.01 10 4 Hz ，

7. Ans. (a)  1.15V  Vcm  0.45 V 、  1.15V  Vo  1.15V

1. Consider the circuit shown in Figure with parameters of Rs  10K ,

2. Consider the circuit shown in the Figure with parameters of VDD  5V ,

3. It is required to design the circuit of the Figure to provide a constant current

4. It is required to design the circuit of Figure to provide a

6. An amplifier has a dc gain of 10 5 and poles at 5105 Hz, 10 7 Hz,

first pole by introducing a compensation capacitor. Assume the second pole

7. A phase-shift oscillator is shown in Figure，where R  10K ， C  10nF .

8. A prototype active filter with admittances Y1 through Y4 is shown in

2. Ans. (a) Vt1  1.61 V ，(b) VoH  3.39 V

3. Ans. (a) R2  93.6 k 、 R3  5.74 k

4. Ans. (a) VR  0.125 V 、 RB  0.556 k

5. Ans. <1>以漸近波德圖解析：   0.01

s  (0.3825  j 0.924)  104 , (0.3825  j 0.924)  104

1. Fig. shows a circuit that performs the high-pass transfer function.

2. It is required to design the active-loaded differential MOS amplifier of the Fig.

3. The open-loop gain of an amplifier has break frequencies at f p1  100KHz ,

4. An amplifier with open-loop voltage gain of 10 4 and poles at 103 Hz ，

※5.(a)A second-order filter has the transfer function T ( s)  1

6. A waveform generator circuit is shown in the Fig. If the op amps have

7. Consider the circuit shown in Fig. with parameters of vI  5  sin(t ) volts

8. Consider the circuit shown in the Fig. with parameters of VDD  5V ，

3. Ans. (a) f 0dB  20  100KHz ，(b)波德近似解： PM  58.5

6. Ans. (a) (b)振盪頻率為1 Hz

7. Ans. (a), (b) Vc1 與 Vo 波形如下：故 Vo(max)  0 ， Vo(min)   10V

(c) Vo (max)  8.6 V , Vo (min)  0

8. Ans. (a) (W / L)5,6,7,8  8 ，(b) (W / L)5,6,7,8  97.8

2. In the circuit shown in the Fig. , VS is a small

5. For the cascoded gain stage in the Fig., let

7. For the circuit shown in the Fig., assuming the threshold

9. Consider the circuit illustrated in the Fig.

10. Fig. shows a circuit that performs signal

10. Ans. (a) (b) f  397 Hz

3. Consider the single amplifier biquad

5. The maximum junction temperature rating of a certain power transistor is

6. As shown in the Fig. , the op amp is ideal.

107 成大電機所電子學 (可用計算機)