D 0800EET205122004 Pages:3

RegNo.: Name:

APJ ABDUL KALAM TECHNOLOGICAL

Third Semester B.Tech Degree Examination December 2021 (

Course Code: EET205

Course Name: ANALOG ELECTRONICS
M-ax. Marks: 100

PART A
Answer all questions. Each question cawies 3 marks Marks

I Explain why a fixed bias circuit is not widely used in amplifiers, despite its (3)
{' simplicity.
2 Determine the following parameter for the collector to base bias circuit of (3)

transistor amplifier circuit i) Is i) Ic.

Given Vcc: 12V, p:100, Rs:lO0kf) and Rcl0ks).

Define the following JFET parameters: (3)

(a)Transconductance

bandwidth.
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(b)Dynamic output resistance
Draw the frequency response of CE amplifier and explain the concept of (3)

5 Draw the circuit of two stage RC coupled amplifier and briefly explain loading (3)

effect.

,6 State and explain Barkhausen's criterion of oscillation (3)

I Compare the charaeteristics of ideal Op-Amps and practicalOp-Amps. (3)

8 Explain the concept of common mode iejection with suitable diagram. (3)

9 Draw the circuit diagram of an ideal integrator and derive the expression for output (3)

voltage.
l0 Explain voltage level detector circuit with neat diagram. Draw the output (3)
waveform considering that the input is Vin:l0sinrrrt and V,"#V
PART B

Answer any onefull questionfrom each module. Each question carries 74 marks

Module I
11 a) Determine the voltage gain, current gain, input impedance and output impedance (10)
-
of the common emitter amplifier circuit driving a load of 5kO. It is supplied by a

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 0800E8T205122004

signal source of internalresistance 10kO. The hybrid parameters of the transistors

are h,"-1!00 Q,hn=).S x 1-0-4,hf"=50 ,h*=Z5p o .

Explain any one compensation technique used for reducing the drift of operating
(4)
b)
pornt

a) Determine the following parameter for the fixed bias configuration of transistor (6)

amplifier. i) Ic ii) Vcc iii) Re iv) B

Given Rc : 2.5kf), Is : 20prA, Ip : 3fnA, Vcs : 6.5V

. b) List the factor affecting the stability of operating point of a transistor' Derive the (8)

expression for stability of Voltage divider bias

(. Module 2

i 13 a) Draw and explain the working of common drain FET amplifier with voltage (10)
divider bias arrangement using small signal AC equivalent circuit. Also derive the
expression for voltage gain, input impedance and output impedance.
FET' (4)
b) Mention any four applications of
t4 a) With suitable circuit diagrams, explain the effect of internal capacitance during (8)
high frequency operation of CE amplifier.

'
b)

15 (a)
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Explain the operation of E-type
Module 3
MOSFET

Describe the operation of class B push pull power amplifier and determine
its
(6)

(8)

maximum power conversion efficiency.

t (b) List any two advantages, disadvantages and applications of Transformer coupled
(6)

amplifier

: 16 (a) Compare positive and.negative feedback in amplifiers. (6)

r 16) With aneatcircuit diagram, explain RC phase shift oscillator using BJT. Derive an (8)

expression for frequency of oscillation.

Module 4

17 a) Compare the characteristics of ideal Op-Amps and practical Op-Amps. (6)

b) Draw the circuit of an inverting amplifier and obtain the expression for its closed (8)

loop gain. Also design an inverting amplifier with gain l2'

V"=-[3Vr+2Vr+0.5Vr+5Vo]. (6)
l8 a) Design an op-amp circuit to obtain an output of

where V 1,V 2,V3 and V o are the inputs to op-amp'

' b) What are the features of an instrumentation amplifier using op-amp? Derive the (8)

expression for outPut voltage.

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 offiEErfis'|,;zU04.

., Hubs
19 a) Explain tre wo@of m ideal integrator using op-amp &c cxpncsi*-* fgl
and derive
for orput vdege. Draw tlre'ouQrrt waveforil'of the integrator wtrcn iryrf is
squtre wave.
b) What are the disadvmtages of ideal differe,ntiator and what are fte rdificdio{ls (5)
doue inpractical ditrer*iabr io ove,rcome this?
2$ e) ,Wi& the he$ of intercal circuit diagram explain the working of a astable (10)
multivibrator. Derive tbe expression for froquency of oscillation.
b) Design ar astable mrltivibats usiag 555 timer IC to generde an orgut
sigd (a) i
wi& erymrv Zfrtu, M trA&rty cycle
t'_ ***++

'til

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.
'.
--=?+.

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