Faculty of Engineering

Electrical Engineering Department

Computer and Control
Third Year
Second Semester
General System

Digital Electronic circuit

Experience NO.5
Transistor-Transistor Logic (TTL) (Nand gate)

Prepared by:
Mutasim alkamil (202270192)
Osama maaodhah (202270222)
Fares qaid alselwi (202270243)

Supervised by:
Eng. Abdulraqeeb Alshraay

4202Sana’a .
 Contents
CONTENTS

Abstract: ................................................................... 2
Introduction: ............................................................ 2
General background .................................................. 2
Data sheet ................................................................. 3
Experiment tools ...................................................... 4
Objectives: ................................................................ 4
Procedures:............................................................... 4
1. Circuit Design ........................................................ 4
2. Circuit Construction ............................................. 5
3. Power Supply Setup .............................................. 5
4. Input Signal Application ....................................... 5
5. Output Measurements .......................................... 5
Conclusion: ............................................................... 5
 Abstract:
This experiment aimed to implement a basic two-input NAND gate using
Transistor-Transistor Logic (TTL) technology. Utilizing discrete bipolar junction
transistors (BJTs) and resistors, the functionality of the NAND gate was investigated
by analyzing its input-output voltage characteristics and comparing them to theoretical
expectations. Key findings demonstrated successful implementation of the NAND gate
with observed output behaviors aligning with its logical function.

Introduction:
Digital logic forms the cornerstone of modern electronic devices, employing logic
gates to perform fundamental operations on binary data. The NAND gate, with its
universal applicability, plays a crucial role in realizing complex digital circuits.
Transistor-Transistor Logic (TTL) is a widely used logic family based on bipolar
transistors, offering advantages like high noise immunity and fast switching speeds.
This experiment delves into the practical implementation of a NAND gate using
discrete TTL components to understand its internal operation and behavior.

General background

2
Data sheet

3
 Experiment tools
 Two NPN bipolar junction transistors (BC107)
 TWO resistors (values based on chosen transistors and desired logic levels)
 Breadboard or prototyping board
 5 volt Power supply
 Multimeter
 Two switches

Objectives:
 Design and build a functional two-input NAND gate using discrete TTL components.
 Analyze the input-output voltage characteristics of the NAND gate for various input
combinations.
 Verify the output logic levels of the NAND gate based on its truth table.
 Compare the observed behavior with theoretical expectations of TTL NAND gate
operation and the previous lab experiment .

Procedures:
1. Circuit Design: Refer to TTL logic datasheets or relevant resources to design a
two-input NAND gate using chosen transistors and resistors. Calculate resistor values
based on desired logic levels and transistor specifications as shown in fig.3.

Figure 3: Nand TTL software design

4
2. Circuit Construction: Assemble the NAND gate circuit on the breadboard following
the designed schematic. Ensure proper connections between transistors, resistors, and
power supply terminals.

3. Power Supply Setup: Connect the power supply to the circuit, adjusting the
voltage to appropriate levels based on the TTL logic family used (typically around
5V).

4. Input Signal Application: Use the power supply or external signal generator
to apply logic high (HIGH) and logic low (LOW) levels to each input of the NAND
gate.

5. Output Measurements: Measure the output voltage level of the NAND gate
using the multimeter for all possible input combinations (00, 01, 10, 11). Record the
measurements in a table as shown in table.1.

Table 1: output analysis of NAND TTL GATE

Conclusion:
This experiment successfully designed and implemented a two-input NAND
gate using discrete TTL components. Measured output voltage levels aligned with the
theoretical NAND gate truth table, verifying its logical functionality. Observed logic
levels demonstrated clear distinction between HIGH and LOW states, highlighting the
effectiveness of the chosen circuit design. Moreover, we have notice the mean different
design between the TTL,RDL,DTL , in term of designing logic circuits .