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Ch. 3: Gate Level Minimization:

Karnaugh Map or K-maps:

2-variable K-map

3- variable K-map:
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Example 3-1:

Simplified expression using 3-variable K-map:

Example 3-2
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Simplified expression:

Example 3-3: Simplify the Boolean function:

Example 3-4:

a) express it in sum of minterms

b) find the minimal SOP expression

4- variable K-map
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The various possibilities of writing F as a simplified sum of products (SOP)

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a) Simplify using groups of 1s, then write the equation and the result is Sum of
Products.

b) Simplify using groups of 0s (ie. F’ map) then write the sum of products
equation for F’
Invert this equation and Product of Sum will result : F=(A’+B’)(C’+D’)(B’+D)
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Given the following truth table, show sum of minterms & maxterms and write F
as a SOP & POS:
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Simplification of Boolean functions in the

presence of Don’t Cares, d(x,y,…).
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OR operation using NAND gates:

Graphic symbol for OR operator using NAND gate:

Implement F= AB + CD using AND/OR gates and NAND gates :

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Changing AND-OR implementation to NAND only.

Another example, and defining AND operator from a NOR gate:

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Implement F=(AB’ + A’B’ )(C + D’ ) with NOR gates only:

Other two level implementations:

Wired Logic:
Some NAND or NOR gates allow the possibility of a wire connection between
the outputs of two gates t o provide a specific logic function.
AND-OR-INVERT:

OR-AND-INVERT
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Wired Logic Implementation:

All of the possible 2-level implementations:

Example : Convert F=  (0,6) to simplified AND/NOR; NAND/AND;

OR/NAND; NOR/OR implementations:
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Odd and Even function design using EX-OR gates:

Even and Odd parity bit generators,using EX-OR implementaion:

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for even parity: