2011 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS) December 7-9,2011

A Multiple Bits Output Ring-Oscillator Physical

Unclonable Function

RuBin Satoshi Goto Yukiyasu Tsunoo

Graduate School of Information, Production and Systems, Codes and Cryptography Technology Group, Information
Waseda University. and Media Processing Lab, NEC Corp.
Kitakyushu, Fukuoka, Japan. Kawasaki, Kanagawa, Japan.
hubin@asagi.waseda.jp goto@waseda.jp tsunoo@bl.jp.nec.com

Abstract-As a new topic in security area, Physical Unclonable
Functions (PUFs) have many advantages against traditional
techniques. They can be employed to generate unique signature
of Integrated Circuit(IC) for identification and authentication,
which is so called DNA of ICs. In this paper we introduce some
basic knowledge of PUFs, as well as the structure
implementation details of Ring-oscillator PUFs. Then we propose
an improvement ofRO PUF, which is called Multiple Bits Output
Ring-Oscillator PUF. The Multiple Bits Output RO PUF helps to
generate more challenge-response pairs with very little extra area
cost. Moreover, some methods for enhancing the reliability and
uniqueness are used. The experiment results are showed at last.
Keywords- Security, Physical Unclonable Function,
oscillator
I. INTRODUCTION
Nowadays, with the development of infonnation
technology, the security of infonnation has become a serious
problem. When common used cryptographic devices are facing
more and more attacks, including algorithm level attacks and
hardware level attacks, it is very important to establish a true
identity recognition system for security demanding devices.
The research of Physical Unclonable Functions (PUFs)
helps to overcome some of the problems faced by conventional
techniques. As a new topic in security area, PUFs has been
developed rapidly in the past decade.
[2][3]. Delay-based PUFs use arbiter PUFs [1] and Ring­
Oscillator PUFs [4] to translate random delay of wires and
gates into PUF signature. They have the feature of low cost and
are widely used in resource limited area.
and PUFs can significantly increase the security of electronic
devices with very few resource cost. There are many fields
PUFs can be used or have already been used in, such as Radio­
Frequency Identifiers (RFID) for secure access, authorization
of smart card, security key generation on cryptographic
processor and so on.
In this paper, we will mainly introduce a delay-based PUF
Ring­ - Ring-Oscillator PUF. We will explain the structure and
evaluation details of them. Then we will introduce some
improvement works on the ring-oscillator PUFs and propose
our method to improve it.
B. Introduction of Ring-Oscillator PUF
Ring-Oscillator PUFs are based on delay loops (ring
oscillators) and counters.
Enable Output

A. Introduction ofPUFs

A Physical Random Function [ 1] or Physical Unclonable Figure 1. A 5-stage Ring-Oscillator

Function is a function that is embodied in a physical structure
and is easy to evaluate but hard to predict. It makes use of the
physical randomness to get a response output R=f(C) with the
input challenge C. The function can only be evaluated with the
physical system, and is unique for each physical instance.
Because the physical randomness is usually generated
uncontrollably during the manufacturing process, if the system
is complicate enough, it can be very difficult to make a clone of
PUF instances.
Several types of PUFs have been proposed or implemented.
A memory-based PUF makes use of the variations in the
Input
relative threshold voltages of the transistors. Uncontrollable
random initial SRAM cell value can be generated during
power-up. The random contents are used as PUF signature Figure 2. Ring-Oscillator PUF architecture

978-1-4577-2166-3/11/$26.00 ©2011 IEEE

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 2011 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS) December 7-9,2011
As shown in figure 2, a RO PUF is comprised of many
identically laid-out ring oscillators. Each ring oscillator is a
simple circuit that oscillates with a particular frequency related
to the delay of the gates and wires.
Due to manufacturing variation, each ring oscillator may
oscillate with a slightly different frequency. Their differences
can be amplified by a counter at the end. Comparing the output
of two counters generates an output bit. With many ring
oscillator pairs, we can get a sequence of output bits. And the
output bits may vary from chip to chip.
For a circuit with N ring oscillators, there are N! different
orderings of ring oscillators based on their frequencies. If the
orderings are equally likely, the maximum entropy will be
log2 N! bits, which means log2 N! independent bits can be
generated from this circuit.
C. Evaluation ofPUFs
Three major metrics are used to assess quality of PUFs -
uniqueness, reliability and attack resiliency.
Uniqueness is an estimate of how distinctly a PUF can
identify an FPGA among a group of FPGAs. The Hamming
distance between two n-bit responses generated by a PUF from
a pair of FPGAs with the same challenge, is a good estimate of
the uniqueness of the PUF. The ideal Hamming distance
between the two responses should be around 50%.
Reliability of a PUF expresses how consistently a response
is reproduced by a PUF from an FPGA for the same challenge
over several PUF read outs. It is affected by varying
temperature, fluctuating supply voltage, and so on.
Attack resiliency reflects the difficulty to predict the
challenge-response pairs of PUFs. An attacker should not be
able to predict challenge-response pairs (CRPs) of a PUF given
any information. Hence, correlated response bits from a PUF
should be discarded. The complexity or correlativity of CRPs
can be used to estimate this metric.
A. Basic Structure
II. RELATED WORKS
There have been many researches based on RO PUFs. A
noise reduction method was proposed by Sub and Devadas to
enhance the stability of response bits of the RO PUF output [4].
In this technique, k*n ROs are used to generate n bits output.
Yin and Qu proposed a temperature-aware cooperative (TAC)
method [5]. It restores the stability of an unstable RO-pair
exploiting the stability of other stable pairs over a range of
varying temperature. Yu and Devadas also gave out a
recombination of RO-PUF [6], which enlarges the challenge
space and increases the environmental stability for key
generation.
One of the most effective methods proposed by Maiti and
Schaumont is shown in this section. In a configurable RO
structure [7], a 2: 1 multiplexer is inserted at each delay stage of
the RO to select one delay element out of the two. This
technique enables a designer to create multiple instantiations of
ROs inside a single configurable logic block (CLB).
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s
w
I
��
"
M
A
T �
�
Enablt R
c, c,
I
X
urn
SLlCEXOVO SllCEXIYO
(.J (bJ
Figure 3. (a) Configurable RO. (b) The mapping of a CRO in a single CLB
on a Xilinx Spartan 3E platform [7]
In the circuit shown in figure 3(a), eight different ROs can
be configured using the control inputs C 1, C2 and C3 of the
three 2: 1 multiplexers. It is created as a hard macro inside of a
single CLB consisting of four slices in a Xilinx Spartan 3E 500
FPGA. Restricting the hard macro into a CLB ensures that all
the configurable ROs use only the local routing of the FPGA.
This method explores all possible circuit configurations to
fmd the most stable output. It is similar to the l-out-of-k
method [4], however, with less area cost. It also does not
require complex characterization process. Existing FPGA
design technique can be used to implement it.
III. MULTIPLE-BITS OUTPUT RO PUF
The conventional Ring Oscillator (RO) PUF just generates
one bit output by comparing if the frequency of one RO is
larger than the other. However, considering the frequencies
differences between different RO pairs may also be different,
we think more information can be explored from one RO pair.
Thus based on previous work of RO PUF, we proposed a
Multiple-bits Output RO PUF (MORO PUF). Theoretically,
the maximum entropy of MORO PUF can be up to N times of
conventional RO PUF's, where N is the number of output bits.
Hence, the MORO PUF has much higher attack resiliency than
conventional RO PUF.
Figure 4. Multiple Bits Output RO PUF(Based on RO PUF)
First of all, the MORO PUF uses a subtractor instead of the
comparator to generate the output. After counting for a long
enough time, the subtraction result of the two output counters
for one RO pair may be different from another. As a result, by
 2011 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS) December 7-9,2011

extending the observe time, we can generate a multiple-bits

output from one pair of ROs.
Secondly, we use a third counter as the timer of this system.
Because the results of subtraction highly depend on the observe
time, using external clock will be fairly unsafe and unstable.
Different clock frequencies may lead to different responses.
Also an attacker can use a pretty low frequency clock to attack
the system. To avoid this, an internal counter should be used
as the timer. For example, we choose another Ring-Oscillator
to drive the third counter - "counter3", then
if counter3 == 300
output = counter2 - counter 1 ;
R = Tc * Freq + N + Jitter
Where Tc is the counting time, Freq is the frequency of RO,
N is system noise and Jitter is a value of 1 or 0 caused by
circuit hazard (when the enable signal of ROs changes at the
rising edge of RO output). If we use R directly to generate the
output, apparently it will be very unstable. A test of 10000
times for each RO pair shows that only about 200 out of 1024
RO pairs remain stable. Most of the unstable RO outputs have
a small random jitter. As a result, we need to extend the
counting time Tc to minimize the affection of N and Jitter.
Then map multiple values to a single output as we showed in
table 1.

else
wait;
B. Output Processing
In an information system with n characters, the information
entropy is maximized only when the probability for each
character is the same. In conventional RO PUF, the ideal
probabilities for output 0 or 1 are both 50%. Also for the
Multiple-bits Output PUF, we are expecting that the output
In the other hand, frequency distance may affect the output
of MORO PUF. Figure 5 show 3 different situations. The
frequencies of 2 ROs change with the temperature. For
conventional RO PUF, the output may "flip" only in situation 1.
Because its output depends on which frequency is higher.
However, for the MORO PUF, situation 2 can also lead to an
unstable output.
Fre
l£ hl � Fre Fre

follows a uniform distribution for each value. However, since

�
ROl

Output = � *( --­
1 1 )
.
R02
�
� �
Delay2 Delayl Temperature Temperature Temperature

1 2 3
Where Tc is the counting time. Delay l and Delay2 are the gate
delays of two Ring Oscillators. Figure 5. The relationship between ring oscillator frequency distance and
And the distribution of gate delays is irregular, if we use the PUF output.
values generated by MORO PUF directly as output, the
probability of each value will not be equal. The security of the There are two methods to solve this problem. First, we can
PUF may be weakened. To avoid this, a simple way of using its choose those RO pairs which remain stable in certain range of
cumulative distribution can be implemented. temperature or voltage. The idea of configurable ring oscillator
[7] can be used. We may choose one most sable RO pair from
For example, we can map the subtraction results to output the 8 RO pairs generated from a configurable RO pair. With
this way: some extra area cost, the circuit may get a high reliability
increase. Secondly, we can use some temperature
TABLE 1. MAPPING OF OUTPUT RESULTS compensation methods for the output. Those temperature
Original subtraction result Output value after mapping sensitive RO pairs can be selected as temperature measurement
-2,- 1,0, 1,2 0 circuits. Both the two methods need characterization of the
3�9 1 PUF to fmd out its frequency characteristic. Due to limited
1O� 16 2 experimental conditions, we just implemented the first method
in our tests.
17�3 1 3
-3�-9 -I IV. EXPERIMENTAL RESULTS
- 1O�- 16 -2
In the experiment, we implemented 64 5-stage Ring
- 17�-3 1 -3 Oscillators on a Stratix II FPGA. The 64 ROs are divided into
>3 1 or <-3 1 -4 two groups. We choose one from each group to drive the two
C. Reliability Enhancement counters. So there are 1024 different RO pairs in total. We also
choose a third counter through the 64 ROs as the timer. By
Comparing to the conventional RO PUF, MORO PUF has a using the LogicLock design tool, we managed to setup all Ring
lower reliability. Oscillators with exactly the same routing pattern. This helps to
In one hand, MORO PUF requires a high precision, which reduce the influence of different wire and routing length. As
can easily be affected by system noise. Assume the result of shown in figure 6.
counters

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 2011 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS) December 7-9,2011

over all 1024 RO pairs show that outputs of about 300 RO

pairs are unstable even in the same environment.
In figure 9, we show the number of unstable outputs with
varying voltage. The voltage is limited to 1.20V ± 10% because
the FPGA chip does not work properly outside this range. A
result is stable if it is always equal to the output value at the
reference voltage of 1.20V.

800
\I)
+'
::J
Q. 600
+'
::J
0
I ........
.. �. ......JJ UI.IIII I 400
OJ
(a) Chip planner view of PUF FPGA (b)ROs in LAB :0
III
+' 200
\I)
c:
A. Result distribution test on one chip. ::::> 0
-
As we mentioned in section 3.2, we need to fmd out how to 0
1.08v 1.14v 1.20v 1.26v 1.32v
process the outputs to make each value appears evenly. So we 0
z
counted the outputs of all 1024 RO pairs (8 bits responses are Voltage
generated). The results were generated from subtraction
directly after counting for 1280 RO cycles. As shown in figure
Figure 9. Reliability with varying voltage for MORO PUP with 1024 RO
7, the primitive results distribution is similar to a normal
pairs
distribution. Thus we should manage to map different results
into different output values, so we can have equal probability Due to limited experimental conditions, we have not test
for each value.
the MORO PDF under different temperatures. But a continuous
After the output mapping shown in table I (8 bits primitive test for 10 days ( 10,000 tests for each Ring Oscillator pair)
results are mapped into 3 bits output results), we got a much shows that about 600 (out of 1024) RO pairs can generate
better result distribution, as shown in figure 8. stable outputs within a small temperature variation. The
stability rate is quite low compared to the rate of 99.52% for
40 conventional RO PDF [4] and rate of 100% for CRO PDF [8].
>
u
c:
OJ
30
::J To get a higher reliability, we replaced the Ring-Oscillators
I:T
OJ 20 with Configurable ROs [7] and chose one stable RO pair from
...
L.L.
10
each Configurable RO pair. The results are significantly
OJ
u
c:
improved. We got only 21 unstable pairs out of 1024 CRO
OJ
... 0 pairs. Which means the reliability rate is about 97.95% .
...
::J 00 ,..... 00 C)) 0 C)) 00 ,..... <.0 LI') LI') (V')
� t;J ...... ...... N (V') LI') ,.....
I
u '<t
U
C. Uniqueness test on two different chips.
I

0
Results Value This test was run on two same FPGA boards. We compared
all their 1024 RO pairs' outputs. 3 bits output was generated
Figure 7. Primitive results distribution of the MORO PUF each time. We found that 137 out of 1024 outputs are the same
for the two boards.
>
u 250 Because of the multiple bits output we generated,
c:
OJ 200 conventional uniqueness evaluation method cannot be used in
::J
I:T MORO PDF. So we temporarily use the results difference ratio
OJ 150
... as a measurement. For an output of 3 bits (8 values), if the
L.L.
OJ 100 probability for each value is the same, ideal results difference
u
c:
OJ 50 ratio is
...
...
::J 0
u
u 1- eV(8 x 8) = 7/8 = 87.5%.
0 -4 -3 -2 -1 0 1 2 3

Results Value The results difference ratio of our test is

Figure 8. Output results distribution after mapping ( 1024-137)/1024 = 86.62% .

B. Reliability test over all 1024 RO pairs. It is quite close to the ideal results difference ratio.
In section 3.3, we explained that MORO PDF has a lower
reliability compared to conventional RO PDF. 10000 tests

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 2011 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS) December 7-9,2011

D. Hardware resource usage.

In the Stratix II FPGA chip, 9 15 combinational ALDTs are

used to implement the Multiple-bits Output Configurable Ring
Oscillator PDF with 64 Configurable Ring Oscillators. 837
ALDTs are needed to generate an conventional Configurable
Ring Oscillator PDF of the same scale. However, the
information entropy we get from the MOCRO PDF is 3 times
of the conventional CRO PDF.

V. CONCLUSION AND FUTURE WORK

A Multiple Bits Output RO PDF (MORO PDF) makes full

use of the variation of each RO pairs. This helps to enhance
the attack resiliency of RO PDF or reduce the number of RO
pairs required for certain number of output bits. At the mean
while, the resources and techniques required by this method are
also easy to be fulfilled.
With the configurable ring oscillator method as reference [7]
did, the reliability rate can be improved to an acceptable value.
However, the reliability of this circuit is still not good enough.
Further improvement and output processing are needed. Also
the influence of environments, such as temperature and voltage,
should be taken into account. The future work will also focus
on the situation of more output bits. More experiments on
different FPGA chips with varying environmental parameters
will be carried out.

ACKNOWLEDGEMENTS

This work was supported by a grant of Regional Innovation

Cluster Program and CREST implemented by MEXT of Japan.

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fingerprint and source of true random numbers for RFID tags", in Proc.
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[5] C.En Yin,G. Qu,"Temperature-aware cooperative ring oscillator PUP',
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[6] M.D. Yu, S. Devadas, "Recombination of PhYSical Unclonable
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Functions",
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