MPMC-EC8691 ACT-ECE

DEPARTMENT OF ECE
EC8691 – MICROPROCESSORS AND
MICROCONTROLLERS (R2017)
MPMC-EC8691 ACT-ECE
UNIT-I THE 8086 MICROPROCESSOR

Part-A
1. Define microprocessor?(Remember)
A microprocessor is a multipurpose, programmable, clock-driven, register –based electronic
device that reads binary instructions from a storage device called memory. Accepts binary
data as input and processes data according to instructions, and provides result as output.

2. What are the basic units of a microprocessor?(Remember)

The basic units or blocks of a microprocessor are ALU, an array of registers and
control unit.

3. What are machine language and assembly language programs? (Remember)

The software developed using 1's and 0's are called machine language programs. The
software developed using mnemonics are called assembly language programs.

4. What is the drawback in machine language and assembly language programs?

(Understand)
The machine language and assembly language programs are machine dependent. The
programs developed using these languages for a particular machine cannot be directly
run on another machine.

5. What is assembly language? (Remember)

The language in which the mnemonics (short -hand form of instructions) are used to write a
program is called assembly language. The manufacturers of microprocessor give the
mnemonics.

6. Define bit, byte and word. (Remember)

A digit of the binary number or code is called bit. Also, the bit is the fundamental storage
unit of computer memory. The 8-bit (8-digit) binary number or code is calledbyte and 16-
bit binary number or code is called word. (Some microprocessor manufactures refer the basic
data size operated by the processor as word).

7. What is a bus? (Remember)

Bus is a group of conducting lines that carries data, address and control signals.

8. Why data bus is bi-directional? (Understand)

The microprocessor has to fetch (read) the data from memory or input device for processing
and after processing, it has to store (write) the data to memory or output device. Hence the
data bus is bi-directional.

9. Why address bus is unidirectional? (Understand)

The address is an identification number used by the microprocessor to identify or access
a memory location or I / O device. It is an output signal from the processor. Hence the
address bus is unidirectional.

10. What is an interrupt? (NOV/DEC 2021) (Remember)

Interrupt is a signal send by an external device to the processor so as to request the
processor to perform a particular task or work.
11. What is flag? (Remember)
Flag is a flip-flop used to store the information about the status of a processor andthe
status of the instruction executed most recently.
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12. Differentiate between Memory mapped I/O and I/O mapped I/O. (Analyze)
S.NO Memory mapped I/O
1. It is treated as memory location
2. No special instructions are needed to
access the I/O devices
3. Microprocessor can access 1 MByte
memory locations or I/O ports
4. It requires 20 address lines
5. MEMR, MEMW signals can be used
to access I/O devices
6. It is suitable for small system
ACT-ECE
I/O mapped I/O
It is not treated as memory location
It requires special instructions like
IN, OUT to access I/O devices
Microprocessor can access 64 KByte
memory locations or I/O ports
It requires 16 address lines
IOR , IOW signals are used
It is suitable for large system

13. Define (a) Instruction Cycle (b) M/C Cycle (c) T-state (Remember)
Instruction cycle: Time required to complete the execution of an instruction. One
instruction cycle consists of 3 to 6 machine cycles.
Machine cycle: Time required to complete one operation of accessing memory or I/O
device. One machine cycle consists of 3 to 6 T-states.
T-State: The portion of the operation performed in one clock period.

14. Define machine cycle. (Remember)

Machine cycle is defined as the time required to complete one operation of accessing
memory, I/O, or acknowledging an external request. This cycle may consist of threeto
six T-states.
15. Define T-State. (Remember)
T-State is defined as one subdivision of the operation performed in one clock period. These
subdivisions are internal states synchronized with the system clock, and each T-State is
precisely equal to one clock period.

16. What is the difference between Opcode and Operand? (Analyze)

Opcode is the part of an instruction that identifies a specific operation.
Operand is a part of an instruction that represents a value on which the instructionacts.
Example: MVI A, 18H
where MVI A is Opcode and , 18 is Operand.

17. What is Stack and Subroutine? (May/June 2016, APRIL/MAY 2017, Apr/May
2018) (Remember)
Stack -It is a reserved area of the memory in the RAM , where temporary information may
be stored. Subroutine-It is a group of instructions written from the main program to
perform a function that occurs repeatedly in the main program.

18. Why are the program counter and the stack pointer 16-bit registers?
[NOV/DEC 2012](Understand)
Program Counter (PC) and Stack Pointer (SP) are basically used to hold 16-bit memory
addresses. PC stores the 16-bit memory address of the next instruction to be fetched. SP
can be used to temporarily store the 16-bit memory address as well as data. So PC & SP
are 16-bit registers.

19. List the modes of operation in 8086? (Nov/Dec2017)Remember)

The 8086 can operate in two modes and they are minimum (or uniprocessor) modeand
maximum (or multiprocessor) mode.
MPMC-EC8691 ACT-ECE
20. What are the difference between PUSH and POP instruction? (Analyze)

S.No PUSH POP

1. Push register pack onto stack
2. The contents of the register pair
designated in the operand are copied
into the stack. The SP is decremented
and the contents of the high order
register are copied into
that location.
Pop off stack to register pair
The contents of memory location
pointed out by the SP register are
copied into the low order register ofthe
operand.

21. What is meant by LATCH? (Remember)

Latch is a D- type flip-flop used as a temporary storage device controlled by a timing signal,
which can store 0 or 1. The primary function of a Latch is data storage. It isused in
output devices such as LED, to hold the data for display.

22. What are the flags in 8086?(May/June 2016, NOV/DEC 2016)[NOV/DEC

2021](Remember)
 Carry flag  Trap flag
 Parity flag  Interrupt flag
 Auxiliary carry flag  Direction flag and
 Zero flag  Sign flag.
 Overflow flag

23. Write about the different types of interrupts supported in 8086.[APR/MAY

2015][NOV /DEC 2021] (Evaluate)
i) Maskableinterrupts :An interrupt that can be turned off by the
programmer is known as maskable interrupt.
ii) Non-Maskableinterrupts : An interrupt which can be never be turned off
(ie.disabled) is known as non-maskable interrupt.

24. What are the different functional units in 8086? (Understand)

Bus Interface Unit and Execution unit are the two different functional units in 8086.

25. Which Segment is used to store interrupt and subroutine return address
registers? (Understand)
Stack Segment in segment register is used to store interrupt and subroutine return
address registers.

26. What are the types of instructions in instruction set of 8086?

(Remember)
 Data copy / Transfer instructions
 Arithmetic and Logical instructions
 Branch instructions
 Machine control instructions
 Flag manipulation instructions and String instructions

27. Which Flags can be set or reset by the programmer and also used to control
the operation of the processor? (Understand)
Trap Flag, Interrupt Flag, Direction Flag.
MPMC-EC8691 ACT-ECE

28. What does EU do? (Understand)

Execution Unit receives program instruction codes and data from BIU, executes
these instructions and store the result in general registers.
29. List the addressing modes of 8086.Give examples.[APR/MAY 2015, Apr/May
2018] (Remember)
S.NO Addressing modes Example
1 Register addressing MOV AL, CL
2 Immediate addressing MOV CL, 50H
3 Implied addressing CLC
4 Memory addressing :
Direct addressing MOV AX, [437AH]
Base addressing MOV AL, [BX]
Base relative addressing MOV AL, [BX + 7]
Index addressing MOV CL, [SI]
Index relative addressing MOV DX, [SI – 100H]
Base indexed addressing MOV AX, [BX + SI]
Base relative indexed addressing MOV AX, [BX + SI + 50H]
5 IO addressing:
Direct port mode IN AL, (05H)
Indirect port mode IN AX, DX
6 Relative addressing JMP 0200H: IP = IP + 0200H

30. List some functions of BIU (Bus Interface Unit). (Remember)

 Sends address of the memory or I/O
 Fetches instructions from memory
 Reads data from port / memory
 Writes data into port / memory
 Supports instruction queuing
 Provides address relocation facility

31. Define assembler directives. (Remember)

There are some instructions in the assembly language program which are not a part of
processor instruction set. These are instructions to assembler and are referred as
pseudo operations or assembler directives.

32. List some features of 8086. (Remember)

 16 bit microprocessor
 Has a 16 bit data bus, 20 bit address bus
 Can generate 16 bit I / O address
 Provides fourteen 16 bit registers
 Has multiplexed address and data bus
 Can operate in minimum and maximum mode

33. What is pipelining?(Remember)

In 8086, to speed up the execution of program, the instructions fetching and execution of
instructions are overlapped each other. This technique is known as pipelining. In
pipelining, when the nth instruction is executed, the (n+1)th instructionis fetched and thus
the processing speed is increased.
MPMC-EC8691 ACT-ECE

34. What are the signals involved in memory bank selection in 8086
microprocessor? (Understand)
Entire memory is divided into two memory banks: bank0 and bank1. Bank0 is selected
only when A0 is zero and Bank1 is selected only when BHE is zero. A0 iszero for all
even addresses. So bank0 is usually referred as even addressed memory bank. BHE is used
to access higher order memory bank, referred to as odd addressed memory bank.
35. How clock signal is generated in 8086? What is the maximum internal clock
frequency of 8086? (Understand)
The crystal oscillator in 8284 generates a square wave signal at the same frequency as
the crystal. The maximum internal clock frequency of 8086 is 5 MHz

36. What is the use of MN/MX signals in 8086? (Understand)

It is used to operate the microprocessor in two operating modes i.e. maximum and minimum
mode. The minimum mode is used for small systems with a single processor and maximum
mode is for medium size to large systems, which include twoor more processors.
37. How many data and address lines are available in 8086? (Remember)
Address lines= 20 bit address busData lines= 16 bit data bus
38. What is the use of Instruction Queue in 8086 microprocessor?(Understand)
The queue operates on the principle of first in first out (FIFO). So that the execution unit
gets the instruction for execution in the order they fetched .Feature of fetching the next
instruction while the current instruction is executing is called pipelining which will reduce
the execution time.
39. What are the signals used in 8086 maximum mode operation?
(Remember)
Qs1, Qs0, s0, s1, s2, LOCK, RQ/GT1, RQ/GT0 are the signals used in 8086maximum
mode operation.
40. Write the size of physical memory and virtual memory of 8086microprocessor.
(Evaluate)
Physical addresses are formed when the left shifted segment base address is added to the
offset address. The combination of segment register base addresses and offset address is
the logical address in memory.
Size of physical memory=220=1MB Size of virtual memory=216=64 KB
41. What are the segments registers of 8086?(NOV/DEC 2016)
(Remember)
CS- Code segment, DS-Data segment, ES-Extra segment, SS- Stack segment.

42. List the advantages of using segment registers in 8086.(Understand)

 It allows the memory addressing capacity to be 1MB even though the address
associated with individual instruction is only 16-bit.
 It facilitates use of separate memory areas for program, data and stack.
 It allows the program to be relocated which is very useful in multiprogramming.

43. State the operation of minimum mode 8086 system. (Remember)

The 8086 microprocessor can be operated in minimum mode by connecting MN / MX pin to
logic1.In this mode all control signals are given by the microprocessor chip itself. There is
only a single microprocessor in minimum mode system.
MPMC-EC8691 ACT-ECE
44. Describe about the maximum mode 8086 system. (Evaluate)
In maximum mode, the 8086 is operated by connecting the MN / MX pin to ground. The
processor drives the status signals S1, S2 and S3. Another chip called bus controller drives
the control signals using the status information.
45. List two differences between maximum mode and minimum mode
configuration of 8086. (Apr/May 2018) (Remember)
The 8086 microprocessor can be operated in minimum mode by connecting MN /MX
pin to logic1.In this mode all control signals are given by the microprocessor chip
itself. There is only a single microprocessor in minimum mode system.
In maximum mode, the 8086 is operated by connecting the MN / MX pin to ground. The
processor drives the status signals S1, S2 and S3. Another chip called bus controller
drives the control signals using the status information

46. How clock signal is generated in 8086? What is the maximum internal clock
frequency of 8086? (Understand)
The 8086 do not have on-chip clock generation circuit. Hence the clock generation chip,
8284 is connected to CLK pin of 8086.the clock signal supplied by 8284 isdivided by three
for internal use. The maximum internal clock frequency is 5MHz.
47. What is pipelined architecture?(Remember)
In pipelined architecture the processor will have number of functional units and the execution
time of functional units is overlapped. Each functional unit works independently most of the
time.
48. What is the difference between segment register and general-purpose register?
(Analyze)
The segment registers are used to store 16-bit segment base address of the four memory
segments. The general-purpose registers are used s the source or destination register
during data transfer and computations, as pointers to memory and as counters.
49. What are the control bits used in IC 8086?(Remember)
The flags TF, IF and DF of 8086 are used to control the processor operation and so they are
called control bits.
50. What are the minimum mode signals used in 8086?(Remember)
The minimum mode signals used in 8086 are DT/R, DEN, ALE, M/IO, WR, INTA, HOLD
and HLDA.
51. What is queue? How queue is implemented in 8086? (Remember)
A data structure, which can be accessed on the basis of first in first out, is called queue.
The 8086 have six numbers of 8-bit FIFO registers, which is used for instruction queue.
52. What are the general purposes registers in 8086?[NOV/DEC 2011] (Remember)
The general purpose registers in 8086 are ax, bx, cx, dx, si, di, bp and sp. They are all16
bit wide. Each of these has a special purpose in addition to their being of general
purpose. For example, CX is used as a counter in conjunction.
53. Discuss the function of instruction queue in 8086? (Understand)
In 8086, a 6-byte instruction queue is presented at the Bus Interface Unit (BIU). It is used
to pre-fetch and store at the maximum of 6 bytes of instruction code from the memory.
Due to this, overlapping instruction fetch with instruction execution increases the
processing speed.
54. What address in the interrupt vector table, are used for a Type-2 interrupt in
8086? [NOV/DEC 2012](Understand)
The address used in the interrupt vector table for a Type-2 interrupt is 0000:0008 to
0000:000A reserved for Non-maskable Interrupt.
MPMC-EC8691 ACT-ECE
55. Give the importance of assembler directive EVEN [NOV/DEC 2011]
(Understand)
The EVEN directive updates the location counter to the next even address, if the current
location counter contents are not even, and assigns the following routine or variable or
constant to that address.
EVEN
PROCEDURE ROOT
.
.
ROOT ENDP
56. List the pointer and index registers of 8086 architecture.[NOV/DEC 2010]
(Remember)
The pointers contain offset within the particular segment.
The pointer registers are :
IP - Instruction PointerBP - Base Pointer
SP - Stack Pointer.
The index registers are used as general purpose registers as well as for offset storage.
SI - Source Index Register - used to store the offset of source data
DI - Destination Index Register - used to store the offset of destination data.

57. Identify the addressing modes involved in the following 8086instructions:

MOV AX, 0005H;
MOV AX, 50H [BX] [SI]. [NOV/DEC 2010] (Analyze)
MOV AX, 0005H - Immediate Addressing Mode
MOV AX, 50H [BX] [SI] - Relative Based Indexed Addressing Mode
58. What are assembler directives? Give examples [APRIL / MAY 2011]
(Remember)
Assembler directives help the assembler to correctly understand the assembly language
programs to prepare the codes.
Examples: DB - Define Byte
DW - Define Word END - End of Program
ENDP - End of Procedure.

59. What are Macros?/Why do we use macros?

[NOV/DEC 2012,Apr/May 2019, Nov/Dec 2017] (Understand)
Suppose a number of instructions are appearing again and again in the mainprogram,
the program becomes lengthy. So, a label is assigned with the repeatedly appearing
string of instructions is called macro. Macro reduces the time forexecution.
60. What is the function of LOCK and RQ/GT Signals? [MAY/JUNE 2013] / What
is the need of LOCK signal? (Nov/Dec 2017) (Remember)
LOCK - this output pin indicates that other system bus masters will be preventedfrom
gaining the system bus, while the LOCK signal is low.
RQ/GT - Request/Grant - these pins are used by other local bus masters to force the
processor to release the local bus at the end of the processor's current bus cycle.
61. What do you mean by addressing modes? [MAY/JUNE 2014] (Remember)
An addressing mode specifies how to calculate the effective memory address of an operand by
using information held in registers and/or constants contained within a machine instruction
or elsewhere.
MPMC-EC8691 ACT-ECE
62. What is meant by vectored interrupt? [MAY/JUNE 2014](Remember)
A vectored interrupt is a processing technique in which the interrupting device directsthe
processor to the appropriate interrupt service routine. Vectored interrupts are achieved by
assigning each interrupting device a unique code, typically four to eight bits in length.
When a device interrupts, it sends its unique code over the data bus to the processor,
telling the processor which interrupt service routine to execute.

63. What is Multiprogramming? (NOV/DEC 2015, Apr/May 2018)(Remember)

Multiprogramming is a rudimentary form of parallel processing in which several
programs are run at the same time on a uniprocessor ....... Instead, the operating
system executes part of one program, then part of another, and so on. To the user it
appears that all programs are executing at the same time.

64. For 8086 microprocessor, the contents of the registers are CS=2001H.
SS=6046H, IP=2456H, SP=2200H. Calculate the corresponding physical
addresses for the addressed byte in a) CS b) SS (NOV/DEC 2019) (Analyze)
a) Physical Adress in CS = Base Addrof CS reg X 10H + Addr of IP
=(2001H X 10H) + 2456H
= 22466H
b) Physical Adress in SS = Base Addrof SS reg X 10H + Addr of SP
=(6046H X 10H) + 2200H
= 62660H
65. Give examples for the following modes of addressing (NOV/DEC 2019)
i) Relative Based Indexed mode
ii) Direct addressing (Analyze)

i) MOV AX, 50H [BX] [SI]

ii) ii)MOV CL, [4321H]

66. What is the need for interrupts in microprocessor operation?

(Nov/Dec 2018) (Understand)
It halts the microprocessor temporarily to work on a different task and thenreturn
to its previous task.
It request to attention of CPU. This halt allows peripheral devices to access the
microprocessor.

67. Given that (BX)=0158 (DI)=10A5 Displacement=1B57 (DS)=2100. Determinethe

effective address and physical address for the following addressing modes.
a) Register Indirect
b) Relative based indexed (Apr/May 2019) (Understand)

Given
(BX) = 0158 , (DI) = 10A5, Displacement = 1B57, (DS) =2100
Register Indirect Assuming Register BXEA = 2100
Physical Address = 0158 +21000 = 21158
Relative based indexed
Assuming Register BX and DI
EA = 0158 +10A5 + 1B57 = 2D54
Physical Address = 2D54 + 21000 = 23D54
MPMC-EC8691 ACT-ECE
68. What are Byte and String Manipulations?(Nov/Dec 2018) (Remember )
String is a group of bytes/words and their memory is always allocated in a
sequential order. String is either referred as byte string or word string.

Opcode Operand Description

REP Instruction Used to repeat the given instruction till CX ≠ 0.

REPE/ Instruction Used to repeat an instruction until CX = 0 or zero flag ZF=1

REPZ

PART - B
1. Explain briefly about the internal hardware architecture of 8086 microprocessorwith
neat diagram. (Apr/May 2015,NOV/DEC 2016, APR/MAY17, Apr/May
18)[NOV/DEC 2021]
(Understand)
2. Draw the 8086 functional block diagram and explain its architectural
features.(May 07, May 10, May 12.Nov 08, Nov 11, Nov 2012)
(Remember)
3. Draw and explain the pin configuration of 8086. (May 12, May 07)(Remember)
4. Draw and explain the minimum mode configuration of 8086 with timing diagram.
(Nov 11, Nov 05, May 06, Nov 10, Nov 08, May 2013) (Remember)
5. Draw and explain the maximum mode configuration of 8086 with timing diagram.
(Nov07,Nov 08,May 06,May 07,May 08,Nov 10,May 11, May 2013)(Remember)
6. Explain in detail about the various addressing modes used in 8086 processor? Give
examples. (May 08, Nov 08, Nov 10, May 11,Nov/Dec 2015. NOV/DEC 16, Nov/Dec
18) (Understand)
7. Discuss in detail about the interrupts and Interrupt Service Routine (ISR) with
interrupts cycle of 8086./ Describe the interrupts of 8086 and its types withservice
routine. (Nov/Dec 2015, Nov/Dec 2017, Apr/May 2018) (Nov 07, May12, Nov
10, May 08, May 07, Nov11,Nov2012,May/June16,APRIL/MAY 17) (Remember)
8. Draw and discuss the interrupt structure of 8086. (May 2014)(Remember)
9. Explain briefly about Interrupt handling process in 8086. (Apr/May
2015)(Remember)
10. What is Interrupt and Interrupt routine. Explain interrupt sequence for 8086
Microprocessor and interrupt pointers.(Apr/May 2019)(Remember)
11. What are assembler directives? Explain ENDP, EQU, EXTERN, EVEN withexample.
(May 10, May 12, May 07, May 2013, NOV/DEC 2016) [Nov/Dec
2021](Understand)
12. Explain about the Assume, EQU, DD assembler directives. (Apr/May 2015)
(Understand)
13. Explain the BIOS function, procedures and Macros. (Nov 08, May 06, May 12, Nov
10) (Understand)
14. Write an 8086 assembly language program for transferring block of data from oneset
of memory location to other set of memory locations using suitable string instructions.
(Nov 07, May 08) (Create)
15. Write a 8086 assembly language program to convert BCD data – Binary data.
(Apr/May 2015) (Create)
MPMC-EC8691 ACT-ECE
16. Give an example of 8086 instructions: AAA, CWD, JNBE, LAHF, MOVS, RCL, ROL
and SAHF. (Nov 2012) (Create)
17. Explain how to pass parameters to macros? (May 2012) (Create)
18. How does one define and call macro parameters of 8086 microprocessor?
(May 10)(Understand)
19. Explain the architecture of Intel 8086 with the help of block diagram (Nov/Dec 2015)
(Understand)
20. With neat block diagram , explain the architecture of 8086 Microprocessor
(Apr/May 2019) (Understand)
21. Explain the arithmetic, data transfer, branch, string manipulation instructions, process
control instructions, program execution transfer instruction, bit
manipulation instructions and machine control instructions of 8086
microprocessor with suitable examples.(Nov 10, May 10) (May/June 2016) [Nov/Dec
2021](Understand)

22. Draw the architectural block diagram of 8086 with its registers. (NOV/DEC 2019)
(Remember)
23. Write a program to find the average of 10 bytes stored in memory.
(NOV/DEC 2019) (Understand)
24. Find the status of the CF and ZF flags after the execution of each of the followingset
of instructions. Given that AX 4160H.
i) ADD AX, 9034H
ii) CMP AX, 0B08H
iii) XOR AL,AL
iv) MOV AL,34H (NOV/DEC 2019) (Analyze)
25. Write a program for 8086 microprocessor that multiples two bytes and store the result
in memory. (NOV/DEC 2019) (Understand)
26. Draw the architecture and explain the functional units of 8086(Nov/Dec 2017)
(Understand)
27. For 8086 Microprocessor what are the instructions set and assembler directives
(Nov/Dec2018)(Understand)
28.Write 8086 ALP to find the sum of numbers in array of 10 elements (Understand)
[Nov/Dec 2021]

Part – C

1. Write an ALP to find the largest number and smallest number in the array& Write an
8086 ALP to find the sum of numbers in the array of 10 elements? (Create)
2. Write a short note about
(i) Loop, NOP and HLT instructions
(ii) Flag manipulation, logical and shift& rotate instructions
(iii) Branch Instructions
(iv) Arithmetic Instructions (Remember)
3. Discuss about the various types of addressing modes in 8086 [Nov/Dec
2021](Remember)
4. Compose 8086 assembly language program for addition of two 16-bit
numbers(Nov/Dec 2021)(Remember)
MPMC-EC8691 ACT-ECE

UNIT –II 8086 SYSTEM BUS STRUCTURE

Part – A

1. Define bus. Why bus request & cycle stealing are required?(Apr/May 2015,
NOV/DEC 2016) (Understand)
 Bus: A group of wires or lines that are used to transfer the addresses, data &
control signals.
 Bus request used to request the bus from the main CPU.
 Cycle stealing is a method of accessing RAM without interfering with the CPU

2. Differentiate between External bus and Internal Bus. (May/June 2016)

(Analyze)
An internal bus is a type of data bus that only operates internally in a computer or
system. It carries data and operations as a standard bus; however, it is only used for
connecting and interacting with internal computer components.

An External bus is used to connect and interface the computer to its connected
peripheral devices. Since they are external and do not lie within the circuitry ofthe
cpu they are relatively slower.

3. Draw the read cycle timing for minimum mode. (Apr/May 2015) (Create)

4. Differentiate between closely coupled and loosely coupled configurations?

(Apr/may 2010) (May/June 2016) (Analyze)

Closely coupled Loosely coupled

Single CPU is used Multiple CPU modules are used
It has only local bus It has local & system bus
No system memory or IO It has a shared system memory & IO
No bus arbitration logic Bus arbitration logic required.

5. What are the three basic bus access control and arbitration scheme?
(Remember)
 Daisy chaining
 Independent request
 Polling
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6. List the advantages of loosely coupled systems over the tightly couplessystems?
(Apr/May 2019) (Remember)
 More number of CPUs can be added in a loosely coupled system to improve the
system performance.
 System structure is modular and hence easy to maintain and trouble shoot.
 Fault in a single module does not lead to a complete system break down.
 It is more fault tolerant due to independent processing modules.
 More suitable to parallel applications due to its modular organization.
7. State the disadvantages of microprocessor based system design?
(Understand)
 Overall system cost is high as compared to microcontroller based system.
 A large size PCB is required for assembling all the components, resulting in an
enhanced cost of the system.
 Overall product design requires more time.
 Physical size of the product is big and it is not handy.
8. What is a co-processor? What is its use in a typical microprocessor based
system(Apr/may 2010) / When is Co-processor used? (Nov/Dec 2018)[NOV/DEC
2021]
(Understand)
A coprocessor is a processor specially designed to work under the control of a
microprocessor such as 8086 to support additional numeric processing capabilities.
Example: Intel 8087 numeric processor works with 8086 microprocessor.

9. Give the types of multiprocessor configuration. (Remember)

Types of multiprocessor configuration:
1. Coprocessor configuration
2. Closely coupled configuration
3. Loosely coupled configuration
10. Write a short note on data register in 8087. (Evaluate)
 It has 8 data register & each register is 8 bit and accessed as a stack
 A PUSH operation decrements the TOP of the stack by one and loads the valueon
the top register.
 A POP registers stores the value from the current TOP register and incrementsTOP
by one.
11. Write a short note on TAG register in 8087. (Evaluate)
TAG register holds the status of the contents of the data register.
00 - Data valid01 - Zero
10 - A special value11 – Empty

12. List any four 8087 data formats. [MAY/JUNE 2012] (Remember)
Word integer, Short integer, Long integer, Packed BCD, Short real, Temporary real
13. Give the instruction set of 8087?(Remember)
1. Data Transfer Instructions
2. Arithmetic Instructions
3. Comparison Instructions.
4. Transcendental Operations.
5. Constant Operations.
6. Coprocessor Control Operations.
MPMC-EC8691 ACT-ECE

14. Write a short note on status register in 8087. (Evaluate)

 Status register is 16 bit register.
 It indicates various errors, stores condition code for certain instruction and
indicates the BUSY status.

15. How does CPU differentiate the 8087 instructions from its own
instructions?[MAY/JUNE 2013, NOV/DEC 2012, APRIL/MAY 2011](Analyze)
The CPU identifies the 8087 instructions by using ESCAPE code bits in them. Oncethe
CPU recognizes the ESCAPE code, it triggers the execution of the numeric processor
instruction in 8087.

16. Mention the need for co-processor in a microprocessor based system.

[APRIL/MAY 2010](Understand)
In a microprocessor based system, the co-processor is needed for achieving higher processing
speed, capable of performing complicated calculations in less time.

17. What are the two internal sections of 8087 architecture? [NOV/DEC 2010]
(Remember)
8087 is divided into two sections internally as control unit (CU) & numeric extension unit
(NEU)

18. What is meant by loosely coupled configuration? [MAY 2014] (Remember)

Loosely coupled system consists of different processor module, each processor has a set
of input-output devices and a large local memory where it accesses most of the
instructions and data, to which other processors do not have direct access. But, they can
share system resources. The processor, its local memory and input-output interfaces
together called computer module.

19. What are tightly coupled systems or closely coupled systems? (Remember)
In a tightly coupled systems the microprocessor (either coprocessor or independent
processors may share a common clock and bus control logic.. The two processors in a closely
coupled system may communicate using a common system bus or common memory.

20. What are loosely coupled systems? (Apr/May 2010) (Remember)

In loosely coupled systems each CPU may have its own bus control logic. The bus
arbitration is handled by an external circuit, common to all processors. The loosely
coupled system configuration like LAN & WAN can be spread over a large area.

21. Write some disadvantages of loosely coupled systems (Understand)

 More complicated due to the required additional communication hardware.
 They are less portable and more expensive due to the additional hardware and the
communication media requirement.
22. What are the multi microprocessor configuration methods? [Apr/May
2009](Remember)
 Tightly coupled systems or closely coupled systems
 Loosely coupled systems
MPMC-EC8691 ACT-ECE

23. What is meant by Daisy chaining method?(Remember)

It is a centralized bus arbitration method. During any bus cycle, the bus master maybe
any device such as the processor or any DMA controller unit, connected to thebus.
where BGT – Bus Grant Control LineBRQ – Bus Request Line

SACK – Acknowledge Signal Line

24. What is independent bus request scheme? (Remember)
Each of the masters requires a pair of request and grant pins which are connected tothe
controlling logic. The busy line is common for all the masters. . f the controllinglogic receives
a request on a bus request line, it immediately grants the bus accessusing the corresponding
bus grant signal, provided the BUSY line is inactive, and then grants the request. This is
quite fast, because each of the masters can independently communicate with the controller.
25. What is meant by polling? (Remember)
In polling schemes, a set of address lines is driven by the controller to address each of the
masters in sequence. When a bus request is received from a device by the controller, it
generates the address on the address lines. If the generated address matches with that of
the requesting masters, the controller activates the BUSY line.
26. Define Machine Cycle. (NOV/DEC 2016) (Remember)
The steps performed by the computer processor for each machine language instruction
received. The machine cycle is a 4 process cycle that includes reading and interpreting the
machine language, executing the code and then storing that code.
27. What is meant by multiprogramming? (APRIL/MAY 2017) [NOV /DEC
2021](Remember)
Several programs are run at the same time on a uniprocessor. Since there is only one
processor, there can be no true simultaneous execution of different programs. Instead,
the operating system executes part of one program, then part of another, and so on. To the
user it appears that all programs are executing at the same time.
28. Write some example for advanced processors. (APRIL/MAY 2017, Nov/Dec 2017)
(Remember)
Intel 80186, Intel 80286, Intel 80386, Intel 80486

29. What is bus contention?(Remember)

Bus contention is an undesirable state of the bus in which more than one device onthe
bus attempts

30. State the function of ALE signal in 8086. (NOV/DEC 2019)(Remember)

It stands for Address Latch Enable and is available at pin 25.
A positive pulse is generated each time the processor begins any operation.
This signal indicates the availability of a valid address on the address/data lines.When 1,
address data bus contains a memory or I/O address.
MPMC-EC8691 ACT-ECE
31. Draw the simplified diagram of co-processor based microprocessor system.
(NOV/DEC 2019) (Understand)

32. Define System bus? (Nov/Dec 2018)(Remember)

A system bus is a single computer bus that connects the major components of a computer
system, combining the functions of a data bus to carry information, an address bus to
determine where it should be sent, and a control bus to determine its operation.

33. Draw the format of the Flag register(Apr/May 2019) (Remember)

1. Sign Flag (S)

2. Zero Flag (Z)
3. Auxiliary Cary Flag (AC)
4. Parity Flag (P)
5. Carry Flag (CY)
6. Directional Flag (D)
7. Interrupt Flag (I)
8. Trap Flag (T)
9. Overflow Flag (O)
PART B

1. Discuss the maximum mode configuration of 8086 by with a neat diagram.Mention

the functions of the various signals.(Apr/May 2015,Apr/May 2018)(Understand)
2. Explain in detail about the system bus timing of 8086.(May/June 2016, NOV/DEC
2016, APRIL/MAY 2017) (Understand)
3. Explain the multiprocessor configuration of 8086. (Nov 07,May 07, NOV/DEC
2016, Apr/May 2018) (Understand)
4. Explain the architecture of 8087 with neat block diagram.
(May07, May08, May10, May 12, Nov 11) (Understand)
5. Explain the 8087 co-processor data format.(May 10,May 21,Nov 10)
(Understand)
6. Explain the architecture of 8089 with neat block diagram.
(May 07, May 10, May 12, May 14) (Understand)
7. Explain the communication between 8086 and 8089.(May 12,Nov 10)
i. (Understand)
8. Explain in detail about closely coupled and loosely coupled configuration. What are
the relative advantages and disadvantages?(Nov 07,Nov 10,May 08,Nov
11)(Understand)
MPMC-EC8691 ACT-ECE

9. Compare closely coupled configuration with loosely coupled configuration.(Apr/May

2015) / Distinguish between closely coupled and loosely coupled multiprocessor
configuration(Nov /Dec 2018)[Nov/Dec 2021) (Analyze)
10. Discuss the schemes used to solve bus arbitration problem in multiprocessors.
(Nov/Dec2011) (Understand)
11. Explain the exception handling feature of 8087. (Nov/Dec 10)(Understand)
12. Explain the closely coupled configuration of multiprocessor configuration with suitable
example. (May 2014, APRIL/MAY 2017) (Understand)

13. Write a 8086 assembly language program to check whether the given string is
palindrome or not. (Apr/May 2015) (Create)

14. Explain the execution steps of 8087. (May 2014) (Understand)

15. With neat diagram explain the minimum mode of operation of 8086(Nov/Dec
2015)(Understand)
16. Define loosely coupled system. Explain the schemes used for establishingpriority
(Nov/Dec 2015) (Remember)
17. Explain the following: i. multiprocessor system ii. Coprocessor
iii. Multiprogrammingiv. Semaphore(May/June 2016) (Understand)
18. Draw the diagram showing address demultiplexing for 8086. Explain the use of
each IC in the system and relevant pins and signals. NOV/DEC2019)(Remember)
19. Draw the timing diagram for the “Memory Read” machine cycle of 8086. Explain
the function of the relevant signals and discuss how each signal changesin the
progress of the machine cycle.(NOV/DEC 2019) (Understand)
20. Explain the system bus structure of 8086. Draw the timing diagram for interrupt
acknowledgement cycle. (Nov/Dec 2017) (Understand)
21. Explain the loosely looped configuration with neat diagram. (Nov/Dec 2017)
(Understand)
22. What do you understand from system bus structure ? explain (Nov/Dec
2018)(Understand)
23. With neat block diagram , explain the architecture of 8086 in maximum mode
configuration. Also explain the Bus Timing diagram for input and output transfer on
a maximum mode. (Apr / May 2019)(Understand)
24. Explain the interrupt system based on multiple 8259 with necessary blockdiagram.
(Apr / May 2019)(Understand)
25. Examine all the pins functions of 8086 processor with neat pin diagram
(Understand) (Nov/Dec 2021}

Part – C

1. Based on what you know, how would you explain I/O processor(Understand)
2. Explain short notes about the advanced processors (Understand)