MPMC - Module-1

Microprocessors & Microcontrollers
(ECE3004)
Dr. Soumitra K Nayak

School of Electrical & Electronics Engineering
Module-1 Outline
Introduction to Processors and Controllers:
• CPU in computing systems, CPU Choice – Performance Metrics, Evolution of
Microprocessor, Internal microprocessor (8086 to Pentium), Comparison of
Microprocessors and Microcontrollers
• High level language and low level languages, Software and hardware development
tools: compiler, assembler, locator, debugger, logic analyzer, in-circuit emulator and
etc.
08-Nov-22 MPMC - Module-1 2

Module-2 Syllabus
8086 Microprocessor:
• Introduction to 8086 – Signals and pins - 8086 architecture – registers – memory
segmentation -
• Addressing modes - Instruction set - Assembly language programming, assembler

directives –– Modular Programming - Procedures – Macros –
• Interrupts and interrupt service routines.

Module-3 Syllabus
8051 Microcontroller:
• Intel MCS - 51family features – 8051 - organization and architecture, registers
• Addressing modes, Instruction set: conditional instructions, I/O Programming,

Arithmetic logic instructions, single bit instructions
• Timers and Counters, Serial communication - Interrupt handling.

Module-4 Syllabus
8051 Peripherals Interfacing:

• Keyboard, LCD, LED,
• Real world interface - ADC, DAC, SENSORS, Communication interface

(asm & C).

Module-5 Syllabus
ARM microcontrollers:
• Necessity of RISC Processor - ARM processor fundamentals -
ARM7TDMI features, Register set
• Operational Modes – ARM Core Data Flow Model
• Pipelining: ARM 3 stage Pipeline, ARM 5 stage Pipeline, Pipeline

Hazards.

Text Books
1. Doughlas V Hall, “Microprocessors and interfacing, Programming and Hardware”, TMH
2012.
2. Mohammad Ali Mazidi, Janice Gillispie Mazidi “The 8051 Microcontroller and Embedded
Systems (Using assembly and C)” TMH 2012
3. ARM System-on-Chip Architecture, Second Edition, by Steve Furber, PEARSON, 2013
4. B. Ram on “Fundamentals of Microprocessors and Microcontrollers”, Dhanpat Rai
publications.
Required Software:
1. EMU8086
2. Keil
3. Proteus

Introduction
Processors [Why do you need to learn?]
- Throughout the world, people use smartphones, personal digital assistant devices (also known as PDAs)
and microcomputers. All of these devices utilize a key component, known as Microprocessor.
- The microprocessor is the achievement to place a complete CPU (now a complete computer) in a single
chip.
Applications:
1. Traffic Light
2. Public Electronics Display Boards
3. Electronics Household Appliances
4. Industrial Controls, etc. ….
8
Microprocessor (𝝁P)
Microprocessor is a controlling unit of a microcomputer,
fabricated on a small silicon chip capable of performing
Arithmetic Logical Operations and communicating with
other devices connected to it. 𝝁P Memory
I/O
Input Output
(Binary) 𝝁P (Binary)
Fig.: Computing System
9
Number System
 In a digital system, the system can understand only the optional number system. In these systems,
digits symbols are used to represent different values, depending on the index from which it settled
in the number system.
 In simple terms, for representing the information, we use the number system in the digital system.
(_)𝟐 (_)𝟏𝟎
(_)𝟖 (_)𝟏𝟔
10
Decimal Number System
 The decimal numbers are used in our day to day life.
 The decimal number system contains ten digits from 0 to 9 (base 10).
 The successive place value or position, left to the decimal point holds units, tens, hundreds,
thousands, and so on.
11
 The position in the decimal number system specifies the power of the base (10). The 0 is the
minimum value of the digit, and 9 is the maximum value of the digit.
 Examples:
(2541)10 = (2×103) + (5×102) + (4×101) + (1×100)
Binary Number System
 It holds only two values, i.e., either 0 or 1.
 It is also known as the base 2 number system.
 The LSB of the number represents the 0 power of the base(2), e.g. 20 .
 The MSB of the number represents the 𝑥 − 1 power of the base(2).

Example: 2𝑥−1 , where x represents the last MSB.
 Examples:
(10100)2, (11011)2, (11001)2, (000101)2, (011010)2.
12
Octal Number System
 An octal number system carries eight digits starting from 0, 1, 2, 3, 4, 5, 6, and 7. It is also
known as the base 2 number system.

 The LSB of the number represents the 0 power of the base(8). Example: 80
 The MSB of the number represents the 𝑥 − 1 power of the base(8), e.g. 8𝑥−1 , where x
represents the last MSB.
 Examples:
(273)8, (5644)8, (0.5365)8, (1123)8, (1223)8.
13
Hexadecimal Number System
 It has ten digits from 0 to 9 and 6 letters from A to F.
 The letters from A to F defines numbers from 10 to 15.
 The LSB of the number represents the 0 power of the base(16). Example: 160
 The MSB of the number represents the 𝑥 − 1 power of the base(16), e.g. 16𝑥−1 ,
where x represents the last MSB.
 Examples:
(FAC2)16, (564)16, (0ABD5)16, (1123)16, (11F3)16.
14
Binary to Decimal Conversion
(10110.001)2=(1×24)+(0×23)+(1×22)+(1×21)+(0×20)+(0×2-1)+(0×2-2)+(1×2-3)
=(1×16)+(0×8)+(1×4)+(1×2)+(0×1)+(0×1⁄2)+(0×1⁄4)+(1×1⁄8)
=16+0+4+2+0+0+0+0.125
(10110.001)2=(22.125 )10

Binary to Octal Conversion
 (111110101011.0011)2
1. Firstly, we make pairs of three bits on both sides of the binary point.
111 110 101 011 . 001 1
On the right side of the binary point, the last pair has only one bit. To make it a complete pair
of three bits, we added two zeros on the extreme side.
111 110 101 011 . 001 100
2. Then, we wrote the octal digits, which correspond to each pair.
(111110101011.0011)2=(7653.14)8

Binary to Hex Conversion
 (10110101011.0011)2
1. Firstly, we make pairs of four bits on both sides of the binary point.
111 1010 1011.0011
On the left side of the binary point, the first pair has three bits. To make it a complete pair of
four bits, add one zero on the extreme side.
0111 1010 1011.0011
2. Then, we write the hexadecimal digits, which correspond to each pair.
(011110101011.0011)2=(7AB.3)16

Decimal to Binary Conversion
Example: (152.25)10
Step 1:
 Divide the number 152 and its successive quotients with base 2.
Operation Quotient Remainder Step 2:

152/2 76 0 (LSB)  Now, perform the multiplication of 0.25 and
successive fraction with base 2.
76/2 38 0
38/2 19 0 Operation Result carry
19/2 9 1 0.25×2 0.50 0
9/2 4 1 0.50×2 0 1
4/2 2 0
2/2 1 0
(0.25)10=(.01)2
1/2 0 1(MSB) (152.25)10=(10011000.01)2
(152)10=(10011000)2
Decimal to Octal Conversion
Example: (152.25)10
Step 1:
 Divide the number 152 and its successive quotients with base 8.
Operation Quotient Remainder Step 2:
152/8 19 0
 Now, perform the multiplication of 0.25 and
19/8 2 3
Operation Result carry
2/8 0 2
0.25×8 __.00 2
(152)10=(230)8
(0.25)10=(.2)8
(152.25)10=(230.2)8

Decimal to Hex Conversion
Example: (152.25)10 Operation Quotient Remainder
Step 1:
152/16 9 8
 Divide the number 152 and its successive quotients with
base 16. 9/16 0 9
(152)10=(98)16
Step 2:
 Now, perform the multiplication of 0.25 and Operation Result Carry
0.25×16 __.00 4
(0.25)10=(.4)16
(152.25)10=(98.4)16

Octal to Decimal Conversion
 (152.25)8
Step 1:
We multiply each digit of 152.25 with its respective positional weight, and last we add the products
of all the bits with its weight.
(152.25)8=(1×82)+(5×81)+(2×80)+(2×8-1)+(5×8-2)
(152.25)8=64+40+2+(2×1⁄8)+(5×1⁄64)
(152.25)8=64+40+2+0.25+0.078125
(152.25)8=106.328125
So, the decimal number of the octal number 152.25 is 106.328125

Octal to Binary Conversion
 (152.25)8
We write the equivalent three-bit binary digit for 1, 5, 2, and 5.
(152.25)8=(001101010.010101)2
So, the binary number of the octal number 152.25 is (001101010.010101)2

Octal to Hex Conversion
 Example 1: (152.25)8
Step 1:
We write the three-bit binary digit for 1, 5, 2, and 5.
(152.25)8=(001101010.010101)2
So, the binary number of the octal number 152.25 is (001101010.010101)2
Step 2:
1. Now, we make pairs of four bits on both sides of the binary point.
0 0110 1010 . 0101 01
On the left side of the binary point, the first pair has only one digit, and on the right side, the last pair
has only two-digit. To make them complete pairs of four bits, add zeros on extreme sides.
0000 0110 1010.0101 0100
2. Now, we write the hexadecimal digits, which correspond to each pair.
(0000 0110 1010.0101 0100)2=(6A.54)16

Hex to Binary Conversion
 Example 1: (152A.25)16
We write the four-bit binary digit for 1, 5, A, 2, and 5.
(152A.25)16=(0001 0101 0010 1010.0010 0101)2
So, the binary number of the hexadecimal number 152.25
is (1010100101010.00100101)2

Hex to Octal Conversion
 Example 1: (152A.25)16
Step 1:
We write the four-bit binary digit for 1, 5, 2, A, and 5.
(152A.25)16=(0001 0101 0010 1010.0010 0101)2
So, the binary number of hexadecimal number 152A.25 is (0011010101010.010101)2
Step 2:
3. Then, we make pairs of three bits on both sides of the binary point.
001 010 100 101 010.001 001 010
4. Then, we write the octal digit, which corresponds to each pair.
(001010100101010.001001010)2=(12452.112)8

Mathematical Operations (Hex)
 Addition
 Subtraction A8D2 A8D2
 Multiplication
-3EAC +3EAC
 Division
------------- -------------
24 A8D2
× 3A ÷3
------------- -------------

Multiplication & Divisions

Unsigned & Signed Number

Unsigned & Signed Number

Power of 2
20 1 211 2048 (2 × 210 ) 2KB
21 2 212 4098 (22 × 210 ) 4KB

22 4 1 Nibble 213 8192 (23 × 210 ) 8KB
23 8 1 Byte 214 24 × 210 16KB

24 16 1 Word 220 210 × 210 1Mega Byte
25 32 221 21 × 220 2MB
26 64 222 22 × 220 4MB
27 128 223 23 × 220 8MB
28 256 230 210 × 220 1Giga Byte
29 512 231 21 × 230 2GB
210 1024 1Kilo Byte 232 22 × 230 4GB
240 210 × 230 1 Tera Byte
Microprocessor (𝝁P) Architecture

Microprocessor (𝝁P)
• Microprocessor is a controlling unit of a microcomputer, fabricated on a small silicon chip capable of
performing Arithmetic Logical Operations and communicating with other devices connected to it.
• It is also a logical circuit that responds to and process the basic instructions that drives a computer
• One processor differs from other only by their architecture.
Input Output
(Binary) 𝝁P (Binary)

Types of Microprocessors
Architecture:
• Von Neumann Architecture
• Harvard Architecture
Complexity of Instruction:
• RISC - Reduced instruction set microprocessor /computer
• CISC - Complex instruction set microprocessor /computer

Von Neumann Architecture
• Program instructions and data share the same memory
and pathways.
• Instructions and data are stored in the same memory, so
instructions are fetched over the same path used to fetch
data.
• CPU cannot simultaneously read an instruction and read
or write data from or to the memory.
• Von Neumann architecture is mainly used in every
machine you see from desktop computers and
notebooks to high performance computers and
workstations.

Harvard Architecture
• The Harvard architecture is a computer architecture
with separate storage/memory and signal pathways for
instructions and data.
• In Harvard architecture, the CPU can both read an
instruction and perform a data memory access at the same
time even without a cache.
• To improve the performance, internally and largely
invisible to the user, most designs have separate
processor caches for the instructions and data, with
separate pathways into the processor for each, known
as the modified Harvard architecture.
• Harvard architecture is a fairly new concept used
primarily in microcontrollers and digital signal
processing (DSP).

Comparison of Von Neumann & Harvard Architecture
Point of Comparison Harvard Architecture Von Neumann Architecture
In Harvard architecture, the CPU is connected with In Von-Neumann architecture, there is no separate
Arrangement both the data memory (RAM) and program memory data and program memory. Instead, a single memory
(ROM), separately. connection is given to the CPU.
In contrast to the Harvard architecture, this requires

It requires more hardware since it will be requiring
Hardware requirements less hardware since only a common memory needs
separate data and address bus for each memory.
to be reached.
Space requirements Harvard architecture requires more space. Von-Neumann Architecture requires less space.
Two clock cycles are required to execute single

An instruction is executed in a single cycle.
instruction.
Speed of execution Speed of execution is faster because the processor
Speed of execution is slower since it cannot fetch
fetches data and instructions simultaneously .
the data and instructions at the same time.
It results in wastage of space since if the space is left
Space is not wasted because the space of the data
in the data memory then the instructions memory
Space usage memory can be utilized by the instructions memory
cannot use the space of the data memory and vice-
and vice-versa.
versa.
Controlling becomes complex since data and Controlling becomes simpler since either data or
Controlling
instructions are to be fetched simultaneously. instructions are to be fetched at a time.
CISC - Complex instruction set Computer / 𝝁P
• Processors are designed to minimize the number of instructions per program and ignore the
number of cycles per instructions or execution time.
• Compiler is used to translate a high level language to assembly level language because the
length of code is relatively short and an extra RAM is used to store the instructions.
• Tasks includes downloading, uploading and recalling data from memory, complex
mathematical calculation.
• Example: IBM 370/168, VAX 11/780

RISC - Reduced instruction set Computer / 𝝁P
• Designed to reduce the execution time by using the simplified instruction set.
• Processor are made according to function, to carry out small things in specific commands.
• Processors complete commands at faster rate, require only one clock cycle to implement a
result at uniform execution time.
• Higher number of registers and less number of transistors.
• To access the memory location LOAD and STORE instructions are used.
• Example: Power PC 601, 604, 615, 620

Types of Microprocessor (𝝁P) { Based on Instruction Set }
Reduced Instruction Set Complex Instruction Set

Computer Computers

40
CISC vs RISC
 CISC
 The primary goal of CISC architecture is to complete a task in as few
lines of assembly as possible.
 Ex: For multiplication of 2 numbers stored at location 2:1 & 5:3 using
complex instruction MULT ;
MULT 2:1 5:3
• When executed, this instruction loads the two values into separate
registers, multiplies the operands in the execution unit, and then
stores the product in the appropriate register. Thus, the entire task of
multiplying two numbers can be completed with one instruction.
• It operates directly on the computer's memory banks and does not
require the programmer to explicitly call any loading or storing
functions.
• The compiler has to do very little work to translate a high-level
language statement into assembly because the length of the code
is relatively short, very little RAM is required to store instructions.
• The emphasis is put on building complex instructions directly into
the hardware.
CISC vs RISC
RISC
• RISC processors only use simple instructions that can be
executed within one clock cycle.
• The "MULT" command could be divided into three separate
commands:
1. "LOAD," which moves data from the memory bank to a
register,
2. "PROD," which finds the product of two operands located
within the registers, and
3. "STORE," which moves data from a register to the memory
banks.
• In order to perform the exact series of steps described in the
CISC approach, a programmer would need to code four lines of
assembly:
LOAD A, 2:1
LOAD B, 5:3
PROD A, B
STORE 2:1, A

CISC vs RISC
RISC
• Though it seem like a much less efficient way of completing the operation as there are more
lines of code, more RAM is needed to store the assembly level instruction, but the RISC
strategy also brings some very important advantages.
• Because each instruction requires only one clock cycle to execute, the entire program will
execute in approximately the same amount of time as the multi-cycle "MULT" command.
• These RISC "reduced instructions" require less transistors of hardware space than the
complex instructions, leaving more room for general purpose registers.
• Because all of the instructions execute in a uniform amount of time (i.e. one clock),
pipelining is possible.
• Separating the "LOAD" and "STORE" instructions actually reduces the amount of work that
the computer must perform.
• After a CISC-style "MULT" command is executed, the processor automatically erases the
registers. If one of the operands needs to be used for another computation, the processor
must re-load the data from the memory bank into a register.
• In RISC, the operand will remain in the register until another value is loaded in its place.

CISC vs RISC
A race to increase the CPU performance
The Performance Equation:
CISC: Attempts to minimize the number of

instructions per program, sacrificing the number of
cycles per instruction.
RISC: Does the opposite, reducing the cycles per

instruction at the cost of the number of instructions
per program.

CISC vs RISC
A race to increase the CPU performance
RISC CISC
Focus on software Focus on hardware
Uses both hardwired and micro

CISC:
Uses only Hardwired control unit IBM 370/168 – It was introduced in the year
programmed control unit
1970. CISC design is a 32 bit processor and
four 64-bit floating point registers.
Transistors are used for storing VAX 11/780 – CISC design is a 32-bit
Transistors are used for more registers
complex Instructions processor and it supports many numbers of
addressing modes and machine instructions
Fixed sized instructions Variable sized instructions
MPMC - Module-1 which is from Digital Equipment
Can perform only Register to Register Can perform REG to REG or REG to Corporation.
Arithmetic operations MEM or MEM to MEM Intel 80486 – It was launched in the year
1989 and it is a CISC processor, which has
Requires more number of registers Requires less number of registers instructions varying lengths from 1 to 11 and
it will have 235 instructions.
Code size is large Code size is small
A instruction execute in single clock Instruction take more than one clock
cycle cycle
RISC:
Power PC 601, 604, 615, 620
Instruction are larger than size of one
A instruction fit in one word
word
08-Nov-22 45
Special Processor
These are the processors which are designed for some special purposes.
Co-processor
• A coprocessor is a specially designed microprocessor, which can handle its particular

function many times faster than the ordinary microprocessor.
Example − Math Coprocessor.
Some Intel math-coprocessors are −
• 8087-used with 8086
• 80287-used with 80286
• 80387-used with 80386

Special Processor
These are the processors which are designed for some special purposes.
Input/output Processor
• It is a specially designed microprocessor having a local memory of its own, which is used to
control I/O devices with minimum CPU involvement.
Example −
• DMA (direct Memory Access) controller
• Keyboard/mouse controller
• Graphic display controller
• SCSI port controller

Special Processor
DSP (Digital Signal Processor)
• This processor is specially designed to process the analog signals into a digital form. This is done by
sampling the voltage level at regular time intervals and converting the voltage at that instant into a
digital form. This process is performed by a circuit called an analogue to digital converter, A to D
converter or ADC.
• A DSP contains the following components −
• Program Memory − It stores the programs that DSP will use to process data.
• Data Memory − It stores the information to be processed.
• Compute Engine − It performs the mathematical processing, accessing the program from the program memory and
the data from the data memory.
• Input/output − It connects to the outside world.
• Applications
• Sound and music synthesis
• Audio and video compression
• Video signal processing
• 2D and 3d graphics acceleration.
• For example − Texas Instrument’s TMS 320 series, e.g., TMS 320C40, TMS320C50.
Microprocessor(𝝁P) Architecture
 The major difference between the Microprocessor architectures are:
• The Length of microprocessors data word.
• The size of the memory which 𝜇P can directly address.
• The speed which the 𝜇P can execute.
 Some additional architectural differences:
• The No. of registers available to program.
• The types of registers available to program.
• The different types of instructions available to program.
• Different types of memory addressing modes.
• Compatibility with hardware development system.
Microprocessor(𝝁P) Word Length
• Word length of a processor is the maximum number of bits it can accept as input,
process (execute) or deliver as output.
• It depends upon the width of internal data bus, registers, ALU, etc.
• The more the word length, the more the speed of execution of any instruction.
• 4 Bit, 8 Bit, 16 Bit, 32 Bit and 64 Bit Microprocessors.
• It is a measurement to compute the power of a microprocessor.

Microprocessor(𝝁P) Addressable Memory
• The amount of memory which a particular 𝜇𝑃 can address is also a part of the
architecture.
• It depends upon the width of internal address bus.
• Ex: Intel 4004 (4-Bit) 𝜇𝑃 has 14-bit address bus:

• Addressable Memory : 214 = 16,384 memory locations.
Intel 8085 (8-Bit) 𝜇𝑃 has 16-bit address bus:
• Addressable Memory: 216 = 65, 536 memory locations.
• 2 Types of single chip microcomputer address bus:

i. Only access the number of memory locations which are actually on the chip.
ii. On chip Memory + Can address enough memory locations outside the chip.

Memory Utilization and Task
1. General purpose application:
Where the task performed by the microprocessor is fixed, thus the system program is fixed
and a great deal of ROM memory is occupied.
2. Control Applications:
If the application program changes frequently and is controlled by the user and can change
the program that is to be executed, then a great deal of RAM memory is required.
Ex: Process control computers, which may be used to monitor and control a number of
different processes.

Microprocessor(𝝁P) Speed
 2-types of speed:
1. Clock Speed: This is the frequency at which microprocessor’s clock oscillator operates.
More clock speed  can fetch more instructions in less time
Measured in: Million Instructions Per Second (MIPS)
2. Word Length: Number of bits that a processor can execute (Process) at a time.
 The clock speed or the frequency at which a microprocessor operates are mostly depends on
the semiconductor manufacturing technology.
(2-types of semiconductor technology: NMOS and CMOS)

NMOS CMOS
Operating frequency: Operating frequency:

≈ 1𝑀𝐻𝑧 to 20 𝑀𝐻𝑧 ≈ 20 𝑀𝐻𝑧 to 100 𝑀𝐻𝑧
Less expensive More expensive
Draws more power Draws less power
Becomes more hot
In this type of semiconductor

technology very large integration (VLSI)
VLSI Technology
is not possible, as it draws more power
and can burn the device.

Other 𝝁P Architectural Characteristics
The following architectural characteristics are used to vary the speed of the
processor:
• Parallel processing
• Co-Processing or, Multiprocessing
• Cache memory technique
• Pipelining technique
• Wider buses

Parallel Processing
• Parallel processing is used

to provide simultaneous
data-processing tasks to
increase the computational
speed.
• Instead of processing each

instruction sequentially, it is
able to perform concurrent
data processing to achieve
faster execution time.

Performance Metrics of CPU
• Short response time for a given piece of work
• High throughput (rate of processing work)
• Low utilization of computing resource(s)
• High availability of the computing system or application
• Fast (or highly compact) data compression and decompression
• High bandwidth
• Short data transmission time.

Performance Metrics of CPU
• No of bits – Processor (8, 16, 32, 64 bits)
• Frequency (Clock speed)
• Processor size (in nm)
• Number of transistors
• Number of Cores
• Cache
• RAM
• GPU

Comparison of Microprocessor and Microcontrollers

ALU
ALU
Registers ROM RAM
Control Unit
Registers
Timer Interrupt
Serial
Communication Watchdog Timer
Control Unit
Ports

60
Advantages of Microprocessor
• High processing speed
• Compact size
• Easy maintenance
• Can perform complex mathematics
• Flexible
• Can be improved according to requirement

Disadvantages of Microprocessor
• Overheating occurs due to overuse
• Performance depends on size of data
• Large board size than microcontrollers
• Most microprocessors do not support floating point operations

Components of Computer System

Computer System
Three Main Component:

1. Processor [To execute Program]
2. Memory [To store/retrieve data/program] 𝝁P Memory
3. I/O [To provide input/display result]
Processor : The computers are used for

computing and the main task of computing is I/O
done by processor or CPU (that contains an
ALU).
Fig.: Computing System
Computing needs Programing.

Programming 𝝁P
The main job of the CPU is to execute programs using the
fetch-decode-execute cycle (also known as the instruction
cycle).
I. Fetch: The instruction is fetched from the memory address
that is currently stored in the program counter and stored into
the instruction register.
II. Decode: Decoding is not about converting instructions to
binary (hex) equivalent. 66
Decoding: 3-types of programming language:

a = b + c; [High-level Language]
ADD B, C; [Assembly Language]
0001001001….. 10 [Machine Level Language]
III. Execute: The control unit of the CPU passes the decoded Fig.: Instruction Cycle
information as a sequence of control signals to the relevant
functional units of the CPU to perform the actions required by
the instruction
Decoding
High Level Machine Level Assembler and
Compiler compiler are used to
Language Language
convert the
instruction
mnemonics to
Machine Level equivalent binary
Assembly Language Assembler
Language form for 𝜇𝑃 redability.
67
• Every instruction has a opcode (instruction machine code or instruction

Decoding ?
code).
• After fetching of instruction processor will look at the binary number
(opcode) to decode it to understand what is the instruction and what
operation has to be performed.
• Ex: 8051 𝜇C has 256 instructions; thus has 256 opcodes.

Memory
• Primary memory includes ROM and RAM, and is located close to the CPU on the computer motherboard, enabling the
CPU to read data from primary memory very quickly indeed. It is used to store data that the CPU needs imminently so
that it does not have to wait for it to be delivered.
• Secondary memory by contrast, is usually physically located within a separate storage device, such as a hard disk drive
or solid state drive (SSD), which is connected to the computer system either directly or over a network. The cost per
gigabyte of secondary memory is much lower, but the read and write speeds are significantly slower.
ROM – Read only memory
• PROM stands for Programmable Read Only Memory. It is a computer memory chip, and it is possible to
program it once after creation. After programming the PROM, the information we write to it becomes
permanent. Therefore, we cannot erase or delete that written data. The PROM chip was commonly
used in earlier computers’ BIOS systems.
• EPROM stands for Erasable Programmable Read Only Memory. We can erase and reprogram an EPROM
without replacing it. It is possible to erase and write to it by exposing the memory chip to ultraviolet
light. EPROM is used more commonly than PROM because it allows the manufacturers to modify or
reprogram the chip.
• EEPROM stands for Electrically Erasable Programmable Read-Only Memory. It is a memory chip that we
can erase and reprogram using electrical charge. It consists of a collection of floating gate transistors.
The flash memory is a type of EEPROM which has a higher density and lower number of write cycles.

Microprocessor Development Tools
Software Tools:
• Assembler
• Compiler
• Linker
• Loader
• Libraries
• Pre-compiler
• Simulator
• IDE - integrated development environment

Microprocessor Development Tools
Hardware Tools:
• In Circuit Emulator (ICE)
• Logic Analyzer
• Microprocessor Development Systems
• System Development Systems

Assembler
Translates the assembly language mnemonics for instructions to corresponding binary codes.
Reads the source file of your program from the disk, then determines the displacement of
named data items, the offset of labels, etc. and puts this information in a symbol table.
 Produces the binary code for each instruction and inserts the offsets, etc. that it calculated
during the first pass.
The assembler generates 2 files on the floppy disk or hard disk. The first file is called object file
(.obj).
The second file generated by assembler is called the assembler list file and is given extension
(.lst).

Linker
- A linker is a program used to join several object files into one large object file.
- The linker produces a link file which contains the binary codes for all the combined
modules.
- linker also produces a link map file which contains the address information about
the linked files (.exe).

Code Execution Process

Logic Analyzer
• Developed out of the need to be able de-bug and undertake fault-finding on microprocessor
based systems, need for simultaneous monitoring of many lines and test points.
• Widely used to develop and debug complex digital electronic logic circuits
• Displays traces of multiple logic channels and reveal the circuit operation.
• Displays relative timing of a large number of signals, enabling traces of logic signals to be seen
in such a way that the operation of several lines in a digital circuit can be monitored and
investigated.
• Have much greater levels of flexibility and processing power when connected with computer.

Logic Analyzer

Logic analyzer characteristics
• Multiple channels
 About 32 and 200+ channels, each channel monitoring one digital line
• Provide a time display of logic states

 Horizontal time axis and a vertical axis to indicate a logic high or low states
• Display logic states

 Signals entering various channels are converted into a high or low state for further
processing within the analyzer. It provides a logic timing diagram of the various lines
being monitored.
• Does NOT display analogue information

 Monitors the logic operation of the system.

Logic analyzer applications
• Verifying and debugging the operation of digital designs looking a logic

states and timings.
• Correlate a large number of digital signals
• Investigate the system operation.
• Detect timing violations
• Trace embedded software operation.

Types of Logic analyzer
• Modular logic analyzers
• Highest cost option providing the highest level of functionality.

• Comprises of a chassis and the various modules - including channel modules. The
number of modules being larger for the higher channel counts.
• Portable logic analyzers
• Smaller analyzer for restricted budgets or for field service. It incorporates all elements
of the analyzer into a single box for ease of transportation.
• PC based logic analyzers
• Connected to a PC via USB , but Ethernet is also widely used because of its high speed.
• Uses the processing power of the PC combined with its display to reduce the cost of
the overall system.
In Circuit Emulation (ICE)
• ICE is the use of a hardware device or in-circuit emulator used to debug the software of
an embedded system.
• It operates by using a processor with the additional ability to support debugging operations, as
well as to carry out the main function of the system.
• Particularly for older systems, with limited processors, this usually involved replacing the
processor temporarily with a hardware emulator: a more powerful although more expensive
version.
• It was historically in the form of bond-out processor which has many internal signals brought out
for the purpose of debugging. These signals provide information about the state of the
processor.
Evolution of Microprocessor

Evolution of Intel Microprocessor
 Introduction
 4-Bit Microprocessors

INTRODUCTION
• Fairchild Semiconductors (founded in 1957) invented the first IC in 1959.
• In 1968, Robert Noyce, Gordan Moore, Andrew Grove resigned from Fairchild
Semiconductors.
• They founded their own company Intel (Integrated Electronics).
• Intel grown from 3 man start-up in 1968 to industrial giant by 1981.
• It had 20,000 employees and $188 million revenue

4-BIT MICROPROCESSORS
4
Intel 4004
• Year of introduction 1971, the first microprocessor
by Intel.
• 4-bit microprocessor
• Clock speed was 740KHz.
• 4 KB main memory
• 45 instructions
• It had 2,300 transistors (PMOS technology)
• It could execute around 60,000 instructions per
second.
• It was first programmable device which was used in
calculators
Intel 4040
• Introduced in 1974.
• It was also 4-bit µP.

8- BIT MICROPROCESSORS
7
Intel 8008
• Year of introduction 1972
• 8-bit version of 4004, first 8-bit µP.
• Clock speed was 500 KHz.
• 48 instructions
• PMOS technology
• Its Could execute 50,000 instructions per second.

Intel 8080
• 8-bit microprocessor
• clock speed was 2 MHz.
• Had 6,000 transistors (NMOS technology)
• 500,000 instructions/sec.
• 10X faster than 8008
• Drawback was that it needed three power supplies.
• Small computers (Microcomputers) were designed in
mid 1970’s using 8080 as CPU.

Intel 8085
• 8-bit microprocessor-upgraded version of 8080
• clock speed was 3 MHz
• It had 6,500 transistors.
• Had 246 instructions
• Could execute 7,69,230 instructions per second.
• Intel sold 100 million copies of this 8-bit microprocessor
• Uses only one +5v power supply.

11
Intel 8086
• Introduced in 1978
• First 16-bit microprocessors
• Its clock speed is 4.77 MHz, 8 MHz and 10 MHz,
depending on the version.
• Width of Data bus is 16 bit and address bus is 20-bit.
• Can access 1 MB main memory
• It had 29,000 transistors.
• It had 22,000 instructions
• 6 byte instruction cache for 8086
• It had Multiply and Divide instructions.

Intel 8086
• Introduced in 1979
• 16-bit microprocessors
• It was created as a cheaper version of Intel’s 8086.
• 16-bit processor with an 8-bit external bus.
• Data bus width is 8 bit
• Instruction cache is of 4 byte
• Could execute 2.5 million instructions per second.
• In 1981 IBM decided to use 8088 in its personal
computer due to its popularity

INTEL 80186 & 80188
• They were 16-bit µPs.
• Clock speed was 6 MHz.
• 80188 was a cheaper version of 80186 with an 8- bit
external data bus.
• They had additional components like:
• Interrupt Controller
• Clock Generator
• Local Bus Controller
• Counters
14
INTEL 80286
• It was 16-bit µP.
• Its clock speed was 8 MHz.
• Its data bus is 16-bit and address bus is 24-bit.
• It could address 16 MB of memory.
• It had 1,34,000 transistors.
• It could execute 4 million instructions per second.

15
16
INTEL 80386
• It was first 32-bit µP.
• Its data bus is 32-bit and address bus is 32-bit.
• It could address 4 GB of memory.
• It had 2,75,000 transistors.
• Clock speed varied from 16 MHz to 33 MHz depending upon
the various versions.
• Different versions:
• 80386 DX
• 80386 SX
• 80386 SL 17
• Intel 80386 became the best selling microprocessor in history.

INTEL 80486
• It had 1.2 million transistors.
• Its clock speed varied from 16 MHz to 100 MHz
depending upon the various versions.
• It had five different versions:
• 80486 DX
• 80486 SX
• 80486 DX2
• 80486 SL
• 80486 DX4
18
• 8 KB of cache memory was introduced.

INTEL PENTIUM
• It was originally named 80586.
• Its clock speed was 66 MHz.
• Its data bus is 32-bit and address bus is 32- bit.
• It could address 4 GB of memory.
• Could execute 110 million instructions per second.
• Cache memory:
• 8 KB for instructions.
• 8 KB for data. 19
INTEL PENTIUM PRO
• It had L2 cache of 256 KB.
• It had 21 million transistors.
• It was primarily used in server systems.
• Cache memory:
• 8 KB for instructions.
• 8 KB for data.
• It had L2 cache of 256 KB. 20
INTEL PENTIUM II
• Its clock speed was 233 MHz to 500
MHz.
• Could execute 333 million instructions
per second.
• MMX technology was supported.
• L2 cache & processor were on one
circuit.
21
INTEL PENTIUM II XEON
• It was designed for servers.
• Its clock speed was 400 MHz to 450
MHz.
• L1 cache of 32 KB & L2 cache of 512 KB,
1MB or 2 MB.
• It could work with 4 Xeons in same
system.
22
INTEL PENTIUM III
• Its clock speed varied from 500
MHz to 1.4 GHz.
• It had 9.5 million
transistors.
23
INTEL PENTIUM IV
• Its clock speed was from 1.3 GHz to 3.8 GHz.
• L1 cache was of 32 KB & L2 cache of 256 KB.
• It had 42 million transistors.
• All internal connections were made from

aluminium to copper.
24
INTEL DUAL CORE
• It is 32-bit or 64-bit µP.
• It has two cores.
• Both the cores have there own
internal bus and L1 cache, but share
the external bus and L2 cache.
• It supported SMT technology.
• SMT: Simultaneously Multi- Threading
• E.g.: Adobe Photoshop supported SMT.
25
INTEL CORE 2
• It is a 64-bit µP.
• Its clock speed is from 1.2 GHz to 3 GHz.
• It has 291 million transistors.
• It has 64 KB of L1 cache per core and 4 MB
of L2 cache.
• It is launched in three different versions:
• Intel Core 2 Duo
• Intel Core 2 Quad
• Intel Core 2 Extreme
28
INTEL CORE I3
• It has 2 physical cores.
• Its clock speed is from 2.93 GHz
to 3.33 GHz.
• It has 64 KB of L1 cache per
core, 512 KB of L2 cache and 4
MB of L3 cache.
31
INTEL CORE I5
to 3.60 GHz.
core, 256 KB of L2 cache and 8
MB of L3 cache.
30
INTEL CORE I7
• Its clock speed is from 2.66
GHz to 3.33 GHz.
• It has 230 billion transistors.
core, 256 KB of L2 cache
and 8 MB of L3 cache.
29
INTEL CORE I9
to 5.2 GHz.
• It has 430 billion transistors.
core, 1 MB of L2 cache per
core and 13.75 MB of L3
cache.
Other Microprocessors & Comparison

Questions
1. Why are you learning 8086?
2. Why still the low-level processors (4-Bit and 8-Bit) are popular?
3. What is the meaning of Dual/Quad core processors ?

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Microprocessors & Microcontrollers

Dr. Soumitra K Nayak

08-Nov-22 MPMC - Module-1 2

• Addressing modes - Instruction set - Assembly language programming, assembler

• Interrupts and interrupt service routines.

08-Nov-22 MPMC - Module-1 3

• Addressing modes, Instruction set: conditional instructions, I/O Programming,

• Timers and Counters, Serial communication - Interrupt handling.

08-Nov-22 MPMC - Module-1 4

8051 Peripherals Interfacing:

• Real world interface - ADC, DAC, SENSORS, Communication interface

08-Nov-22 MPMC - Module-1 5

• Operational Modes – ARM Core Data Flow Model

• Pipelining: ARM 3 stage Pipeline, ARM 5 stage Pipeline, Pipeline

08-Nov-22 MPMC - Module-1 6

08-Nov-22 MPMC - Module-1 7

 It is also known as the base 2 number system.

 The MSB of the number represents the 𝑥 − 1 power of the base(2).

 It is also known as the base 8 number system.

08-Nov-22 MPMC - Module-1 16

111 110 101 011 . 001 1

111 110 101 011 . 001 100

2. Then, we wrote the octal digits, which correspond to each pair.

08-Nov-22 MPMC - Module-1 17

111 1010 1011.0011

0111 1010 1011.0011

2. Then, we write the hexadecimal digits, which correspond to each pair.

08-Nov-22 MPMC - Module-1 18

Operation Quotient Remainder Step 2:

Operation Quotient Remainder Step 2:

08-Nov-22 MPMC - Module-1 20

08-Nov-22 MPMC - Module-1 21

So, the decimal number of the octal number 152.25 is 106.328125

08-Nov-22 MPMC - Module-1 22

We write the equivalent three-bit binary digit for 1, 5, 2, and 5.

So, the binary number of the octal number 152.25 is (001101010.010101)2

08-Nov-22 MPMC - Module-1 23

08-Nov-22 MPMC - Module-1 24

We write the four-bit binary digit for 1, 5, A, 2, and 5.

(152A.25)16=(0001 0101 0010 1010.0010 0101)2

So, the binary number of the hexadecimal number 152.25

08-Nov-22 MPMC - Module-1 25

08-Nov-22 MPMC - Module-1 26

08-Nov-22 MPMC - Module-1 27

08-Nov-22 MPMC - Module-1 28

08-Nov-22 MPMC - Module-1 29

08-Nov-22 MPMC - Module-1 30

21 2 212 4098 (22 × 210 ) 4KB

23 8 1 Byte 214 24 × 210 16KB

08-Nov-22 MPMC - Module-1 32

• One processor differs from other only by their architecture.

08-Nov-22 MPMC - Module-1 33

08-Nov-22 MPMC - Module-1 34

08-Nov-22 MPMC - Module-1 35

08-Nov-22 MPMC - Module-1 36

In contrast to the Harvard architecture, this requires

Two clock cycles are required to execute single

• Example: IBM 370/168, VAX 11/780

08-Nov-22 MPMC - Module-1 38

• Higher number of registers and less number of transistors.

• Example: Power PC 601, 604, 615, 620

08-Nov-22 MPMC - Module-1 39

Reduced Instruction Set Complex Instruction Set