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EE105 – Fall 2015

Microelectronic Devices and Circuits

Prof. Ming C. Wu
wu@eecs.berkeley.edu
511 Sutardja Dai Hall (SDH)

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Purposes of Bias Circuit

• Provide a stable bias drain (collector) current


• Bias insensitive to variations in
– Transistor parameters (β for BJT, Vt, kn for MOS),
– Temperature and other environmental changes

• Keep transistors in flat part of the I-V curves


(Saturation for MOS, Active for BJT) for desired
output swing

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Example of Non-Ideal Bias

• Fixed vGS from voltage divider


• Large variation in iD due to device variations
• Large temperature dependence
– µn and Vt are temperature sensitive

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Adding Source Resistance RS

VG = VGS + RS I D

• RS provides negative feedback


– If ID increases, VGS decreases à reduce ID
– If ID decreases, VGS increases à increase ID

• Stabilize ID w.r.t. device and temperature variations


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Practical Implementations

Single Power Supply Dual Power Supplies Drain-to-Gate Feedback

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Coupling Capacitor to Separate


AC Signal from DC Bias
• Coupling capacitor is DC
-open and AC-short
• Prevent signal source to
change bias condition
• The coupling capacitor
creates a lower bound of
operating frequency

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Bias Design Example
Goal: design bias for ID = 0.5 mA. General rule of thumb:
MOS has Vt = 1V and kn = 1 mA/V2 Equal (1/3 each) voltage drop across
RD , RS , and VDS
15V −10V
Choose RD = = 10 kΩ
0.5 mA
5V − 0V
Choose RS = = 10 kΩ
0.5 mA
Determine VGS :
1
0.5 mA = kn (VGS −1)2 ⇒ VGS = 2V
2
VG = VGS + 5V = 7V
We can choose any combination of voltage
divider, RG1 and RG1, that gives VG = 7V.
Remember RG1 || RG1 becomes Rin
So use large RG1 and RG1, in the MΩ range.

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Non-Ideal Biasing Schemes for BJT

vBE

Since iC = I S e VT depends " V − 0.7 %


I C = β $ CC '
exponentially on vBE , # RB &
small variation in vBE leads is sensitive to variation in β
to large change in I C

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Good (Stable) Bias Circuits for BJT

Similar to MOSFET bias, but VBB −VBE


IE =
must consider finite base current: R
RE + B
First, find Thevenin equivalent circuit β +1
of bias circuit: RB
Choose VBB >> VBE and RE >>
! R2 $ β +1
VBB = VCC # & I E is insensitive to variation
" R1 + R2 %
in β and VBE
RB = R1 || R2
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Design Example of BJT Bias

Goal: design bias circuit for General rule of thumb:


IE = 1 mA with VCC = 12 V 1 12
and β = 100 Choose VBB = VCC = = 4 V
3 3
VE
VE ≈ VBB − 0.7 = 3.3 V ⇒ RE = = 3.3 kΩ
1 mA
2 12 − 8
Choose VC = VCC = 8 V, RC = = 4 kΩ
3 1 mA
Choose bias current through R1, R2 to be 10I B
12
R1 + R2 = = 120 kΩ
0.1 mA
R1 = 2R2 ⇒ R1 = 80 kΩ, R2 = 40 kΩ
Check resulting I E :
V −V 4 − 0.7
I E = BB BE = = 0.93mA
RB 40 || 80
RE + 3.3+
β +1 101
Adjust RE : I E = 1 mA when RE = 3 kΩ

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