IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO.

3, MARCH 2014 521

A Low-Voltage Low-Power Wide-Tuning-Range

Hybrid Class-AB/Class-B VCO With Robust
Start-Up and High-Performance
To-Po Wang, Member, IEEE, and Yaon-Ming Yan

Abstract—This paper proposes a hybrid class-AB/class-B
voltage-controlled oscillator (VCO) with low voltage, low power,
and a wide tuning range. The class-AB VCO core is designed to en-
sure robust start-up of the class-B VCO core. Featuring a high-ef-
ficiency class-B VCO core, the combination of class-AB/class-B
VCO cores consumes low dc power. Based on the proposed archi-
tecture, the fabricated 0.18- m CMOS VCO exhibits a measured
tuning range of 25.6%. Operating at a low supply voltage of 0.75 V,
the hybrid class-AB/class-B VCO cores consume a low total dc
power of 2.4 mW. In this bias condition, the measured average
value of phase noise for all frequency ranges is 101.4 dBc/Hz at
1-MHz offset from the carriers. Compared to recently published
wide-tuning range VCOs, the proposed hybrid class-AB/class-B
VCO simultaneously achieves a low supply voltage, a low dc
power dissipation, and wide tuning range, leading to a good
figure-of-merit including the tuning range . In addition,
the theories for analyzing the VCO are given in detail, and the
mechanisms are validated by experiments.
Index Terms—Class-AB/class-B, start-up, voltage-controlled os-
cillator (VCO).
I. INTRODUCTION
110.8-dBc/Hz phase noise at 1-MHz offset from the carrier.
To achieve a wide tuning range, a negative-transconductance
back-gate tuned technique is utilized [7]. The tuning topology
is combined with varied junction capacitance on the back-gate
transistors. It achieves a tuning range of 10.5% with dc power
consumption of 4.1 mW. Moreover, a 13-GHz VCO with dif-
ferential high- low-noise active inductors is presented in [10].
The active inductors are constructed by using differential boot-
strapped inductors. Therefore, the factor of a 3.15-nH active
inductor at 13 GHz is higher than 60, leading to a low phase
noise of 105.25 dBc/Hz at 1-MHz offset from 12.72-GHz car-
rier.
To develop a robust start-up for a class-C VCO [12], an am-
plitude feedback is adopted in [13]. The feedback loop is com-
posed of a negative peak detector and a low-pass filter for ad-
justing a gate bias to control the oscillation amplitude. This de-
sign achieves improved noise performance and enhanced os-
cillation swing. In another work [14], class-C VCOs are com-
bined with dynamic bias to maximize the oscillation amplitude
for robust start-up. The negative feedback measures a common-
mode voltage of the bottom of the VCO’s cross-coupled pair,
and then sets the dc values of gate bias of the MOSFETs. In

D UE TO increased demands on high data-rate wireless

communication, the development of RF integrated cir-
cuits (RFICs) is focusing on higher frequency bands. For
[15], a class-B VCO is designed to start up a high-efficiency
class-C VCO. However, it requires a high 1.5-V supply voltage
and 18-mA current consumption for the 55-nm hybrid class-B/
fabricating RFICs, CMOS technology is one candidate because
class-C CMOS VCO, leading to a large dc power dissipation of
of the low supply voltage, low dc power, and high integration.
27 mW.
With reductions of CMOS sizes to the deep-submicrometer
In this paper, a hybrid class-AB/class-B VCO with robust
range, CMOS voltage-controlled oscillators (VCOs) with oper-
start-up and high-performance is proposed. The use
ation frequencies in the -band have been reported [1]–[11].
of a class-AB VCO core effectively alleviates the startup con-
In [1], a 12-GHz fully integrated cascode CMOS VCO
dition of a high-efficiency class-B VCO core. This approach
with a -enhancement circuit has been developed. The negative
relaxes the VCO start-up condition, allowing reduction of the
conductance circuit is implemented by using a cascode struc-
dc power dissipation. Furthermore, start-up conditions and
ture. Fabricated in 0.18- m CMOS, that VCO can be tuned
nonlinear formulas are derived for characterizing the hybrid
from 10.85 to 11.6 GHz, resulting in a 6.68% tuning range.
class-AB/class-B VCO.
While consuming 4.5 mA from a 1.8-V supply, the VCO has
This paper is organized as follows. In Section II, the proposed
VCO is introduced. The design considerations and nonlinear
Manuscript received September 08, 2013; revised December 31, 2013; ac- characterizations are described. Section III gives the experi-
cepted January 03, 2014. Date of publication January 23, 2014; date of cur-
rent version March 03, 2014. This work was supported in part by the National mental results. Finally, a conclusion is provided in Section IV.
Science Council under Contract NSC 101-2119-M-027-003, NSC 102-2623-E-
027-004-NU, and NSC 102-2119-M-027-002.
The authors are with the Department of Electronic Engineering and the Grad- II. PROPOSED VCO TOPOLOGY
uate Institute of Computer and Communication Engineering, National Taipei
University of Technology, Taipei 10608, Taiwan (e-mail: tpwang@ntut.edu.tw).
A conventional -tank differential CMOS VCO composed
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. of a negative conductance generated cross-coupled pair
Digital Object Identifier 10.1109/TMTT.2014.2300443 and a resonator is depicted in Fig. 1(a). The

0018-9480 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
522 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 3, MARCH 2014
Fig. 1. Schematic of the: (a) regular differential cross-coupled VCO, (b) dif-
ferential Colpitts VCO with additional feedback from tanks to MOS gates, and
(c) regular class-C VCO.
continuous tuning varactors are adopted to adjust the VCO os-
cillating frequency. However, the quality factor of the integrated
tank in Fig. 1(a) is poor due to a lossy silicon substrate. In
addition, due to stacking of the cross-coupled pair
and the tail current transistor, the supply voltage of the
regular VCO has to be raised to increase the , and thus
overcome the severe start-up condition. Therefore, the dc power
dissipation of a regular VCO is considerable.
A. Class-AB, Class-B, and Class-C VCO Cores
In order to overcome these difficulties, Colpitts-based
topology is widely used in the literature [16]–[18]. Fig. 1(b)
shows a differential Colpitts VCO with additional feedback
from tank to MOS gates [19], [20] to further improve the phase
noise, and is the voltage gain of the feedback path.
Phase-noise characterization of the Colpitts VCO with addi-
tional feedback depicted in Fig. 1(b) is formulated as [20]
(1)
with
(2)
(3)
where is the offset frequency from the carrier, is the
Boltzmann’s constant, is the absolute temperature, is the
Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
Fig. 2. Schematic of the proposed hybrid class-AB/class-B VCO.
channel noise factor of the MOSFET, is the parallel tank re-
sistance at resonance, and is the feedback factor from the tank
to the MOSFET source.
From (1) and (3), it is observed that the lowest phase noise can
be achieved by setting equal to zero. This eliminates the feed-
back capacitor connecting from the tank to the MOSFET
source. Moreover, the equivalent capacitance of the oscillator
in (3) can be simplified to , making it easier to predict
the oscillation frequency. Considering the voltage gain of the
feedback path in Fig. 1(b) and (1), a high voltage gain can indeed
perform low phase noise. In [21], a positive feedback network
was applied to a 40-GHz low-noise amplifier (LNA) to boost
the gain of the first stage and minimizes the noise figure. The
feedback network in [21] is implemented by a nMOS cascode
stage, and the stability of the 40-GHz LNA was also consid-
ered. In [22], a tunable delay path was utilized to improve the
VCO phase noise. The amplitude stability and phase stability
have to be taken into account for oscillators with self-injection
techniques. To simplify design procedures and ensure robust
start-up, the voltage gain is set to one [20]. Upon , it can
achieve as large as 5-dB phase-noise improvement. Therefore,
the differential Colpitts VCO with additional feedback from the
tank to the MOS gates shown in Fig. 1(b) can be transformed
into a regular class-C VCO in Fig. 1(c) and with .
Fig. 1(c) shows a typical class-C VCO, and the gate bias
approximates to below the threshold voltage of the
MOSFETs . can be as low as for
reducing dc power dissipation. In addition, the fundamental
current approximates to the tail current . Therefore,
most of the current is transformed to fundamental current
for oscillation, leading to a high-efficiency oscillation. For
a class-C operation, the gate bias of the cross-coupled pair of
WANG AND YAN: LOW-VOLTAGE LOW-POWER WIDE-TUNING-RANGE HYBRID CLASS-AB/CLASS-B VCO 523

Fig. 3. Operations in: (a) initial state and (b) steady state of hybrid class-AB/class-B VCO. Turned-off MOSFETs are denoted via in gray color.

the class-C VCO is lower than the threshold voltage, leading to

a current conduction angle lower than half a period. Therefore,
corresponding crossover distortion of voltage waveforms will
occur at the class-C VCO’s output. Moreover, the startup
condition is severe for a low gate bias less than the threshold
voltage.
To alleviate this difficulty, a VCO core with class-B operation
is adopted in this work, as shown in Fig. 2. The gate voltage of
the MOSFETs is about 0.53-V threshold voltage.
Due to the gate bias approximating to the threshold voltage, the
startup condition can be effectively relaxed from class-C VCO
operation. In addition, although the class-B/class-C VCO cores
have the advantage of low dc power, they still suffer from the Fig. 4. Simplified equivalent half-circuit model for determining the startup fre-
quency.
difficulties of start-up and require huge dc power consumption
[15]. Moreover, the process, voltage, and temperature (PVT)
variations also influence the VCO performance. In order to en-
sure a robust start-up condition, a VCO core op- where
erating in the class-AB region is utilized in this work for ro-
bust start-up, as shown in Fig. 2. The gate bias of the MOSFETs
is 0.8 V, which is higher than the device’s threshold
voltage of 0.53 V. In addition, the drain-to-source voltage
of is greater than , resulting in
operation in the saturation region.

B. Hybrid Class-AB/Class-B VCO Operation

The operation modes of the proposed hybrid class-AB/
class-B VCO are shown in Fig. 3. Due to the low gate voltage
of 0.53 V, the MOSFETs are turned off. The
oscillation is initiated from the class-AB VCO core, as shown
in Fig. 3(a). Biased in the saturation region, the MOSFETs
can easily meet the startup condition. Rapidly, the
raised voltage waveforms turn on the MOSFETs
for class-B operation, leading to a steady state of the hybrid
class-AB/class-B oscillator in Fig. 3(b).
For analysis of the startup condition, a simplified equivalent
half-circuit model of the class-AB VCO is shown in Fig. 4,
where and are the losses of the on-chip inductors
and , respectively. To derive the oscillation frequency and
analyze the tuning range, the voltage transfer function between
and can be written as
To get a first approximation for oscillation frequency ,
let voltage gain equal 1. After proper arrangements and
(4) neglect of the parasitic resistors ( and ), the oscillation

Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
524 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 3, MARCH 2014

TABLE I Moreover, the VCO tuning range by measurement and formula

CIRCUIT PARAMETERS OF THE PROPOSED VCO are 25.63% and 26.0%, respectively. The tuning-range differ-
ence between measurement and (6) is 0.37%.

C. Phase Noise and Start-Up Considerations of Class-AB,

Class-B, Class-C, and Hybrid Class-AB/Class-B VCOs
It is critical and essential to minimize phase noise for VCO
designs [23]–[31]. Typically, the flicker noise of switching
transistors and tail current sources are the main noise sources
of a VCO’s close-in phase noise. The noise of a tail current
source can be up-converted to the close-in phase noise through
the AM-to-FM conversion. At common-source nodes, the
second harmonic current will modulate the flicker noise from a
cross-coupled pair, leading to a degraded VCO phase noise.
In this work, the time-varying phase-noise theory in
[32] is adopted to analyze the phase noise of the hybrid
frequency can be formulated by class-AB/class-B VCO. To effectively consider the phase
noise, an impulse sensitivity function (ISF) is utilized to ana-
lyze the proposed hybrid class-AB/class-B VCO.
It represents how much of the phase shift of the output wave-
forms is due to applied unit impulse. Therefore, the ISF can be
formulated as

(5) (7)

From (5), it is observed that the start-up frequency of the where is the dc value, and the and terms are the co-
proposed VCO is determined by the inductors and efficients and phases of the th harmonics, respectively. is
capacitors , and varactor . There the oscillation frequency, and is the time of an applied unit
are two VCO bands controlled by a digital switching voltage impulse. In addition, the ISF depends on the properties of the
, and the continuous tuning mechanism is achieved by nodes injected by unit impulses. From (7), it is observed that the
the control voltage . impulse sensitivity of the class-AB/class-B VCO can be mini-
To gain more insight into the mechanisms of VCO oscilla- mized by reducing the dc value .
tion frequency and tuning range, the nonlinear properties of the Assuming an input noise current has a white power spectral
varactors are taken into account. Therefore, the VCO oscilla- density , the raised VCO phase noise in the region
tion frequency can be formulated as (6), shown at the bottom an be formulated as [32]
of this page. The maximum and minimum values of the var-
actor are fF and fF, respec-
tively. The and are the parameters of the varactor’s non-
(8)
linear property. For this work, is V and is 2.26.
The circuit parameters for the proposed VCO in Fig. 2 and (6)
are listed in Table I. The bank capacitances for switch on and
off are fF and fF, re- where is the corner frequency. Moreover, the relationship
spectively. In addition, the characterizations of the VCO tuning of the corner in the phase spectrum and device noise
curve by measurement, simulation with EDA tools, and (6) are corner frequency is given as
given in Fig. 13. From this figure, it is observed that the formu-
(9)
lated tuning frequency in (6) can be used to predict the reality.

(6)

Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
WANG AND YAN: LOW-VOLTAGE LOW-POWER WIDE-TUNING-RANGE HYBRID CLASS-AB/CLASS-B VCO 525

Fig. 5. (a) Characterized drain voltage and (b) calculated ISF of a class-C VCO
core.

where is the root mean square value of the ISF. From (9),
it is found that the phase noise can be effectively reduced by
reducing the dc value of the ISF.
Fig. 5(a) describes the characterized drain voltage waveform
of a class-C VCO by simulation and formula in (10) as follows:

-
(10)

For Fig. 5(a), the gate bias is 0.4 V, which is below the
threshold voltage of MOSFETs, 0.53 V. Moreover, the ISF for
the class-C VCO calculated by using the approximate analytical
method [32] is depicted in Fig. 5(b). It is calculated that the
absolute dc value for the ISF is - .
For the class-B VCO core shown in Fig. 2, the simulated and
formulated drain voltage waveforms are shown in Fig. 6(a) and
(b),
- dc value, it is seen that the ISF’s dc value of the
(11)
The gate bias is at 0.59 V, which is close to the 0.53-V
threshold voltage of the MOSFETs. Fig. 6(c) shows the calcu-
lated ISF for the class-B VCO, and the absolute dc value for the
ISF is - .
In this work, the VCO core with class-AB operation is de-
signed to startup the class-B VCO core, as shown in Fig. 2. The
characterized drain voltage waveform of the class-AB VCO by
simulation and formula in (12) is described in Fig. 7(a) and (b),
Fig. 6. (a) Start-up simulation, (b) characterized drain voltage, and (c) calcu-
lated ISF of a class-B VCO core.
For Fig. 7(a), the gate bias is 0.8 V, which is much higher
than the 0.53-V threshold voltage of the MOSFETs. Fig. 7(c)
shows the calculated ISF for the class-AB VCO, and the abso-
lute dc value for the ISF is - . Com-
pared to the class-B VCO core, with an ISF of -
class-AB VCO core is larger than that of the class-B VCO core.
This means that the class-AB VCO core has a larger noise
upconversion factor, resulting in a worse phase noise.
To alleviate this difficulty, the class-AB VCO core is com-
bined with the class-B VCO core for phase-noise improvement,
as depicted in Fig. 2. It is calculated that the absolute ISF dc
value of the class-B VCO core is 0.75 times lower than that of
the class-AB VCO core. From the VCO phase noise in (8), the
maximum phase noise improvement can then be de-
rived as

-
(12) (13)

Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
526 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 3, MARCH 2014

Fig. 7. (a) Start-up simulation, (b) characterized drain voltage, and (c) calcu- Fig. 8. (a) Start-up simulation, (b) characterized drain voltage, and (c) calcu-
lated ISF of a class-AB VCO core. lated ISF of a hybrid class-AB/class-B VCO core.

class-AB VCOs, leading to a calculated phase-noise improve-

where and are the phase noise of class-AB
ment from the class-AB VCO, shown in (15) as follows:
VCO and class-B VCO cores, respectively. - and
- represent the absolute ISF dc values of the class-AB
VCO and class-B VCO cores, respectively. In this design,
(15)
the parameter - is 3.86 10 , and - is
2.9 10 , leading to a phase-noise improvement around where and are the phase noise
2.5 dB. of the class-AB VCO and hybrid class-AB/class-B cores, re-
Fig. 8(a) and (b) shows the simulated and formulated drain spectively. Moreover, the design parameters are -
voltage waveforms of hybrid class-AB/class-B operation, and , leading to
- -
a phase-noise improvement of 5.0 dB.
- - Fig. 9 depicts the simulated phase noise performance at
(14) 12.7 GHz. It is observed that 4.2-dB phase-noise reduction
from a class-AB to hybrid class-AB/class-B VCO is achieved.
The gate bias is V, which is much higher than the Moreover, it is found that the 4.2-dB phase-noise reduction
0.53-V threshold voltage of the MOSFETs. The calculated ISF is similar to the calculated absolute ISF dc value reduction in
for the hybrid class-AB/class-B VCO is depicted in Fig. 8(c), (15).
and the absolute dc value for the ISF is - - For start-up consideration, the simulated start-up of class-B,
. It is lower than that of the standalone class-B and class-AB, and hybrid class-AB/class-B VCOs are shown

Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
WANG AND YAN: LOW-VOLTAGE LOW-POWER WIDE-TUNING-RANGE HYBRID CLASS-AB/CLASS-B VCO 527

Fig. 10. Simulated output power with Monte Carlo analysis.

Fig. 9. Simulated phase-noise performance at 12.7 GHz.

TABLE II
SIMULATED HYBRID CLASS-AB/CLASS-B VCO
PERFORMANCE AT DIFFERENT PROCESS CORNER

Fig. 11. Simulated phase noise with Monte Carlo analysis.

in Figs. 6(a), 7(a), and 8(a). From these figures, it is ob-

served that the start-up time of the hybrid
class-AB/class-B VCO is 1.5 ns, which is much faster than that
of the class-B VCO ns and class-AB VCO
ns . Moreover, the drain voltage swing
of the hybrid class-AB/class-B VCO is 1085 mV , which
is much larger than that of the class-B and class-AB VCOs,
exhibiting a robust start-up.

D. Process Variation Consideration

In order to ensure a robust start-up condition and predictable
VCO performance, the proposed hybrid class-AB/class-B VCO
has been simulated with PVT corners. The process corners are
Typical Typical ,
Slow Slow , and Fast Fast . The varia-
tion of supply voltage is . The temperatures are 0
C, 25 C, and 75 C. Table II shows the characterized results.
As can be seen from that table, this VCO can meet the startup
requirements and operate at PVT corners. In addition, the VCO
oscillation frequency ranges from 9.89 to 13.24 GHz, the tuning
range ranges from 26.15% to 28.32%, the phase noise at 1-MHz
offset ranges from 106 dBc/Hz to 109.6 dBc/Hz, the VCO
core current ranges from 1.7 to 4.77 mA, and the dc power con-
Fig. 12. Microphotograph of the fabricated VCO with a chip size of 0.66
sumption ranges from 1.15 to 3.94 mW. 0.89 mm .
To gain more insight into the proposed hybrid class-AB/
class-B VCO phase noise and output power due to mismatch of including channel length, channel width, threshold voltage,
the MOSFETs , Monte Carlo and oxide thickness are taken into account in the Monte Carlo
analysis can be used to characterize the VCO. The random analysis. Fig. 10 describes the simulated output power with
variations in Gaussian distribution of the process parameters, Monte Carlo analysis, comprising a total of 50 sampled data.

Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
528 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 3, MARCH 2014

Fig. 13. Characterized oscillation frequency of the proposed VCO.

Fig. 16. Measured phase noise of the fabricated VCO at a 11.31-GHz output
frequency in low band. ( 105.55 dBc/Hz at 1-MHz offset from the carrier. The
resolution bandwidth is 91 kHz).

Fig. 14. Characterized output power of the proposed VCO.

Fig. 17. Measured phase noise of the hybrid class-AB/class-B VCO operating
at 12.7 GHz.

Fig. 15. Measured phase noise of the fabricated VCO at a 13.15-GHz output
frequency in high band. ( 102.33 dBc/Hz at 1-MHz offset from the carrier. The
resolution bandwidth is 91 kHz).

It is observed that the maximum discrepancy of these data is

0.12 dB. In addition, the simulated phase noise with Monte
Carlo analysis is described in Fig. 11. These 50 sampled data
are within 0.03 dB.
Fig. 18. Measured and simulated phase noise versus the control voltage.
III. EXPERIMENTAL RESULTS
Fig. 12 shows the microphotograph of the fabricated hybrid by a 26.5-GHz spectrum analyzer. On-wafer probing was used
class-AB/class-B VCO with a chip size of 0.66 0.89 mm in- to test the VCO performance. The losses of the measurement
cluding the testing pads. To evaluate the high-frequency perfor- setups were de-embedded and calibrated in the experimental re-
mance, the output spectrum and phase noise were characterized sults.

Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
WANG AND YAN: LOW-VOLTAGE LOW-POWER WIDE-TUNING-RANGE HYBRID CLASS-AB/CLASS-B VCO 529

TABLE III
PERFORMANCE SUMMARY AND COMPARISON TO THE RECENTLY REPORTED WIDE-TUNING-RANGE VCOs

While operating at the supply voltage of 0.75 V,
the VCO core consumes 2.4 mW. Besides, the supply voltage
of the buffers is also 0.75 V, and the two buffers
consume a total of 1.13 mW. Figs. 13 and 14 show the
characterized oscillation frequency and output power. When
sweeping the controlled voltage from 0 to 1.8 V,
the overall measured operation frequency is from 10.1 to
13.15 GHz, exhibiting a tuning range of 25.63%. At this bias
condition, the measured phase noise is 102.33 dBc/Hz at
1-MHz offset from the 13.15-GHz carrier in the high band, as
shown in Fig. 15. In addition, Fig. 16 show the measured phase
noise of 105.55 dBc/Hz at 1-MHz offset from 11.31-GHz
carrier in the low band. Moreover, the measured and plotted
phase noise versus the offset frequency is shown in Fig. 17.
As can be seen from this figure, the measured phase noise is
104.5 dBc/Hz at 1-MHz offset from the 12.7-GHz carrier. It
is similar to the simulated result in the and regions
in Fig. 9. Furthermore, the measured and simulated phase
noise versus the control voltage is shown in Fig. 18. From this
figure, it is calculated that the average values of measurement
and simulation data of all frequency ranges are 101.4 and
102.1 dBc/Hz, respectively.
In addition, the bias current of the proposed hybrid class-AB/
class-B is provided by a pMOS tail current source , as
shown in Fig. 2. Utilizing a pMOS as a tail current can achieve
lower noise than that of NMOS. Moreover, high value resistors
(5 k ) are applied to and to minimize the injected
low-frequency noise into the VCO core.
To evaluate limitations of VCO performance, the tuning volt-
ages of the recently published VCOs shown in Table III are al-
most as low as 0 V and as high as supply voltage . In ad-
dition, negative values of control voltages are used to further
extend the VCO tuning range in [3] and [35]. For VCO appli-
cation in a phase-locked loop (PLL), the control voltage
from 0.2 to V could be generated from an adequate
supply voltage of the charge pump and loop filter [46]. In order
to verify the robust start-up of the proposed VCO, the gate bias
of the class-AB VCO core shown in Fig. 2 can be adjusted
from 0.8 to 0.55 V. From the measurement result, the proposed
VCO can overcome the start-up condition and oscillate at low
gate bias of 0.55 V.
Table III summarizes the performance of this hybrid
class-AB/class-B VCO and compared to the recently reported
wide-tuning range VCOs. The phase noise of the proposed

Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
530 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 3, MARCH 2014
VCO is the average value of all frequency ranges. As can be
seen from this table, this VCO can simultaneously achieve
the measured low supply voltage of 0.75 V, low dc power
consumption of 2.4 mW, low phase noise of 101.4 dBc/Hz
(average value of all frequency ranges), and wide tuning range
of 25.63%. In order to characterize the VCO performance, the
widely used figure-of-merit (FOM) and FOM including tuning
range [33], [34], [36] is adopted in this work. The
FOM and are written as
mW
(16)
Tuning Range
(17)
mW
where is the VCO phase noise, is the offset fre-
quency, is the carrier frequency, and is the dc power
consumption. According to Table III, it is observed that this low-
voltage low-power wide tuning-range hybrid class-AB/class-B
VCO exhibits the good of 188.2 dBc/Hz (average
value of all frequency ranges).
IV. CONCLUSION
A hybrid class-AB/class-B VCO with low voltage, low
power, and a wide tuning range has been proposed, and it has
been successfully demonstrated. Utilizing a VCO core oper-
ating in the class-AB region for large output voltage swings,
the start-up condition of a class-B VCO core biased at threshold
voltage can be effectively overcome, leading to a measured
0.75-V low supply voltage, 2.4-mW low dc power dissipa-
tion, 25.63% wide tuning range, 101.4-dBc/Hz phase noise
(average value of all frequency ranges), and 188.2-dBc/Hz
(average value of all frequency ranges).
ACKNOWLEDGMENT
The authors would like to thank the National Chip Imple-
mentation Center (CIC), Hsinchu, Taiwan, for chip fabrication,
and the National Nano Device Laboratories (NDL), Hsinchu,
Taiwan, for measurement support.
REFERENCES
[1] B. Park, S. Lee, S. Choi, and S. Hong, “A 12-GHz fully integrated
cascode CMOS VCO with -enhancement circuit,” IEEE Microw.
Wireless Compon. Lett., vol. 18, no. 2, pp. 133–135, Feb. 2008.
[2] X. S. Chen, Y. T. Chen, and H. R. Chuang, “A 1-V low-voltage 12-GHz
VCO in 0.18- m CMOS technology,” in Asia–Pacific Microw. Conf.
Tech. Dig., Dec. 2008, pp. 1–4.
[3] M. T. Hsu and C. T. Chiu, “A low-power 10-GHz current reused VCO
using negative resistance enhancement technique,” in Asia–Pacific Mi-
crow. Conf. Tech. Dig., Dec. 2009, pp. 2276–2279.
[4] H. K. Chiou and S. C. Chen, “Low-phase-noise -band
-boosting differential Colpitts VCO,” in Asia–Pacific Microw.
Conf. Tech. Dig., Dec. 2009, pp. 313–316.
[5] S. L. Jang, Y. K. Wu, C. C. Liu, and J. F. Huang, “A dual-band CMOS
voltage-controlled oscillator implemented with dual-resonance LC
tank,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 12, pp.
816–818, Dec. 2009.
[6] K. Hu, F. Herzel, and J. C. Scheytt, “Fully integrated 9 GHz CMOS
VCO with very low phase noise,” in IEEE Int. Circuits Syst. Symp.,
2010, pp. 1899–1902.
Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
[7] C. Y. Yang, C. H. Chang, J. M. Lin, and J. H. Weng, “A 0.6 V 10 GHz
CMOS VCO using negative- back-gate tuned technique,” IEEE
Microw. Wireless Compon. Lett., vol. 21, no. 3, pp. 163–165, Mar.
2011.
[8] T. P. Wang and C. C. Li, “A 0.4-V 1.08-mW 12-GHz high-performance
VCO in 0.18- m CMOS,” in Proc. IEEE Radio Wireless Symp., Santa
Clara, CA, USA, Jan. 15–18, 2012, pp. 207–210.
[9] Q. Zou, K. Ma, K. S. Yeo, and W. M. Lin, “Design of a -band
low-phase-noise VCO using the dual LC tanks,” IEEE Trans. Circuits
Syst. II, Exp. Briefs, vol. 59, no. 5, pp. 262–266, May 2012.
[10] D. Zito, D. Pepe, and A. Fonte, “13 GHz CMOS active inductor LC
VCO,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 3, pp.
138–140, Mar. 2012.
[11] S. L. Liu, K. H. Chen, and A. Chin, “A dual-resonant mode 10/22-GHz
VCO with a novel inductive switching approach,” IEEE Trans. Mi-
crow. Theory Techn., vol. 60, no. 7, pp. 2165–2177, Jul. 2012.
[12] K. Okada, Y. Nomiyama, R. Murakami, and A. Matsuzawa, “A
0.114-mW dual-conduction class-C CMOS VCO with 0.2-V power
supply,” in VLSI Tech. Symp. Dig., 2012, pp. 228–229.
[13] W. Deng, K. Okada, and A. Matsuzawa, “Class-C VCO with
amplitude feedback loop for robust start-up and enhanced oscillation
swing,” IEEE J. Solid-State Circuits, vol. 48, no. 2, pp. 429–440,
Feb. 2013.
[14] L. Fanori and P. Andreani, “High efficient class-C CMOS VCOs, in-
cluding a comparison with class-B VCOs,” IEEE J. Solid-State Cir-
cuits, vol. 48, no. 7, pp. 1730–1740, Jul. 2013.
[15] L. Fanori, A. Liscidini, and P. Andreani, “A 6.7-to-9.2 GHz 55 nm
CMOS hybrid class-B/class-C cellular TX VCO,” in IEEE Int. Solid-
State Circuits Conf. Tech. Dig., Feb. 2012, pp. 354–355.
[16] G. Sapone, E. Ragonese, A. Italia, and G. Palmisano, “A 0.13- m SiGe
BiCMOS Colpitts-based VCO for -band radar transmitters,” IEEE
Trans. Microw. Theory Techn., vol. 61, no. 1, pp. 185–194, Jan. 2013.
[17] K. W. Cheng and M. Je, “A current-switching and -enhanced Col-
pitted quadrature VCO,” IEEE Microw. Wireless Compon. Lett., vol.
23, no. 3, pp. 143–145, Mar. 2013.
[18] T. P. Wang, “A -band low-power Colpitts VCO with voltage-to-cur-
rent positive-feedback network in 0.18- m CMOS,” IEEE Microw.
Wireless Compon. Lett., vol. 21, no. 4, pp. 218–220, Apr. 2011.
[19] P. Andreani, X. Wang, L. Vandi, and A. Fard, “A study of phase noise in
Colpitts and -tank CMOS oscillators,” IEEE J. Solid-State Circuits,
vol. 40, no. 5, pp. 1107–1118, May 2005.
[20] A. Mazzanti and P. Andreani, “Class-C harmonic CMOS VCOs, with
a general result on phase noise,” IEEE J. Solid-State Circuits, vol. 43,
no. 12, pp. 2716–2729, Dec. 2008.
[21] H. H. Hsieh and L. H. Lu, “A 40-GHz low-noise amplifier with a
positive-feedback network in 0.18- m CMOS,” IEEE Trans. Microw.
Theory Techn., vol. 57, no. 8, pp. 1895–1902, Aug. 2009.
[22] T. P. Wang, Z. M. Tsai, K. J. Sun, and H. Wang, “Phase-noise reduction
of -band push-push oscillator with second-harmonic self-injection
technique,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 1, pp.
66–77, Jan. 2007.
[23] H. H. Hsieh and L. H. Lu, “A high-performance CMOS voltage-con-
trolled oscillator for ultra-low-voltage operations,” IEEE Trans. Mi-
crow. Theory Techn., vol. 55, pp. 467–473, Mar. 2007.
[24] F. Pepe, A. Bonfanti, S. Levantino, C. Samori, and A. L. La-
caita, “Analysis and minimization of flicker noise up-conversion in
voltage-biased oscillators,” IEEE Trans. Microw. Theory Techn., vol.
61, pp. 2382–2394, Jun. 2013.
[25] D. Murphy, J. J. Pael, and A. A. Abidi, “Phase noise in oscillatiors:
A phasor-based analysis of a general result and of loaded ,” IEEE
Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 6, pp. 1187–1203, Jun.
2010.
[26] A. Ismail and A. A. Abidi, “CMOS differential LC oscillator with sup-
pressed up-converted flicker noise,” in IEEE Int. Solid-State Circuits
Conf. Tech. Dig., Feb. 2003, pp. 98–99.
[27] A. Demir, A. Mehrotra, and J. Roychowdhury, “Phase noise in oscil-
lators: A unifying theory and numerical methods for characterization,”
IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 47, no. 5, pp.
655–674, May 2000.
[28] A. Demir, “Phase noise and timing jitter in oscillators with colored-
noise sources,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl.,
vol. 49, no. 12, pp. 1782–1791, Dec. 2002.
[29] F. X. Kaertner, “Determination of the correlation spectrum of oscilla-
tors with low noise,” IEEE Trans. Microw. Theory Techn., vol. 37, no.
1, pp. 90–101, Jan. 1989.
[30] F. X. Kaertner, “Analysis of white and noise in oscillators,” Int.
J. Circuit Theory Appl., vol. 18, no. 5, pp. 485–519, Sept./Oct. 1990.
WANG AND YAN: LOW-VOLTAGE LOW-POWER WIDE-TUNING-RANGE HYBRID CLASS-AB/CLASS-B VCO
[31] W. F. Andress and D. Ham, “Standing wave oscillators utilizing wave-
adaptive tapered transmission lines,” IEEE J. Solid-State Circuits, vol.
40, no. 3, pp. 638–651, Mar. 2005.
[32] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical
oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179–194,
Feb. 1998.
[33] J. Kim, J. O. Plouchart, N. Zamdmer, R. Trzcinski, K. Wu, B. J. Gross,
and M. Kim, “A 44 GHz differentially tuned VCO with 4 GHz tuning
range in 0.12 m SOI CMOS,” in IEEE Int. Solid-State Circuits Conf.
Tech. Dig., Feb. 2005, pp. 416–417.
[34] T. W. Brown, F. Farhabakhshian, A. G. Roy, T. S. Fiez, and K. Ma-
yaram, “A 475 mV, 4.9 GHz enhanced swing differential Colpitts VCO
with phase noise of 136 dBc/Hz at a 3 MHz offset frequency,” IEEE
J. Solid-State Circuits, vol. 46, no. 8, pp. 1782–1795, Aug. 2011.
[35] B. Jung and R. Harjani, “A 20 GHz VCO with 5 GHz tuning range in
0.25 m SiGe BiCMOS,” in IEEE Int. Solid-State Circuits Conf. Tech.
Dig., Feb. 2004, vol. 521, pp. 178–179.
[36] J. C. Chien and L. H. Lu, “Design of wide-tuning-range millimeter-
wave CMOS VCO with a standing-wave architecture,” IEEE J. Solid-
State Circuits, vol. 42, no. 9, pp. 1942–1952, Sep. 2007.
[37] J. Borremans, M. Dehan, K. Scheir, M. Kuijk, and P. Wambacq, “VCO
design for 60 GHz applications using differential shielded inductors in
0.13- m CMOS,” in IEEE RFIC Symp., 2008, pp. 135–138.
[38] J. Gonzalez, F. Badets, B. Martineau, and D. Belot, “A 56-GHz
-tank VCO with 17% tuning range in 65-nm bulk CMOS for
wireless HDMI,” IEEE Trans. Microw. Theory Techn., vol. 58, pp.
1359–1366, May 2010.
[39] A. Jooyaie and M. C. F. Chang, “A -band voltage controlled oscil-
lator with greater than 18 GHz of continuous tuning-range based on
orthogonal E mode and H mode control,” in IEEE RFIC Symp., 2011,
pp. 1–4.
[40] P. K. Tsai, C. Y. Liu, and T. H. Huang, “A CMOS voltage controlled
oscillator and frequency tripler for 22–27 GHz local oscillator gen-
eration,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 9, pp.
492–494, Sep. 2011.
[41] Q. Wu, T. Quach, A. Mattamana, S. Elabd, S. R. Dooley, J. J. McCue, P.
L. Orlando, G. L. Creech, and W. Khalil, “Design of wide tuning-range
mm-wave VCOs using negative capacitance,” in Compound Semicon-
duct. Integr. Circuit Symp., 2012, pp. 1–4.
[42] P. K. Tsai and T. H. Huang, “Integration of current-reused VCO and
frequency tripler for 24-GHz low-power phase-locked loop applica-
tions,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 59, no. 4, pp.
199–203, Apr. 2012.
[43] I. Nasr, M. Dudek, R. Weigel, and D. Kissinger, “A 33% tuning range
high output power -band superharmonic coupled quadrature VCO in
SiGe technology,” in IEEE RFIC Symp., 2012, pp. 301–304.
Authorized licensed use limited to: National Taipei Univ. of Technology. Downloaded on May 10,2022 at 10:42:27 UTC from IEEE Xplore. Restrictions apply.
531
[44] Q. Wu, S. Elabd, T. K. Quach, A. Mattamana, S. R. Dooley, J. McCue,
P. L. Orlando, G. L. Creech, and W. Khalil, “A 189 dBc/Hz
wide tuning range -band VCO using tunable negative capacitance
and inductance redistribution,” in IEEE RFIC Symp., 2013, pp.
199–202.
[45] P. L. You and T. H. Huang, “A switched inductor topology using a
switchable artificial grounded metal guard ring for wide-FTR MMW
VCO applications,” IEEE Trans. Electron Devices, vol. 60, no. 2, pp.
759–766, Feb. 2013.
[46] Y. C. Huang and S. I. Liu, “A 2.4-GHz subharmonically injection-
locked PLL with self-calibrated injection timing,” IEEE J. Solid-State
Circuits, vol. 48, no. 2, pp. 417–428, Feb. 2013.
To-Po Wang (S’05–M’08) received the Ph.D. degree
from National Taiwan University, Taipei, Taiwan.
In 2009, he joined the faculty of the Department
of Electronic Engineering, National Taipei Univer-
sity of Technology, Taipei, Taiwan, where he is cur-
rently an Associate Professor.
Dr. Wang was the session chair of the 2012 IEEE
Topic Meeting on Silicon Monolithic Integrated Cir-
cuits in RF System (2012 SiRF), the 2012 IEEE Inter-
national Conference on Wireless Information Tech-
nology and Systems (ICWITS), and the 2012 IEEE
International Conference on Electron Devices and Solid-State Circuits (IEEE
EDSSC). He has served as a reviewer for numerous publications, including
the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, the IEEE
MICROWAVE AND WIRELESS COMPONENTS LETTERS, the IEEE TRANSACTIONS
ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, the IEEE TRANSACTIONS ON
CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, and the IEEE TRANSACTIONS
ON ULTRASONICS, FERROELECTRICS AND FREQUENCY CONTROL. He was the
recipient of the Best Paper Award of the Symposium on Nano Device Tech-
nology (SNDT) in 2012.
Yaon-Ming Yan received the M.S. degree from the
Graduate Institute of Computer and Communication
Engineering, National Taipei University of Tech-
nology, Taipei, Taiwan, in 2013.
His research interests include the design of RF in-
tegrated circuits (RFICs).