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(2) Simpy he owing expression wing the tabulstion Roll No
method QM method.
FIA, B,C,D) =2m(0,2,3,6,7,8,10, 12,13) @) 301303
(©) Find the output fora 4-BIT successive approximation ania aed a ener
femme et Belin tes ince DIGTAL ELECTRONICS ESC)
‘Total Pages : 4
Pema ‘Time : 3 Hours) (Max, Marks : 75,
Instructions
1. tis compulsory to answer all the question (1-5 marks
each) of Part in shor.
2. Answer any four questions from Par-B in detail
3. Different sub-parts of a question are to be attempied
‘adjacent ro each other.
PART-A
1. (@) What ar the advantages of CMOS logic families wed
{or implementing logic gates? ay,
(©) Implement the EX-OR using the NAND gate
oly as,
(©) What are signed integer division circuits how they are
4 @ Perform the following :
@ -18 + 4= 7 using 2s complement method.
(328 ~ 423 = 2 sing BCD arithmetic method.
ii) (1011010), Yon sie
G) (75.13 9 (dy
©) (8.5) Die: a9,
(©) Differentiate between serial cary and cary look-ahead
adders with suitable diagrams. o
5. (@) Implement full adder using 4:1 muliplexer. (8)
(©) Explain the interfacing between TTL and CMOS
circuits o
(©) Differentiate between CPLD and FPGA. o
6 (@ Define resolution, conversion time, sensitivity and
accuracy of A/D converter. o
(©) What is programmable read-only memory? How it
Alters from RAM? o
(© Implement 2X1 Multiplexer using PLA.and PAL. (5)
901909/1000011 1916 3 (PTO.
