The 8051 Microcontroller

Chapter 3
INSTRUCTION SET SUMMARY
INSTRUCTION TYPES
 INSTRUCTION TYPES
• Arithmetic
• Logical
• Data transfer
• Boolean variable
• Program branching

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 Arithmetic Instructions
• Since four addressing modes are possible, the ADD A
instruction can be written in different ways:
• ADD A, 7FH (direct addressing)
• ADD A, @R0 (indirect addressing)
• ADD A, R7 (register addressing)
• ADD A, #35H (immediate addressing)
• All arithmetic instructions execute one machine cycle
except the INC DPTR instruction (two machine cycles)
and the MUL AB and DIV AB instructions (four machine
cycles).
• (Note that one machine cycle takes 1 μs if the 8051 is
operating from a 12 MHz clock.)

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• The 8051 provides powerful addressing of its internal
memory space. Any location can be incremented or
decremented using direct addressing without going through
the accumulator.

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 Logical Instructions
• Perform Boolean operations (AND, OR, Exclusive OR,
and NOT) on bytes of data on a bit-by-bit basis
• Since the addressing modes for the logical instructions are
the same as those for arithmetic instructions, the AND
logical instruction can take several forms:
• ANL A, 55H (direct addressing)
• ANL A, @R0 (indirect addressing)
• ANL A, R6 (register addressing)
• ANL A, #33H (immediate addressing)
• All logical instructions using the accumulator as one of the
operands execute in one machine cycle. The others take
two machine cycles.

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• Logical operations can be performed on any byte in the
internal data memory space without going through the
accumulator.
• The rotate instructions (RL A and RR A) shift the
accumulator one bit to the left or right. For a left rotation,
the MSB rolls into the LSB position. For a right rotation,
the LSB rolls into the MSB position.
• The RLC A and RRC A variations are 9-bit rotates using
the accumulator and the carry flag in the PSW.
• The SWAP A instruction exchanges the high and low
nibbles within the accumulator. This is a useful operation
in BCD manipulations.

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 Data Transfer Instructions
• Internal RAM
• External RAM
• Look-Up Tables

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 Internal RAM
• The instructions that move data within the internal memory spaces
• Execute in either one or two machine cycles.
• The instruction format
MOV <destination>, <source>
• Allows data to be transferred between any two internal RAM or SFR
locations without going through the accumulator
• The upper 128 bytes of data RAM (8032/8052) are accessed only by
indirect addressing, and the SFRs are accessed only by direct
addressing
• The stack resides in on-chip RAM and grows upward in memory
• PUSH instruction first increments the stack pointer (SP), then copies
the byte into the stack
• PUSH and POP use direct addressing to identify the byte being saved
or restored, but the stack itself is accessed by indirect addressing using
the SP register. This indirect addressing means the stack can use the
upper 128 bytes of internal memory on the 8032/8052.

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• Data transfer instructions include a 16-bit MOV to
initialize the data pointer (DPTR) for look-up
tables in program memory, or for 16-bit external
data memory accesses.

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 External RAM
• The data transfer instructions that move data between internal and
external memory use indirect addressing.
• The indirect address is specified using a 1-byte address (@Ri, where
Ri is either R0 or R1 of the selected register bank), or a 2-byte address
(@DPTR).
• The disadvantage in using 16-bit addresses is that all eight bits of Port
2 are used as the high-byte of the address bus. This precludes the use
of Port 2 as an I/O port. On the other hand, 8-bit addresses allow
access to a few Kbytes of RAM, without sacrificing all of Port 2.
• All data transfer instructions that operate on external memory execute
in two machine cycles and use the accumulator as either the source or
destination operand.
• The read and write strobes to external RAM (RD and WR) are
activated only during the execution of a MOVX instruction. Normally,
these signals are inactive (high), and if external data memory is not
used, they are available as dedicated I/O lines.

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Look-Up Tables

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