Department of Mechatronics Engineering

Air University, Islamabad, Pakistan

Lab Manual
Electric Circuit Analysis (MT-142L)

Name: Abdulrehman Awan

Roll Number: 231779

Semester: BEMTS-1
Program: B.Sc. Mechatronics engineering Semester: I
Subject MT-142L Electric Circuit Analysis Date: 26-OCT-2023

Experiment 6: Verification of Kirchoff’s Voltage Law

OBJECTIVES:
• To verify Kirchoff’s Voltage Law for dc circuit.

Performance Lab Report

Description Total Marks Description Total Marks

Marks Obtained Marks Obtained
Ability to 5 Organization/Structure 5
conduct
Experiment
Data Analysis & 5 Results 5
Interpretation
Total Marks obtained
Remarks (if any)………………………………………………..

Name & Signature of faculty: …………………………………

Lab Experiment 07
Kirchoff’s Voltage Law

Objectives
• To verify Kirchoff’s Voltage Law for dc circuit.

Introduction:
Kirchhoff's Voltage Law (KVL) is a fundamental concept in electrical circuits. In essence,
it tells us that the total electrical energy or voltage within a closed loop is conserved.
Imagine a loop in an electrical circuit like a racetrack for electrons.

As you travel around the track, you may encounter things like batteries or generators that
add energy (voltage) and components like resistors or lights that take energy away. KVL
simply states that when you return to your starting point, the sum of the added and
subtracted voltages will always be zero. It's a bit like keeping a tally of gains and losses in
a financial transaction, ensuring that everything adds up in the end. KVL is a fundamental
tool for understanding and analyzing how voltages behave in complex circuits.

Tasks
1.Take three resistors R1=100ohm, R2=270ohm,R3=220ohm ,Make a series
circuit , set voltage=5V.
Apply KVL on it. Sum of all the voltage drops must be equal to zero.
• Theoretical calculations
• Proteus circuit and calculations
• Hardware circuit and calculations

• Theoretical calculation :
• Proteus circuit and calculations.

• Hardware circuit and calculations

Conclusion:

In conclusion, we've explored Kirchhoff's Voltage Law (KVL) in three different ways: theoretical
calculations, Proteus circuit simulation, and real-world hardware circuit. KVL, a fundamental principle in
electrical circuits, states that the sum of voltages in a closed loop is always zero. We applied this concept to
a series circuit with resistors and a 6V source.

Theoretical calculations allowed us to predict voltage drops across the resistors with precision. In Proteus
circuit simulation, we verified our theoretical results in a virtual environment, ensuring that the simulation
matched our expectations. Finally, in the hardware circuit, we put the theory into practice, measured
voltage drops, and confirmed that real-world results closely aligned with the theoretical and simulated ones.
This comprehensive approach demonstrates the practical utility of KVL for analyzing electrical circuits.