Professional Documents
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ViewSonic PJ503D-1
Model No. VS11705
DLP Projector
Disclaimer
ViewSonic makes no representations or warranties, either expressed or implied, with respect to
the contents hereof and specifically disclaims any warranty of merchantability or fitness for any
particular purpose. Further, ViewSonic reserves the right to revise this publication and to make
changes from time to time in the contents hereof without obligation of ViewSonic to notify any
person of such revision or changes.
Trademarks
Optiquest is a registered trademark of ViewSonic Corporation.
ViewSonic is a registered trademark of ViewSonic Corporation.
All other trademarks used within this document are the property of their respective owners.
Revision History
Revision SM Editing Date ECR Number Description of Changes Editor
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TABLE OF CONTENTS
1. Introduction 1
2. Specifications 2
5. Block Diagram 85
6. Troubleshooting 86
7. Schematic Diagrams 94
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1. Introduction
This section contains general service information, please read through carefully. It should be
stored for easy access place.
Safety Notice
1 Make sure your working environment is dry and clean, and meets all government safety
requirements.
2 Ensure that other persons are safe while you are servicing the product.
3 DO NOT perform any action that may cause a hazard to the customer or make the product
unsafe.
4 Use proper safety devices to ensure your personal safety.
5 Always use approved tools and test equipment for servicing.
6 Never assume the product’s power is disconnected from the mains power supply. Check that
it is disconnected before opening the product’s cabinet.
7 Modules containing electrical components are sensitive to electrostatic discharge (ESD).
Follow ESD safety procedures while handling these parts.
8 Some products contain more than one battery. Do not disassemble any battery, or expose it
to high temperatures such as throwing into fire, or it may explode.
9 Refer to government requirements for battery recycling or disposal.
General Descriptions
This Service Manual contains general information. There are 2 levels of service:
Level 1: Cosmetic / Appearance / Alignment Service
Level 2: Circuit Board or Standard Parts Replacement
Level 3: Component Repair to Circuit Boards
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2. Specifications
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3. Software/Firmware Upgrade Process
Level 1 Cosmetic / Appearance / Alignment Service
Software/Firmware Upgrade Process
How to Download Firmware
Hardware required
1. Standard USB Download cable (P/N 50.73213.501)
2. Personal computer or laptop computer
Software required
1. DDP2000 Composer lite
2. New version FW
DDP2000 Composer lite install procedure
Installation Location
The default installation directory is:
C:\Program Files\DLP Composer Lite
If you want to install to a different directory (perhaps alongside a prior release of DLP
Composer™ Lite), click the "Browse" button on the "Select Features" page..
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problems.
After installation is complete, and you plug a DDP2000-based projector into USB for the first
time, Windows will run the "New Hardware Wizard". When the wizard prompts to find the
necessary drivers, accept the recommended choice (let the system find the driver for you)
and click "Next" to complete the installation.
Note: The Windows 98/Me "New Hardware Wizard" may not automatically find the
driver. You should use the "Advanced" option, and enter the directory where the DLP
Composer™ Lite Tool Suite was installed (normally "C:\Program Files\DLP Composer
Lite"). The wizard will find the file "DDP2000.inf" and complete the installation.
To select the USB communications interface, choose "Preferences" from the "Edit" menu,
click the "Communications" page and choose "USB (DDP2000 Only)". You can now use
DLP Composer™ Lite to communicate with a DDP2000-based projector via USB using the
Flash Loader tool.
Download procedure
1. Click on Flash Loader and browse the image file (new version firmware)
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2. Make sure to check “Skip Boot loader area (load all but the first 16KB)”
3. Plug power cord into projector
4. Press “UP+SOURCE+AUTO” simultaneously on keypad, the projector LAMP LED
would lite on
5. Plug in USB cable between computer and projector side
6. Press start download to begin update new firmware
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Visual Inspection & Cleaning
圖 1
等級區分 A 區 B 區 C 區
Classification Area A Area B Area C
光源位置 被觀察物正上方
Lighting positioning Above of inspected part
目視與被觀察物位置(垂直) 90º 90º 90º
Inspection position relative to part
目視距離(參考距離) 40-50 cm 40-50 cm 40-50 cm
Inspection distance
表 1
1.1.3 檢視時間
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Inspection interval (time)
檢視時間與樣品大小及檢視區域有關。
Inspection interval is a function of surface area.
檢視時間以 10 秒為限。
Time for visual inspection: 10sec.
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TABLE 1. 產品一般外觀塑膠件的黑點、雜質、凸點、砂粒缺陷檢驗標準
(General Product of plastic outlook of dot, blemish, and others spec inspection standard)
A 級面 B 級面 C 級面
規格 A surface B surface C surface
Spec (允許數) (允許數) (允許數)
(面積 cm2) (Number of defect) (Number of defect) (Number of defect)
2
( Area cm ) 100* 100* 100*
20*20 50*50 70*70 20*20 50*50 70*70 20*20 50*50 70*70
100 100 100
P < 0.2 mm2
雜質 不計 不計 不計 不計 不計 不計 不計 不計 不計 不計 不計 不計
點距 Distance ≥
Particle Ignore Ignore Ignore Ignore Ignore Ignore Ignore Ignore Ignore Ignore Ignore Ignore
2cm
黑點
Blemish 0.2≦P< 0.3
2
| mm
2 3 4 5 2 3 4 5 4 4 5 6
異色點 點距 Distance ≥
4cm
0.3≦P <0.4mm2
點距 Distance ≥
0 0 0 0 2 3 4 5 3 4 5 6
4cm
P<0.1 mm2
不計 不計 不計 不計 不計 不計 不計 不計 不計 不計 不計 不計
凸點 點距 Distance ≥
Ignore Ignore Ignore Ignore Ignore Ignore Ignore Ignore Ignore Ignore Ignore Ignore
砂粒 2cm
棉絮 0.1≦P<0.2mm2
毛屑 點距 Distance ≥ 4 4 5 6 5 5 6 7 6 6 7 8
Particle 4cm
| 0.2≦P <
同色點 0.3mm2
3 4 4 5 4 5 5 6 6 7 7 8
Spot 點距 Distance ≥
with 4cm
same 0.3≦P <
color 0.5mm2
2 2 3 4 3 3 4 5 4 4 5 6
點距 Distance ≥
5cm
E i i S t
Total 4 4 5 6 5 5 6 7 6 6 7 8
備註 Note:
1. 檢測面積 A <20*20 以 20*20 之規範檢驗之, 20*20≦A<50*50,以 50*50 等級檢驗之,以此類推.
Use the 20*20 criteria to the area less than 20*20; 50*50 inspection criteria to the area
20*20≦A<50*50; etc.
雜質/黑點/異色點(Particle/Blemish/Color Spot)
1.1 A、B、C 級面定義請參考 6.2 級面定義。
Definition of surface A, B, C refer to 6.2
1.2 LOGO 周邊 3 cm 內不可有 0.05 mm2 以上之點, (0.05 mm2 以內之點不計)。
Blemish around the logo must be equal or smaller than 0.05 mm2
1.3 表面氣泡—不可有。
Bubble on the surface is to be reject.
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TABLE 2 :產品一般外觀的塑膠件檢驗標準(General Product of plastic outlook inspection standard)
NO Appearance Spec
1 縮水 A 區: 不可有縮水 , 以帶手套檢驗, 手摸過去不可有凹陷的感覺
Shrinkage A region: No Shrink. With gloves, no feeling of sink when touching the surface
B / C 區: 不能明顯看出
B/C region: not obvious
2 流痕, 咬花, 光澤 不能有明顯的深淺不均
Run, Texture, No obvious non-uniformity
Gloss
3 接合線 用指甲劃過不會有停頓感,並附近無明顯之光澤差異
Welding Line/Knit When scratching on it, there’s no feeling of obstruction. Also, there should not
Line be obvious difference in gloss nearby it.
4 頂白 不可
Ejector Mark Reject
5 Label/screws 不允許
shortage Reject
6 缺料 缺料不可影向機構強度和表面
Material shortage Material shortage is not allowed to impact structure strength and surface
7 色差 噴漆(Painting): ΔE<=2; L<=1.5 ; Δ A,B <= 0.6
Chromatic 銀粉漆 (Paint, aluminum).
aberration ΔE<=2 L<=1.0; Δ A, B <= 0.6
非銀粉漆(Paint, non-aluminum)
素材(Raw material) : ΔL,A,B<=0.6 ,ΔE<=0.75
8 印刷 文字印刷不得有漏印、斷線、重影、組細不均、溢墨、印偏( 2mm )、印斜 (歪
Printing 斜<0.5 mm )。
Printing must not have incomplete printing, break off, overlap, uneven
thickness, excessive ink, printing misalignment (2mm), printing slanting &
crooked (<0.5mm)
文字印刷顏色須確認是否正確 。
Printing color must be comparable to color chip and sample.
9 Logo of panel 文字印刷不得有漏印.斷線.重影.組細不均.溢墨.印偏( 2mm)印斜 (歪斜 < 0.8
sticker mm).
Printing must not have incomplete printing, break off, overlap, uneven
thickness, excessive ink, printing misalignment (2mm), printing slanting &
crooked (<0.8mm)
文字印刷顏色須確認是否正確.
Printing color must be comparable to color chip and sample.
10 刮傷 Side A:
Scratch/Nicks (W < 0.2mm , L < 5mm): 容許 2 個
Only 1 this kind of scratch is accepted
W < 0.1mm , L < 5-10mm 容許 1 個
No this kind of scratch is accepted
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Side B:
W < 0.2mm , L < 5mm 容許 3 個
Only less than 2 this kind of scratch is accepted
W < 0.2mm , L < 5-10mm 容許 2 個
Only 1 this kind of scratch is accepted
Side C:
W < 0.3mm , L < 5mm 容許 4 個
Only 4 this kind of scratch is accepted
W < 0.3mm , L < 5-10mm 容許 3 個
Only 3 this kind of scratch is accepted
W < 0.3mm , L < 10-15mm 容許 2 個
Only 2 this kind of scratch is accepted
Note:
1.刮傷見底材者不允許
Severe scratch which disclose the Natural
2.輕微的檫傷,用指甲劃過不會有停頓感,並附近無明顯之光澤差異,則可以
接受。
When light scratching on it, there’s no feeling of obstruction. Also, there
should not be obvious difference in gloss nearby it.
3.刮擦傷兩兩需相距 5cm 以上
Each scratch should be 5cm more far away from each other
4.A 面前蓋不允許有任何刮傷
Front case must be no any scratch
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PART II Operational Inspection Criteria
TEST CONDITIONS
TEST EQUIPMENTS
Dark room
PC
Pattern Generator: Chroma 2327 or equivalent
Minolta color analyzer CL200 or equivalent device with accredited traceability
DVD player
Power supply (100~240 VAC) with consumption meter
Measuring tape
TEST PATTERN
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Chromaticity : Green: x =0.368 +/-0.04,
Impurity、CIE
Full Green y=0.545+/-0.04
coordinate
Performance/
General-1 (1)Phase should be stable(no flick)
Timing check/
pattern (2)Whole frame should appear.
function check
16 Gray
Gray and Color
and Color No lack or mix color
bar Check
bar
Check the DDC
information, S/N(08-09): with numbers
Including S/N, Model(108-125) with numbers(ref Appendix DDC
DDC check model, table)
manufacturer manufacturer name(08-09):5A63
name, product product ID code (10-11): 1FC7
code.
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PART III Inspection Criteria
Notes:
1. Projected blemish numbers include the count for the shadow of the artifact in addition to the
artifact itself, so that the count usually represents a single artifact on the window.
2. During all the above table tests, projected images shall be inspected in accordance with the
conditions of inspection specified in Appendix D’s Section 3(DMD Image Quality).
3. The rejection basis for all cosmetic DMD defects (scratches, nicks, particles) will be the
projected image tests referenced in the above table.
4. Devices that meet this image quality specification but are deemed undesirable by the
customer may not be returned to T1 without prior approval by T1.
5. Screen<Gray 10 shall not be used as a basis for rejecting a DMD for image quality.
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Gap Specification:
+0.2 mm
0.5mm − 0.3mm
+0.2 mm
0.5mm − 0.3mm
+0.5 mm
0 mm −0.5 mm
+0.2 mm
0.2mm −0.2 mm
+0.3 mm
0 mm −0.3 mm
+0.4 mm
0 mm −0 mm
+0.5 mm
0 mm −0.5 mm
+0.2 mm
Button is 0.2mm − 0.2 mm
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6.Gap between UC and Power
+0.2 mm
Key is 0.3mm − 0.2 mm
+0.2 mm
Lens is 0.2mm − 0.2 mm
7
Step between UC and LED
+0.3 mm
Lens is 0 mm −0.3 mm
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9.Gap between UC and LC is
15 14 10 +0.4 mm
0 mm −0 mm
Step between LC and FC is
+0.5 mm
0 mm −0.5 mm
10.Gap between UC and RC is
+0.3 mm
0.4 mm −0.3 mm
13 12 Step between UC and RC is
+0.3 mm
9 9 0 mm −0.3 mm
11.Gap between LC and RC is
16 +0.3 mm
0.4 mm −0 .3mm
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Step between LC and RC is
+0.3 mm
0 mm −0.3 mm
12.Gap between Video
Connector and RC is
+0.5 mm
1mm −0.5mm
13.Gap between D-sub
Connector and RC is
+0.5 mm
1.5mm −0.5 mm
14.Gap between Mini-USB and
+0.5 mm
RC is 0.5mm −0.5 mm
15.Gap between IR and RC is
+0.2 mm
0.2mm −0.2 mm
Step between IR and RC is
+0.3 mm
0 mm −0.3 mm
16.Gap between Power Socket
+0.5 mm
and RC is 0.5mm −0.5 mm
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17.Gap between LC and Lamp
+0.3 mm
18 18 Door is 0.3mm −0.3 mm
+0.5 mm
0 mm −0.5 mm
18 18
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4. Adjustment / Alignment Procedure
Content
1. EE Assembly and Alignment Concern
1.1 DMD Bias Voltage Alignment
1.2 Formatter board check procedure
1.3 DMD Panel Alignment
1.4 PC Alignment Procedure
1.5 YUV Alignment Procedure
2. OPT Assembly and Alignment Concern
2.1 Color Wheel Delay Alignment
2.2 sRGB Mode alignment procedure
2.3 Overfill adjustment
3. Optical Engine Assembly Concerns
4. Power Assembly Concern
5. MECHANICAL Assembly Concern
5.1 Grounding wire alignment
5.2 CW FPC, CW sensor wire and blower wire alignment
5.3 Between Ballast and lamp wire alignment
5.4 Ballast wire and ballast sensor wire alignment
5.5 Twin Fan wire assembly concern
5.6 Front IR wire assembly concern
5.7 EMI mylar grounding wire alignment
5.8 Main board shielding assemble concern
5.9 Ballast Wire alignment concern
5.10 IR Board holder assemble concern
5.11 Ass’y Main Board wire alignment
5.12 Power board shielding constrain concern
5.13 Front IR holder and Upper case assemble concern
5.14 Rear cover assemble process and concern
5.15 The screw assembly sequence of optical engine.
6. Thermal Burn in process concern
7. EMI Debug Solution Concern
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1. EE Assembly and Alignment Concern:
1.1 DMD Bias Voltage Alignment
Equipment:
- None
Procedure:
1. Watch DMD chip Label (Example: 9477000 0234B)
2. Switch the DIP switch on DMD board according to the red character on the DMD chip
BINSEL1 BINSEL0 DMD Bin Direction
0 0 B
0 1 C
1 0 D
H1
4 1
3 2 1 1 E
6240019001
3.
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1.3 DMD Panel Alignment
Equipment:
- Pattern Generator
Procedure:
1. Connect power, Video signal into projector.
2. Light on projector
3. Change pattern generator to full white pattern.
4. Watch the image if any pixel lost
5. Change pattern to full black.
6. Watch the image if any pixel lost
7. Change pattern from full black to full white.
8. Watch the image if any pixel can not return
9. Change pattern from full black to full white.
10. Watch the image if any pixel can not return
11. If above 8 step has some pixel lost or can not return, it’s DMD chip has pixel defect
12. Change to the Slid Line pattern
13. Watch the image if any pixel lost
14. If above step has some pixel lost, it’s conductive socket has defect or assembly loosed.
Procedure:
Gray Level:
1. Connect power, D-sub, into projector.
2. Change Timing and pattern of pattern generator:
3. Timing: 800*600@60 for PE5120
4. Pattern: As Figure1 {A near white color (240,240,240) and a near black color(16,16,16), the
area of white is 101/200, black is 99/200}
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5. Light on projector
6. Set user OSD values to default.
7. Enter factory mode.
8. Set Factory values to default.
9. Press “Calibration RGB” to let the black level to just distinguish, and the light output of white
level to just max.
10. Check the 32 levels of gray. All steps must appear.
Figure1
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1.5 YUV Alignment Procedure
Equipment:
- Pattern generator (VG-828)
OSD Default value:
Item Value
Cal R Offset 127
Cal G Offset 127
Cal B Offset 127
Cal R Gain 127
Cal G Gain 127
Cal B Gain 127
YPbPr R Offset 122
YPbPr B Offset 122
Procedure:
1. Connect power,YpbPr cable, into projector.
2. Change Timing and pattern of pattern generator:
Timing: 480i
Pattern: As Figure2
3. Light on projector
4. Adjust user OSD values to default.
5. Enter factory mode.
6. Adjust Factory values to default.
7. Press “Calibration YpbPr” to calibrate the mid level offset.
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Figure2
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2. OPT Assembly and Alignment Concern:
2.1 Color Wheel Delay Alignment
Equipment: - Battery Biased Silicon PIN Detector
- Oscilloscope (Vertical scale set to 10mV)
- Probe
Procedure:
1. Probe impedance matches 50 ohm
2. Open Factory OSD, and select color wheel delay item
3. Leave the image pure blue (DMD blue curtain)
4. Put the detector on the screen that blue image was projected.
5. Watch the oscilloscope and notice the square waveform
6. Use the “Æ” and “Å” key to increment or decrement the color wheel delay value
7. No matter the waveform is square or not, let the waveform was lagged first.(see picture 1)
8. Then increment or decrement the value to let the waveform just to be square.(see picture 2)
9. Change to green curtain and check waveform again. If waveform is square (see picture 3), CW delay
value is ok. If waveform is a little lag, then adjust CW value to let waveform square.
Lag OK
Picture 1 Picture 2
Picture 1
OK
OK
Picture 3
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2.2 sRGB Mode alignment procedure
If ‘NO’
If ‘Yes’
OK
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2.3 Overfill adjustment
As the picture below, adjust light pipe to keep overfill image center.
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3. Optical Engine Assembly Concerns
1. Assembly Lamp module:
1.1 BKT Baffle , Baffle Lamp , Fin and Mesh Assembly
I. Assemble BKT Baffle with Lamp holder (Figure 1-1) 。
II. Assemble “Baffle lamp” with Lamp holder and alight screw holes with holder first.
(Figure 1-2)。
III. Assemble “assembly of Fin_Mesh” on Baffle first and fasten the screw (Figure 1-3)。
IV. Hook “Mesh” on the Lamp Holder first and fasten the screw (Figure 1-4)。
V. To make sure that “Assembly of Fin_Mesh” on the right side when you face to the Baffle
(Figure 1-5)。
BKT Baffle
Lamp Holder
M2*4L screw
Figure 1-1
Baffle Lamp M2*4L screw
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Face direction
screw
Assembly of Fin_Mesh
F/G datum
Figure 1-7
Figure 1-6
Figure 1-8
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1.3 Lamp Assembly.
i. Insert Lamp into Lamp Holder and make three datum contact with the lamp (Figure
1-8)
ii. Hook “Clip_DOWN” on the Lamp Holder first. (Figure 1-9)
iii. Hook “Clip_LAMP_UP” on the Lamp Holder second. (Figure 1-10)
iv. Check assembly again and make sure the three datum contact with the lamp.
v. Assemble Lamp Wire to Lamp
vi. Assemble “clip plate” on the Lamp plate and fasten the screw(Figure 1-11)
vii. Assemble “Handle Lamp” on Lamp plate and assemble “Lamp_Plate” on the Holder
and fasten the screw (Figure 1-12)
UPPER Datum
CLIP DOWN
RIGHT Datum
Figure1-8 Figure1-9
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PLATE
CLIP LAMP UP
Figure1-10 Figure1-11
M2.5 SCREW
Handle Lamp
Figure1-11
1.4 Lamp Wire Arrangement
The Lamp Wire arrangement have to look like the picture as blow.
I. The upper wire fix along the plate. (Figure 1-12)
II. The under wire have to detour the wall of Lamp_Plate.(Figure 1-13)
III. The side wire fix along the plate and have to detour the back wall.(Figure 1-14)
IV. Be sure link up “connecter wire” with “Lamp” correctly (Figure 1-15).
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Upper wire
plate
Wall
Under wire
Figure1-12 Figure1-13
Back wall
Figure1-14
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Figure1-15
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2. BKT LINK Lamp and CW Shield Assembly
Insert CW Shield to BKT LINK Lamp and fasten screw (Figure 2-1,2-2)
Insert
1
5 3
4
2
Fig3-1
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Fig3-2
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4. Assembly LP Module
4.1 LP must datum well with “BKT_LP” show as Figure 4-1
4.2 Referring to Figure 4-2,there must be visible clearance between “BKT_LP” and ”LP
opening” after assembly。
TOP Datum
Clearance
RIGHT Datum
Figure 4-1 Figure 4-2
4.3 Glue “LP” and “BKT_LP” with “”UV5503 Glue” at two opening of “BKT_LP” show in Figure
4-3。
Glue 5503
Figure 4-3
4.5 Assembly LP Module to HSG DMD
i. Assembly two Overfill adjustment screw (8F.1A752.8R0) to HSG DMD( Figure4-4)。
** Adjustment criteria refer to item 4.6.
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ii. Insert CLIP of BKT_LP into the hole
iii. Placed LP Module on LP datum and adjustment screw well, shown ( Figure 4-6)。
iv. Assembly “Baffle LP” first ( Figure 4-7)and make sure it hooks HSG DMD well
~ Assembly Criteria was shown in Figure 4-7-2.
v. Assembly “Clip_LP” second ( Figure 4-8)and make sure it hooks HSG DMD well。
( Figure 4-9)。
vi. Push two hook places to make sure that Baffle_LP touches “BKT_LP “well, don’t push
the middle place of “Baffle_LP”。
CLIP of BKT LP
(1) Overfill Horizontal
Figure 4-4 Adjustment Screw Figure 4-5
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Overfill adjustment screw
LP DATUM
Figure 4-6
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CLIP of Baffle_LP
Clip LP
Figure 4-8
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Figure 4-9
Figure 4-10
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5. Assembly HSG ILL Module
5.1 FM1 Assembly
I. FM1 must be placed on datum surfaces well and breach of FM1 must be face to
inside( Fig 5-1)。
II. Insert the” CLIP of FM1” into the hole on the HSG ILL and make sure ” CLIP of FM1”
hook on the HSG ILL well ( Fig 5-2)。
5.2 CM Assembly
III. Assemble CM to HSG ILL and to make CM contact three datums on the HSG ILL
well( Fig 5-3)。
IV. Assemble “CLIP of CM” to the HSG ILL ( Fig 5-4)。
V. To check and make sure “ CLIP of CM” hook the HSG ILL very Well ( Fig 5-5)。
Breach of FM1
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Fig 5-5
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6. AL , HSG ILL and HSG DMD Assembly:
6.1 Placed “AL” on the HSG DMD .The “raised surface” of “AL” shall toward “DMD direction”
(Fig 6-1)
6.2 Assemble ” HSG ILL Module” to HSG DMD and cover over on “AL”(Fig 6-2)
DMD Direction
AL
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7. HSINK & DMD SOCKET Assembly
7.1.Assemly Baffle_DMD:
I. There are two breach on the Baffle_DMD. One is “circle” and the other is “Long hole”
(Fig 7-1)
II. The circle of Baffle_DMD have to match with the circle on HSG DMD and the Long hole
is the same(Fig 7-2)
Circle
Long hole
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7.2 As shown in Figure 6-3:
i. Pre-fastening Sequence: [ 1 ] - [ 2 ] - [ 3 ] - [ 4 ]
ii. Fastening Sequence [ 2 ] - [ 1 ] - [ 4 ] - [ 3 ]
iii. Screw Torque must be confirmed to be 6 kg-cm.
1
3
2
4
Figure 7-3
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8. PL Module Assembly
8.1 Assemble PL to HSG DMD and fasten screw to fix PL first (Fig 8-1)。
8.2 Assemble “Ring Focus” second (Fig 8-2)。
Ring Focus
Screw *3
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9. OPTICAL ENGINE Assembly
I. Assemble CW Module to HSG DMD (Figure9-1 ,9-2)
II. Assemble BKT Link Lamp, Shield CW to HSG DMD and fasten the screw
(Figure9-3 ,9-4)
III. Assemble Lamp Module to HSG DMD (Figure9-5 ,9-6)
CW Module
Figure9-3 , Figure9-4 ,
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Lamp Module
Figure9-5
Figure9-6
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4. Power Assembly Concern
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c. CY604, CY605 add GP glue.
Figure1. Wrong
Figure2. Correct
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e. Figure 3. and Figure 4. are the locations of adding Bead cores.
Figure3.
Figure4.
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f. R651 can’t touch IC651.
Fugure5. OK!
Figure6. Wrong!
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5. MECHANICAL Assembly Concern
Mechanical assembly
Contents:
1. Grounding wire alignment.
2. CW FPC, CW sensor wire and blower wire alignment.
3. Between Ballast and lamp wire alignment.
4. Ballast wire and ballast sensor wire alignment.
5. Twin fans wire assembly concern.
6. Front IR wire assembly concern.
7. EMI mylar grounding wire alignment.
8. Main board shielding assembly concern.
9. Ballast Wire alignment concern.
10. IR board assembly concern.
11. Ass’y Main Board wire alignment.
12. Power board shielding constrains concern.
13. Side covers and upper case assembly concern.
14. Rear cover assemble process and concern
15. The screw assembly sequence of optical engine.
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2. CW FPC, CW sensor wire and blower wire alignment
CW FPC wire is constrained by Wire-saddle clip, see figure 2-1. CW FPC wire has to be crossed
above blower wire and keep the redundant wire above lamp box.
Lamp box
Wire-saddle clip
CW FPC wire
CW sensor wire
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3. Between Ballast and lamp wire alignment
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4. Ballast power wire and ballast sensor wire alignment
Ballast sensor
wire must into
this fillister
NOTE: Please check ballast wire is connected to power board indeed before assembling
Power BD.
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5. Twin Fan wire assembly concern
After assembling power BD shielding, connect fan connector to Main board before put Fan body
in Lower case.
Do not plug in or
pull out the fan
Fan wire must keep connector by
this location. Don’t holding the wire.
put wire on top of Do not pinch the
the fan. wire together
when assembling
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6. Front IR wire assembly concern
Make sure IR wire is aligned from front cover to main board.
Step 1 Step 2
Connector plug in
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7. EMI mylar grounding wire alignment
EMI mylar
grounding screw EMI mylar
wire must go grounding screw
through this constrain location
opening of power
shielding
Figure 7-2. EMI mylar grounding wire Figure 7-3. EMI mylar grounding wire
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8. Main board shielding assemble concern
Main board shielding insert to the gap between Power board shielding and Lamp box.
Main BD shielding
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9. Ballast Wire alignment concern
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10. IR board assemble concern
IR board assemble sequence is step (1) and step (2), Figure 9-1. IR Board assembly sequence
Step 2 Step 1
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11. Ass’y Main Board wire alignment.
CW wire
Blower Wire
CW sensor wire
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12. Power board shielding constrain concern
First screw
constrain location
Second screw
constrain location
Power board
shielding 3D.01205.
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Be put hole into lower case boss and fix.
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13. Front IR holder and Upper case assemble concern
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14. Rear cover assemble process and concern
Step 1
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Step 3
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Step 4
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6. Thermal Burn in process concern
Content:
Area A Area A
Area A
10cm
Area B Area B
Area B
Area B Area B
Area B
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If the space is not enough, the following placements are accepted too.
Area A
Area A
10cm
Area B
Area B
Notice: Not enough cooling time will lead to 2 circumstances that are hot-restrike fail and lamp
damage.
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7. EMI Debug Solution Concern
z All contact fact with conduct fabric isn’t any paint or non-conduct article
z All contact fact with conduct fabric isn’t any paint or non-conduct article
4G.J0C38.001 – 10*5*30 mm
4G.J0C25.001 – 5*5.5*60 mm
4G.J1B12.001 – 10*3.5*58 mm
180 MHz,720MHz Add spring between lamp case and color
wheel model
3D.01214.001
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2 180 MHz,240MHz,300MHz Add two springs between case and H-sink
4G.J1B17.001 – 5*5.5*10 mm
Add 1 fabric
4G.J1B18.001 – 40*20 mm
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300MHz Add 1 gasket
4G.J1A20.001 – 8*2*60 mm
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Disassembly/Assembly
1
3
disassembly
the screw*4, upper case
2 and take off the module;
upper case screw*4
module
2 4
disassembly
the screw*2,
3 rear case
and take off the 2 1
rear case
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double fan
disassembly
4 double fan label must
the double fan
be face out
1
5
disassembly
screw*5;
the screw*5, 2
5 M/B
and take off the
shielding
M/B shielding
3
4
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take off the
C/W FPC wire,
blower fan wire,
6 C/W sensor
wire, ballast
wire, IR sensor
wire
IR
M/B
7 take off the M/B
spring-RCA
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disassembly
the screw*2,
and take off the
1
lamp door, 2 screw*3;
8 disassembly lamp door;
the screw*1 lamp module
and lamp wire,
take off the
lamp module.
disassembly
the screw*5,
disassembly
screw*6;
the grounding
9 power BD
screw*1 and
shielding
take off the
Power B/D
shielding
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disassembly
the wire*2
screw*2;
and screw*2,
10 power BD;
take off the
ballast mylar
power BD and
ballast Mylar
disassembly 2
the screw*2,
take off the
screw*4;
lamp box;
11 lamp box;
disassembly
blower fan
the screw*2,
take off the 2
blower fan
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3 1
disassembly
the screw*3, screw*3;
12
take off the OPT eng
2
OPT eng.
disassembly
screw*5;
the screw*5
14 ballast BD
and the ballast
Wire*2
BD, wire*2
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adjust
foot
disassembly
the
screw*1,take
screw*2;
off the CW
CW
16 shielding,
shielding;
disassembly
CW module
the screw*1
and take off the
CW module CW MODULE
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focus ring
Remove
focus ring
17 FOCUS ring
sponge
and sponge
3 1
disassembly
the screw*3, screw*3;
18
take off the Zoom ass'y
Zoom ass'y 2
2 4
1
3
disassembly
the screw*4, screw*4;
and take off Hsink;
Hsink, FABRIC, Chip BD;
19
then take off DMD IC
the Chip BD, DMD holder
take off the IC FABRIC
DMD
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upper clip
front clip
disassembly
the front clip
clip*2;
20 and upper clip,
LP module
then take off
the LP module
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Level 2 Circuit Board and Standard Parts Replacement
Overview
The Projector consists of the DLP projector controller, Lamp controller, Power supply system,
and the system cooling controller. The DLP controller captures the digital PC data and video
data and converts them into the DMD display device. The lamp controller controls the lamp’s
power and synchronizes its frequency with color display sequence. Power supply unit
controls the AC line power factor and converts primary voltage to secondary low voltage for
digital board. The system cooling controller drives the airflow to cool the lamp’s heat and
electrical component’s heat.
Hardware Architecture
The Projector consists of the Source board, Main board, Keypad board, Fan board, EMI
board, PFC board, Ballast board, Door interlock switch, Color wheel index sensor board,
and the Thermal break sensor board. Please see Figure 1.
Source Board consists of audio phone jack, video RCA jack, S-video mini-DIN head, and
USB head. Main Board consists of RGB A/D conversion, Video decoder, DLP ASIC, Flash
and RAM, Motor driver, DMD Reset driver DAD1000, and IR receiver. Keypad Board consists
of 8 keypads and 3 twice-color LEDs. Fan Board consists of DC/DC converter, Thermal Break
circuit, Blower Fan driver circuit, Rear Fan driver circuit, and the temperature sensing circuit.
Power supply circuit consists of AC line EMI filter, Power Factor Correction circuit. Ballast
Board consists of Lamp synchronization circuit, Lamp lit feedback circuit, and Lamp power
control circuit.
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5. Block Diagram
Hardware Architecture
Input Ballast
Source CW Module
Circuit Index
sensor
Figure 1
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6. Troubleshooting
Yes
1. Check Main BD to Ballast signal wire.
No
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A
No
No
No
Yes
Image NG? 1. Check Main board
(Screen Dim-mish) 2. Check DMD Chip board
No
1. Check color wheel
Yes
Image NG? 2. Check sensor board color index signal
(Freezing) 3. Check main board
No
1. Check DMD Chip holder
Yes
Image NG? 2. Check DMD Chip board
(Missing column bar) 3. Check Main board
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2. Error Message
O - - Stand-by
G - - Powering up
G - - Normal operation
- R R Fan 2 error (the actual fan speed is ±20% outside the desired speed.) Ballast Fan
- R G Fan 3 error (the actual fan speed is ±20% outside the desired speed.) Blower Fan
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3. Power Trouble Shooting Guide
Power BD Check.
Yes
Proceed to "Primary
Circuit Check".
Prepare Meter.
No 12V or 5V or
2.5V Output.
Yes
Yes Yes
Replace new
solder them.
TOPSwitch
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Check primary
circuit.
Proceed to "Check
Fuse Broken ? No
IC651".
Yes
Yes Yes
Inside diodes of
PinD & PinS of Q651
D6551~D6554 are
are shorted. Replace
shorted. Replace new
new MOSFET.
bridge diode.
Check IC651.
Yes
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5. Optical & Optical Engine Trouble Shooting Guide
5-1 Optical Trouble Shooting Guide
No. Item Trouble Shooting Guide
1 Brightness 1. Change lamp
2 Uniformity 1. Change lamp
1. Check ADC calibration
2. Check user’s menu brightness & contrast are default
3 FOFO Contrast 3. Clean DMD
4. Clean PL
5. Check ILL stop assy
1. Clean PL
4 ANSI Contrast 2. Clean DMD
3. Change PL
1. Check color wheel delay
5 Color
2. Check CW 50% point. Replace CW if necessary
6 Color Uniformity 1. Change lamp
1. Refer to Item#2-1 (attached below)
7 Blue Edge 2. Change CM
3. Change SUB HSG
1. Refer to Item#2-1(attached below)
8 Blue/Purple Border 2. Change CM
3. Change SUB HSG
1. Change Projection Lens
9 Focus
2. Check PL datum and DMD parallel
10 Dust Clean DMD
1. Check connector between ChipBD and MainBD
2. Re-install DMD with ChipBD
Horizontal/Vertical
11 3. Check if any pin of C-Spring is missing, damaged or dirty
Strips
4. Change new ChipBD/C-Spring
5. Change new DMD
12 Pixel Fail Change new DMD
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5-2 Engine Assembly Trouble Shooting Guide
S ta rt
1 .c h k C W
2 .c h k D M D C h ip /b
P ower O n NG
3 .c h k M a in /b
OK
Im a g e Q u a lity NG D ust 1 .c le a n D M D c h ip
Yes
2 .c le a n C /M
No
1 .c h k le n s h o u s in g / D M D
B lu e E d g e h o u s in g A s s e m b ly
2 .c h k lig h t p ip e a s s e m b ly
Yes
3 .c h k C /M a s s e m b ly
No 4 ,c h a n g e lig h t p ip e c lip
5 .c h a n g e lig h t p ip e
Focus N G Yes
OK
No c h a n g e p ro je c tio n
le n s
P ix e l F a ilu re 1 .c h a n g e D M D
Y es 2 .c h a n g e D M D /b
3 .c le a n e la s to m e r
S y s te m No
EE T ro u b le
NG
P e rfo rm a n c e s h o o tin g
G u id e Or check DMD chip socket
lig h t le a k a g e Y es 1 .c h k D M D b a ffle
OK 2 .c h k C /M
O p tic a l
NG B rig h tn e s s Y es
P e rfo rm a n c e
1 .R e s e t F a c to ry m o d e , c h k D C o ffs e t/G a in s e tu p
2 .c h k D M D c h ip /b
No 3 .c le a n p ro je c tio n le n s
4 .c le a n C /M
5 .c le a n o p tic a l p a rts
U n ifo rm ity
1 .c h k C /M
Y es
2 .c h k p ro je c tio n le n s
No
1 .R e s e t F a c to ry m o d e , c h k D C o ffs e t/G a in s e tu p
Y es 2 .c h k D M D b a ffle
C o n tra s t 3 .c h a n g e p ro je c tio n le n s
No 1 .R e s e t F a c to ry m o d e , c h k C W d e la y
Y es 2 .c h a n g e C W
3 .c h a n g e p ro je c tio n le n s
C o lo r
1 .c h k C /M
No 2 .c h k D M D
C o lo r
Yes
U n ifo rm ity
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5-3 “Blue Edge” Trouble Shooting:
I. Re-adjust “Overfill” first.
For Overfill Re-adjustment:
i. Those 2 Adjustment Screws must be released for around 2 mm first.
ii. Alignment Sequence:
c. To adjust “Horizontal Adjustment Screw” firstly, then “Vertical Adjustment Screw”.
d. Refer to Figure 2-1..
Fig. 2-1
II. Re-assemble LP module—include LP, LP Baffle, LP clip.
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7. Schematic Diagrams
P3P3V P3P3V
SDA
SDA SDA
01_INPUT1 SCL SCL GCLK
SCL GCLK GHS GCLK
H SYNC GHS GVS GHS
HSYNC VSYNC HSYNC GVS SOG GVS
VSYNC VSYNC SOG GCOAST SOG
PC-RIN GCOAST GBLKSPL GCOAST
PC-RIN PC-GIN PC-RIN GBLKSPL GRE[7:0] GBLKSPL
PC-GIN PC-BIN PC-GIN GRE[7:0] GRE[7:0]
PC-BIN PC-BIN GGE[7:0]
GGE[7:0] GGE[7:0]
GBE[7:0]
DDCP5V DDCP5V GBE[7:0] GBE[7:0]
P5V P5V HSYNC _I
V33
GND HSYNC_I VSYNC_I HSYNC_I DCLK DCLK
04_ADC VSYNC_I VSYNC_I DCLK DCLK
P5V P5V
DD_A[63:0] DD_A[63:0]
DD_A[63:0] DD_A[63:0]
V33
DDCP5V DDCP5V OPEN: C29 SCTRL SCTRL
VY[7:0] SCTRL SCTRL
VY[7:0] VY[7:0] SACBUS SACBUS
V33
VUV[7:0] SACBUS SACBUS
VUV[7:0] VUV[7:0] SACCLK SACCLK
VHS SACCLK TRC TRC SACCLK
VHS VVS VHS TRC TRC
VVS VVS DMD_SERIN DMD_SERIN
EXT_ARSTZ VFILD DMD_SERIN LOADB_Z LOADB_Z DMD_SERIN
EXT_ARSTZ EXT_ARSTZ VFILD VFILD LOADB_Z LOADB_Z
SDA VPEN
SDA SDA VPEN VPEN
SCL VCLK
SCL SCL VCLK VCLK
08_RAMBUS
CHROMA
CHROMA LUMA CHROMA GND
LUMA LUMA RD_CMD
RD_CMD RD_CMD P1P5V P1P5V
CVBS SDA RD_SCK
CVBS CVBS SDA SDA RD_SCK RD_SCK
SCL SCL RD_SIO P3P3V
SCL RD_SIO RD_SIO P3P3V
VTERM VTERM VREF_ASIC P2P5V
VREF_ASIC VREF_ASIC P2P5V
P5V P5V VTERM VTERM
VTERM VTERM VTERM
GND P1P5V P1P5V CTM
03_DECODER 07_DDP2000 CTM CTMN CTM
P3P3V P3P3V CTMN CTMN
CFM
CFM CFMN CFM
09_ARM_CONTROL CFMN CFMN
USB_D+ USB_D+
USB_D+ USB_D- USB_D- USB_D+ DQA[7:0]
USB_D- USB_D- DQA[7:0] DQA[7:0]
GND PUM_ARSTZ DQB[7:0]
P3P3V P3P3V PUM_ARSTZ PUM_ARSTZ DQB[7:0] DQB[7:0]
01_INPUT1 RQ[7:0]
02_INPUT2 P5V P5V RQ[7:0] RQ[7:0]
P5VS P5VS
P2P5V P2P5V OCLKA
GND GND OCLKA
PWM_AUDIO1 06_MEMORY
PWM_AUDIO2 08_RAMBUS
AUDIO_MUT
AUDIO_VOL
UART1_RXD UART1_RXD SSP0_CS0 SSP0_CS0 OCLKA
UART1_RXD UART1_RXD SSP0_CS0 SSP0_CLK SSP0_CLK SSP0_CS0 OCLKA
UART1_TXD UART1_TXD SSP0_CLK SSP0_DO SSP0_DO SSP0_CLK
UART1_TXD UART1_TXD SSP0_DO SSP0_DO P12V P12V
ViewSonic Corporation
P12V DAD_INT DAD_INT
P12V FAN_SW DAD_INT SR16STRB SR16STRB DAD_INT
P3P3V P3P3V FAN_SW FAN_SW SR16STRB SR16STRB
P5V SR16MODE1 SR16MODE1
P5V SR16MODE1 SR16MODE0 SR16MODE0 SR16MODE1
SR16MODE0 SR16MODE0
GND GND GND Model
13_FAN 11_DAD1000
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P5V
TP1
DN8 BAV99
P5V J1
G1
P5V K A
K
DN1 DN2 2B14016001
K
DN5 3 TP3
G1
J
G4 L2 Z42
J J
J 1 CHROMA CHROMA
BAV99 D901 LL4148 Y
BAV99 BAV99 K A
A
G2
A
G2 TP2
K A
D1 D902 LL4148 L1 Z42
TP4
G1
K A 2 LUMA LUMA
TP6 C
J2
RED-GND LL4148
G3
6 G5 4
J
TP8 11 1 PC-RIN-B TP9 LC1 Z80 PC-RIN PC-RIN
7 GREEN-GND P5V K A
G3
TP11 12 2 PC-GIN-B TP12 LC2 Z80 PC-GIN
TP13 PC-GIN
8 BLUE-GND DN6 BAV99
TP14 13 3 PC-BIN-B LC3 Z80 PC-BIN PC-BIN
9 PC-5VIN A K
TP16 14 4 D2 LL4148
10 A K DDCP5V
P5V D3 LL4148 DDCP5V
15 5 DDCP5V
2K20072A15 VSYNC VSYNC
H SYNC HSYNC
G2
GSDA TP23
GSDA
GSCL COMPOSIT1 L9 Z42 CVBS CVBS
GSCL
K
J
D6 D7 D8 D4 D5 DN9 BAV99
U1
2
DDCP5V P5V K A
1 8 CA1
2
A0 VCC R4
TZMC6V2
TZMC6V2
TZMC6V2
TZMC6V2
TZMC6V2
2 7 0.1U K 4.7K J
A
A1 WP R3
GND 2B10190031
3 6 4.7K J
A2 SCL GSCL J4
1
4 5 TP22
1
GND SDA GSDA
AT24C02N-10SU-1.8
G1
J3 TP19TP20
CASE
VCC USB-D-A RA13 0 J USB_D-
DATA- 2 USB_D-
3 USB-D+A RA14 0 J USB_D+
DATA+ USB_D+
GND 4
CASE
5
K
GND D11 D9
TZMC6V2
TZMC6V2
2BC0010031
G2
TP21
A
USB input
ViewSonic Corporation
Model
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P3P3V
P3P3V
1
UC1 + CR31
CR1 C1_B 1 16 10U 20V
0.1U K C1+ VCC
V+ 2 15
2
C1_A V+ GND TX.DL
3 C1- T1OUT 14 TX.DL
CR2 C2_B 4 13 RX.DL
C2+ R1IN RX.DL
C2_A 0.1U K 5 12
C2- R1OUT UART1_RXD
232V- 232V- 6 11
V- T1IN UART1_TXD
7 T2OUT T2IN 10
R2 IN 8 9
R2IN R2OUT
CR3 CR4 CR5 ICL3232ECBNZ
0.1U K 0.1U K 0.1U K
TP308
TP309
V+
DN56 DN57
K
8 J J
6
JC4
BAV99 BAV99
8
A
G2 G2 G1 G1
G3 G3 232V-
5 3 RX.DL
5 3 RX.DL
2
2B14015001 TP310
2
CC21 CC22
100P K 100P K
ViewSonic Corporation
GND
Model
96
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
V33 V33_A VTERM P1P8A
P5V U3 G960T63UF V33 L78 Z42 L77 Z42
VTERM
1
C27 C24
3 2 + C26 +
P5V VIN VOUT V33 C571 C553 C552 C551 C31 C21 C560 C572 C573 C28 C25 C16
GND
1
4 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 22U 16V M 0.1U K 0.1U K 0.1U K 0.1U K 22U 16V M 0.1U K 0.22U K
2
C30 OUT + C20
C631 22U 16V M
1
0.1U K 0.1U K P1P8A V33_A
2
V33 P1P8A
79
10
24
78
11
25
26
39
49
62
38
48
61
4
5
3
6
0.1U K 0.1U K 0.1U K 0.1U K 0.1U K
IOGND39
IOGND49
IOGND62
IOVDD38
IOVDD48
IOVDD61
CH1_A18GND
CH2_A18GND
A18GND
CH1_A18VDD
CH2_A18VDD
A18VDD
CH1_A33VDD
CH2_A33VDD
CH1_A33GND
CH2_A33GND
AGND
54 VY[7:0]
Y0 VY[7:0]
Y1 53
C575 0.1U K Cb_I_A 80 52 V Y0
CHROMA_I C511 0.1U K CHROMA_A VI_1_A Y2 V Y1
CHROMA_I 1 VI_1_B Y3 51
0.1U K 2 50 V Y2
C516 VI_1_C Y4 V Y3
Y5 47
C512 0.1U K Y_I_A 7 46 V Y4
LUMA_I C513 0.1U K LUMA_A VI_2_A Y6 V Y5
LUMA_I 8 VI_2_B Y7 45
0.1U K 9 44 V Y6
C517 VI_2_C Y8 V Y7
Y9 43
C514 0.1U K Cr_I_A 16
0.1U K VI_3_A R11 4.7K J VUV[7:0]
17 VI_3_B C_0/GPIO0 70 VUV[7:0]
0.1U K C518 18 69 R570 4.7K J
C519 VI_3_C TVP5147PFP C_1/GPIO1 VUV0
C_2/GPIO2 66
CVBS_I C515 0.1U K CVBS_A 23 65 VUV1
CVBS_I VI_4_A C_3/GPIO3
64 VUV2
SCL C_4/GPIO4 VUV3
SCL 28 SCL C_5/GPIO5 63
SDA 29 60 VUV4
SDA SDA C_6/GPIO6
59 VUV5
C_7/GPIO7 VUV6
33 PWDN C_8/GPIO8 58
EXT_ARSTZ EXT_ARSTZ R602 10K J 34 57 VUV7
RESETB C_9/GPIO9 C29
35 GPIO
VPEN 36 40 VCLK_A R12 47 J VCLK 10P J
VPEN AVID/GPIO DATACLK VCLK
37 GLCO/I2CA INTREQ 30
VFILD 71 14 P1P8A
VFILD FID/GPIO NC14
VHS 72 15
VHS HS/CS/GPIO NC15
VVS 73 19
VVS VS/VBLK/GPIO NC19
C22 20 V33
A18GND_REF
A18VDD_REF
NC20
PLL_A18GND
PLL_A18VDD
R606 R605 R603 R604 10P J 21
Y1 NC21
74 XTAL1 NC22 22
DGND27
DGND32
DGND42
DGND56
DGND68
DVDD41
DVDD55
DVDD67
DVDD31
RB991 75
100K XTAL2
2.2K 4.7K J10K J 2.2K 14.31818MHZ
C23
GND
10P J
77
76
12
13
41
55
67
31
27
32
42
56
68
P1P8A VTERM
C8 5.6P C
C3 5.6P C C4 5.6P C
ViewSonic Corporation
Model
97
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
P5V
DDCP5V
VSYNC_I
R27 C73
5
4.7K J U8 0.1U K
VSYNC R28 47 J 2 4
VSYNC
R29 470
CV1 R30
470P K 1K J
3
1
74AHCT1G14GV
DDCP5V P5V
DDCP5V
HSYNC_I
R21 C71 AVDD
5
4.7K J U7 0.1U K GVMID
VSYNC_I
H SYNC R22 47 J 2 4 HSYNC _I AVDD V33
HSYNC
R23 470 GCOAST C58
CH1 GCOAST
R24 GBLKSPL 0.1U K
150P J GBLKSPL
1K J
3
1
74AHCT1G14GV PVDD PVDD
UA8
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
AD9883AKSTZ-140
CLAMP
MIDSCV
FILT
COAST
GND
VD
GND
PVD
PVD
GND
VSYNC
HSYNC
GND
VD
VD
GND
GND
VDD
VDD
GND
GBE[7:0]
GBE[7:0]
41 GND GND 20
10P J C68 AVDD AVDD 42 19 GB0 GBE0
PC-BIN R15 47 J GBIN_A C65 0.047U K GBIN VD B0 GB1 GBE1
PC-BIN 43 BAIN B1 18
44 17 GB2 GBE2
GND B2 GB3 GBE3
45 VD B3 16
AVDD 46 15 GB4 GBE4
AVDD VD B4
47 14 GB5 GBE5
PC-GIN R16 47 J GGIN_A CA66 0.047U K GGIN GND B5 GB6 GBE6
PC-GIN 48 GAIN B6 13
10P J C67 C63 1000P K 49 12 GB7 GBE7
SOGIN SOGIN B7 GGE[7:0]
50V 50 11
GND VDD V33 GGE[7:0]
51 VD GND 10
AVDD AVDD 52 9 GG0 GGE0
VD G0 GG1 GGE1
53 GND G1 8
PC-RIN R17 47 J GRIN_A C62 0.047U K GRIN 54 7 GG2 GGE2
PC-RIN RAIN G2
10P J C66 55 6 GG3 GGE3
SCL A0 G3 GG4 GGE4
SCL 56 SCL G4 5
SDA 57 4 GG5 GGE5
SDA SDA G5
GVREF 58 3 GG6 GGE6
AVDD AVDD REF BYPASS G6 GG7 GGE7
59 2
SOGOUT
VD G7
DATACK
HSOUT
60 1
VSOUT
R18 R19 R20 GND GND
GND
GND
GND
GND
VDD
VDD
VDD
VD
R7
R6
R5
R4
R3
R2
R1
R0
C70
75 J 75 J 75 J 0.1U K
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
AVDD AVDD GRE[7:0]
GRE[7:0]
V33 V33 GR0 GRE0
GR1 GRE1
GR2 GRE2
GR3 GRE3
GR4 GRE4
GR5 GRE5
GR6 GRE6
GR7 GRE7
R13
SOGIN
PC-GIN SOGIN GCL_K R912 47 J GCLK
GCLK
1.5K GFB_K R913 47 J GHS
C60 GHS
GH_S R914 47 J SOG
10P J SOG
GV_V R915 47 J GVS
GVS
C929
10P J
V33
P5V U5 AVDD P5V U4 PVDD
3 2 AVDD 3 2 PVDD
VIN VOUT P5V VIN VOUT 3 V33
GND
GND
ViewSonic Corporation
OUT 4 OUT 4
1
C47 C48 C49 C50 C51 C52 CA52 C501 C109 C111 C32 C42 C43 C37 C34 C35 C36 C38 C39
C40 G960T63UF C41 + G960T63UF C33 +
1
0.1U K 0.1U K 0.1U K 0.1U K 0.1U K0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K
22U 16V M 22U 16V M
Model
2
GND
98
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
J5 TP26
TP877
TP771 P2P5V
P12V 1 2
FAN2_B
P12V 3 4 L20 Z80 P2P5V
P12V P2P5V
5 6 L21 Z80 P5VS U10 P3P3V
7 8 P5V_I
1
TP798 9 10 L22 Z80 3 2
VIN VOUT P3P3V
11 12 L905 Z80 C991 +
GND
R916 0J 13 14 TP331 4
PWR_DOWN OUT
1
C84 C74 C75
1
C993 + C992 + C994 100U 6.3V M 0.1U Z +
1
1
1
TP878 100U 10V + C81 0.1U K
C902 + + C901 2K71071207 0.1U Z G960T63UF 22U 16V M
2
22U 25V 4.7U 25V M 4.7U 25V M
2
<Spec> 4.7U 25V M
2
2 GND
OPEN
R207 NC
ADJ
VIN
R38 RA56
VO
EN
10K J 10K J
G962-18ADJTJUF R39
1
2
3
4
5
1
P2P5V P1P5V 2K J
C
R205
R31 0.47 D12
2 B
1 Q3 PWR_DOWN B Q15
P1P5V
1
E
R33 0.47 R34 47U 10V 2K J
1
3K F R40
2
22U 16V M
2
R36
12K
P5VS
P5VS
R41 10K J P5V R5
J7 TP29 10K J
G1 TP30
G1 TP31
1 1
L23 Z120 2 L24
J8 TP32 2 P3P3V
3 3
G2 TP33 G2 Z120
G2 TP35 R42 100 G2
5 5 LAMP_RXD
4 TP36 2KL2021003
4 R43 270 J
3 3 U13 U12
5
2 TP37
2 TSOP4838 I R1
1 1 LAMPLIT 1
G1 G1 4 IRRCVR
2
2KL2021005 P5VS I R2
P3P3V 74AHC1G08GW
3
VOUT
GND
VCC
PWM_ECO NC VCC
2 Q5 Q4 R49 100 J 510 J
A RA33 47 J TP40
3 GND Y 4 B B LAMPEN C90 C91
74LVC1G04GW 2N3904S 2N3904S 0.1U K 4.7U Z
ViewSonic Corporation
E
R81 NC LED_R1
IR circuit Model
Lamp circuit OPEN
Title MAIN BOARD
Date Rev:
99
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
U15A
DDP2000
PMADR[20:1] DQA[7:0]
DQA[7:0]
PMADR20 W29 H3
PMADR19 PMADR20 RDRAM_DQA8 DQA7
U16 W30 PMADR19 RDRAM_DQA7 H1
PMADR18 V27 J3 DQA6
PMADR17 PMADR18 RDRAM_DQA6 DQA5
V28 PMADR17 RDRAM_DQA5 J1
9 PMADR20 PMADR16 V29 K3 DQA4
A19 PMADR19 PMADR15 PMADR16 RDRAM_DQA4 DQA3
A18 16 U27 PMADR15 RDRAM_DQA3 K1
27 17 PMADR18 PMADR14 U28 L3 DQA2
GND A17 PMADR17 PMADR13 PMADR14 RDRAM_DQA2 DQA1
46 GND A16 48 U29 PMADR13 RDRAM_DQA1 L1
1 PMADR16 PMADR12 U30 M3 DQA0
A15 PMADR15 PMADR11 PMADR12 RDRAM_DQA0
A14 2 T27 PMADR11
PMDAT15 45 3 PMADR14 PMADR10 T28 DQB[7:0]
D16 A13 PMADR10 DQB[7:0]
PMDAT14 43 4 PMADR13 PMADR9 T29 AC3
PMDAT13 D15 A12 PMADR12 PMADR8 PMADR09 RDRAM_DQB8 DQB7
41 D14 A11 5 T30 PMADR08 RDRAM_DQB7 AC1
PMDAT12 39 6 PMADR11 PMADR7 R30 AB3 DQB6
PMDAT11 D13 A10 PMADR10 PMADR6 PMADR07 RDRAM_DQB6 DQB5
36 D12 A9 7 R29 PMADR06 RDRAM_DQB5 AB1
PMDAT10 34 8 PMADR9 PMADR5 R28 AA3 DQB4
PMDAT9 D11 A8 PMADR8 PMADR4 PMADR05 RDRAM_DQB4 DQB3
32 D10 A7 18 R27 PMADR04 RDRAM_DQB3 AA1
PMDAT8 30 19 PMADR7 PMADR3 P30 Y3 DQB2
PMDAT7 D9 A6 PMADR6 PMADR2 PMADR03 RDRAM_DQB2 DQB1
44 D8 A5 20 P29 PMADR02 RDRAM_DQB1 Y1
PMDAT6 42 21 PMADR5 PMADR1 P28 W3 DQB0
PMDAT5 D7 A4 PMADR4 PMADR01 RDRAM_DQB0 RQ[7:0]
40 D6 A3 22 P27 PMADR00 RQ[7:0]
PMDAT4 38 23 PMADR3
PMDAT3 D5 A2 PMADR2 RQ7
35 D4 A1 24 RDRAM_DQC7 R1
PMDAT2 33 25 PMADR1 R90 33 J H28 T1 RQ6
PMDAT1 D3 A0 R91 33 J PMWE RDRAM_DQC6 RQ5
31 D2 H27 PMOE RDRAM_DQC5 T3
PMDAT0 29 47 R85 10K J P3P3V U1 RQ4
D1 BYTE R86 10K J RDRAM_DQC4 RQ3
WP 14 RDRAM_DQC3 U3
R87 10K J 15 12 H29 V1 RQ2
R/B RP PUM_ARSTZ CS3 RDRAM_DQC2
P3P3V 37 11 R200 33 J H30 V3 RQ1
R88 0J VCC WE R92 33 J CS2 RDRAM_DQC1 RQ0
13 VPP OE 28 J27 CS1 RDRAM_DQC0 W1
C102 10 26 R201 33 J J28
0.1U K R89 10K J A20 CE CS0
AE2 RD_SCK
RDRAM_SCK RD_SCK
MX29LV320CBTC-70G AE3 RD_CMD
RDRAM_CMD RD_CMD
PMDAT15 N27 AE4 RD_SIO
PMDAT15 RDRAM_SIO RD_SIO
PMDAT14 M30
PMDAT13 PMDAT14 CFM
M29 PMDAT13 CFM N3 CFM
PMDAT12 M28 N1 CFMN
PMDAT12 CFMN CFMN
PMDAT11 M27
PMDAT10 PMDAT11 CTM
M26 PMDAT10 CTM P2 CTM
PMDAT9 L30 P3 CTMN
PMDAT9 CTMN CTMN
PMDAT8 L29
PMDAT7 PMDAT8
L28 PMDAT7
PMDAT6 L27
PMDAT5 PMDAT6
K30 PMDAT5
PMDAT4 K29
PMDAT3 PMDAT4 VREF_ASIC
K28 PMDAT3 RDRAM_VREF_1 R5 VREF_ASIC
PMDAT2 K27 N5
PMDAT1 PMDAT2 RDRAM_VREF_0 VTERM
K26 PMDAT1 L25
PMDAT0 J29 (1.8V)
PMDAT0
VDDIO1 M5 VTERM
1
H26 T5 C103 C104 C105 C106
SDRAM_CLK VDDIO2 + Z120 C107
G30 SDRAM_CKE VDDIO3 Y5
0.1U K 0.1U K 0.1U K 0.1U K
F29 U5 10U 6.3V
2
SDRAM_CAS VDDR1
G27 SDRAM_RAS VDDR2 L5
VDDR3 J5
VDDR4 K5
G29 SDRAM_DQM1 VDDR5 V5
G28 SDRAM_DQM0 VDDR6 W5
AA5 P1P5V
PMDAT[15:0] VDDR7
N29 PMBLS1 VDDR8 AB5
VDDR9 AC5 P1P5V
1
N28 C110 C112 C113
PMBLS0 + C114
VDDA2 R3
P5 0.1U K 0.1U K 0.1U K 100U 6.3V
VDDA1
2
P1P5V
DDP2000-5
C115 C116
68P J 68P J
P3P3V
GND
P3P3V
C108
0.1U K
U17
1 A0 VCC 8
2 A1 WP 7
3 A2 SCL 6 SCL
SCL ViewSonic Corporation
4 5 SDA
GND SDA SDA
Model
AT24C16AN-10SJ-1.8
Title MAIN BOARD
EEPROM FOR DDP2000 Date Rev:
100
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
U15B DD_A[63:0]
DD_A[63:0]
GBE[7:0]
GBE[7:0]
GBE7 D10 AF28 DD_A0
GBE6 PORT1_A_7 DD_0 DD_A1
E10 PORT1_A_6 DD_1 AF27
GBE5 B9 AG30 DD_A2
GBE4 PORT1_A_5 DD_2 DD_A3
C9 PORT1_A_4 DD_3 AG29
GBE3 D9 AG28 DD_A4
GBE2 PORT1_A_3 DD_4 DD_A5
A8 PORT1_A_2 DD_5 AK28
GGE[7:0] GBE1 B8 AH27 DD_A6
GGE[7:0] PORT1_A_1 DD_6
GBE0 C8 AJ27 DD_A7
GGE7 PORT1_A_0 DD_7 DD_A8
E12 PORT1_B_7 DD_8 AK27
GGE6 A11 AG26 DD_A9
GGE5 PORT1_B_6 DD_9 DD_A10
B11 PORT1_B_5 DD_10 AH26
GGE4 C11 AJ26 DD_A11
GGE3 PORT1_B_4 DD_11 DD_A12
D11 PORT1_B_3 DD_12 AK26
GGE2 A10 AG25 DD_A13
GGE1 PORT1_B_2 DD_13 DD_A14
B10 PORT1_B_1 DD_14 AH25
GRE[7:0] GGE0 C10 AJ25 DD_A15
GRE[7:0] PORT1_B_0 DD_15
GRE7 D14 AG24 DD_A16
GRE6 PORT1_C_7 DD_16 DD_A17
B13 PORT1_C_6 DD_17 AH24
GRE5 C13 AJ24 DD_A18
GRE4 PORT1_C_5 DD_18 DD_A19
D13 PORT1_C_4 DD_19 AK24
GRE3 A12 AG23 DD_A20
GRE2 PORT1_C_3 DD_20 DD_A21
B12 PORT1_C_2 DD_21 AH23
GRE1 C12 AJ23 DD_A22
GRE0 PORT1_C_1 DD_22 DD_A23
D12 PORT1_C_0 DD_23 AK23
D8 AG22 DD_A24
GVS PORT1_FLD DD_24 DD_A25
GVS E8 PORT1_VSYNC DD_25 AH22
GHS A7 AJ22 DD_A26
GHS PORT1_HSYNC DD_26
B7 AG21 DD_A27
GCLK PORT1_ACTDATA DD_27 DD_A28
GCLK C7 PORT1_CLK DD_28 AH21
GCOAST B15 AJ21 DD_A29
GCOAST COAST DD_29
GBLKSPL D15 AK21 DD_A30
GBLKSPL CLMP DD_30
VSYNC_I A14 AG20 DD_A31
VSYNC_I ALF_VSYNC DD_31
HSYNC _I B14 AH20 DD_A32
HSYNC_I ALF_HSYNC DD_32
SOG C14 AJ20 DD_A33
SOG VY[7:0] SOG DD_33
AK20 DD_A34
VY[7:0] DD_34
VY7 E1 AF19 DD_A35
VY6 PORT2_A_7 DD_35 DD_A36
F4 PORT2_A_6 DD_36 AG19
VY5 F3 AH19 DD_A37
VY4 PORT2_A_5 DD_37 DD_A38
F2 PORT2_A_4 DD_38 AJ19
VY3 F1 AK19 DD_A39
VY2 PORT2_A_3 DD_39 DD_A40
G4 PORT2_A_2 DD_40 AG18
VY1 G3 AH18 DD_A41
VY0 PORT2_A_1 DD_41 DD_A42
G2 PORT2_A_0 DD_42 AJ18
AG17 DD_A43
DD_43 DD_A44
DD_44 AH17
AJ17 DD_A45
DD_45 DD_A46
DD_46 AK17
AG16 DD_A47
DD_47 DD_A48
DD_48 AH16
VUV[7:0] AJ16 DD_A49
VUV[7:0] DD_49
VUV7 C2 AK16 DD_A50
VUV6 PORT2_B_7 DD_50 DD_A51
C1 PORT2_B_6 DD_51 AK15
VUV5 D3 AJ15 DD_A52
VUV4 PORT2_B_5 DD_52 DD_A53
D2 PORT2_B_4 DD_53 AH15
VUV3 D1 AG15 DD_A54
VUV2 PORT2_B_3 DD_54 DD_A55
E4 PORT2_B_2 DD_55 AK14
VUV1 E3 AJ14 DD_A56
VUV0 PORT2_B_1 DD_56 DD_A57
E2 PORT2_B_0 DD_57 AH14
DDP2000-5 AG14 DD_A58
DD_58 DD_A59
B5 PORT2_C_7 DD_59 AJ13
C5 AH13 DD_A60
PORT2_C_6 DD_60 DD_A61
D5 PORT2_C_5 DD_61 AG13
A4 AK12 DD_A62
PORT2_C_4 DD_62 DD_A63
B4 PORT2_C_3 DD_63 AJ12
C4 PORT2_C_2
A3 PORT2_C_1
GND B3 PORT2_C_0
VFILD B6
VFILD PORT2_FLD
VVS C6
VVS PORT2_VSYNC GND
VHS D6 C150 OPEN
VHS PORT2_HSYNC
VPEN A5
VPEN PORT2_ACTDATA
VCLK D7
VCLK PORT2_CLK
AE28 DCLK_B R93 22 J DCLK
DCLK DCLK
AE27 LOADB_ZB R94 22 J LOADB_Z
LOADB_Z LOADB_Z
AF30 SCTRL_B R95 22 J SCTRL
SCTRL SCTRL
AF29 TRC_B R96 22 J TRC
TRC TRC
AF12 DMD_SERIN
DMDSERIN DMD_SERIN
ViewSonic Corporation
Model
101
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
P2P5V DQB[7:0]
DQB[7:0] VTERM
VTERM
U18 AME8815AEGT180Z
1 VTERM RQ[7:0]
P2P5V
C151 VIN VOUT 3 RQ[7:0]
GND
TAB
1
10U 6.3V C152 C153 C154
1
+ 0.1U K 100U 6.3V 100U 6.3V K4R271669F-TCS8
+ + RQ0 G1 J1 RN24 33
2
G1
16V RQ1 RQ0 NC1 DQB7 DQB6
F2 J7 5 4
2
RQ2 RQ1 DQB7 DQB6 DQB3
F6 H2 6 3
2
RQ3 RQ2 DQB6 DQB5 DQB2
F7 RQ3 DQB5 H6 7 2
RQ4 F1 H7 DQB4 RQ0 8 1 RN25 33
RQ5 RQ4 DQB4 DQB3 DQB7
E7 RQ5 DQB3 H1 5 4
RQ6 E6 G2 DQB2 DQB5 6 3
VTERM RQ7 RQ6 DQB2 DQB1 DQB4
VTERM BULK DECOUPLING CAPS E2 RQ7 DQB1 G6 7 2
G7 DQB0 DQB1 8 1
R99 10K J SIO1 DQB0 RN26 33
J3 SIO1
RD_SIO J5 C1 DQA0 DQA6 5 4
VTERM RD_SIO SIO0 DQA0
RD_CMDA5 C2 DQA1 DQA3 6 3
C155 C156 C157 C158 C159 C160 RD_CMD RD_SCK A3 CMD DQA1 DQA2 DQA5
SCK DQA2 C6 7 2
0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K RD_SCK DQA3 DQA7 RN27 33
DQA3 B1 8 1
CTM E1 B7 DQA4 DQA1 5 4
CTM CTM DQA4
16V 16V 16V 16V 16V 16V CTMN D1 B6 DQA5 DQA0 6 3
CTMN CFM CTMN DQA5 DQA6 DQA2
C7 CFM DQA6 B2 7 2
CFM CFMN DQA7 DQA4
D7 CFMN DQA7 A7 8 1
D2 VREF NC2 A1
VTERM R100
39.2 F A2 VCMOS GNDA D5 VTERM
J2 VCMOS GND A6
D6 VDDA GND B3
C161 C162 C163 C164 C165 C166 U7-C75 B5 33 RN28
0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K P2P5V GND C5 RQ5
C3 P2P5V GND D3 4 5
C167 E5 RQ6
16V 16V 16V 16V 16V 16V 0.1U K R101 P2P5V GND E3 RQ7
3 6
F3 P2P5V GND F5 2 7
16V 39.2 F G5 RQ3 33 RN29
GND P2P5V GND G3 RQ2
1 8
H5 P2P5V GND H3 4 5
RQ4
GND J6 RQ1
3 6
VTERM DECOUPLING CAPS CFMN 2 7
P2P5V GND:A1,A9,A12,B4,C9,D4,D9 DQB0 1 8
P2P5V GND:E4,F9,G4,H4,J1,J9,J12
P2P5V:A4,B9,C1,C4,C12,D8
C168 C170 C171 C172 P2P5V:E9,F4,G1,G9,G12,H9,J4
1
R104
P2P5V
L26 R105 VDRCG
U15C
P3P3V 4 VDD
C187 + C188 C189 C190 C191 C192 Z120 R125 3 CLK R119 CLK_REF
0.1U K 10U 6.3V 0.1U K 68P J 0.1U K 68P J C185 C186 OUT OPEN CLK_REF
16V 16V 16V 0.1U K 0.1U K P2P5V
GND
2
5
C194
10P J
ViewSonic Corporation
2
50MHZ
2 4
C195 C196 C197 C198 74LVC1G04GW
0.1U K 68P J 0.1U K 68P J
Model
3
16V 16V
102
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
P3P3V P5VS
R509 4.7K J
4.7K J
4.7K J
4.7K J
4.7K J
4.7K J
4.7K J
4.7K J
4.7K J
P3P3V 150 J LED8 GRN
U15D R37 A K
P3P3V
R127 R128 DDP2000 150 J LED9 GRN
R501
R502
R503
R504
R505
R506
R507
R508
1K J 1K J R51 A K
C29 R130 R131 R142 SW1
IR1 KEYPD_PWR
KEYPD_PWR 1 3
IRRC VR C27 DDP2000-5 3.3K J 3.3K J 1K J KEYPD_SEL
IRRCVR IR0 KEYPD_SEL
KEYPD_AUTO
Q11 KEYPD_AUTO
P3P3V KEYPD_BLANK
KEYPD_BLANK
APM2301AAC-TRL AH8 KEYPD_UP
PWRGOOD KEYPD_UP 2 5 4
AK5 KEYPD_DOWN SW2 CK1
EXT_ARST KEYPD_DOWN
S D SDA A27 AG6 EXT_ARSTZ KEYPD_LEFT 1 3 680P J
SDA SDA0 EXT_ARSTZ EXT_ARSTZ KEYPD_LEFT
AH6 PUM_ARSTZ KEYPD_RIGHT SW10 6B40039071
PUM_ARSTZ PUM_ARSTZ KEYPD_RIGHT
R129 SCL B27 AJ8 SYSRSTZ TP332 KEYPD_MODE 1 3
SCL SCL0 SYSRSTZ KEYPD_MODE
AK8 POSENSE
POSENSE POSENSE
3.3K J R132
G
USB_EN 1.5K 2 5
CK2 4 SW3
USB_EN
680P J 1 3
R134 3.3K J 2 5 4 6B40039071
P3P3V
USB_D- R133 27 A28 OPEN 6B40039071
USB_D- USB_DAT_N
C24 RQ1 NC
USB_D+ R136 27 GPIO_31 CK9 680P J
USB_D+ B28 USB_DAT_P SW4 2 5
CK3 4
TEST_P 1 3 680P J
TEST_P
TP231 6B40039071
PWM_AUDIO1 TP232 B24
PWM_AUDIO1 PWM0_GPIO_24
PWM_AUDIO2 TP233 A24 E21 LOW_P
PWM_AUDIO2 PWM0_GPIO_25 GPIO_23 LOW_P
PWM_ECO E23 D21 PWR_DOWN
PWM_ECO PWM0_GPIO_26 GPIO_22 PWR_DOWN 2 5 4
PWM3 D23 C21 FAN_SW P3P3V P5VS CK4 SW5
PWM3 PWM0_GPIO_27 GPIO_21 FAN_SW
P3P3V P5VS B21 AUDIO_MUT 680P J 1 3
GPIO_20 AUDIO_MUT
A21 AUDIO_VOL 6B40039071
GPIO_19 AUDIO_VOL
1
D20 LED_R3
P5VS GPIO_18 LED_R3
2
3
SSP0_DO SSP0_DI GPIO_14 R203 R202 6B40039071
SSP0_DO C26 D19
4
C
RK11 330 GPIO_12 LED_R2 KEYPD_MODE
B19
C
E
SSP1_CS0 SSP1_CS1_GPIO_29 GPIO_8 KEYPD_RIGHT LED_G1 6B40039071
SSP1_CS0 C30 B18
E
E
SSP1_DI SSP1_CLK GPIO_6 KEYPD_DOWN KEYPD_LEFT
SSP1_DI C25 C17
E
C
UART1_RXD GPIO_2 KEYPD_SEL KEYPD_AUTO 6B40039071
UART1_RXD D30 C16
C
1
R139 AC29 SR16SEL1
SR16SEL1 SR16SEL1
100K F AC30 SR16SEL0 RK10 RK9 LTST-C155GEKT LED6 RK3 RK4 LTST-C155GEKT LED5
SR16SEL0 SR16SEL0
U25 AD28 SR16ADDR3
SR16ADDR3 SR16ADDR3
5
3
LAMPLITZ LMPSYNC_GPIO_30 SR16ADDR1 SR16ADDR0 4.7K J 4.7K J
4 C22 LMPSTAT SR16ADDR0 AC26 SR16ADDR0
2 3 2 LAMPEN B22 AC28 SR16OEZ RK7 330 RK5 330
C
LAMPLIT LAMPEN LMPCTRL SR16OEZ SR16OEZ
MMBT2222ALT1G
Q12 LED_R1 B QK1 LED_R3 B QK3
LED_R1 LED_R3
3
1
E
OPEN OPEN
3
L: Lamp on L: Lamp on Q13
E
2
2
C201 2 CWINDEXA
CWINDEXA
C
0.1U K B
4 3 RK8 330 RK6 330
CWINDEX Y GND GND P3P3V
Keypad and LED circuit
74AHC1G32GV
C95 0.1U K
16
RB37 RB38 RB40 RB41 RB42 RB44 R55 C92 C93 U35
VCC
WITH WATCHDOG 14 C97 1U K
0 0 OPEN 0 OPEN OPEN OPEN 0.1u OPEN 1
CX1
15 R57 510K
FUNCTION(MAX6823) 2
1A RCX1
P2P5V 1B
WITHOUT WATCHDOG 1Q 13
FUNCTION (NCP302) OPEN OPEN 0 OPEN 0 OPEN OPEN 0.22u0.1u POSENSE_B 3 1R 1Q 4
GND
RB38 OPEN R52 47 J RCX2
P2P5V 5 CD RESET 1 POSENSE_B
C94 0.22U K 2 RB44 OPEN RB43 10K J 74LV123PW P2P5V
P2P5V
8
R55 OPEN VCC
P2P5V 0J RB42 4 3 RB37 OPEN P2P5V
NC GND
5
U36
AME8550BEEVC190Z RB40 1
RB41 OPEN 4 PO
ViewSonic Corporation
2
C93 0J
0.1U K 74AHC1G08GW
3
R59 OPEN
DDP2000 RESET IC
Model
103
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
U15F
DDP2000
U2 GND GND A1
P1P5V P3P3V U4 A2
GND GND
U13 GND GND A6
P3P3V U14 GND GND A9
U15E P1P5V U15 GND GND A13
U16 GND GND A18
U17 GND GND A22
DDP2000 U18 GND GND A25
V2 GND GND A29
V4 GND GND A30
U15G V13 GND GND B1
TRACEPKT7 AB28 AJ3 TRACEPKT15 V14 B2
TP201 TRACEPKT6 TRACEPKT7 TSTPT_7 TRACEPKT14 TP209 GND GND
AB29 TRACEPKT6 TSTPT_6 AK3 V15 GND GND B29
TP202 TRACEPKT5 AA26 AH4 TRACEPKT13 TP210 DDP2000 V16 B30
TP203 TRACEPKT4 TRACEPKT5 TSTPT_5 TRACEPKT12 TP211 P1P5V_2000 M13 GND GND
AA27 TRACEPKT4 TSTPT_4 AJ4 P1P5V V17 GND GND C3
TP204 TRACEPKT3 AA28 AK4 TRACEPKT11 TP212 M14 V18 C28
TP205 TRACEPKT2 TRACEPKT3 TSTPT_3 TRACEPKT10 TP213 P1P5V P3P3V_2000 GND GND
AA29 TRACEPKT2 TSTPT_2 AG5 M17 P1P5V P3P3V E7 V30 GND GND D4
TP206 TRACEPKT1 AA30 AH5 TRACEPKT9 TP214 M18 E9 W2 D27
TP207 TRACEPKT0 TRACEPKT1 TSTPT_1 TRACEPKT8 TP215 P1P5V P3P3V GND GND
Y27 TRACEPKT0 TSTPT_0 AJ5 N12 P1P5V P3P3V E13 W4 GND GND E5
TP208 TP216 P2P5V N19 E14 W12 E6
TEST_P P1P5V P3P3V GND GND
TEST_P P12 P1P5V P3P3V E17 W15 GND GND E11
P2P5V P19 P1P5V P3P3V E18 W16 GND GND E15
U12 P1P5V P3P3V E22 W19 GND GND E16
AF3 TDO1 TP718 U19 E24 Y2 E20
TDO1 TDO2 P1P5V P3P3V GND GND
TDO2 AF2 TP218 V12 P1P5V P3P3V G5 Y4 GND GND E25
AF4 TMS1 V19 G26 Y26 E26
TMS1 TP222 TP720 P1P5V P3P3V GND GND
PIPESTAT2 Y28 AG1 TMS2 W13 J26 F5
PIPESTA2 TMS2 TP223 TDI TP220 P1P5V P3P3V GND
TP224 PIPESTAT1 Y29 AG2 TP221 W14 N26 F26
TP225 PIPESTAT0 PIPESTA1 TDI TCK P1P5V P3P3V GND
Y30 PIPESTA0 TCK AG3 W17 P1P5V P3P3V P26
TP226 TRACESYNC W26 AH1 TRSTZ W18 U26
TP227 TRACECLK TRACESYNC TRSTZ P1P5V P3P3V
W27 TRACECLK P3P3V V26
TP228 RTCK W28 AF7 P14
TP229 RTCK R7313 P2P5V_2000 P3P3V GND
ARM_WRAPMODE C15 AB26 P2P5V P3P3V AG9 P15 GND
SCAN_MODE AB27 0J AD5 P2P5V P16 GND GND F30
TEST_EN AH2 AD26 P2P5V P17 GND GND H2
ICTSENZ G1 GND AF13 P2P5V P18 GND GND H4
BIST_EN AH11 AF14 P2P5V R2 GND GND J2
IDDTEST_MODE AH7 AF17 P2P5V R4 GND GND J4
AF18 P2P5V R12 GND GND J30
AF22 P2P5V R13 GND GND K2
AF24 P2P5V R14 GND GND K4
R15 GND GND L2
R16 GND GND L4
R17 GND GND L26
DDP2000-5 DDP2000-5 R18 M1
GND GND
R19 GND GND M2
R26 GND GND M4
T2 GND GND M12
T4 GND GND M15
T12 GND GND M16
T13 GND GND M19
T14 GND GND N2
T15 GND GND N4
T16 GND GND N13
T17 GND GND N14
T18 GND GND N15
T19 GND GND N16
P1P5V T26 N17
GND GND
GND N18
GND N30
GND P1
GND P4
C117 C123 C124 C122 C118 C119 C120 C121 C127 C128 C129 C130 C131 C132 P13
C125 C126 GND
AA2 GND
0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 4.7U Z 4.7U Z 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K AA4 GND
AB2 GND
AB4 GND
AB30 GND
AC2 GND GND AK30
AC4 GND GND AK29
AE5 GND GND AK25
AE26 GND GND AK22
AE30 GND GND AK18
AF5 GND GND AK13
AF6 GND GND AK9
AF11 GND GND AK6
P2P5V AF15 AK2
GND GND
AF16 GND GND AK1
AF20 GND GND AJ30
AF25 GND GND AJ29
AF26 GND GND AJ2
C133 C134 C135 C136 C137 C138 C139 C140 C141 AG4 AJ1
GND GND
AG27 GND GND AH28
0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K AH3 GND
DDP2000-5
P3P3V
ViewSonic Corporation
C142 C143 C144 C145 C146 C147 C148 C149 C502 C503 C504 C505 C506 C507 C508 C509 C510
0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K
Model
104
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
P3P3V
R169
1K J
MBRST[15:0]
MBRST[15:0]
U30
SSP1_CLK 56 79 MBRST15
SSP1_CLK SCP_CLK OUT15
SSP1_DO 57 77 MBRST14
SSP1_DO SCPDI OUT14
SSP1_DI 42 74 MBRST13
SSP1_DI SCPDO OUT13
SSP1_CS0 58 72 MBRST12
SSP1_CS0 SCPENZ OUT12
69 MBRST11
SR16STRB OUT11 MBRST10
SR16STRB 15 STORBE OUT10 67
SR16SMODE1 2 64 MBRST9
SR16MODE1 MODE1 OUT09
SR16SMODE0 3 62 MBRST8
SR16MODE0 MODE0 OUT08
SR16SEL1 4
SR16SEL1 SEL1
SR16SEL0 5
SR16SEL0 SEL0
39 MBRST7
OUT7 MBRST6 P3P3V
OUT6 37
SR16ADDR3 16 34 MBRST5
SR16ADDR3 A3 OUT5
SR16ADDR2 17 32 MBRST4
SR16ADDR2 A2 OUT4
SR16ADDR1 18 29 MBRST3
SR16ADDR1 A1 OUT3
SR16ADDR0 19 27 MBRST2
SR16ADDR0 A0 OUT2
EXT_ARSTZ DAD1000 24 MBRST1 R170
EXT_ARSTZ OUT1
45 22 MBRST0 1K J
DEV_ID1 OUT0
44 DEV_ID0
P3P3V R171 1K J 43 DAD_INT
IRQZ DAD_INT
P3P3V 59 RESETZ
SR10OEZ 6
SR16OEZ OEZ
78 VCC2 VCC2
VOFF_RAIL7
54 VCC VOFF_RAIL6 73
VOFF_RAIL5 68
52 V12_SWL1 VOFF_RAIL4 63
P12V 51 38 D13 BZX384-C8V2
V12_SWL0 VOFF_RAIL3
VOFF_RAIL2 33 A K VCC2
P12V 50 V12_3 VOFF_RAIL1 28
48 23 R172 0
V12_2 VOFF_RAIL0
1
1
0.1U K 80 47 V5REG
2
2
VBIAS_RAIL4 VRST_RAIL7 C221 C222
40 VBIAS_RAIL3 VRST_RAIL6 75
31 66 1U K 100N Z
VBIAS VBIAS_RAIL2 VRST_RAIL5
VBIAS 30 VBIAS_RAIL1 VRST_RAIL4 65
21 VBIAS_RAIL0 VRST_RAIL3 36
R173 0 35
VBIAS VBIAS1 VRST_RAIL2
VBIAS 9 VBIAS VRST_RAIL1 26
25 VRST
VRST_RAIL0 VRST
1
C223 MBR0540T1G
2
Thermal Pad G1
VBIAS_SWL R174 0
1
VRST
GND
GND
GND
GND
GND
GND
GND
GND
GND
L33 VRST
10 VBIAS_LHI VRST_SWL 12
1
22U M
D15
1
7
14
20
41
46
53
55
60
2
VBIAS_LHI
MBR0540T1G C227 C228 C229 C230
2
100N Z 100N Z 100N Z
+
VRST_SWL 3.3U 35V
GND
1
1
10U 25V M
+ L34
C232 22U M
C231 100N Z
2
ViewSonic Corporation
Model
105
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
P12V
L35 Z80
P12V
1
C233
2
RA1 +
C234 C235 100K F C236 C237
0.1U Z 0.1U Z 0.1U Z 0.1U Z
2
10U 25V M DN13 3 DN10 3 DN11 3 DN12 3
1
RA2
62K
# of Poles CD1 (C246) CD2 (C244) CWD (C244) CWCTR (C243) R187
10K J
CWINDEXA
CWINDEXA 9
8 0.0033uF 0.0056uF 0.0033uF 0.01uF U32
2.5VREF
C584
C250 R188 R189 1 5
C251 10K J 330K J INPUT+ VCC
12 0.0027uF 0.0047uF 0.0027uF Not Installed 0.1U K
2 GND
10P J
16 0.0015uF 0.0033uF 0.0015uF Not Installed 0.1U K 3 4
INPUT- OUTPUT
These combinations are recommended starting points. ADCMP370AKSZ-REEL R190
6.8K
Testing must be done to confirm these components will be suitable
for a particular motor.
ViewSonic Corporation
Model
106
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
P12V
P12V P12V
RF1
2.2K RF2
E
QF1 B RF3 1K J
2.2K
E
2SB772S-P-L
C
C
QF3 QF4 P5V_A 1K J RF4 B QF2
FAN1 RF5 22K B B
FAN1 2SB772S-P-L
C
100 R7314
QF5 QF6
E
CF2 CF3 CF1 B B 22K RF6 FAN3
RF7 2N3904S 2N3904S 2.2U Z FAN3
0.1U K 0.1U K P5V_A P5V_A
E
10K J RF9 CF5 CF6
1K J CF4 2N3904S 2N3904S RF8
RF10 RF11 0.1U K 0.1U K 10K J 0.1U K
RF12 RF13
15
UF1
6
TP797 10K J 1K J
AVCC
DVCC
TP796 10K J 10K J 3 20
J9 FAN1 FAN3
FG1 FG3
OPEN G2
FG1 4 FG1 FG3 19
P5V_A
FG3
TP875 1 18
2 FAN2_B FAN2 NC1
FG2 2 17
1 FG2 FG2 NC2 RF14
G1 10K J
C
FAN1_B
2KD2094102 QT1 CT1
B 7 DXP1 ALERT 5
KN3904/P
TP876 2200P K 8 14 SCL SCL
E
Shape SGND1 SCL SDA
SDA 13 SDA
FAN2_B
C
CT2 9 12 RF17 2M J
QT2 DXP2 X2
B
DGND
NC 2200P K 10 11 RF19 10M J
Shape SGND2 X1/CLK
E
P12V
G793D5U
16
RF18
2
CF8
2.2K CF9
E
10P J 10P J
QF7 B
1K J RF20 P5V P3P3V
2SB772S-P-L
C
C
C
3
RF22
E
1
10K J RF23
1K J GND
C
QF11
B RF26 470
FAN_SW
2N3904S
E
J12
TP122 TP124 TP125 TP126
G2
TP127
J13 TP132 6 FG1
G1 G1 5
1 TP133 FG3 4 FAN1
1 FG3 FAN1
2 3 FG2
2 FAN3 FG2
3 3 FAN3 2
G2 1 FAN2
G2 FAN2
2KD2093103 2KD2093106
G1
TP795
ViewSonic Corporation
Model
Blower Fan Rear Fan and DMD Fan Title MAIN BOARD
Date Rev:
107
ViewSonic Corporation Confidential - Do Not Copy PJ503D-1
DD[63:0]
MBRST[15:0]
MBRST[15:0]
2KC1001140 TP791
1
5 9 5 9 5 9
4 8 4 8 4 8
3 7 3 7 3 7
2 6 2 6 2 6
H2 H1
H3
OP1 OP2 OP3 OP4 OP5 OP6 OP7 P1 P2 P3 P4 P5 P6 HOLE-V8 HOLE-V8 HOLE-V8
OP OP OP OP OP OP OP Pad Pad Pad Pad Pad Pad
1
5 9 5 9
4 8 4 8
OP8 OP9 OP10 OP11 OP12 OP13 OP14
Solder Pad 3 7 3 7
ViewSonic Corporation
OP OP OP OP OP OP OP
2 6 2 6
3DJ8118001 3DJ8118001 3DJ8118001
H4 H5
Optical Points
HOLE-V8 HOLE-V8
Model
1
108
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8. PCB Layout Diagrams
109
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110
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111
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112
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113
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114
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115
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116
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117
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118
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119
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9. Exploded Diagrams
Module 1 –ASSY UPPER CASE
122
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Module 3 –ASSY FRONT CASE
123
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Packing
124
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10. Recommended Spare Parts List
RECOMMENDED SPARE PARTS LIST ( PJ503D-1 )
ViewSonic Model Number: VS11705
Serial No. Prefix: QLK Rev: 1a
Item Description ECR/ECN ViewSonic P/N Ref. P/N Location Universal number#
1 Accessories: [Adapter, Rempote Control - RC-7092-01-0015 A-00008095 5F.26J1K.061
Remote Control;Power Vendor # Updated on 6K.01213.001
Lamp Module
2 Cord] On 02/08/07 RLC-030 5J.03A01.001
3 Power Cord - 125V 1.8M US A-00008096 2G.01111.101
4 Power Cord - 125V 1.8M EU A-00008097 2G.82718.281
5 Power Cord - 1.8M UK A-00008098 2G.01018.000
6 Power Cord - 125V 1.8M AU A-00008099 2G.01343.001
7 Power Cord - 125V 1.8M CN A-00008100 2G.04246.001
8 PC Board Assembly: [All Power Supply Board - MP510 MI B-00008286 5E.01240.001
9 PCBA] Main Board B-00008287 5E.03A01.011
10 DMD Board - CHIP BD MP611 MI B-00008288 5E.J2C02.001
11 Sub Board (Ballast 160W PHG161G9) B-00008289 5D.01212.001
12 Cabinets: [Front Panel, All Top Cover C-00008287 6K.03A03.001
13 Covers, Base Assembly] Bottom Cover C-00008288 6K.03A05.001
14 Front Panel C-00008289 6K.03A06.001
15 Back Cover C-00008290 6K.03A07.001
16 Cover - (Sub Lamp Door) C-00008291 6K.01222.001
17 Cover - (Cap Lens) C-00008292 6K.03A08.001
18 Cabinets: [Front Panel, All Video Cable - 15/15P 1.8M+PEBAG CB-00008120 5K.01207.501
Documentation: [Quick Quick Start Guide
Vendor # Updated on 4J.03A02.011
19 Start Guide, CD Rom; On 02/08/07 DC-00008253 4J.03A02.012
Label] Vendor # Updated on 5B.03A01.011
CD-Rom
20 On 02/08/07 DC-00008254 5B.03A01.012
21 Electronic Components: Integrated Circuit - DMD 0.6SVGA E-00008314 7A.08060.B01
22 [CRT-EEPROM, Fly Back Electronic Device - (Color Wheel) E-00008315 6K.01212.001
Transformer, Microprocessor]
23 [LCD TV-Panel] Light Pipe MODULE MP611 E-00008316 6K.J2C25.001
24 Pack CW Module E-00008317 CS.5J03A.001
25 Pack LP Module E-00008318 CS.5J03A.011
26 Miscellaneous: [Switch, Fan - 2 80*80/70*70*25 M-00008095 2C.10103.091
27 Fan, Logo] FAN 50*20 170MM AB5012MB M-00008096 2C.10102.041 below
28 Projection Lens ZOOM MP510 CANON M-00008097 6E.01202.001
29 Packing Material: [Box, Bag HDPE+LDPE 415*365*0.4 P-00008300 4B.01214.001
30 Foam, Bags] Craft Box P-00008301 4D.01201.041
31 Foam - Left P-00008302 4G.03A02.001
32 Foam - Right P-00008303 4G.03A03.001
33 Plastics: [Pedestal, Plate, Holder - (Handle PE/PP V-05) PL-00008102 4B.M0628.001
Remark 1: Above listed items are examples, supplier can expand the rows to add more necessary items.
Remark 2: All revised RSPLs with newly added items or any change made should be highlighted and correlated with the ECN/ECR
approved by ViewSonic Corporation. This is to eliminate repeated cross checks of each item between this version and prior
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11. Appendix
Appendix 1 – Screw List /Torque
Model name : PJ503D
Description Torque Where use
No. Screw P/N Q’TY
Type Head Length Coating (kgf-cm)
2 8F.VA564.6R0 TAP PHM 6 NI 14 5~6 Lamp wire holder & LOWER CSAE(1*)
M3.0 3 8F.1A524.8R0 MACH PHM 8 NI 2 4~5 LAMP DOOR & LOWER CASE (2*)
shielding(5*)
6 8F.VG524.8R0 TAP CAP 8 NI 3 5~6 Lower case & Power BD shielding (3*)
M2.0 1 8F.1A522.6R0 MACH PHM 6 NI 1 2~3 Holder adjust foot & Fix block (1*)
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Appendix 2 –Recommand Spare parts List
Description Ref. P/N Description
Optical 6E.01202.001 ASSY PL ZOOM MP510 CANON
Components CS.5J03A.001 PACK CW MODULE PJ503D
CS.5J03A.011 PACK LP MODULE PJ503D
7A.08060.B01 IC DMD 0.6SVGA S8060-6409
5J.03A01.001 PACK LAMP MODULE RLC-030
Cabinets: 6K.01222.001 ASSY SUB LAMP DOOR MP510
[Front Panel, 6K.03A03.011 ASSY UPPER CASE PJ503D
Back Cover,
6K.03A05.001 ASSY LOWER CASE VG30
Base]
6K.03A06.011 ASSY CASE FRONT PJ503D
6K.03A07.001 ASSY CASE REAR VG30
6K.03A08.001 ASSY CAP LENS VG30
Hardware: 2C.10103.091 FAN*2 80*80/70*70*25 AD0812HB
2C.10102.041 FAN 50*20 170MM AB5012MB MP510
PC Board 5E.01240.001 PCBA POWER BD MP510 MI
Assembly: 5E.03A01.011 PCBA MAIN BD VG30 VS MI
[All PCBA]
5E.J2C02.001 PCBA DMD CHIP BD MP611 MI
5D.01212.001 BALLAST 160W PHG161G9 MP510
Accessories: 2G.01111.101 CORD SVT 125V 1.8M PVC-80P US
[Adapter, 2G.01018.000 CORD SVT 125V 1.8M PVC-80P UK
Remote
2G.82718.281 CORD SVT 125V 1.8M PVC-80P EU
Control]
2G.01343.001 CORD SVT 125V 1.8M PVC-80P AU
2G.04246.001 CORD SVT 125V 1.8M PVC 80P CN
5K.01207.501 CABLE SIGNAL 15/15P 1.8M+PEBAG
5F.26J1K.061 REMOTE RC-7092-01-0015 VG30
Documentation: 4J.03A02.011 GUIDE QS VS PJ503D
[Quick Start
Guide, CD Rom] 5B.03A01.011 CD USER MANUAL PJ503D
Packing 4B.01214.001 BAG HDPE+LDPE 415*365*0.4
Material: [Box, 4B.M0628.001 HANDLE HOLDER PE/PP V-05 DE350
Foam]
4D.01201.041 CTN VIEWSONIC
4G.03A02.001 CUSHION LEFT EPE VG30
4G.03A03.001 CUSHION RIGHT EPE VG30
4B.71509.003 BAG LDPE 201*332
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Appendix 3 -- Timing, Characteristics of inputs/outputs, Interface Character
1. Timing Table
The Default timing is as following:
Refresh rate H-frequency Clock
Resolution Mode
(Hz) (kHz) (MHz)
720 x 400 720x400_70 70.087 31.47 28.322
VGA_60 59.940 31.469 25.175
VGA_72 72.809 37.861 31.500
640 x 480
VGA_75 75.000 37.500 31.500
VGA_85 85.008 43.269 36.000
SVGA_60 60.317 37.879 40.000
SVGA_72 72.188 48.077 50.000
800 x 600
SVGA_75 75.000 46.875 49.500
SVGA_85 85.061 53.674 56.250
XGA_60 60.004 48.363 65.000
XGA_70 70.069 56.476 75.000
1024 x 768
XGA_75 75.029 60.023 78.750
XGA_85 84.997 68.667 94.500
1280 x 1024 SXGA3_60 60.020 63.981 108.000
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GDATA Amplitude 0.7 Volts peak-to-peak
BDATA Black pedestal 0 Volts
Pixel Clock 110 M Hz
GDATA_SOG Impedance 75 Ohm
Amplitude 1 Volts peak-to-peak
Video amplitude 0.7 Volts peak-to-peak
Sync amplitude 0.3 Volts peak-to-peak
Black pedestal 0 Volts
Pixel Clock 110 M Hz
HDATA Impedance 1 K ohm
Amplitude, low level 0 0.8 volt
Amplitude, high level 2.5 5 Volt
Frequency 31 82 K Hz
VDATA Impedance 1 K ohm
Amplitude, low level 0 0.8 volt
Amplitude, high level 2.5 5 Volt
Frequency 48 85 Hz
SDADATA Amplitude, low level 0 0.8 volt
Amplitude, high level 2.5 5 Volt
SCLDATA Amplitude, low level 0 0.8 volt
Amplitude, high level 2.5 5 Volt
RXD Amplitude -25 25 Volt
TXD Amplitude -25 25 Volt
CVBS Amplitude, total (video+ sync) 1 Volts peak to peak
Luminance Amplitude, video 0.7 Volts peak to peak
Amplitude, sync 0.3 Volts peak to peak
Impedance 75 ohm
CVBS Chroma Amplitude 300 m Volts peak to peak
Impedance 75 ohm
Audio Impedance (audio in) 10 Kohm
Amplitude (audio in) 0 0.30 Volts rms
Bandwidth 300Hz 16kHz
S/N Ratio 40 %
Total Harmonic Distortion 10 %
3. Electrical Interface Character
Interface Definition
15 pin definition of the mini D-sub male for DDC2B protocol
1 5
6 10
11 15
Composite input
Pin Definition
1 Composite video
input
• S-Video input
Pin Description
4 3 1 GND
2 1 2 GND
3 Luminance
4 Chroma
• DVI Port
• Control Port
Pin Description Pin Description
8 7 6 1 DSR 2 CTS
5 4 3 3 RD 4 GND
2 1
5 RTS 6 NC
7 TX 8 NC
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Appendix 4 – Keyboard and Remote Control keys
Local Keyboard Description
Key Name Detailed Description
Power Use this button to turn your Data Projector on and off (standby mode).
Source To select input sources as Computer, Video, S-Video, YpbPr
Auto Toggle auto-tracking image function
Blank Press “Blank” key first to blank the screen.
Mode Change Different presentation mode
Right (1) Move next page (2) OSD increment & move next sub-item (3)
Keystone+.
Left (1) Move previous page (2) OSD decrement & move previous sub-item
(3) Keystone-.
Up (1) Move item bar. (2) Move to page level
Down (1) Move item bar (2) Menu
Keystone+
Keystone-
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0030 02 POWER
0030 03
0030 04 SOURCE
0030 05 PAGE UP
0030 06 PAGE DOWN
0030 07 BLANK
0030 08 AUTO
0030 09 KEY STONE
0030 0A KEY STONE
0030 0B
0030 0C
0030 0D
0030 0E
0030 0F MENU
0030 10 MODE
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Horizontal position shift
left 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x06 0x00 0x64
Read Horizontal position 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x12 0x06 0x65
Vertical position shift up 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x07 0x00 0x65
Write Vertical position shift
Vertical position
down 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x07 0x01 0x66
Read read Vertical position 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x12 0x07 0x66
color temperature T1 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x08 0x00 0x66
color temperature T2 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x08 0x01 0x67
Write
Color temperature color temperature T3 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x08 0x02 0x68
color temperature T4 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x08 0x03 0x69
Read color temperature status 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x12 0x08 0x67
Blank on 0x06 0x14 0x00 0x03 0x00 0x34 0x12 0x09 0x66
Write
Blank Blank off
Read Blank status 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x12 0x09 0x68
Decrease 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x0A 0x00 0x68
Write
Keystone-Vertical Increase 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x0A 0x01 0x69
Read Keystone status 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x12 0x0A 0x69
mode 0 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x0B 0x00 0x69
mode 1 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x0B 0x01 0x6A
Write mode 2 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x0B 0x02 0x6B
Application Mode
mode 3 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x0B 0x03 0x6C
mode 4 (only VGA) 0x06 0x14 0x00 0x04 0x00 0x34 0x12 0x0B 0x04 0x6D
Read Preset mode status 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x12 0x0B 0x6A
Freeze on 0x06 0x14 0x00 0x03 0x00 0x34 0x13 0x00 0x5E
Write
Freeze Freeze off
Read Freeze status 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x13 0x00 0x60
Source input Input source VGA 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x01 0x00 0x60
Input source DVI 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x01 0x01 0x61
Input source HDTV 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x01 0x02 0x62
Input source YPbPr 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x01 0x03 0x63
Input source Composite 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x01 0x04 0x64
Input source SVIDEO 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x01 0x05 0x65
Write Input source YCbCr 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x01 0x06 0x66
Input source
HDTV2(W100) 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x01 0x07 0x67
Input source
YPbPr2(W100) 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x01 0x08 0x68
Input source
YCbCr2(W100) 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x01 0x09 0x69
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Read Source 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x13 0x01 0x61
Source scan on 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x02 0x01 0x62
Write
Source scan Source scan off 0x06 0x14 0x00 0x04 0x00 0x34 0x13 0x02 0x00 0x61
Read Source scan status 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x13 0x02 0x62
Mute on 0x06 0x14 0x00 0x04 0x00 0x34 0x14 0x00 0x01 0x61
Write
Mute Mute off 0x06 0x14 0x00 0x04 0x00 0x34 0x14 0x00 0x00 0x60
Read Mute status 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x14 0x00 0x61
Increase Volume 0x06 0x14 0x00 0x03 0x00 0x34 0x14 0x01 0x60
Write
Volume Decrease Volume 0x06 0x14 0x00 0x03 0x00 0x34 0x14 0x02 0x61
Read Volume 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x14 0x03 0x64
English 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x00 0x61
Français 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x01 0x62
Deutsch 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x02 0x63
Italiano 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x03 0x64
Español 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x04 0x65
РУССКИЙ 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x05 0x66
繁體中文 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x06 0x67
简体中文 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x07 0x68
Write 日本語 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x08 0x69
Language
한국어 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x09 0x6A
Swidish 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x0A 0x6B
Dutch 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x0B 0x6C
Turkish 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x0C 0x6D
Czech 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x0D 0x6E
Portugese 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x0E 0x6F
Thai 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x0F 0x70
Polish 0x06 0x14 0x00 0x04 0x00 0x34 0x15 0x00 0x10 0x71
Read Language 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x15 0x00 0x62
Write Reset Lamp usage hour 0x06 0x14 0x00 0x03 0x00 0x34 0x15 0x01 0x61
Lamp Time
Read Lamp usage hour 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x15 0x01 0x63
error status read 0x07 0x14 0x00 0x05 0x00 0x34 0x00 0x00 0x15 0x02 0x64
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3. RS232 command format 2
CMD ACTION ASCII
Power on *pow=on#
off *pow=off#
tatus( on/off/cool down) *pow=?#
Reset OSD Reset *rst#
Mirror Normal *mir=nor#
H Inverse *mir=hinv#
V Inverse *mir=vinv#
H&V Inverse *mir=vhinv#
Mirror status *mir=?#
Contrast Contrast decrease *con=-#
Contrast increase *con=+#
Contrast ratio *con=?#
Brightness Brightness decrease *bri=-#
Brightness increase *bri=+#
Brightness *bri=?#
Aspect ratio Aspect ratio 4:3 *asp=4:3#
Aspect ratio 16:9 *asp=16:9#
Aspect ratio *asp=?#
Auto Adjust Auto Adjust *auto#
Horizontal position Horizontal position shift right *hpos=left#
Horizontal position shift left *hpos=right#
Horizontal position *hpos=?#
Vertical position Vertical position shift up *vpos=up#
Vertical position shift down *vpos=down#
read Vertical position *vpos=?#
Color temperature color temperature low *ctmp=T3#
color temperature standard *ctmp=T2#
color temperature high *ctmp=T1#
color temperature status *ctmp=?#
Blank Blank on/off *blank#
Blank status *blank=?#
Keystone-Vertical Decrease *keyst=-#
Increase *keyst=+#
Keystone status *keyst=?#
Preset mode Preset mode presentation(PC) *appmod=preset#
preset mode brightness *appmod=bright#
preset mode srgb *appmod=srgb#
Preset mode gaming *appmod=game#
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Preset mode video *appmod=video#
preset mode movie *appmod=mov#
Preset mode cinema *appmod=cine#
Preset mode game *appmod=game#
Preset modephoto *appmod=phot#
Preset mode status *appmod=?#
Freeze Freeze on/off *freeze#
Freeze status *freeze=?#
Source input Input source VGA *sour=vga#
Input source DVI *sour=dvi#
Input source HDTV *sour=hdtv#
Input source YPbPr *sour=YPbr#
Input source Composite *sour=comp#
Input source SVIDEO *sour=svid#
Input source YCbCr *sour=YCbr#
Status *sour=?#
Source scan Source scan on *scan=on#
Source scan off *scan=off#
Source scan status *scan=?#
Mute Mute on *mute=on#
Mute off *mute=off#
Mute status *mute=?#
Volume Increse Volume *vol=-#
Decrese Volume *vol=+#
Volume *vol=?#
Language English *lang=eng#
FRE(Français) *lang=fre#
Deutsch *lang=ger#
Italiano *lang=ita#
Español *lang=spa#
РУССКИЙ *lang=pro#
繁體中文
*lang=cht#
简体中文
*lang=chs#
日本語
*lang=jap#
korean(한국어)
*lang=kor#
swidish *lang=swd#
dutch *lang=dut#
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turkish *lang=turk#
czech *lang=czech#
portugese *lang=portug#
thai *lang=thai#
polish *lang=pol#
Language *lang=?#
Lamp Time Reset Lamp usuage hour *ltim=rst#
Lamp usuage hour *ltim=?#
Error status *err#
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Appendix 6 – DDC Table (EDID FILE)
Time: 16:19:49
Date: Tue Dec 05, 2006
______________________________________________________________________
VIEWSONIC CORPORATION
EDID Version # 1, Revision # 3
DDCTest For: ViewSonic PJ503D
______________________________________________________________________
EDID Block 0, Bytes 0-127
128 BYTES OF EDID CODE:
0 1 2 3 4 5 6 7 8 9
________________________________________
0 | 00 FF FF FF FF FF FF 00 5A 63
10 | 1F C7 01 01 01 01 01 10 01 03
20 | 68 00 00 78 0A B6 D4 A2 56 5E
30 | 8B 25 13 50 58 AD CE 00 45 59
40 | 81 80 61 59 31 59 01 01 01 01
50 | 01 01 01 01 A0 0F 20 00 31 58
60 | 1C 20 28 80 14 00 00 00 00 00
70 | 00 1E 00 00 00 FF 00 51 4C 4B
80 | 30 36 30 31 30 30 30 30 31 0A
90 | 00 00 00 FD 00 32 57 1E 64 0B
100 | 00 0A 20 20 20 20 20 20 00 00
110 | 00 FC 00 50 4A 35 30 33 44 0A
120 | 20 20 20 20 20 20 00 7F
______________________________________________________________________
(08-09) ID Manufacturer Name ________________ = VSC
(11-10) Product ID Code _____________________ = C71F
(12-15) Last 5 Digits of Serial Number ______ = Not Used
(16) Week of Manufacture _________________ = 01
(17) Year of Manufacture _________________ = 2006
(10-17) Complete Serial Number ______________ = See Descriptor Block
(18) EDID Version Number _________________ = 1
(19) EDID Revision Number ________________ = 3
(20) VIDEO INPUT DEFINITION:
Analog Signal
0.700, 0.000 (0.700 Vp-p)
Separate Syncs
(21) Maximum Horizontal Image Size ________________ = mm
(22) Maximum Vertical Image Size __________________ = mm
(23) Display Gamma ________________________________ = 2.20
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(24) Power Management and Supported Feature(s):
Preferred Timing Mode
Display Type = R/G/B Color
(25-34) CHROMA INFO:
Red X - 0.635 Green X - 0.368 Blue X - 0.147 White X - 0.313
Red Y - 0.339 Green Y - 0.545 Blue Y - 0.075 White Y - 0.344
(35) ESTABLISHED TIMING I:
720 X 400 @ 70Hz (IBM,VGA)
640 X 480 @ 60Hz (IBM,VGA)
640 X 480 @ 72Hz (VESA)
640 X 480 @ 75Hz (VESA)
800 X 600 @ 60Hz (VESA)
(36) ESTABLISHED TIMING II:
800 X 600 @ 72Hz (VESA)
800 X 600 @ 75Hz (VESA)
1024 X 768 @ 60Hz (VESA)
1024 X 768 @ 70Hz (VESA)
1024 X 768 @ 75Hz (VESA)
(37) Manufacturer's Reserved Timing:
None Specified
(38-53) Standard Timing Identification:
800 X 600 @85Hz
1280 X 1024 @60Hz
1024 X 768 @85Hz
640 X 480 @85Hz
Not Used
Not Used
Not Used
Not Used
______________________________________________________________________
(54-71) Detailed Timing / Descriptor Block 1:
800x600 Pixel Clock: 40.00 MHz
______________________________________________________________________
Horizontal Image Size: 0 mm Vertical Image Size: 0 mm
Refreshed Mode: Non-Interlaced Normal Display - No Stereo
Horizontal:
Active Time: 800 pixels Blanking Time: 256 pixels
Sync Offset: 40 pixels Sync Pulse Width: 128 pixels
Border: 0 pixels Frequency: 37.88 KHz
Vertical:
Active Time: 600 lines Blanking Time: 28 lines
Sync Offset: 1 lines Sync Pulse Width: 4 lines
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Border: 0 lines Frequency: 60.32 Hz
Digital Separate, Horizontal Polarity (+) Vertical Polarity (+)
______________________________________________________________________
(72-89) Detailed Timing / Descriptor Block 2:
Monitor Serial Number:
QLK060100001
______________________________________________________________________
(90-107) Detailed Timing / Descriptor Block 3:
Monitor Range Limits:
Min Vertical Freq - 50 Hz
Max Vertical Freq - 87 Hz
Min Horiz. Freq - 30 KHz
Max Horiz. Freq - 100 KHz
Pixel Clock - 110 MHz
Secondary GTF - Not Supported
______________________________________________________________________
(108-125) Detailed Timing / Descriptor Block 4:
Monitor Name:
PJ503D
(126) No Extension EDID Block(s)
(127) CheckSum OK
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* Reader’s Response*
Dear Readers:
Thank you in advance for your feedback on our Service Manual, which allows continuous improvement
of our products. We would appreciate your completion of the Assessment Matrix below, for return to
ViewSonic Corporation.
Assessment
A. What do you think about the content of this Service Manual?
Unit Excellent Good Fair Bad
1. Introduction
2. Specifications
5. Block Diagram
6. Troubleshooting
7. Schematic Diagrams
9. Exploded Diagrams
11. Appendix
C. Do you have any other opinions or suggestions regarding this service manual?
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