EEL2020 Digital Design Lab Report

Sem II AY 2023-24

Experiment No. : 04

Name : Ankit Shaw

Roll No. : B22EE009

Partner Name (Partner Roll No.) : Anuj Patil (B22EE010)

Objective
Simulate and implement a BCD Adder/Subtractor circuit.

Theory

The BCD Adder/Subtractor circuit consists of 4 full adder and 2 four digit binary inputs and a input for
controlling the addition or subtraction in the circuit. When the control input is 1, the module performs
subtraction and when the control input’s value is 0 the module performs between the two number.
Logic Design

The selection of addition/subtraction operation is done by another input. The sign (in case of
subtraction) and carry (in case of addition) is shown on an LED, while the BCD difference or sum is
shown on a 7-segment display.
The Module checks if the inputs are valid, valid in the sense A and B are less than or equal to 9, else it
none of the led glows.

Source Description
The different sources in this experiment are firstly the source file, two constraint files one for PYNQ
board and one for the RPI addon module and one testbench file. The inputs for this experiment are just
two 4 digit binary numbers A[3:0] and B[3:0] and a control input M for controlling subtraction or
addition.

- Design source
The source file is a add_sub.v module that generates two output seg_out and c_out_sign from inputs
A[3:0] and B[3:0] and M.

- Constraint file
The PYNQ XDC file was updated with the following changes:

Ports Designation Pin Configuration

(from Verilog module) (Input/Output) PYNQ Component Type (from the PYNQ User
(Button/LED/Switch etc. along Manual)
with number, eg. LD01, BTN2, etc.)

seg_out[0] Output PMOD B JB1_P W14

seg_out[1] Output PMOD B JB1_N Y14

seg_out[2] Output PMOD B JB2_P T11

seg_out[3] Output PMOD B JB2_N T10

 seg_out [4] Output PMOD B JB3_P V16

seg_out[5] Output PMOD B JB3_N W16

seg_out[6] Output PMOD B JB4_P V12

c_out_sign Output LED0 R14

M Input SW1 M19

The RPI XDC file was updated with the following changes:

Ports Designation Pin Configuration

(from Verilog module) (Input/Output) RPI Component Type (from the RPI User Manual)
(Button/LED/Switch etc. along
with number, eg. LD01, BTN2, etc.)

B[0] Input SWITCH RPIO_14 V6

B[1] Input SWITCH RPIO_15 Y6

B[2] Input SWITCH RPIO_16 B19

B[3] Input SWITCH RPIO_17 U7

A[0] Input SWITCH RPIO_18 C20

A[1] Input SWITCH RPIO_19 Y8

A[2] Input SWITCH RPIO_20 A20

A[3] Input SWITCH RPIO_26 W9

- Simulation source
The simulation file includes a testbench.v file which generates the waveform for each of the variables
with different inputs.
Simulation Results
Elaborated Design

PYNQ Working Video

https://drive.google.com/file/d/18GZca-
oMacE5CDR5askMmQaNMbMHKnPO/view?usp=classroom_web&authuser=0

List of Attachments
https://drive.google.com/file/d/1LZAU2WppH3YO7bor_hbbnhcs8NeHuxmj/view?usp=classroom_web
&authuser=0