CPLD & FPGA Architectures and Applications (A2ECT513)

Unit-I

Topics

1. PLA Structure with 3-inputs,five product terms and four outputs

2. Architecture of Xilinx XCR3064XL CPLD
3. AND-OR array Equivalent of PLA structure
4. N-bit parallel adder with accumulator

Topics

1. Programmable Logic Array Structure

2. N-bit parallel adder with accumulator
3. Full Adder using PAL Structure
4. Xilinx XCR3064XL CPLD Architecture diagram

Topics

1. 8-word x 4-bit ROM Diagram with truth table

2. Function Block and Macrocell Definitions
3. Short note on Programmed PAL Segment with diagram
4. Function Block and Macrocell (realize/Implement)

Unit-II

Topics

1. FPGA Architecture with neat block diagram

2. Programmable I/O blocks in FPGAs
3. What is an FPGA? Advantages and disadvantages of FPGA?

Topics

1. Programmable logic block architecture

2. Applications of FPGA
3. Problems associated with designing with FPGAs

Topics

1. List out the applications of FPGA

2. Programmable Interconnects
3. Classify the taxonomy of FPGAs
Unit-III

Topics

1. Xilinx Four, five and Six Transistor RAM Cells

2. Simplified view of an Actel Module and routing segments
3. Xilinx XC2000 CLB architecture
4. Routing using Long Vertical track also with another column

Topics

1. Advantages and disadvantages of SRAM Programming

2. fully, non-segmented and segmented routing
3. Xilinx XC3000 IOB architecture
4. Act1 logic Module

Topics

1. Lookup Table and Programmable Interconnect Point definitions

2. Basic Actel Architecture
3. Tabulate the Xilinx XC4000 family members
4. Advantages for antifuse programmed FPGAs

Unit-IV

Topics

1. Xilinx Spartan-6 Architecture

2. ASIC design flow
3. Xilinx Virtex-6 Architecture
4. FPGA design flow

Topics

1. Xilinx Zynq Board Architecture

2. Back end digital design tools for ASIC’s
3. Xilinx Nexys4 DDR FPGA Board Architecture
4. Front end digital design tools for FPGA’s and ASIC’s

Topics

1. Features of Virtex-6 FPGA

2. Comparison between front end vs back end tools
3. features of Spartan-6 FPGA
4. Difference between FPGAs vs ASICs
Unit-V

Topics

1. Design Validation block diagram

2. ATPG Architecture block diagram
3. Fault simulation block diagram
4. TPG Architecture block diagram

Topics

1. Short note on Fault simulation

2. Fault manager with diagram
3. Short note on Logic Simulation
4. TEST with stuck-at-0 and stuck-at-1 fault

Topics

1. Tabulate the modeling levels and simulation types

2. Fault simulator diagram
3. Plot the Unit and multiple delay timing waveforms
4. Testability analyzer definition