MADANAPALLE INSTITUTE OF TECHNOLOGY &SCIENCE

(UGC-AUTONOMOUS INSTITUTION)
Affiliated to JNTUA, Ananthapuram &Approved by AICTE, New Delhi NAAC Accredited
Institution with A+ Grade, NIRF India Rankings 2022-Band:251 -300 in the Engineering
Discipline, NBA Accredited -B. tech (CIVIL, CSE, ECE, EEE, MECH), MBA, MCA.

DEPARTMENT OF COMPUTER SCIENCE AND TECHNOLOGY

ROLL NUMBER : 22691A2826
NAME OF THE STUDENT : SHAIK MOHAMMED AZEEMUDDIN
YEAR, SEMESTER AND SECTION : CST-A 2nd YEAR, 2nd SEMESTER
NAME OF THE COURSE : COMPUTER ARCHITECTURE
COURSE CODE : 20CST104
ASSIGNMENT NO :1
ACADEMIC YEAR : 2023-2026
DATE OF SUBMISSION :
NO.OF SHEETS/ PAGES : 03
NAME OF THE FACULTY : Dr. P. Firoze Khan

SIGNATURE OF FACULTY

1. Distinguish between RICS and CISC instructions in detailed?

 DISTINGUISHING RICS AND CISC INSTRUCTIONS:
RICS and CISC are two distinct approaches to processor architecture, each with its own set of
instructions. Here's a detailed breakdown of their key differences:

Number of Instructions:

 RICS (Reduced Instruction Set Computer): Smaller set of simpler instructions

(typically less than 100).
 CISC (Complex Instruction Set Computer): Larger set of more complex instructions.

Instruction Format:

 RICS: Fixed-length instructions, easier for decoding and processing.

 CISC: Variable-length instructions, can be more efficient for specific tasks but require
complex decoding.

Addressing Modes:

 RICS: Limited addressing modes, relying on registers for data manipulation.

 CISC: More complex addressing modes, allowing direct memory access within
instructions.

Instruction Execution:

 RICS: Emphasis on pipelining and parallel processing to execute instructions faster.

 CISC: Hardware-assisted execution of complex instructions, potentially faster for
individual tasks.

Performance Focus:

 RICS: Focuses on minimizing instruction cycles per instruction (CPI) for overall speed.
 CISC: Focuses on minimizing the number of instructions per program, potentially
reducing memory usage.

Development Philosophy:

 RICS: Software-centric approach, relies on compilers to optimize code for RISC

architecture.
 CISC: Hardware-centric approach, relies on hardware complexity to handle complex
instructions.

Examples:
 RICS: ARM, MIPS, PowerPC
 CISC: x86 (Intel, AMD), Motorola 68000

Additional Points:

 The distinction between RICS and CISC has blurred in recent years, with modern
processors incorporating elements from both approaches.
 The choice between RICS and CISC depends on specific needs, such as power
efficiency, performance requirements, and application type.

1. Demonstrate the various forms of representing the computer

instructions?

There are several ways to represent computer instructions, each with its own level of
abstraction and purpose. Here are some common forms:

1. Machine Language:

 This is the lowest level, directly understood by the CPU.

 It consists of binary codes (0s and 1s) representing the opcode (operation) and data
operands.
 Each instruction occupies a specific memory location.
 Human-readable, but difficult to understand due to binary nature.
 Example: 01100001 00100010 11000100 (addition instruction on ARM architecture)

2. Assembly Language:

 More human-readable than machine language, using symbolic names for opcodes and
operands.
 Requires an assembler program to convert it into machine code.
 Still requires knowledge of the specific instruction set architecture (ISA).
 Example: ADD R1, R2, #10 (add value 10 to registers R1 and R2)
 3. High-Level Languages:

 Use natural language-like syntax, allowing programmers to focus on functionality.

 Compiler translates the code into assembly or machine code for specific platforms.
 Offer higher levels of abstraction, hiding instruction details.
 Examples: x = y + 5 (C++), def add(a, b): return a + b (Python)

4. Microinstructions:

 Used to control the internal operations of the CPU within a machine cycle.
 Granular level, focusing on data transfer within CPU components.
 Not directly accessible to programmers, but important for understanding CPU design.
 Example: Fetch opcode from memory, Decode instruction, Load data
from registers

5. Instruction Set Architecture (ISA):

 Defines the complete set of instructions supported by a processor.

 Documents instruction formats, addressing modes, data types, and other details.
 Used by compiler writers and system software developers to understand and utilize the
processor's capabilities.
 Example: ARMv8 architecture, x86-64 instruction set

Additional forms:

 Bytecode: Intermediate language used by virtual machines like Java Virtual Machine
(JVM).
 Human-readable descriptions: Plain language explanations of program logic, not
directly representing instructions.

The choice of representation depends on the purpose and target audience. Machine
code is essential for CPU execution, while assembly and high-level languages are used
for programming. Microinstructions and ISA documentation are valuable for
understanding CPU design and optimization.