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Lecture # 1
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Course Objective
• This course aims to develop an understanding
of the programmer’s model (registers and
instruction set) and the hardware components
(based on this model) and their
interconnections. The optimizations done at
the architectural level in order to achieve a
particular system performance will also be
discussed.
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Course Contents
Course Contents
1. Basic concepts
2. Performance Measurement of Computers
3. RISC-V Architecture
i. Instruction set of RISC-V Processor
ii. Operands
iii. Programming
iv. Machine Language
4. Computer Arithmetic
5. RISC-V Micro architecture
i. Single Cycle processor
ii. Multi-cycle processor
iii. Pipelined Processor
iv. Hazards of Pipelining
v. Advanced microarchitecture
6. Memory Systems 3
Reference Books
• David A. Patterson and John L. Hennessy, Computer
Organization and Design RISC-V Edition, MK Elsevier
• Sarah L. Harris and David M. Harris, Digital Design
and Computer Architecture RISC-V Edition, MK
Elsevier
• David A. Patterson and John L. Hennessy, Computer
Architecture: A quantitative approach, 6th Edition,
MK Elsevier
• William Stallings, Computer Organization and
Architecture: Designing for Performance, Pearson
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Grading Criteria
Quizzes/Assignments/Research Paper
Presentations: 20%
Course Project: 20%
Mid Exam: 20%
Final Exam 40%
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Course Project
• Possible Course Projects
– Design of a RISC Processor using HDL
– Implementation of a Research Paper related to
computer architecture
– Review paper on Some Computer Architecture
topic etc.
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Background in Computer Architecture
?
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Basic Concepts
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Myopic View of Computer Architecture –
Instruction Set Architecture
• Computer architecture refers to those attributes of a system visible
to a programmer or, put another way, those attributes that have a
direct impact on the logical execution of a program.
• A term that is often used interchangeably with computer
architecture is instruction set architecture (ISA).
• The ISA defines instruction formats, instruction opcodes, registers,
instruction and data memory; the effect of executed instructions on
the registers and memory; and an algorithm for controlling
instruction execution.
• Examples of architectural attributes include:
– the instruction set
– the number of bits used to represent various data types (e.g., numbers,
characters)
– I/O mechanisms
– techniques for addressing memory. 9
Computer Organization and Hardware
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Computer Architecture
ISA
Organization
Hardware
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Computer Architecture
Application
Operating
System
Compiler Firmware
Instruction Set
Architecture
Instr. Set Proc. I/O system
Datapath & Control
Digital Design
Circuit Design
Layout
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The Instruction Set: a Critical Interface
software
instruction set
hardware
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Goal of Computer Architect
• Meet the functional
requirements keeping in Technology Programming
view different Languages
constraints
– Price Applications
– Power
Computer Constraints
– Performance Architecture
– Availability e.g. cost, energy
• Determining the
functional requirements Operating
is also a major task of Systems
architect. History
• Must also aware of the
trends in technology and
the use of computers
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Application Areas
• Scientific
• Mobile Devices
• Desktop
• Servers
• Clusters/warehouse-scale computers
• Embedded systems
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Technology Trends
• IC Technology – Transistor count increased by
approx. 40-55% per year or doubling every 18-
24 months
• DRAM – quadrupling every three years. Now
decelerated in recent years
• Semiconductor Flash – doubling roughly 2
years
• Magnetic disk – varied between different
periods
• Network Technology
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Moore’s Law
“About every eighteen months,
the number of transistors on a
CMOS silicon chip doubles and
the clock speed doubles”
– Transistors/Chip increasing by
50% per year (by 4X in 3.5
years)
– Gate Delay decreasing by 13%
per year (by ½ in 5 years)
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Moore’s Law
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Why Scaling?
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Computer Organization – Von Neumann Architecture
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Complex Instruction Set Computer (CISC) Verses
Reduced Instruction Set Computer (RISC)
• 'Complex‘ means 'One Instruction' in CISC can
perform 'Complex functions'.
• The CISC approach attempts to minimize the number of
instructions per program by
– Sacrificing the number of cycles per instruction
• The RISC reduces the cycles per instruction at the cost
of the
– Number of instructions per program
• The simplest way to examine the advantages and
disadvantages of RISC architecture is by
– Contrasting it with CISC architecture by taking an example
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Example: Multiplying Two Numbers in Memory
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Multiplying Two Numbers :The CISC Approach (1/2)
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Multiplying Two Numbers :The CISC Approach (2/2)
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Multiplying Two Numbers :The RISC Approach
• RISC processors only use simple instructions that can be executed within
one clock cycle
• The "MULT" command described in CISC could be divided into three
separate commands:
– "LOAD," which moves data from the memory bank to a register
– "PROD," which finds the product of two operands located within the
registers
– "STORE," which moves data from a register to the memory banks.
• In order to perform the exact series of steps described in the CISC
approach, a programmer would need to code four lines of assembly: LOAD
LOAD A, 2:3
LOAD B, 5:2
PROD A, B
STORE 2:3, A
• This may seem like a much less efficient way of completing the operation
– There are more lines of code, more RAM is needed to store the
assembly level instructions.
– The compiler also perform more work to convert a high-level language
statement into code of this form.
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Advantages of RISC
• The RISC strategy also brings some very important
advantages.
– Each instruction requires only one clock cycle to execute,
therefore
• The entire program will execute in approximately the same
amount of time as the multi-cycle "MULT" command
– RISC "reduced instructions" require less transistors of hardware
space than the complex instructions, leaving more room for
general purpose registers
– All of the instructions execute in a uniform amount of time (i.e.
one clock), pipelining is possible
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