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Course Objectives
To understand the CMOS fabrication process, circuits and physical design
To design and analyze the MOS circuits using various logic styles.
To analyze the different test methods for CMOS circuits
e. PO5:Modern tool usage: Create, select, and apply appropriate techniques, resources,
andmodernengineeringandITtoolsincludingpredictionandmodelingtocomplex engineering activities with an
understanding of the limitations.
m. PSO1: Able to apply the concepts of Electronics, Communication, Signal processing and VLSI in the
design and implementation of application oriented engineering systems.
Articulation Matrix
CO No PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2
1 1 1 1 1 2 1
2 2 3 1 2 1 1
3 1 3 2 3 3 3
4 1 3 3 3 3 3
5 1 2 1 2 2
UNIT I 9 Hours
FABRICATION OF CMOS IC AND PHYSICAL DESIGN
Silicon Semiconductor technology: Wafer processing, Oxidation, Epitaxy, Diffusion and Silicon gate
process, NMOS fabrication , CMOS fabrication: n-well, p-well, Twin tub and SOI Process , Layout design
rules , Stick Diagrams, CMOS Logic Gate, Implementation of given logic function using CMOS logic.
UNIT II 9 Hours
MOS CIRCUIT DESIGN PROCESS
Basic MOS transistors: Symbols, Enhancement mode, Depletion mode transistor operation - Regions of
operation, Second order effects of MOSFET, MOS Scaling, Fundamental limits of MOS scaling , CMOS
inverter: DC Characteristics, Power dissipation.
UNIT IV 9 Hours
VLSI SYSTEM COMPONENTS
Ripple Carry Adder, Carry Look Ahead Adder, Carry Skip Adder, Carry select Adder, Carry save Adder,
Multiplier, Array, Booth, Baugh Wooley.
UNIT V 9 Hours
TESTING OF VLSI CIRCUITS
Importance of testing, Challenges in VLSI Testing, Faults in digital circuits, Fault models in CMOS, Test
pattern generation methods: Path sensitization, Boolean Difference, Built in self test.
1 3 Hours
EXPERIMENT 1
Characterization of NMOS and PMOS Transistor.
2 6 Hours
EXPERIMENT 2
Semi-Custom and Full Custom Layout of CMOS Inverter
3 9 Hours
EXPERIMENT 3
Comparison of Area, Power, Delay of CMOS, Pseudo NMOS, Dynamic, Domino Logic, CVSL logic of any
combinational circuit
4 6 Hours
EXPERIMENT 4
Design and simulation of Adders using EDA Tools
5 6 Hours
EXPERIMENT 5
Design and simulation of Multipliers using EDA Tools
Total: 75 Hours
Reference(s)
Neil.H.E Weste David Harris CMOS VLSI Design: A Circuits and Systems Perspective, 4th edition,
Pearson Addison Wesley, 2015.
John P.Uyemura, Introduction to VLSI circuits and systems, John Wiley, 2016.
Kamran Eshraghian, Douglas A. Pucknell, Essentials of VLSI Circuits and Systems Prentice Hall of
India, 2015.
Kang and Yusuf Leblebici, CMOS Digital Integrated Circuits, Tata McGraw Hill, 2014
Rabaey, Chandrakasan and Nikolic, Digital Integrated Circuit: A design Perspective, PHI, Second
Edition ,2016.
Abramovici .M, Breuer M.A and Friedman A.D, Digital Systems and Testable Design, Jaico
Publishing House, 2002.