Wistron 19869-1 Thinkbook 13s Gen2 Intel

5 4 3 2 1
D
LV550 TGL-U Schematics D
RESISTOR CAPACITOR
Symbol name Value Tolerance Rating Size Symbol name Value Tolerance Rating Size
0402=> 1/16W, 25V 2=>0402, 3=>0603, 5=>0805, (M: +/-20, K: +/-10, Z: +80/-20) 2=>0402, 3=>0603, 5=>0805,
(J: 5%, F: 1%, D: 0.5%, B: 0.1 %) 0603 => 1/16W, 75V 6=>1206, 0=>1210 6=>1206, 0=>1210
0805 => 1/10W, 100V
SCD1U10V2MX-1 0.1uF M/X5R 10V 0402
10KR3 10K Ohm If no letter, it means J: 5% 1/16W, 75V 0603
SC10U6D3V5MX 10uF M/X5R 6.3V 0805
33D3R5 33.3 Ohm If no letter, it means J: 5% 1/10W, 100V 0805
SC2D2U16V5ZY 2.2uF Z/Y5V 16V 0805
C 1KR3F 1K Ohm F: 1% 1/16W, 75V 0603 C
The naming rule is

The naming rule is value + R + size + tolerance Capacitor type + value + rating + size + tolerance + material
For the value, it can be read by the number before R. (R means resistor) SCD1U10V2MX-1
For the tolerance, it can be read from the last letter. SC=> SMT Ceremic, TC=> POS cap or SP cap
For the rating, we don't show on the symbol name. D1U => 0.1uF
For the size, R2=>0402, R3=>0603, R5=>0805,.... 10V => the voltage rating is 10V
2=> 0402, 3=>0603, 5=>0805
M=>tolerance M, K, Z
X=> X7R/X5R, Y=> Y5V
Properties -1 => symbol version, nonsense to EE characteristic
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
Size Document Number Rev
A3
V550_TGL -1
Date: Monday, July 27, 2020 Sheet 1 of 106
5 4 3 2 1
5 4 3 2 1
PCB Layer Stackup

Project code: 13"-4PD0LX010001 L1 : Signal
14"-4PD0LY010001 L2: GND\POWER
PCB P/N: 19869

Revision:-1
LV550 TGL Block Diagram L3:
L4:
L5:
L6:
Signal
Signal
GND\POWER
Signal
L7: GND\POWER
L8: Signal
L9: GND
L8: Signal
D 13”14” FHD LCD Battery Charger/Selector D
with touch eDP x4 LPDDR4X 3733MHz Channel A LPDDR4X-Memory Down 1 BQ25710 44

55
19V_AD_JK 19V_DCBATOUT
12 BT+
Touch Panel Intel CPU System DC/DC

I2C TPS51395PRJER 45
55
5V_S5
Tiger LAKE-U 4+2 LPDDR4X 3733MHz Channel B LPDDR4X-Memory Down 2 19V_DCBATOUT 5V_AUX_S5
System DC/DC
1449 Pin 13
TPS51393PRJER 45
Re-Timer PCH-LP 19V_DCBATOUT 3D3V_AUX_S5
HDMI 2.0b DDI
PS8409
DDI
CPU_VCORE
4 TCSS Lanes
57 57 RT3613EEGQW 46
12 PCIe*3.0 Lanes
(SATA*2, USB31*4)
CNVi WLAN on board
1 PCIE4.0x4 Lanes DC/DC VCCCPUCORE
10 USB2.0 61 AOZ5516QI 47
CNVi2.0
19V_DCBATOUT 1V_CPU_CORE
ESPI / SPI
Type C (TBT) TBT RETIMER HDA/SNDW

CIO INTEL TCP0/I2C0 CSI
72 Burnside BRIDGE
(Remove SD/EMMC) M.2 SSD 2280
C 71 PCIE4.0 x4 C
NvMe
DC/DC VCCAUX
63 RT6543AGQW 50
19V_DCBATOUT 1D8V_VCCIN_AUX
DC/DC 1D1V_S3
PD TPS51487XRJER 51
CC SN1905004YBGR73 I2C SPI Flash ROM 32MB 25
19V_DCBATOUT 1D1V_S3
DC/DC 0D6V_S3
SPI KBC Nuvton TPS51487XRJER 51
NPC386 19V_DCBATOUT 0D6V_S3
SMBUS Hall Sensor 67 DC/DC 1D8V_S3

IOBD CONN USB3.0 TPS51487XRJER 51
(USB3.0 Port1) PS2 Int. Keybord 19V_DCBATOUT 1D8V_S3
24 65
(USB3.0 Port2) USB2.0 DC/DC 1D8V_S5
RT5797ALGQW 53
PWM FAN 26
(Finger Print) SPI 3D3V_S5 1D8V_S5
66
PCIE
DC/DC 8V_AMP
TPS54302DDCR 54
B 19V_DCBATOUT 8V_AMP B
I2C Touch Pad 65
IOBD
USB3.1 USB3.0 Re-Driver USB3.1 USB1(USB3.0)AOU

PS8719 DMIC DMIC MICL_L/MIC_R
TRANS BD
USB2.0 x1 66 USB2 Camera
USB3.0 Re-Driver USB3.1 USB1(USB3.0)
USB3.1 PS8719
Universal Jack
Audio Codec HP_R/L
HDA
Realtek
USB2.0 Finger Print 65 ALC3306 27
2CH SPEAKER
(2CH 2W/4ohm)
A
AMP A
TAS277028
29 BOM1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Block Diagram
A2
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
24 PECI_CPU 21 OF 21
CPU1U
15,99 DBG_PMODE
24,44,46,73 PROCHOT_CPU_N
1CPU_CATERR M7 K4 CPU_JTAG_TRST_N
TP302 PECI_CPU CATERR# PROC_TRST# CPU_JTAG_TMS
BK9 B9
PROCHOT_N_CPU_R E2 PECI PROC_TMS D12 CPU_JTAG_TDO
THERMTRIP_N_CPU M5 PROCHOT# PROC_TDO A12 CPU_JTAG_TDI
THRMTRIP# PROC_TDI B6 CPU_JTAG_TCK
CPU_POPI_RCOMP CT39 PROC_TCK
99 CPU_JTAG_TCK PCH_OPI_RCOMP PROC_POPIRCOMP
CB9 D8
CW12 PCH_OPIRCOMP PCH_JTAGX A9
99 CPU_JTAG_TDI TP#CW12 PCH_TMS
D CM39 E12 D
TP#CM39 PCH_TDO B12
99 CPU_JTAG_TDO DBG_PMODE PCH_TDI PCH_JTAG_TCK
DBG_PMODE DF4 strap A7
Output DBG_PMODE PCH_TCK H4
99 CPU_JTAG_TMS ITP Power Mode Indicator. PCH_TRST#
DB42
TPM_ID0 DB41 GPP_B4/CPU_GP3 C11 CPU_JTAG_PREQ_N
99 CPU_JTAG_TRST_N GPP_B3/CPU_GP2 PROC_PREQ#
DF8 D11 CPU_JTAG_PRDY_N
DU5 GPP_E7/CPU_GP1 PROC_PRDY#
99 CPU_JTAG_PRDY_N GPP_E3/CPU_GP0 CPU_EAR
G1
DF31 EAR_N/EAR_N_TEST_NCTF
99 CPU_JTAG_PREQ_N GPP_H2
DV32 DT15
DW32 GPP_H1strap strap GPP_F7
DR15 #607872 Rev1p1
99 PCH_JTAG_TCK GPP_H0strap GPP_F9 DT14 Tiger Lake U and Tiger Lake Y has adequate internal
strap strap GPP_F10 bias resistance on JTAG,
DJ27 PROC_PREQ# and PROC_PRDY# signals to keep the devices
GPP_H19/TIME_SYNC0 in an idle state without
the external pull up resistors.
TGL-U-1-GP-U1
1D05V_VCCSTG_TERM 1D05V_VCCSTG_TERM #575683 Rev0p95

EAR_N/EAR_N_TEST_NCTF
Stall reset sequence after PCU PLL
lock until de-asserted:
1
— 1 = (Default) Normal
R302 Operation; No stall.
— 0 = Stall.
1KR2J-1-GP
C XDP 1D05V_VCCSTG C
1 R303 2 CPU_JTAG_TDI
2
1 R304 2 CPU_JTAG_TMS PROCHOT_CPU_N 1 R305 2 PROCHOT_N_CPU_R
XDP 51R2J-2-GP 499R2F-2-GP 1 2 CPU_EAR
51R2J-2-GP R313 1KR2J-1-GP
51R2J-2-GP 1D05V_VCCST
R306 1 2
DCI XDP CPU_JTAG_TDO
1 2 CPU_JTAG_TCK
R307 DCI XDP
51R2J-2-GP 1 2 THERMTRIP_N_CPU
R308
1KR2J-1-GP GPP_F7
This strap has a 20 kohm ± 30% internal pull-down.
1 2 CPU_CATERR GPP_F7 Reserved Rising edge of This strap should sample LOW. There should NOT be any onboard
RSMRST# device driving it to opposite direction during strap
R318 sampling.
1KR2J-1-GP Notes: 1. The internal pull-down is disabled after RSMRST#
de-asserts.
CPU_POPI_RCOMP 2. This signal is in the primary well.
1 R310 2
49D9R2F-GP
1 R311 2 PCH_OPI_RCOMP GPP_F10

49D9R2F-GP This strap has a 20 kohm ± 30% internal pull-down.
GPP_F10 Reserved Rising edge of This strap should sample LOW. There should NOT be any onboard
RSMRST# device driving it to opposite direction during strap
sampling.
Notes: 1. The internal pull-down is disabled after RSMRST#
de-asserts.
2. This signal is in the primary well.
B B
GPP_H0
GPP_H0 Boot Strap 1 Rising edge of This is bit 1 of a total of 4-bit encoded pin straps for boot
RSMRST# configuration.
Refer to Boot Strap 0 (on GPP_C5) for the encoding.
de-asserts.
SPI0_H1
FW TPM This strap has a 20 kohm ± 30% internal pull-down.
This is bit 2 of a total of 4-bit encoded pin straps for boot
3D3V_S5 GPP_H1 Boot Strap 2 Rising edge of
de-asserts.
1
TPM SPI0_H2
R316
10KR2J-3-GP This strap has a 20 kohm ± 30% internal pull-down.
GPP_H2 Boot Strap 3 Rising edge of This is bit 3 of a total of 4-bit encoded pin straps for boot
2
TPM_ID0 Notes: 1. The internal pull-down is disabled after RSMRST#
de-asserts.
1
Non-TPM
R317
A 10KR2J-3-GP TEST A
2
Wistron Corporation
Title
CPU (THML/JTAG)
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
eDP
55 eDP_TX_CPU_N0
55 eDP_TX_CPU_P0 1 OF 21
55 eDP_TX_CPU_N1 CPU1A
55 eDP_TX_CPU_P1
55 eDP_TX_CPU_N2
55 eDP_TX_CPU_P2 eDP_TX_CPU_P3
55 eDP_TX_CPU_N3 AC2 AY2
eDP_TX_CPU_N3 AC1 DDIA_TXP3 TCP0_TXRX_P1 AY1
55 eDP_TX_CPU_P3 eDP_TX_CPU_P2 DDIA_TXN3 TCP0_TXRX_N1
55 eDP_AUX_CPU_N AD2 BB1
eDP_TX_CPU_N2 AD1 DDIA_TXP2 TCP0_TXRX_P0 BB2
55 eDP_AUX_CPU_P DDIA_TXN2 TCP0_TXRX_N0
D eDP_TX_CPU_P1 AF1 AM5 D
24 eDP_BLEN_CPU eDP_TX_CPU_N1 DDIA_TXP1 TCP0_TX_P1
AF2 AM7
40,55 eDP_VDDEN_CPU eDP_TX_CPU_P0 DDIA_TXN1 TCP0_TX_N1
AG2 AT7
55 eDP_BLCTRL_CPU eDP_TX_CPU_N0 DDIA_TXP0 TCP0_TX_P0
AG1 AT5
55 eDP_HPD_CPU DDIA_TXN0 TCP0_TX_N0 AP7
eDP_AUX_CPU_P AJ2 TCP0_AUX_P AP5
eDP_AUX_CPU_N AJ1 DDIA_AUX_P TCP0_AUX_N
3D3V_S0 DDIA_AUX_N AT2
DN4 TCP1_TXRX_P1 AT1
1 2 DDPA_DATA DDPA_DATA DT6 GPP_E22/DDPA_CTRLCLK/DNX_FORCE_RELOAD TCP1_TXRX_N1 AU1
R401 2K2R2J-L1-GP GPP_E23/DDPA_CTRLDATA TCP1_TXRX_P0 AU2
TBT eDP_HPD_CPU DR5
GPP_E14/DDSP_HPDA/DISP_MISCA
TCP1_TXRX_N0
TCP1_TX_P1
AD5
71 TBT_TCSS_TX_P0
eDP_HPD_CPU 100K PD as LCD page. AD7
HDMI_DDI_TX_P3 T12 TCP1_TX_N1 AH7
71 TBT_TCSS_TX_N0 HDMI_DDI_TX_N3 DDIB_TXP3 TCP1_TX_P0
71 TBT_TCSS_TX_P1 T11 AH5
HDMI_DDI_TX_P2 Y11 DDIB_TXN3 TCP1_TX_N0 AF7
71 TBT_TCSS_TX_N1 HDMI_DDI_TX_N2 DDIB_TXP2 TCP1_AUX_P
Y9 AF5
71 TBT_TCSS_RX_P0 HDMI_DDI_TX_P1 DDIB_TXN2 TCP1_AUX_N
T9
71 TBT_TCSS_RX_N0 HDMI_DDI_TX_N1 DDIB_TXP1 TBT_TCSS_RX_P1
P9 BF1
71 TBT_TCSS_RX_P1 HDMI_DDI_TX_P0 DDIB_TXN1 TCP2_TXRX_P1 TBT_TCSS_RX_N1
V11 BF2
71 TBT_TCSS_RX_N1 HDMI_DDI_TX_N0 DDIB_TXP0 TCP2_TXRX_N1 TBT_TCSS_RX_P0
V9 BE2
71 TBT_TCSS_AUX_P DDIB_TXN0 TCP2_TXRX_P0 TBT_TCSS_RX_N0
BE1
71 TBT_TCSS_AUX_N TCP2_TXRX_N0 TBT_TCSS_TX_P1
AB9 BD7
AD9 DDIB_AUX_P TCP2_TX_P1 BD5 TBT_TCSS_TX_N1
71 TBT_LSX2_TXD DDIB_AUX_N TCP2_TX_N1 TBT_TCSS_TX_P0
AY5
15,71 TBT_LSX2_RXD HDMI_CLK_CPU TCP2_TX_P0 TBT_TCSS_TX_N0
DM29 AY7
HDMI_DATA_CPU 2.2K PU as HDMI page. HDMI_DATA_CPU DK27 GPP_H16/DDPB_CTRLCLK/PCIE_LNK_DOWN TCP2_TX_N0 BB5 TBT_TCSS_AUX_P
GPP_H17/DDPB_CTRLDATA TCP2_AUX_P BB7 TBT_TCSS_AUX_N
HDMI_HPD_CPU 100K PD as HDMI page. HDMI_HPD_CPU DG43 TCP2_AUX_N
C GPP_A18/DDSP_HPDB/DISP_MISCB/I2S4_RXD BK1 C
DG47 TCP3_TXRX_P1 BK2
DJ47 GPP_A21/DDPC_CTRLCLK/I2S5_TXD TCP3_TXRX_N1 BJ2
GPP_A22/DDPC_CTRLDATA/I2S5_RXD TCP3_TXRX_P0 BJ1
HDMI DU8
GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD
TCP3_TXRX_N0
TCP3_TX_P1
BM7
TBT_LSX1_RXD DV8 BM5
57 HDMI_DDI_TX_P3 GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD TCP3_TX_N1
strap BH5
DF6 TCP3_TX_P0 BH7
57 HDMI_DDI_TX_N3 TBT_LSX1_VCC_CONFIG DD6 GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD TCP3_TX_N0 BK5
GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD TCP3_AUX_P BK7
57 HDMI_DDI_TX_P2 strap TCP3_AUX_N
TBT_LSX2_TXD DN23
TBT_LSX2_RXD DM23 GPP_D9/ISH_SPI_CS#/DDP3_CTRLCLK/TBT_LSX2_TXD/GSPI2_CS0# AN2 TCSS_RCOMP_P
57 HDMI_DDI_TX_N2 GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/TBT_LSX2_RXD/GSPI2_CLK TC_RCOMP_P TCSS_RCOMP_N 1 R405
strap AN1 2
DK23 TC_RCOMP_N 150R2F-4-L-GP
57 HDMI_DDI_TX_P1 GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/TBT_LSX3_TXD/GSPI2_MISO
TBT_LSX3_VCC_CONFIG DN21 M8
GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/TBT_LSX3_RXD/GSPI2_MOSI DSI_DE_TE_2
57 HDMI_DDI_TX_N1 strap
DF43 AB1 DISP_RCOMP 2 R406 1
DF45 GPP_A17/DISP_MISCC/I2S4_TXD DDI_RCOMP 150R2F-1-GP
57 HDMI_DDI_TX_P0 3D3V_S5 GPP_A19/DDSP_HPD1/DISP_MISC1/I2S5_SCLK
DF47 CE4
GPP_A20/DDSP_HPD2/DISP_MISC2/I2S5_SFRM DISP_UTILS/DSI_DE_TE_1
57 HDMI_DDI_TX_N0
1 2 USB_OC1_N USB_OC1_N DH52 DISP_UTILS
R402 10KR2J-3-GP DK45 GPP_A14/USB_OC1#/DDSP_HPD3/I2S3_RXD/DISP_MISC3/DMIC_CLK_B1 Output
57 HDMI_HPD_CPU To PD GPP_A15/USB_OC2#/DDSP_HPD4/DISP_MISC4/I2S4_SCLK embedded DisplayPort Utility: Output control
signal used for brightness correction of embedded
eDP_VDDEN_CPU DM8 LCD displays with backlight modulation.
57 HDMI_CLK_CPU eDP_BLEN_CPU EDP_VDDEN
DN8
eDP_BLCTRL_CPU DG10 EDP_BKLTEN
57 HDMI_DATA_CPU EDP_BKLTCTL
TGL-U-1-GP-U1
B B
NOTE:
Others "eDP_HPD_CPU"
15 TBT_LSX1_VCC_CONFIG "eDP_VDDEN_CPU"
15 TBT_LSX3_VCC_CONFIG
"eDP_BLEN_CPU"
PD 100K to LCD side
15 TBT_LSX1_RXD
73 USB_OC1_N
A TEST A
Wistron Corporation
Title
CPU (DDI/EDP/TBT/TPC/)
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
CPU1B 2 OF 21
LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL) DDR4/LP4/LP5/LP5 CMD Flip

M_A_DQ7 CP53 BT42 M_B_CLK_P1
12 M_A_DQ[31:0] M_A_DQ0 13 M_C_DQ[31:0] M_C_DQ0 M_A_DQ6 DDR0_DQ0_7/DDR0_DQ0_7/DDR0_DQ0_7 DDR0_CLK_P1/DDR3_CLK_P/DDR3_CLK_P/DDR3_CLK_P M_B_CLK_N1
CP52 BT41
M_A_DQ1 M_C_DQ1 M_A_DQ5 CP50 DDR0_DQ0_6/DDR0_DQ0_6/DDR0_DQ0_6 DDR0_CLK_N1/DDR3_CLK_N/DDR3_CLK_N/DDR3_CLK_N BP52 M_B_CLK_P0
M_A_DQ2 M_C_DQ2 M_A_DQ4 CP49 DDR0_DQ0_5/DDR0_DQ0_5/DDR0_DQ0_5 NC/DDR2_CLK_P/DDR2_CLK_P/DDR2_CLK_P BP53 M_B_CLK_N0
M_A_DQ3 M_C_DQ3 M_A_DQ3 CU53 DDR0_DQ0_4/DDR0_DQ0_4/DDR0_DQ0_4 NC/DDR2_CLK_N/DDR2_CLK_N/DDR2_CLK_N CD42 M_A_CLK_P1
M_A_DQ4 M_C_DQ4 M_A_DQ[7:0] M_A_DQ2 CU52 DDR0_DQ0_3/DDR0_DQ0_3/DDR0_DQ0_3
DDR0_DQ0_2/DDR0_DQ0_2/DDR0_DQ0_2
NC/DDR1_CLK_P/DDR1_CLK_P/DDR1_CLK_P
NC/DDR1_CLK_N/DDR1_CLK_N/DDR1_CLK_N
CD41 M_A_CLK_N1
M_A_DQ5 M_C_DQ5 M_A_DQ1 CU50 CC52 M_A_CLK_P0
M_A_DQ6 M_C_DQ6 M_A_DQ0 CU49 DDR0_DQ0_1/DDR0_DQ0_1/DDR0_DQ0_1 DDR0_CLK_P0/DDR0_CLK_P/DDR0_CLK_P/DDR0_CLK_P CC53 M_A_CLK_N0
M_A_DQ7 M_C_DQ7 M_A_DQ15 CH53 DDR0_DQ0_0/DDR0_DQ0_0/DDR0_DQ0_0 DDR0_CLK_N0/DDR0_CLK_N/DDR0_CLK_N/DDR0_CLK_N
M_A_DQ8 M_C_DQ8 M_A_DQ14 CH52 DDR0_DQ1_7/DDR0_DQ1_7/DDR0_DQ1_7 BT45 M_B_CKE2
M_A_DQ9 M_C_DQ9 M_A_DQ13 CH50 DDR0_DQ1_6/DDR0_DQ1_6/DDR0_DQ1_6 NC/DDR3_CKE0/DDR3_WCK_P/DDR3_WCK_P BT47 M_B_CKE3
M_A_DQ10 M_C_DQ10 M_A_DQ12 CH49 DDR0_DQ1_5/DDR0_DQ1_5/DDR0_DQ1_5 NC/DDR3_CKE1/DDR3_WCK_N/DDR3_WCK_N BN51 M_B_CKE0
M_A_DQ11 M_C_DQ11 M_A_DQ[15:8] M_A_DQ11 CL53 DDR0_DQ1_4/DDR0_DQ1_4/DDR0_DQ1_4
NC/DDR2_CKE0/DDR2_WCK_P/DDR2_WCK_P
NC/DDR2_CKE1/DDR2_WCK_N/DDR2_WCK_N
BN53 M_B_CKE1
M_A_DQ12 M_C_DQ12 M_A_DQ10 CL52 CD45 M_A_CKE2
M_A_DQ13 M_C_DQ13 M_A_DQ9 CL50 DDR0_DQ1_2/DDR0_DQ1_2/DDR0_DQ1_2 NC/DDR1_CKE0/DDR1_WCK_P/DDR1_WCK_P CD47 M_A_CKE3
M_A_DQ14 M_C_DQ14 M_A_DQ8 CL49 DDR0_DQ1_1/DDR0_DQ1_1/DDR0_DQ1_1 NC/DDR1_CKE1/DDR1_WCK_N/DDR1_WCK_N CA51 M_A_CKE0
M_A_DQ15 M_C_DQ15 M_A_DQ23 CT47 DDR0_DQ1_0/DDR0_DQ1_0/DDR0_DQ1_0 NC/DDR0_CKE0/DDR0_WCK_P/DDR0_WCK_P CA53 M_A_CKE1
M_A_DQ16 M_C_DQ16 M_A_DQ22 CV47 DDR1_DQ0_7/DDR0_DQ2_7/DDR1_DQ0_7 NC/DDR0_CKE1/DDR0_WCK_N/DDR0_WCK_N
M_A_DQ17 M_C_DQ17 M_A_DQ21 CT45 DDR1_DQ0_6/DDR0_DQ2_6/DDR1_DQ0_6 BU52 M_B_A4
D D
M_A_DQ18 M_C_DQ18 M_A_DQ20 CV45 DDR1_DQ0_5/DDR0_DQ2_5/DDR1_DQ0_5 DDR0_CKE1/DDR2_CA4/DDR2_CA5/DDR2_CA1 BL50 M_B_A5
M_A_DQ19 M_C_DQ19 M_A_DQ[23:16] M_A_DQ19 CT42 DDR1_DQ0_4/DDR0_DQ2_4/DDR1_DQ0_4
DDR0_CKE0/DDR2_CA5/DDR2_CA6/DDR2_CA0
M_A_DQ20 M_C_DQ20 M_A_DQ18 CV42 CF42 M_A_B1
M_A_DQ21 M_C_DQ21 M_A_DQ17 CT41 DDR1_DQ0_2/DDR0_DQ2_2/DDR1_DQ0_2 DDR0_CS1/DDR1_CA1/DDR1_CA1/DDR1_CA5 CF47
M_A_DQ22 M_C_DQ22 M_A_DQ16 CV41 DDR1_DQ0_1/DDR0_DQ2_1/DDR1_DQ0_1 DDR0_CS0/NC/DDR1_CS1/DDR1_CA4
M_A_DQ23 M_C_DQ23 M_A_DQ31 CK47 DDR1_DQ0_0/DDR0_DQ2_0/DDR1_DQ0_0 CE53 M_A_A0
M_A_DQ24 M_C_DQ24 M_A_DQ30 CM47 DDR1_DQ1_7/DDR0_DQ3_7/DDR1_DQ1_7 NC/DDR0_CA0/DDR0_CA0/DDR0_CA6 CE50 M_A_A1
M_A_DQ25 M_C_DQ25 M_A_DQ29 CK45 DDR1_DQ1_6/DDR0_DQ3_6/DDR1_DQ1_6 NC/DDR0_CA1/DDR0_CA1/DDR0_CA5 BL53 M_B_CS0_N
M_A_DQ26 M_C_DQ26 M_A_DQ28 CM45 DDR1_DQ1_5/DDR0_DQ3_5/DDR1_DQ1_5 NC/DDR2_CS0/DDR2_CA2/DDR2_CA2 BP47 M_B_B5
M_A_DQ27 M_C_DQ27 M_A_DQ[31:24] M_A_DQ27 CK42 DDR1_DQ1_4/DDR0_DQ3_4/DDR1_DQ1_4
NC/DDR3_CA5/DDR3_CA6/DDR3_CA0
NC/DDR3_CA4/DDR3_CA5/DDR3_CA1
BP42 M_B_B4
M_A_DQ28 M_C_DQ28 M_A_DQ26 CM42 BP45 M_B_B3
M_A_DQ29 M_C_DQ29 M_A_DQ25 CM41 DDR1_DQ1_2/DDR0_DQ3_2/DDR1_DQ1_2 NC/DDR3_CA3/DDR3_CA4/DDR3_CS1 BP44 M_B_B2
M_A_DQ30 M_C_DQ30 M_A_DQ24 CK41 DDR1_DQ1_1/DDR0_DQ3_1/DDR1_DQ1_1 NC/DDR3_CA2/DDR3_CA3/DDR3_CS0
M_A_DQ31 M_C_DQ31 M_B_DQ7 BF53 DDR1_DQ1_0/DDR0_DQ3_0/DDR1_DQ1_0 BB44 M_B_DQS_DP3
M_B_DQ6 BF52 DDR2_DQ0_7/DDR0_DQ4_7/DDR0_DQ2_7 DDR3_DQSP_1/DDR0_DQSP_7/DDR1_DQSP_3 BD44 M_B_DQS_DN3
M_B_DQ5 BF50 DDR2_DQ0_6/DDR0_DQ4_6/DDR0_DQ2_6 DDR3_DQSN_1/DDR0_DQSN_7/DDR1_DQSN_3 BK44 M_B_DQS_DP2
12 M_A_DQS_DN[3:0] M_A_DQS_DN0 13 M_C_DQS_DN[3:0] M_C_DQS_DN0 M_B_DQ4 DDR2_DQ0_5/DDR0_DQ4_5/DDR0_DQ2_5 DDR3_DQSP_0/DDR0_DQSP_6/DDR1_DQSP_2 M_B_DQS_DN2
BF49 BH44
M_A_DQS_DN1 M_C_DQS_DN1 M_B_DQ3 BH53 DDR2_DQ0_4/DDR0_DQ4_4/DDR0_DQ2_4 DDR3_DQSN_0/DDR0_DQSN_6/DDR1_DQSN_2 BA51 M_B_DQS_DP1
M_A_DQS_DN2 M_C_DQS_DN2 M_B_DQ[7:0] M_B_DQ2 BH52 DDR2_DQ0_3/DDR0_DQ4_3/DDR0_DQ2_3
DDR2_DQSP_1/DDR0_DQSP_5/DDR0_DQSP_3
DDR2_DQSN_1/DDR0_DQSN_5/DDR0_DQSN_3
BA50 M_B_DQS_DN1
M_A_DQS_DN3 M_C_DQS_DN3 M_B_DQ1 BH50 BG51 M_B_DQS_DP0
M_B_DQ0 BH49 DDR2_DQ0_1/DDR0_DQ4_1/DDR0_DQ2_1 DDR2_DQSP_0/DDR0_DQSP_4/DDR0_DQSP_2 BG50 M_B_DQS_DN0
M_B_DQ15 AY53 DDR2_DQ0_0/DDR0_DQ4_0/DDR0_DQ2_0 DDR2_DQSN_0/DDR0_DQSN_4/DDR0_DQSN_2 CK44 M_A_DQS_DP3
12 M_A_DQS_DP[3:0] M_A_DQS_DP0 13 M_C_DQS_DP[3:0] M_C_DQS_DP0 M_B_DQ14 DDR2_DQ1_7/DDR0_DQ5_7/DDR0_DQ3_7 DDR1_DQSP_1/DDR0_DQSP_3/DDR1_DQSP_1 M_A_DQS_DN3
AY52 CM44
M_A_DQS_DP1 M_C_DQS_DP1 M_B_DQ13 AY50 DDR2_DQ1_6/DDR0_DQ5_6/DDR0_DQ3_6 DDR1_DQSN_1/DDR0_DQSN_3/DDR1_DQSN_1 CT44 M_A_DQS_DP2
M_A_DQS_DP2 M_C_DQS_DP2 M_B_DQ12 AY49 DDR2_DQ1_5/DDR0_DQ5_5/DDR0_DQ3_5 DDR1_DQSP_0/DDR0_DQSP_2/DDR1_DQSP_0 CV44 M_A_DQS_DN2
M_A_DQS_DP3 M_C_DQS_DP3 M_B_DQ[15:8] M_B_DQ11 BC53 DDR2_DQ1_4/DDR0_DQ5_4/DDR0_DQ3_4
CK51 M_A_DQS_DP1
M_B_DQ10 BC52 CK50 M_A_DQS_DN1
M_B_DQ9 BC50 DDR2_DQ1_2/DDR0_DQ5_2/DDR0_DQ3_2 DDR0_DQSN_1/DDR0_DQSN_1/DDR0_DQSN_1 CR51 M_A_DQS_DP0
M_B_DQ8 BC49 DDR2_DQ1_1/DDR0_DQ5_1/DDR0_DQ3_1 DDR0_DQSP_0/DDR0_DQSP_0/DDR0_DQSP_0 CR50 M_A_DQS_DN0
12 M_A_CLK_N0 13 M_C_CLK_N0 M_B_DQ23 BK47 DDR2_DQ1_0/DDR0_DQ5_0/DDR0_DQ3_0 DDR0_DQSN_0/DDR0_DQSN_0/DDR0_DQSN_0
12 M_A_CLK_P0 13 M_C_CLK_P0 M_B_DQ22 BK45 DDR3_DQ0_7/DDR0_DQ6_7/DDR1_DQ2_7 CF44 M_A_B0
12 M_A_CLK_N1 13 M_C_CLK_N1 M_B_DQ21 DDR3_DQ0_6/DDR0_DQ6_6/DDR1_DQ2_6 DDR0_ODT1/DDR1_CA0/DDR1_CA0/DDR1_CA6 M_A_CS2_N
BH47 CF45
12 M_A_CLK_P1 13 M_C_CLK_P1 M_B_DQ20 DDR3_DQ0_5/DDR0_DQ6_5/DDR1_DQ2_5 DDR1_ODT0/DDR1_CS0/DDR1_CA2/DDR1_CA2
BH45
12 M_A_CKE0 13 M_C_CKE0
M_B_DQ[23:16] M_B_DQ19 BH42 DDR3_DQ0_4/DDR0_DQ6_4/DDR1_DQ2_4
DDR3_DQ0_3/DDR0_DQ6_3/DDR1_DQ2_3 DDR0_MA16/DDR1_CA4/DDR1_CA5/DDR1_CA1
CB47 M_A_B4
M_B_DQ18 BK42 CB44 M_A_B3
12 M_A_CKE1 13 M_C_CKE1 M_B_DQ17 BK41 DDR3_DQ0_2/DDR0_DQ6_2/DDR1_DQ2_2 DDR0_MA15/DDR1_CA3/DDR1_CA4/DDR1_CS1 CB45 M_A_B2
12 M_A_CKE2 13 M_C_CKE2 M_B_DQ16 BH41 DDR3_DQ0_1/DDR0_DQ6_1/DDR1_DQ2_1 DDR0_MA14/DDR1_CA2/DDR1_CA3/DDR1_CS0 CF41 M_A_CS3_N
12 M_A_CKE3 13 M_C_CKE3 M_B_DQ31 BD47 DDR3_DQ0_0/DDR0_DQ6_0/DDR1_DQ2_0 DDR0_MA13/DDR1_CS1/DDR1_CS0/DDR1_CA3 BU53 M_B_A1
M_B_DQ30 BB47 DDR3_DQ1_7/DDR0_DQ7_7/DDR1_DQ3_7 DDR0_MA12/DDR2_CA1/DDR2_CA1/DDR2_CA5 BT51
12 M_A_CS0_N 13 M_C_CS0_N M_B_DQ29 BD45 DDR3_DQ1_6/DDR0_DQ7_6/DDR1_DQ3_6 DDR0_MA11/NC/DDR2_CS1/DDR2_CA4 BV42 M_B_B1
12 M_A_CS1_N 13 M_C_CS1_N M_B_DQ28 BB45 DDR3_DQ1_5/DDR0_DQ7_5/DDR1_DQ3_5 DDR0_MA10/DDR3_CA1/DDR3_CA1/DDR3_CA5 BU50 M_B_A0
12
12
M_A_CS2_N
M_A_CS3_N
13
13
M_C_CS2_N
M_C_CS3_N
M_B_DQ[31:24] M_B_DQ27 BB42 DDR3_DQ1_4/DDR0_DQ7_4/DDR1_DQ3_4
DDR0_MA9/DDR2_CA0/DDR2_CA0/DDR2_CA6
DDR0_MA8/DDR0_CA2/DDR0_CA3/DDR0_CS0
BY53 M_A_A2
M_B_DQ26 BB41 CA50 M_A_A4
M_B_DQ25 BD42 DDR3_DQ1_2/DDR0_DQ7_2/DDR1_DQ3_2 DDR0_MA7/DDR0_CA4/DDR0_CA5/DDR0_CA1 BY52 M_A_A3
12 M_A_A0 13 M_C_A0 M_B_DQ24 DDR3_DQ1_1/DDR0_DQ7_1/DDR1_DQ3_1 DDR0_MA6/DDR0_CA3/DDR0_CA4/DDR0_CS1 M_A_A5
BD41 BY50
12 M_A_A1 13 M_C_A1 DDR3_DQ1_0/DDR0_DQ7_0/DDR1_DQ3_0 DDR0_MA5/DDR0_CA5/DDR0_CA6/DDR0_CA0 M_A_CS0_N
CD51
12 M_A_A2 13 M_C_A2 DDR0_MA4/DDR0_CS0/DDR0_CA2/DDR0_CA2 CD53 M_A_CS1_N
12 M_A_A3 13 M_C_A3 DDR0_MA3/DDR0_CS1/DDR0_CS0/DDR0_CA3 BV47 M_B_CS2_N
C 12 M_A_A4 13 M_C_A4 DDR0_MA2/DDR3_CS0/DDR3_CA2/DDR3_CA2 CE52 C
12 M_A_A5 13 M_C_A5 DDR0_MA1/NC/DDR0_CS1/DDR0_CA4 BV41
DDR0_MA0/NC/DDR3_CS1/DDR3_CA4
12 M_A_B0 13 M_C_B0 M_B_A2
BN50
12 M_A_B1 13 M_C_B1 DDR0_BG1/DDR2_CA2/DDR2_CA3/DDR2_CS0 M_B_A3
BL52
12 M_A_B2 13 M_C_B2 DDR0_BG0/DDR2_CA3/DDR2_CA4/DDR2_CS1
12 M_A_B3 13 M_C_B3 CB42 M_A_B5
12 M_A_B4 13 M_C_B4 DDR0_BA1/DDR1_CA5/DDR1_CA6/DDR1_CA0 BV44 M_B_B0
12 M_A_B5 13 M_C_B5 DDR0_BA0/DDR3_CA0/DDR3_CA0/DDR3_CA6
BT53 M_B_CS1_N 1D1V_S3
DDR0_ACT#/DDR2_CS1/DDR2_CS0/DDR2_CA3
BV45 M_B_CS3_N
DDR0_PAR/DDR3_CS1/DDR3_CS0/DDR3_CA3
1
12 M_B_DQ[31:0] M_B_DQ0 13 M_D_DQ[31:0] M_D_DQ0 M_A_ALERT_N
AU50 1 R508 2
M_B_DQ1 M_D_DQ1 DDR0_ALERT# AU49 R503
M_B_DQ2 M_D_DQ2 DDR0_VREF_CA 0R0402-PAD-1-GP 470R2F-GP
M_B_DQ3 M_D_DQ3 E52
2
M_B_DQ4 M_D_DQ4 DDR_VTT_CTL DV47 SM_DRAMRST_CPU_N 1 R505 2 SM_DRAMRST_N
M_B_DQ5 M_D_DQ5 DRAM_RESET# C49 SM_RCOMP 1 R502 2
M_B_DQ6 M_D_DQ6 DDR_RCOMP 100R2F-L3-GP 0R0402-PAD-1-GP
M_B_DQ7 M_D_DQ7
M_B_DQ8 M_D_DQ8 TGL-U-1-GP-U1
M_B_DQ9 M_D_DQ9
M_B_DQ10 M_D_DQ10 CPU1C 3 OF 21
M_B_DQ11 M_D_DQ11
M_B_DQ12 M_D_DQ12
M_B_DQ13 M_D_DQ13 LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL) DDR4/LP4/LP5/LP5 CMD
M_B_DQ14 M_D_DQ14 M_C_DQ7 AL53 Flip R41 M_D_CLK_P1
M_B_DQ15 M_D_DQ15 M_C_DQ6 AL52 DDR4_DQ0_7/DDR1_DQ0_7/DDR0_DQ4_7 DDR1_CLK_P1/DDR7_CLK_P/DDR7_CLK_P/DDR7_CLK_P R42 M_D_CLK_N1
M_B_DQ16 M_D_DQ16 M_C_DQ5 AL50 DDR4_DQ0_6/DDR1_DQ0_6/DDR0_DQ4_6 DDR1_CLK_N1/DDR7_CLK_N/DDR7_CLK_N/DDR7_CLK_N M52 M_D_CLK_P0
M_B_DQ17 M_D_DQ17 M_C_DQ4 AL49 DDR4_DQ0_5/DDR1_DQ0_5/DDR0_DQ4_5 NC/DDR6_CLK_P/DDR6_CLK_P/DDR6_CLK_P M53 M_D_CLK_N0
M_B_DQ18 M_D_DQ18 M_C_DQ3 AP53 DDR4_DQ0_4/DDR1_DQ0_4/DDR0_DQ4_4 NC/DDR6_CLK_N/DDR6_CLK_N/DDR6_CLK_N AC42 M_C_CLK_P1
M_B_DQ19 M_D_DQ19 M_C_DQ[7:0] M_C_DQ2 AP52 DDR4_DQ0_3/DDR1_DQ0_3/DDR0_DQ4_3
NC/DDR5_CLK_P/DDR5_CLK_P/DDR5_CLK_P
NC/DDR5_CLK_N/DDR5_CLK_N/DDR5_CLK_N
AC41 M_C_CLK_N1
M_B_DQ20 M_D_DQ20 M_C_DQ1 AP50 Y52 M_C_CLK_P0
M_B_DQ21 M_D_DQ21 M_C_DQ0 AP49 DDR4_DQ0_1/DDR1_DQ0_1/DDR0_DQ4_1 DDR1_CLK_P0/DDR4_CLK_P/DDR4_CLKP/DDR4_CLK_P Y53 M_C_CLK_N0
M_B_DQ22 M_D_DQ22 M_C_DQ15 AF53 DDR4_DQ0_0/DDR1_DQ0_0/DDR0_DQ4_0 DDR1_CLK_N0/DDR4_CLK_N/DDR4_CLK_N/DDR4_CLK_N
M_B_DQ23 M_D_DQ23 M_C_DQ14 AF52 DDR4_DQ1_7/DDR1_DQ1_7/DDR0_DQ5_7 R47 M_D_CKE2
M_B_DQ24 M_D_DQ24 M_C_DQ13 AF50 DDR4_DQ1_6/DDR1_DQ1_6/DDR0_DQ5_6 NC/DDR7_CKE0/DDR7_WCK_P/DDR7_WCK_P R45 M_D_CKE3
M_B_DQ25 M_D_DQ25 M_C_DQ12 AF49 DDR4_DQ1_5/DDR1_DQ1_5/DDR0_DQ5_5 NC/DDR7_CKE1/DDR7_WCK_N/DDR7_WCK_N K51 M_D_CKE0
M_B_DQ26 M_D_DQ26 M_C_DQ[15:8] M_C_DQ11 AH53 DDR4_DQ1_4/DDR1_DQ1_4/DDR0_DQ5_4
NC/DDR6_CKE0/DDR6_WCK_P/DDR6_WCK_P
NC/DDR6_CKE1/DDR6_WCK_N/DDR6_WCK_N
K53 M_D_CKE1
M_B_DQ27 M_D_DQ27 M_C_DQ10 AH52 AC47 M_C_CKE2
M_B_DQ28 M_D_DQ28 M_C_DQ9 AH50 DDR4_DQ1_2/DDR1_DQ1_2/DDR0_DQ5_2 NC/DDR5_CKE0/DDR5_WCK_P/DDR5_WCK_P AC45 M_C_CKE3
M_B_DQ29 M_D_DQ29 M_C_DQ8 AH49 DDR4_DQ1_1/DDR1_DQ1_1/DDR0_DQ5_1 NC/DDR5_CKE1/DDR5_WCK_N/DDR5_WCK_N W51 M_C_CKE0
M_B_DQ30 M_D_DQ30 M_C_DQ23 AR41 DDR4_DQ1_0/DDR1_DQ1_0/DDR0_DQ5_0 NC/DDR4_CKE0/DDR4_WCK_P/DDR4_WCK_P W53 M_C_CKE1
M_B_DQ31 M_D_DQ31 M_C_DQ22 AV42 DDR5_DQ0_7/DDR1_DQ2_7/DDR1_DQ4_7 NC/DDR4_CKE1/DDR4_WCK_N/DDR4_WCK_N
M_C_DQ21 AR42 DDR5_DQ0_6/DDR1_DQ2_6/DDR1_DQ4_6 P52 M_D_A4
M_C_DQ20 AV41 DDR5_DQ0_5/DDR1_DQ2_5/DDR1_DQ4_5 DDR1_CKE1/DDR6_CA4/DDR6_CA5/DDR6_CA1 J50 M_D_A5
12 M_B_DQS_DN[3:0] M_B_DQS_DN0 13 M_D_DQS_DN[3:0] M_D_DQS_DN0 M_C_DQ[23:16] M_C_DQ19 AR45 DDR5_DQ0_4/DDR1_DQ2_4/DDR1_DQ4_4
DDR1_CKE0/DDR6_CA5/DDR6_CA6/DDR6_CA0
M_B_DQS_DN1 M_D_DQS_DN1 M_C_DQ18 AV45 AE42 M_C_B1
B M_B_DQS_DN2 M_D_DQS_DN2 M_C_DQ17 AR47 DDR5_DQ0_2/DDR1_DQ2_2/DDR1_DQ4_2 DDR1_CS1/DDR5_CA1/DDR5_CA1/DDR5_CA5 AE47 B
M_B_DQS_DN3 M_D_DQS_DN3 M_C_DQ16 AV47 DDR5_DQ0_1/DDR1_DQ2_1/DDR1_DQ4_1 DDR1_CS0/NC/DDR5_CS1/DDR5_CA4
M_C_DQ31 AJ41 DDR5_DQ0_0/DDR1_DQ2_0/DDR1_DQ4_0 N42 M_D_B5
M_C_DQ30 AJ42 DDR5_DQ1_7/DDR1_DQ3_7/DDR1_DQ5_7 NC/DDR7_CA5/DDR7_CA6/DDR7_CA0 N45 M_D_B4
12 M_B_DQS_DP[3:0] M_B_DQS_DP0 13 M_D_DQS_DP[3:0] M_D_DQS_DP0 M_C_DQ29 AL41 DDR5_DQ1_6/DDR1_DQ3_6/DDR1_DQ5_6 NC/DDR7_CA4/DDR7_CA5/DDR7_CA1 N44 M_D_B3
M_B_DQS_DP1 M_D_DQS_DP1 M_C_DQ28 AL42 DDR5_DQ1_5/DDR1_DQ3_5/DDR1_DQ5_5 NC/DDR7_CA3/DDR7_CA4/DDR7_CS1 N47 M_D_B2
M_B_DQS_DP2 M_D_DQS_DP2 M_C_DQ[31:24] M_C_DQ27 AJ45 DDR5_DQ1_4/DDR1_DQ3_4/DDR1_DQ5_4
NC/DDR7_CA2/DDR7_CA3/DDR7_CS0
NC/DDR6_CS0/DDR6_CA2/DDR6_CA2
J53 M_D_CS0_N
M_B_DQS_DP3 M_D_DQS_DP3 M_C_DQ26 AJ47 AC50 M_C_A1
M_C_DQ25 AL45 DDR5_DQ1_2/DDR1_DQ3_2/DDR1_DQ5_2 NC/DDR4_CA1/DDR4_CA1/DDR4_CA5 AC53 M_C_A0
M_C_DQ24 AL47 DDR5_DQ1_1/DDR1_DQ3_1/DDR1_DQ5_1 NC/DDR4_CA0/DDR4_CA0/DDR4_CA6
13 M_D_CLK_N0 M_D_DQ7 A43 DDR5_DQ1_0/DDR1_DQ3_0/DDR1_DQ5_0 K36 M_D_DQS_DP3
12 M_B_CLK_N0 13 M_D_CLK_P0 M_D_DQ6 B43 DDR6_DQ0_7/DDR1_DQ4_7/DDR0_DQ6_7 DDR7_DQSP_1/DDR1_DQSP_7/DDR1_DQSP_7 K38 M_D_DQS_DN3
12 M_B_CLK_P0 13 M_D_CLK_N1 M_D_DQ5 DDR6_DQ0_6/DDR1_DQ4_6/DDR0_DQ6_6 DDR7_DQSN_1/DDR1_DQSN_7/DDR1_DQSN_7 M_D_DQS_DP2
D43 G44
12 M_B_CLK_N1 13 M_D_CLK_P1 M_D_DQ4 DDR6_DQ0_5/DDR1_DQ4_5/DDR0_DQ6_5 DDR7_DQSP_0/DDR1_DQSP_6/DDR1_DQSP_6 M_D_DQS_DN2
E44 J44
12 M_B_CLK_P1 M_D_DQ3 A46 DDR6_DQ0_4/DDR1_DQ4_4/DDR0_DQ6_4 DDR7_DQSN_0/DDR1_DQSN_6/DDR1_DQSN_6 D39 M_D_DQS_DP1
12 M_B_CKE0
13
13
M_D_CKE0
M_D_CKE1
M_D_DQ[7:0] M_D_DQ2 B46 DDR6_DQ0_3/DDR1_DQ4_3/DDR0_DQ6_3
C39 M_D_DQS_DN1
M_D_DQ1 D46 C45 M_D_DQS_DP0
12 M_B_CKE1 13 M_D_CKE2 M_D_DQ0 E47 DDR6_DQ0_1/DDR1_DQ4_1/DDR0_DQ6_1 DDR6_DQSP_0/DDR1_DQSP_4/DDR0_DQSP_6 D45 M_D_DQS_DN0
12 M_B_CKE2 13 M_D_CKE3 M_D_DQ15 E38 DDR6_DQ0_0/DDR1_DQ4_0/DDR0_DQ6_0 DDR6_DQSN_0/DDR1_DQSN_4/DDR0_DQSN_6 AJ44 M_C_DQS_DP3
12 M_B_CKE3 M_D_DQ14 D38 DDR6_DQ1_7/DDR1_DQ5_7/DDR0_DQ7_7 DDR5_DQSP_1/DDR1_DQSP_3/DDR1_DQSP_5 AL44 M_C_DQS_DN3
13 M_D_CS0_N M_D_DQ13 B38 DDR6_DQ1_6/DDR1_DQ5_6/DDR0_DQ7_6 DDR5_DQSN_1/DDR1_DQSN_3/DDR1_DQSN_5 AV44 M_C_DQS_DP2
12 M_B_CS0_N 13 M_D_CS1_N M_D_DQ12 A38 DDR6_DQ1_5/DDR1_DQ5_5/DDR0_DQ7_5 DDR5_DQSP_0/DDR1_DQSP_2/DDR1_DQSP_4 AR44 M_C_DQS_DN2
12
12
M_B_CS1_N
M_B_CS2_N
13
13
M_D_CS2_N
M_D_CS3_N
M_D_DQ[15:8] M_D_DQ11 E41 DDR6_DQ1_4/DDR1_DQ5_4/DDR0_DQ7_4
AG51 M_C_DQS_DP1
M_D_DQ10 D40 AG50 M_C_DQS_DN1
12 M_B_CS3_N M_D_DQ9 B40 DDR6_DQ1_2/DDR1_DQ5_2/DDR0_DQ7_2 DDR4_DQSN_1/DDR1_DQSN_1/DDR0_DQSN_5 AN51 M_C_DQS_DP0
13 M_D_A0 M_D_DQ8 A40 DDR6_DQ1_1/DDR1_DQ5_1/DDR0_DQ7_1 DDR4_DQSP_0/DDR1_DQSP_0/DDR0_DQSP_4 AN50 M_C_DQS_DN0
12 M_B_A0 13 M_D_A1 M_D_DQ23 G42 DDR6_DQ1_0/DDR1_DQ5_0/DDR0_DQ7_0 DDR4_DQSN_0/DDR1_DQSN_0/DDR0_DQSN_4
12 M_B_A1 13 M_D_A2 M_D_DQ22 G41 DDR7_DQ0_7/DDR1_DQ6_7/DDR1_DQ6_7 AE44 M_C_B0
12 M_B_A2 13 M_D_A3 M_D_DQ21 J41 DDR7_DQ0_6/DDR1_DQ6_6/DDR1_DQ6_6 DDR1_ODT1/DDR5_CA0/DDR5_CA0/DDR5_CA6 AE45 M_C_CS2_N
12 M_B_A3 13 M_D_A4 M_D_DQ20 J42 DDR7_DQ0_5/DDR1_DQ6_5/DDR1_DQ6_5 DDR1_ODT0/DDR5_CS0/DDR5_CA2/DDR5_CA2
12
12
M_B_A4
M_B_A5
13 M_D_A5 M_D_DQ[23:16] M_D_DQ19 G45 DDR7_DQ0_4/DDR1_DQ6_4/DDR1_DQ6_4
DDR7_DQ0_3/DDR1_DQ6_3/DDR1_DQ6_3 DDR1_MA16/DDR5_CA4/DDR5_CA5/DDR5_CA1
AA47 M_C_B4
M_D_DQ18 J45 AA44 M_C_B3
13 M_D_B0 M_D_DQ17 DDR7_DQ0_2/DDR1_DQ6_2/DDR1_DQ6_2 DDR1_MA15/DDR5_CA3/DDR5_CA4/DDR5_CS1 M_C_B2
G47 AA45
12 M_B_B0 13 M_D_B1 M_D_DQ16 DDR7_DQ0_1/DDR1_DQ6_1/DDR1_DQ6_1 DDR1_MA14/DDR5_CA2/DDR5_CA3/DDR5_CS0 M_C_CS3_N
J47 AE41
12 M_B_B1 13 M_D_B2 M_D_DQ31 G38 DDR7_DQ0_0/DDR1_DQ6_0/DDR1_DQ6_0 DDR1_MA13/DDR5_CS1/DDR5_CS0/DDR5_CA3 P53 M_D_A1
12 M_B_B2 13 M_D_B3 M_D_DQ30 G36 DDR7_DQ1_7/DDR1_DQ7_7/DDR1_DQ7_7 DDR1_MA12/DDR6_CA1/DDR6_CA1/DDR6_CA5 N51
12 M_B_B3 13 M_D_B4 M_D_DQ29 H36 DDR7_DQ1_6/DDR1_DQ7_6/DDR1_DQ7_6 DDR1_MA11/NC/DDR6_CS1/DDR6_CA4 U42 M_D_B1
12 M_B_B4 13 M_D_B5 M_D_DQ28 DDR7_DQ1_5/DDR1_DQ7_5/DDR1_DQ7_5 DDR1_MA10/DDR7_CA1/DDR7_CA1/DDR7_CA5 M_D_A0
H38 P50
12 M_B_B5 M_D_DQ[31:24] M_D_DQ27 N36 DDR7_DQ1_4/DDR1_DQ7_4/DDR1_DQ7_4
DDR1_MA9/DDR6_CA0/DDR6_CA0/DDR6_CA6
DDR1_MA8/DDR4_CA2/DDR4_CA3/DDR4_CS0
U53 M_C_A2
M_D_DQ26 L36 W50 M_C_A4
M_D_DQ25 L38 DDR7_DQ1_2/DDR1_DQ7_2/DDR1_DQ7_2 DDR1_MA7/DDR4_CA4/DDR4_CA5/DDR4_CA1 U52 M_C_A3
M_D_DQ24 N38 DDR7_DQ1_1/DDR1_DQ7_1/DDR1_DQ7_1 DDR1_MA6/DDR4_CA3/DDR4_CA4/DDR4_CS1 U50 M_C_A5
DDR7_DQ1_0/DDR1_DQ7_0/DDR1_DQ7_0 DDR1_MA5/DDR4_CA5/DDR4_CA6/DDR4_CA0 AA51 M_C_CS0_N
DDR1_MA4/DDR4_CS0/DDR4_CA2/DDR4_CA2 AA53 M_C_CS1_N
DDR1_MA3/DDR4_CS1/DDR4_CS0/DDR4_CA3 U47 M_D_CS2_N
DDR1_MA2/DDR7_CS0/DDR7_CA2/DDR7_CA2 AC52
DDR1_MA1/NC/DDR4_CS1/DDR4_CA4 U41
DDR1_MA0/NC/DDR7_CS1/DDR7_CA4
12,13 SM_DRAMRST_N K50 M_D_A2
A A
DDR1_BG1/DDR6_CA2/DDR6_CA3/DDR6_CS0 J52 M_D_A3
DDR1_BG0/DDR6_CA3/DDR6_CA4/DDR6_CS1
AA42 M_C_B5
DDR1_BA1/DDR5_CA5/DDR5_CA6/DDR5_CA0 U44 M_D_B0
DDR1_BA0/DDR7_CA0/DDR7_CA0/DDR7_CA6
N53 M_D_CS1_N
DDR1_ACT#/DDR6_CS1/DDR6_CS0/DDR6_CA3
U45 M_D_CS3_N
DDR1_PAR/DDR7_CS1/DDR7_CS0/DDR7_CA3
AU53 M_B_ALERT_N 1 R507 2
DDR1_ALERT# NTD ORS
AU52
DDR1_VREF_CA 0R0402-PAD-1-GP
TGL-U-1-GP-U1 Wistron Corporation

Title
CPU (DDR)
Custom
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
#575683 Rev0p95
D CPU1T 20 OF 21 D
CFG[17:0]
Configuration Signals: The CFG
signals have a default value of '1' if not
terminated on the board. Refer to the T15 A51 TP_RSVD_A51 1
appropriate platform design guide for CFG15 RSVD_TP#A51 TP602
CFG14 V17 B51 TP_RSVD_B51 1 TP601
pull-down recommendations when a U15 CFG14 RSVD_TP#B51
logic low is desired. K11 CFG13 C1 TP_RSVD_C1 1 #607872 Rev1p1
CFG12 RSVD_TP#C1 TP603 C1, C2 for IFDIM
Intel recommends placing test points K12 D2 TP_RSVD_D2 1 TP604
on the board for CFG pins. K9 CFG11 RSVD_TP#D2
CFG10
‧ CFG[3], CFG[0]: Reserved T17 CP39
K7 CFG9 RSVD_TP#CP39 CU40
configuration lane. CFG8 RSVD_TP#CU40
‧ CFG[2]: TGL UP4/UP3 Reserved CFG7 H7 AK9
K8 CFG7 RSVD#AK9
‧ CFG[2]: TGL H PCI Express* CFG6
H9 AH9
Static x16 Lanes Numbering E6 CFG5 RSVD#AH9
CFG4
Reversal.Reserved CFG3 H5 CFG4 DW6
‧ CFG[4]: eDP enable: 99 CFG3
E9 CFG3 RSVD#DW6 DV6
— 1 = Disabled. D9 CFG2 RSVD#DV6
— 0 = Enabled. E7 CFG1 DV4
‧ CFG[6:5]: TGL UP4/UP3 CFG0 RSVD_TP#DV4 DW3 TP_RSVD_DW3 1
RSVD_TP#DW3 TP606
Reserved CFG_RCOMP B5
CFG_RCOMP
‧ CFG[6:5]: TGL H PCI Express* RSVD_TP#DU1
DU1
Bifurcation U17 DT2
C CFG17 RSVD_TP#DT2 C
— 00 = 1 x8, 2 x4 PCI Express* H11
CFG16 DW2 TP_RSVD_DW2 1
— 01 = reserved RSVD_TP#DW2 TP607
Y1 DV2 TP_RSVD_DV2 1 TP608
— 10 = 2 x8 PCI Express* #607872 Rev1p1 M4 BPM#_3 RSVD_TP#DV2
— 11 = 1 x16 PCI Express* Y2 for IFDIM AB4 BPM#_2 E1 TP_RSVD_E1 1 TP609
‧ CFG[7]: PEG Training: TP613 1 BPM_N0 Y2 BPM#_1 RSVD_TP#E1 F1 TP_RSVD_F1 1 TP610
— 1 = (default) PEG Train BPM#_0 RSVD_TP#F1
immediately following A3 AB2
RESET# de assertion. B3 RSVD#A3 RSVD#AB2
RSVD#B3
1 1KR2F-3-GP
1 1KR2F-3-GP
1 1KR2F-3-GP
— 0 = PEG Wait for BIOS for DR1
TCP_MBIAS_RCOMP AR2 RSVD_TP#DR1 DR2
training. RSVD_TP#AR2 RSVD_TP#DR2
‧ CFG[13:8]: Reserved AL10
RSVD_TP#AL10
2 R605
2 R611
configuration lanes. AM12 DR53
AH12 RSVD_TP#AM12 RSVD_TP#DR53 DW5
‧ CFG[14]: PEG60 (PCIE4) Lane AJ10 RSVD_TP#AH12 RSVD_TP#DW5
Reversal: AR1 RSVD_TP#AJ10 DV51
— 1 - (Default) Normal RSVD_TP#AR1 VSS DW52 TP_RSVD_DW52 1
— 0 - Reversed DY BN10 TP#DW52 DV53 TP_RSVD_DV53 1
TP611
‧ CFG[17:15]: Reserved DY BM12 RSVD#BN10 TP#DV53 W34
TP612
configuration lanes. DD13 RSVD#BM12 RSVD#W34 V35 #607872 Rev1p1
R6122
R6092
R6102
49D9R2F-GP1
2K2R2F-GP1
DF13 RSVD#DD13 RSVD#V35 50ohm impedance
RSVD#DF13 D52
SKTOCC#
B B
TGL-U-1-GP-U1
#607872 Rev1p1
In order to help Intel with further debug, please route all the TP, RSVD_TP and
GPD11 / LANPHYPC /DSWLDO_MON as testpoints.
TEST
A A
Wistron Corporation
Title
CPU (CFG/IST)
B
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
46 VCCCORE_SENSE
46 VSSCORE_SENSE 1V_CPU_CORE 13 OF 21 1V_CPU_CORE

CPU1M
46 SVID_ALERT_CPU_N
(55A)
46 SVID_CLK_CPU
A24 G32
D A26 VCCIN VCCIN H24 1D05V_VCCST D
46 SVID_DATA_CPU VCCIN VCCIN
A29 H26
A30 VCCIN VCCIN H30
A33 VCCIN VCCIN H32 1 R701 2 SVID_DATA_CPU
VCCIN
Input
A35
AY39
VCCIN
VCCIN
VCCIN
VCCIN
J1
J2
SVID DATA 100R2F-L1-GP-U
Input FIVR, Processor IA Cores and VCCIN VCCIN
Graphics Power Rail. B24 K1
B26 VCCIN VCCIN K2 1D05V_VCCST
B29 VCCIN VCCIN K24
VCCIN VCCIN
1
B30 K26
B33 VCCIN VCCIN K30
VCCIN VCCIN R702
B35 K32
BA10
BA40
VCCIN
VCCIN
VCCIN
VCCIN
L24
L26
SVID ALERT 56R2J-4-GP
2
BB39 VCCIN VCCIN L30 SVID_ALERT_CPU_N 1 R703 2 SVID_ALERT_N_CPU_R
BB9 VCCIN VCCIN L32 0R0402-PAD-1-GP
BC10 VCCIN VCCIN N24
BC40 VCCIN VCCIN N26
BD39 VCCIN VCCIN N30
BD9 VCCIN VCCIN N32
C BE10 VCCIN VCCIN P24 Layout note: C
BE40 VCCIN VCCIN P26 3.Length matchin 25mil, and close SOC in 2inch "
BF9 VCCIN VCCIN P28
BG10 VCCIN VCCIN P30
BG40 VCCIN VCCIN P32
BH12 VCCIN VCCIN T21
BH39 VCCIN VCCIN T23 1V_CPU_CORE
BH9 VCCIN VCCIN T25
BJ10 VCCIN VCCIN T27
BJ40 VCCIN VCCIN T31
BK39 VCCIN VCCIN U23 R704 1 2 VCCCORE_SENSE
BL10 VCCIN VCCIN U27 100R2F-L1-GP-U
BL40 VCCIN VCCIN U29
BM39 VCCIN VCCIN U31 R705 1 2 VSSCORE_SENSE
BN40 VCCIN VCCIN U33 100R2F-L1-GP-U
BP12 VCCIN VCCIN V23
BP39 VCCIN VCCIN V25
BR10 VCCIN VCCIN V27 Layout Note:
BR40 VCCIN VCCIN V29
BT12 VCCIN VCCIN V31
VCCIN VCCIN
1. Place close to CPU within 2"
B BT39 V33 2. VCC_SENSE/ VSS_SENSE B
BU10 VCCIN VCCIN W22
BU40 VCCIN VCCIN W24 impedance=50 ohm
BV12 VCCIN VCCIN W28 3. Length match<25mil
BY12 VCCIN VCCIN W32
CA10 VCCIN VCCIN
CB12 VCCIN R38 VCCCORE_SENSE
D24 VCCIN VCCIN_SENSE R37 VSSCORE_SENSE
D26 VCCIN VSSIN_SENSE
D29 VCCIN M12 SVID_DATA_CPU
D30 VCCIN VIDSOUT M11 SVID_CLK_CPU
D33 VCCIN VIDSCK P12 SVID_ALERT_N_CPU_R
D35 VCCIN VIDALERT#
E24 VCCIN
E26 VCCIN
E27 VCCIN
E29 VCCIN
TEST
E30 VCCIN
E32 VCCIN
VCCIN
A
E33
G2 VCCIN Wistron Corporation A
G24 VCCIN 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
G26 VCCIN Taipei Hsien 221, Taiwan, R.O.C.
G30 VCCIN
VCCIN Title
CPU (VCCIN/VID)
TGL-U-1-GP-U1
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
CPU1O 15 OF 21
(1.5A) 1D1V_S3 AA39 AF9

VDD2 VCCSTG_OUT 1D05V_VCCSTG_OUT
D AB40 AF12 D
AC39 VDD2 VCCSTG AD12 VCCSTG_OUT
VDD2 AD40 VDD2 VCCSTG Output
Input VDD2 VCCSTG_OUT Power rail
AD51 AN10 1D05V_VCCSTG_OUT_R 1 R801 2
System Memory power rail VDD2 VCCSTG_OUT
AD52 AM9 0R0402-PAD-1-GP
AE39 VDD2 VCCSTG_OUT AG10 VCCSIO_OUT (Pin: V15)
AF40 VDD2 VCCSTG_OUT Output
VDD2 Reference power rail for all Debug/
AG39 V15 1D05V_VCCIO_OUT Config Signals Pull-up on platform..
AH40 VDD2 VCCION_OUT
AJ39 VDD2 M9
VDD2 VCCSTG_OUT_LGC 1D05V_VCCSTG_TERM
AK40 VCCSTG_OUT_LGC
AK51 VDD2 BT2 Output
VDD2 VCCST 1D05V_VCCST Reference power rail for all Legacy
AK52 BT1 (500mA) Signals Pull-up on platform.
AL39 VDD2 VCCST BT4
AM40 VDD2 VCCST
AN39 VDD2 BP2 VCCST
VDD2 VCCSTG 1D05V_VCCSTG Input
AP40 BP1 (300mA)
VDD2 VCCSTG Sustain voltage for processor
AR39 BP4 standby modes
AT52 VDD2 VCCSTG
1D05V_VCCSTG_OUT_R 1D05V_VCCSTG_OUT_R AU40 VDD2
C AW40 VDD2 VCCSTG C
20190422_Byron AW51 VDD2 Input
VDD2 Gated sustain voltage for processor
AW52 standby modes
VDD2
1
DY BD51
VDD2
C801 C802 BD52 1D05V_VCCIO_OUT 1 TP801
BK51 VDD2 TPAD14-OP-GP
2
VDD2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
BK52
BV51 VDD2
BV52 VDD2 1D05V_VCCST 1D05V_VCCSTG
CA40 VDD2
CC40 VDD2
CC49 VDD2
close pin AN10,AM9 close pin AF12, AD12 VDD2
CC50
CE40 VDD2
VDD2
1
CG40
CH39 VDD2 C803 C804
CJ40 VDD2
2
VDD2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
CL40
CN40 VDD2
CP47 VDD2
CR40 VDD2
B B
D50 VDD2
E51 VDD2
F49 VDD2
T51 VDD2
T52 VDD2
VDD2
TGL-U-1-GP-U1
Lack of VCCPLL_OC / VCC1P8A / VCCPLL

TEST
A
Wistron Corporation A
Title
CPU (VDDQ/VCC/VCCST)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
CPU1S 19 OF 21
DF53 C53
RSVD#DF53 RSVD#C53 T35
DF52 RSVD#T35 E53
RSVD#DF52 RSVD#E53 CF39 CPU1D 4 OF 21
1 PCH_IST_TP1 DT52 RSVD#CF39 U35
TP901 PCH_IST_TP0 DU53 PCH_IST_TP1 RSVD#U35
1 F53
TP902 PCH_IST_TP0 RSVD#F53
C B53 C
DF50 RSVD#B53 AP9 DV24
DF49 RSVD#DF50 RSVD#AP9 A52 DW47 RSVD#DV24
RSVD#DF49 RSVD#A52 DW49 RSVD#DW47
CY30 BF12 A48 RSVD#DW49
CY15 RSVD_TP#CY30 RSVD_TP#BF12 V21 RSVD#A48
RSVD_TP#CY15 RSVD_TP#V21 W20
D4 RSVD_TP#W20 U37 TGL-U-1-GP-U1
RSVD_TP#D4 RSVD_TP#U37 CD39
1 IST_TP1 A6 RSVD_TP#CD39 U21
TP903 IST_TP0 IST_TP1 RSVD_TP#U21
1 A4 CB39
TP904 IST_TP0 RSVD#CB39 BB12
#607872 Rev1p1 RSVD_TP#BB12 W37
50ohm impedance RSVD_TP#W37 AY12
RSVD_TP#AY12 W38
RSVD_TP#W38 U38
RSVD_TP#U38 CY28
RSVD_TP#CY28
TGL-U-1-GP-U1
B B
#607872 Rev1p1
Impedance Spectrum Tool (IST/IFDIM) Testing
Requirements and Recommendations
NOTE
IST/IFDIM is not directly available to customers, Intel will need these trigger points to
support debug of customer issues at Intel validation labs. Intel recommends
customers implement the IST tool requirements from this section.
TEST
A
Title
CPU (RSVD)
A4
V550_TGL -1
5 4 3 2 1
A
B
C
D
2 1
SC22U6D3V3MX-L1-GP
VCORE
1V_CPU_CORE
PC1055
2 1 2 1 2 1
1D8V_VCCIN_AUX
5
5
SC22U6D3V3MX-L1-GP
SC10U6D3V2MX-GP-U SC10U6D3V2MX-GP-U
PC1056
PC1015
PC1002
2 1 2 1 2 1
SC22U6D3V3MX-L1-GP
PC1057
PC1016
PC1003
2 1 2 1 2 1
Main Func = CPU
VCCINAUX
SC22U6D3V3MX-L1-GP
PC1058
PC1017
PC1004
2 1 2 1 2 1
U42
SC22U6D3V3MX-L1-GP
SC47U6D3V3MX-1-GP SC10U6D3V2MX-GP-U
PC1059
PC1018
PC1005
22uF
2 1 2 1
U42
22uF
U42
PC1060
PC1006
2 1
MP2941
PCS
15
SC10U6D3V2MX-GP-U
9
PCS
PC1061
IccMax current-10ms max = 70 A
4
4
1D8V_VCCIN_AUX
2 1 2 1
1V_CPU_CORE
SC22U6D3V3MX-L1-GP
Cap
SC22U6D3V2MX-GP-U
2 1 2 1
330uF*1
Cap
PC1049
PC1042
2 1 2 1
330uF*1
SC22U6D3V3MX-L1-GP SC22U6D3V3MX-L1-GP
PC1026
PC1007
2 1 2 1
PC1050
PC1043
2 1 2 1
SC22U6D3V3MX-L1-GP
ICL_U42/TGL_U42_28W
SC22U6D3V2MX-GP-U
PC1027
PC1008
PDG
2 1 2 1
PC1051
PC1044
2 1
2 1 SC22U6D3V3MX-L1-GP SC22U6D3V3MX-L1-GP
Power Map
SC22U6D3V2MX-GP-U
PC1028
PC1009
0606 22UF 8PCS
#607872 Rev1p1
SC10U6D3V2MX-GP-U 2 1 2 1
7343 220UF 2PCS
DY
PC1045
2 1
PC1065
2 1 SC22U6D3V3MX-L1-GP
PDG VCCINAUX
SC10U6D3V2MX-GP-U
0805 47UF 3PCS
#607872 Rev1p1
SC47U6D3V3MX-1-GP
0402 10UF 15PCS
0603 22UF 12PCS
7343 220UF 1PCS
PC1029
PC1010
DY
PC1046
UP3 4+2 15W VCCIN Max: 55A
UP3 4+2 28W VCCIN Max: 65A
2 1
PC1066
2 1
SC22U6D3V3MX-L1-GP SC10U6D3V2MX-GP-U SC10U6D3V2MX-GP-U
0402 10UF 12PCS (Secondary side)
PC1030
PC1011
DY
PC1047
2 1
PC1069
SC22U6D3V3MX-L1-GP
0402 10UF 10PCS (Secondary side)
2 1 SC22U6D3V3MX-L1-GP SC10U6D3V2MX-GP-U
3
3
PC1031
PC1012
2 1 2 1
PC1048
SC10U6D3V2MX-GP-U 2 1
DY
PC1070
SC22U6D3V2MX-GP-U
PC1032
PC1013
2 1 2 1
PC1062
2 1
SC22U6D3V3MX-L1-GP
SC10U6D3V2MX-GP-U
SC22U6D3V2MX-GP-U
PC1035
PC1014
2 1 2 1
PC1063
2 1
SC10U6D3V2MX-GP-U
PC1036
PC1033
2 1
PC1064
SC10U6D3V2MX-GP-U
PC1034
2
2
A3
Title
Size
STD
Date:
Document Number
Monday, July 27, 2020

V550_TGL
1
1
Sheet
CPU_(Power CAP1)
10
of
106
Rev
Wistron Corporation
-1
A
B
C
D
5 4 3 2 1
1D8V_S5 1D05V_VCCSTG 1D05V_VCCST #607872 Rev1p1

PDG VCCST
0402 1UF 2PCS
#607872 Rev1p1
1
1
PDG VCCSTG
DY DY DY DY 0402 1UF 2PCS
C1101 C1102 C1103 C1104 C1105 C1106 C1107
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
2
2
D D
PLACE on CPU Same Side EMC CAPS - PLACE <4mm FROM SOC VDDQ,
WITH EACH PAIR <12mm APART
1D1V_S3 1D1V_S3
20190527_Byron
1
1
C NTD only NTD only NTD only DY_RF DY_RF DY_RF C
C1108 C1109 C1110 FC1101 FC1102 FC1103 C1111 C1112 C1113
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC2D2P25V1BN-GP
SC2D2P25V1BN-GP
SC2D2P25V1BN-GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
2
2
PLACE on BACK SIDE
1D1V_S3
20190513_Byron
B B
20190527_Byron
1
1
NTD only NTD only C1116
NTD only
C1114 C1115 C1117 C1118 C1119 C1120 C1121 C1122 C1123 C1124 C1125 C1126 C1127 C1128 C1129 C1130
SC10U6D3V3MX-L-GP
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
2
2
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
#607872 Rev1p1 TEST

PDG VDD2
0603 47UF 2PCS
0402 1UF 8PCS
A
0402 10UF 8PCS (Secondary side) Wistron Corporation A
Title
CPU (Power Cap2)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
5 M_A_DQ[31:0] M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
Layout Note:Place as pic..
M_A_DQ9
DQS_A swizzling map:
M_A_DQ10 1D8V_S3
M_A_DQ11
M_A_DQ12
RAM1A 1 OF 2 RAM2A 1 OF 2
VDD1
M_A_DQ13 M_A_CLK_P0 J8 B2 M_A_DQ3 M_B_CLK_P0 J8 B2 M_B_DQ7
M_A_DQ14 M_A_CLK_N0 J9 CK_T_A DQ0_A C2 M_A_DQ2 M_B_CLK_N0 J9 CK_T_A DQ0_A C2 M_B_DQ3
1
M_A_DQ15 CK_C_A DQ1_A E2 M_A_DQ1 CK_C_A DQ1_A E2 M_B_DQ2
M_A_DQ16 M_A_CLK_P1 P8 DQ2_A F2 M_A_DQ0 M_B_CLK_P1 P8 DQ2_A F2 M_B_DQ1 C1203 C1204 C1205 C1206 C1207 C1208 C1209 C1210 C1211 C1212
M_A_DQ17 M_A_CLK_N1 P9 CK_T_B DQ3_A F4 M_A_DQ4 M_B_CLK_N1 P9 CK_T_B DQ3_A F4 M_B_DQ4
2
M_A_DQ18 CK_C_B DQ4_A E4 M_A_DQ5 CK_C_B DQ4_A E4 M_B_DQ6
D D
M_A_DQ19 M_A_CKE0 J4 DQ5_A C4 M_A_DQ6 M_B_CKE0 J4 DQ5_A C4 M_B_DQ5 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP
M_A_DQ20 M_A_CKE1 J5 CKE0_A DQ6_A B4 M_A_DQ7 M_B_CKE1 J5 CKE0_A DQ6_A B4 M_B_DQ0 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP
M_A_DQ21 CKE1_A DQ7_A B11 M_A_DQ13 CKE1_A DQ7_A B11 M_B_DQ13
M_A_DQ22 M_A_CKE2 P4 DQ8_A C11 M_A_DQ14 M_B_CKE2 P4 DQ8_A C11 M_B_DQ14
M_A_DQ23 M_A_CKE3 P5 CKE0_B DQ9_A E11 M_A_DQ15 M_B_CKE3 P5 CKE0_B DQ9_A E11 M_B_DQ12
M_A_DQ24 CKE1_B DQ10_A F11 M_A_DQ12 CKE1_B DQ10_A F11 M_B_DQ15
M_A_DQ25 DQ11_A F9 M_A_DQ8 DQ11_A F9 M_B_DQ11 1D1V_S3
DQ12_A DQ12_A
M_A_DQ26
M_A_DQ27
M_A_CS0_N
M_A_CS1_N
H4
H3 CS0_A DQ13_A
E9
C9
M_A_DQ9
M_A_DQ11
M_B_CS0_N
M_B_CS1_N
H4
H3 CS0_A DQ13_A
E9
C9
M_B_DQ9
M_B_DQ10 VDD2
M_A_DQ28 CS1_A DQ14_A B9 M_A_DQ10 CS1_A DQ14_A B9 M_B_DQ8
M_A_DQ29 M_A_CS2_N R4 DQ15_A M_B_CS2_N R4 DQ15_A
1
M_A_DQ30 M_A_CS3_N R3 CS0_B M_B_CS3_N R3 CS0_B
M_A_DQ31 CS1_B AA2 M_A_DQ18 CS1_B AA2 M_B_DQ17 C1214 C1215 C1216 C1217 C1218 C1219 C1220 C1221 C1226 C1227
M_A_A0 H2 DQ0_B Y2 M_A_DQ19 M_B_A0 H2 DQ0_B Y2 M_B_DQ22
5 M_A_DQS_DN[3:0]
2
M_A_DQS_DN0 M_A_A1 J2 CA0_A DQ1_B V2 M_A_DQ20 M_B_A1 J2 CA0_A DQ1_B V2 M_B_DQ23
M_A_DQS_DN1 M_A_A2 H9 CA1_A DQ2_B U2 M_A_DQ23 M_B_A2 H9 CA1_A DQ2_B U2 M_B_DQ19 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP
M_A_DQS_DN2 M_A_A3 H10 CA2_A DQ3_B U4 M_A_DQ21 M_B_A3 H10 CA2_A DQ3_B U4 M_B_DQ20 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP
M_A_DQS_DN3 M_A_A4 H11 CA3_A DQ4_B V4 M_A_DQ22 M_B_A4 H11 CA3_A DQ4_B V4 M_B_DQ21
M_A_A5 J11 CA4_A DQ5_B Y4 M_A_DQ16 M_B_A5 J11 CA4_A DQ5_B Y4 M_B_DQ18
5 M_A_DQS_DP[3:0] M_A_DQS_DP0 CA5_A DQ6_B M_A_DQ17 CA5_A DQ6_B M_B_DQ16
AA4 AA4
M_A_DQS_DP1 M_A_B0 R2 DQ7_B AA11 M_A_DQ29 M_B_B0 R2 DQ7_B AA11 M_B_DQ30
M_A_DQS_DP2 M_A_B1 CA0_B DQ8_B M_A_DQ27 M_B_B1 CA0_B DQ8_B M_B_DQ27
M_A_DQS_DP3 M_A_B2
P2
R9 CA1_B DQ9_B
Y11
V11 M_A_DQ26 M_B_B2
P2
R9 CA1_B DQ9_B
Y11
V11 M_B_DQ25
0D6V_S3
VDDQ
M_A_B3 R10 CA2_B DQ10_B U11 M_A_DQ28 M_B_B3 R10 CA2_B DQ10_B U11 M_B_DQ29
M_A_B4 R11 CA3_B DQ11_B U9 M_A_DQ25 M_B_B4 R11 CA3_B DQ11_B U9 M_B_DQ24
5 M_A_CLK_N0 M_A_B5 P11 CA4_B DQ12_B V9 M_A_DQ30 M_B_B5 P11 CA4_B DQ12_B V9 M_B_DQ31
5 M_A_CLK_P0
1
CA5_B DQ13_B Y9 M_A_DQ31 CA5_B DQ13_B Y9 M_B_DQ28
5 M_A_CLK_N1 M_A_ODT0 G2 DQ14_B AA9 M_A_DQ24 M_B_ODT0 G2 DQ14_B AA9 M_B_DQ26 C1222 C1223 C1224 C1225 C1230 C1228 C1231 C1232 C1233 C1234
5 M_A_CLK_P1 M_A_ODT1 T2 ODT_CA_A DQ15_B M_B_ODT1 T2 ODT_CA_A DQ15_B
2
ODT_CA_B ODT_CA_B
5 M_A_CKE0 SM_DRAMRST_N T11 SM_DRAMRST_N T11 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP
5 M_A_CKE1 RESET# D3 M_A_DQS_DP0 RESET# D3 M_B_DQS_DP0 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP
5 M_A_CKE2
1
1
A1 DQS0_T_A E3 M_A_DQS_DN0 A1 DQS0_T_A E3 M_B_DQS_DN0
5 M_A_CKE3 DY DNU#A1 DQS0_C_A
DY DNU#A1 DQS0_C_A
C1202 A2 C1201 A2
B1 DNU#A2 D10 M_A_DQS_DP1 B1 DNU#A2 D10 M_B_DQS_DP1
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
2
2
5 M_A_CS0_N AA1 DNU#B1 DQS1_T_A E10 M_A_DQS_DN1 AA1 DNU#B1 DQS1_T_A E10 M_B_DQS_DN1
5 M_A_CS1_N AB1 DNU#AA1 DQS1_C_A AB1 DNU#AA1 DQS1_C_A
5 M_A_CS2_N AB2 DNU#AB1 W3 M_A_DQS_DP2 AB2 DNU#AB1 W3 M_B_DQS_DP2
5 M_A_CS3_N A11 DNU#AB2
DNU#A11
DQS0_T_B
DQS0_C_B
V3 M_A_DQS_DN2 A11 DNU#AB2
DNU#A11
DQS0_T_B
DQS0_C_B
V3 M_B_DQS_DN2 For 4PCS RAM place
A12 A12
5 M_A_A0 B12 DNU#A12 W10 M_A_DQS_DP3 B12 DNU#A12 W10 M_B_DQS_DP3
C C
5 M_A_A1 AA12 DNU#B12 DQS1_T_B V10 M_A_DQS_DN3 AA12 DNU#B12 DQS1_T_B V10 M_B_DQS_DN3
5 M_A_A2 AB11 DNU#AA12 DQS1_C_B AB11 DNU#AA12 DQS1_C_B
5 M_A_A3 AB12 DNU#AB11 AB12 DNU#AB11
5 M_A_A4 K5 DNU#AB12 K5 DNU#AB12
5 M_A_A5 K8 DNU#K5 C3 K8 DNU#K5 C3
N5 DNU#K8 DMI0_A C10 N5 DNU#K8 DMI0_A C10
5 M_A_B0 N8 DNU#N5 DMI1_A N8 DNU#N5 DMI1_A
5 M_A_B1 G11 DNU#N8 Y3 0D6V_S3 G11 DNU#N8 Y3
5 M_A_B2 DNU#G11 DMI0_B Y10 DNU#G11 DMI0_B Y10 0D6V_S3
5 M_A_B3 DMI1_B DMI1_B
5 M_A_B4 A5 M_A_ZQ0 R1210 1 2 240R2F-1-GP A5 M_B_ZQ0 R1211 1 2 240R2F-1-GP
5 M_A_B5 ZQ0 A8 M_A_ZQ1 R1209 1 2 240R2F-1-GP ZQ0 A8 M_B_ZQ1 R1212 1 2 240R2F-1-GP
ZQ1 ZQ1
5 M_B_DQ[31:0] M_B_DQ0
M_B_DQ1 H9HCNNNCPMMLHR-NME-GP H9HCNNNCPMMLHR-NME-GP
M_B_DQ2
072.H9HCN.0E0U 072.H9HCN.0E0U
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8 1D1V_S3 1D1V_S3
M_B_DQ9 RAM1B 2 OF 2 RAM2B 2 OF 2
M_B_DQ10 0D6V_S3 0D6V_S3
M_B_DQ11 B3 A3 B3 A3
2
M_B_DQ12 B5 VDDQ VSS C1 B5 VDDQ VSS C1
M_B_DQ13 D1 VDDQ VSS C5 D1 VDDQ VSS C5 R1201 R1202
M_B_DQ14 D5 VDDQ VSS D2 D5 VDDQ VSS D2
VDDQ VSS VDDQ VSS 0R0402-PAD-1-GP 0R0402-PAD-1-GP
M_B_DQ15 F3 D4 F3 D4
M_B_DQ16 U3 VDDQ VSS E1 U3 VDDQ VSS E1
1
M_B_DQ17 W1 VDDQ VSS E5 W1 VDDQ VSS E5 M_A_ODT0 M_A_ODT1
M_B_DQ18 W5 VDDQ VSS G1 W5 VDDQ VSS G1
M_B_DQ19 AA3 VDDQ VSS G3 AA3 VDDQ VSS G3
M_B_DQ20 AA5 VDDQ VSS G5 AA5 VDDQ VSS G5
M_B_DQ21 B8 VDDQ VSS J1 B8 VDDQ VSS J1
M_B_DQ22 B10 VDDQ VSS J3 B10 VDDQ VSS J3
M_B_DQ23 D8 VDDQ VSS K2 D8 VDDQ VSS K2
M_B_DQ24 D12 VDDQ VSS K4 D12 VDDQ VSS K4
M_B_DQ25 F10 VDDQ VSS N2 F10 VDDQ VSS N2
M_B_DQ26 U10 VDDQ VSS N4 U10 VDDQ VSS N4
B M_B_DQ27 W8 VDDQ VSS P1 W8 VDDQ VSS P1 B
M_B_DQ28 W12 VDDQ VSS P3 W12 VDDQ VSS P3
M_B_DQ29 1D8V_S3 AA8 VDDQ VSS T1 1D8V_S3 AA8 VDDQ VSS T1 1D1V_S3 1D1V_S3
M_B_DQ30 AA10 VDDQ VSS T3 AA10 VDDQ VSS T3
M_B_DQ31 VDDQ VSS T5 VDDQ VSS T5
F1 VSS V1 F1 VSS V1
5 M_B_DQS_DN[3:0]
2
M_B_DQS_DN0 G4 VDD1 VSS V5 G4 VDD1 VSS V5
M_B_DQS_DN1 T4 VDD1 VSS W2 T4 VDD1 VSS W2 R1205 R1206
M_B_DQS_DN2 U1 VDD1 VSS W4 U1 VDD1 VSS W4
VDD1 VSS VDD1 VSS 0R0402-PAD-1-GP 0R0402-PAD-1-GP
M_B_DQS_DN3 G9 Y1 G9 Y1
F12 VDD1 VSS Y5 F12 VDD1 VSS Y5
1
5 M_B_DQS_DP[3:0] M_B_DQS_DP0 T9 VDD1 VSS AB3 T9 VDD1 VSS AB3 M_B_ODT0 M_B_ODT1
M_B_DQS_DP1 U12 VDD1 VSS AB5 U12 VDD1 VSS AB5
M_B_DQS_DP2 VDD1 VSS A10 VDD1 VSS A10
M_B_DQS_DP3 1D1V_S3 VSS C8 1D1V_S3 VSS C8
A4 VSS C12 A4 VSS C12
F5 VDD2 VSS D9 F5 VDD2 VSS D9
5 M_B_CLK_N0 H1 VDD2 VSS D11 H1 VDD2 VSS D11
5 M_B_CLK_P0 H5 VDD2 VSS E8 H5 VDD2 VSS E8
5 M_B_CLK_N1 K1 VDD2 VSS E12 K1 VDD2 VSS E12
5 M_B_CLK_P1 K3 VDD2 VSS G8 K3 VDD2 VSS G8
N1 VDD2 VSS G10 N1 VDD2 VSS G10
5 M_B_CKE0 N3 VDD2 VSS G12 N3 VDD2 VSS G12
5 M_B_CKE1 R1 VDD2 VSS J10 R1 VDD2 VSS J10
5 M_B_CKE2 R5 VDD2 VSS J12 R5 VDD2 VSS J12
5 M_B_CKE3 U5 VDD2 VSS K9 U5 VDD2 VSS K9
AB4 VDD2 VSS K11 AB4 VDD2 VSS K11
5 M_B_CS0_N A9 VDD2 VSS N9 A9 VDD2 VSS N9
5 M_B_CS1_N F8 VDD2 VSS N11 F8 VDD2 VSS N11
5 M_B_CS2_N H8 VDD2 VSS P10 H8 VDD2 VSS P10
5 M_B_CS3_N H12 VDD2 VSS P12 H12 VDD2 VSS P12
K10 VDD2 VSS T8 K10 VDD2 VSS T8
5 M_B_A0 K12 VDD2 VSS T10 K12 VDD2 VSS T10
5 M_B_A1 N10 VDD2 VSS T12 N10 VDD2 VSS T12
5 M_B_A2 N12 VDD2 VSS V8 N12 VDD2 VSS V8
5 M_B_A3 R8 VDD2 VSS V12 R8 VDD2 VSS V12
5 M_B_A4 R12 VDD2 VSS W9 R12 VDD2 VSS W9
5 M_B_A5 U8 VDD2 VSS W11 U8 VDD2 VSS W11
AB9 VDD2 VSS Y8 AB9 VDD2 VSS Y8
5 M_B_B0 VDD2 VSS Y12 VDD2 VSS Y12
5 M_B_B1 VSS AB8 VSS AB8
A 5 M_B_B2 VSS AB10 VSS AB10 A
5 M_B_B3 VSS VSS
5 M_B_B4
5 M_B_B5
H9HCNNNCPMMLHR-NME-GP H9HCNNNCPMMLHR-NME-GP
5,13 SM_DRAMRST_N 072.H9HCN.0E0U 072.H9HCN.0E0U
NTD ORS
Wistron Corporation
Title
DDR (DDR4-CHA)
A2
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
5 M_C_DQ[31:0] M_C_DQ0
M_C_DQ1
M_C_DQ2
M_C_DQ3
M_C_DQ4
M_C_DQ5
M_C_DQ6
M_C_DQ7
Layout Note:Place as pic..
M_C_DQ8 DQS_B swizzling map:
M_C_DQ9
M_C_DQ10
1D8V_S3
VDD1
M_C_DQ11
M_C_DQ12 RAM3A 1 OF 2 RAM4A 1 OF 2
M_C_DQ13
1
M_C_DQ14 M_C_CLK_P0 J8 B2 M_C_DQ0 M_D_CLK_P0 J8 B2 M_D_DQ0
M_C_DQ15 M_C_CLK_N0 J9 CK_T_A DQ0_A C2 M_C_DQ1 M_D_CLK_N0 J9 CK_T_A DQ0_A C2 M_D_DQ1 C1303 C1304 C1305 C1306 C1307 C1308 C1309 C1310 C1311 C1312
M_C_DQ16 CK_C_A DQ1_A E2 M_C_DQ2 CK_C_A DQ1_A E2 M_D_DQ2
2
M_C_DQ17 M_C_CLK_P1 P8 DQ2_A F2 M_C_DQ3 M_D_CLK_P1 P8 DQ2_A F2 M_D_DQ3
D D
M_C_DQ18 M_C_CLK_N1 P9 CK_T_B DQ3_A F4 M_C_DQ4 M_D_CLK_N1 P9 CK_T_B DQ3_A F4 M_D_DQ6 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP
M_C_DQ19 CK_C_B DQ4_A E4 M_C_DQ5 CK_C_B DQ4_A E4 M_D_DQ7 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP
M_C_DQ20 M_C_CKE0 J4 DQ5_A C4 M_C_DQ6 M_D_CKE0 J4 DQ5_A C4 M_D_DQ4
M_C_DQ21 M_C_CKE1 J5 CKE0_A DQ6_A B4 M_C_DQ7 M_D_CKE1 J5 CKE0_A DQ6_A B4 M_D_DQ5
M_C_DQ22 CKE1_A DQ7_A B11 M_C_DQ14 CKE1_A DQ7_A B11 M_D_DQ11
M_C_DQ23 M_C_CKE2 P4 DQ8_A C11 M_C_DQ13 M_D_CKE2 P4 DQ8_A C11 M_D_DQ10
M_C_DQ24 M_C_CKE3 CKE0_B DQ9_A M_C_DQ12 M_D_CKE3 CKE0_B DQ9_A M_D_DQ13
M_C_DQ25
P5
CKE1_B DQ10_A
E11
F11 M_C_DQ15
P5
CKE1_B DQ10_A
E11
F11 M_D_DQ15
1D1V_S3
VDD2
M_C_DQ26 DQ11_A F9 M_C_DQ10 DQ11_A F9 M_D_DQ12
M_C_DQ27 M_C_CS0_N H4 DQ12_A E9 M_C_DQ8 M_D_CS0_N H4 DQ12_A E9 M_D_DQ14
M_C_DQ28 M_C_CS1_N H3 CS0_A DQ13_A C9 M_C_DQ9 M_D_CS1_N H3 CS0_A DQ13_A C9 M_D_DQ9
1
M_C_DQ29 CS1_A DQ14_A B9 M_C_DQ11 CS1_A DQ14_A B9 M_D_DQ8 C1314 C1315
M_C_DQ30 M_C_CS2_N R4 DQ15_A M_D_CS2_N R4 DQ15_A C1316 C1317 C1318 C1319 C1320 C1321 C1326 C1327
M_C_DQ31 M_C_CS3_N CS0_B M_D_CS3_N CS0_B
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
R3 R3
2
CS1_B AA2 M_C_DQ22 CS1_B AA2 M_D_DQ17
5 M_C_DQS_DN[3:0] M_C_DQS_DN0 M_C_A0 DQ0_B M_C_DQ17 M_D_A0 DQ0_B M_D_DQ19
H2 Y2 H2 Y2 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP
M_C_DQS_DN1 M_C_A1 J2 CA0_A DQ1_B V2 M_C_DQ21 M_D_A1 J2 CA0_A DQ1_B V2 M_D_DQ20 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP
M_C_DQS_DN2 M_C_A2 H9 CA1_A DQ2_B U2 M_C_DQ19 M_D_A2 H9 CA1_A DQ2_B U2 M_D_DQ23
M_C_DQS_DN3 M_C_A3 H10 CA2_A DQ3_B U4 M_C_DQ20 M_D_A3 H10 CA2_A DQ3_B U4 M_D_DQ22
M_C_A4 H11 CA3_A DQ4_B V4 M_C_DQ23 M_D_A4 H11 CA3_A DQ4_B V4 M_D_DQ21
5 M_C_DQS_DP[3:0] M_C_DQS_DP0 M_C_A5 CA4_A DQ5_B M_C_DQ16 M_D_A5 CA4_A DQ5_B M_D_DQ16
J11 Y4 J11 Y4
M_C_DQS_DP1 CA5_A DQ6_B AA4 M_C_DQ18 CA5_A DQ6_B AA4 M_D_DQ18 0D6V_S3
M_C_DQS_DP2 M_C_B0 R2 DQ7_B AA11 M_C_DQ31 M_D_B0 R2 DQ7_B AA11 M_D_DQ30
M_C_DQS_DP3 M_C_B1
M_C_B2
P2 CA0_B
CA1_B
DQ8_B
DQ9_B
Y11 M_C_DQ27
M_C_DQ25
M_D_B1
M_D_B2
P2 CA0_B
CA1_B
DQ8_B
DQ9_B
Y11 M_D_DQ31
M_D_DQ26
VDDQ
R9 V11 R9 V11
M_C_B3 R10 CA2_B DQ10_B U11 M_C_DQ26 M_D_B3 R10 CA2_B DQ10_B U11 M_D_DQ24
5 M_C_CLK_N0
1
M_C_B4 R11 CA3_B DQ11_B U9 M_C_DQ28 M_D_B4 R11 CA3_B DQ11_B U9 M_D_DQ27
5 M_C_CLK_P0 M_C_B5 P11 CA4_B DQ12_B V9 M_C_DQ24 M_D_B5 P11 CA4_B DQ12_B V9 M_D_DQ25 C1322 C1323 C1324 C1325 C1330 C1328 C1331 C1332 C1333 C1334
5 M_C_CLK_N1 CA5_B DQ13_B Y9 M_C_DQ30 CA5_B DQ13_B Y9 M_D_DQ28
5 M_C_CLK_P1
2
M_C_ODT0 G2 DQ14_B AA9 M_C_DQ29 M_D_ODT0 G2 DQ14_B AA9 M_D_DQ29
M_C_ODT1 T2 ODT_CA_A DQ15_B M_D_ODT1 T2 ODT_CA_A DQ15_B SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP
5 M_C_CKE0 ODT_CA_B ODT_CA_B SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP
5 M_C_CKE1 SM_DRAMRST_N T11 SM_DRAMRST_N T11
5 M_C_CKE2 RESET# D3 M_C_DQS_DP0 RESET# D3 M_D_DQS_DP0
5 M_C_CKE3
1
1
A1 DQS0_T_A E3 M_C_DQS_DN0 A1 DQS0_T_A E3 M_D_DQS_DN0
DY DNU#A1 DQS0_C_A DY DNU#A1 DQS0_C_A
C1302 A2 C1301 A2
5 M_C_CS0_N B1 DNU#A2 D10 M_C_DQS_DP1 B1 DNU#A2 D10 M_D_DQS_DP1
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
2
2
5 M_C_CS1_N AA1 DNU#B1 DQS1_T_A E10 M_C_DQS_DN1 AA1 DNU#B1 DQS1_T_A E10 M_D_DQS_DN1
5 M_C_CS2_N AB1 DNU#AA1 DQS1_C_A AB1 DNU#AA1 DQS1_C_A
5 M_C_CS3_N AB2 DNU#AB1 W3 M_C_DQS_DP2 AB2 DNU#AB1 W3 M_D_DQS_DP2
A11 DNU#AB2 DQS0_T_B V3 M_C_DQS_DN2 A11 DNU#AB2 DQS0_T_B V3 M_D_DQS_DN2
C C
5 M_C_A0 A12 DNU#A11 DQS0_C_B A12 DNU#A11 DQS0_C_B
5 M_C_A1 B12 DNU#A12 W10 M_C_DQS_DP3 B12 DNU#A12 W10 M_D_DQS_DP3
5 M_C_A2 AA12 DNU#B12 DQS1_T_B V10 M_C_DQS_DN3 AA12 DNU#B12 DQS1_T_B V10 M_D_DQS_DN3
5 M_C_A3 AB11 DNU#AA12 DQS1_C_B AB11 DNU#AA12 DQS1_C_B
5 M_C_A4 AB12 DNU#AB11 AB12 DNU#AB11
5 M_C_A5 K5 DNU#AB12 K5 DNU#AB12
K8 DNU#K5 C3 K8 DNU#K5 C3
5 M_C_B0 N5 DNU#K8 DMI0_A C10 N5 DNU#K8 DMI0_A C10
5 M_C_B1 N8 DNU#N5 DMI1_A N8 DNU#N5 DMI1_A
5 M_C_B2 G11 DNU#N8 Y3 0D6V_S3 G11 DNU#N8 Y3
5 M_C_B3 DNU#G11 DMI0_B Y10 DNU#G11 DMI0_B Y10 0D6V_S3
5 M_C_B4 DMI1_B DMI1_B
5 M_C_B5 A5 M_C_ZQ0 R1309 1 2 240R2F-1-GP A5 M_D_ZQ0 1 2 240R2F-1-GP
R1312
ZQ0 A8 M_C_ZQ1 R1310 1 2 240R2F-1-GP ZQ0 A8 M_D_ZQ1 R1311 1 2 240R2F-1-GP
ZQ1 ZQ1
5 M_D_DQ[31:0] M_D_DQ0
M_D_DQ1 H9HCNNNCPMMLHR-NME-GP H9HCNNNCPMMLHR-NME-GP
M_D_DQ2
072.H9HCN.0E0U 072.H9HCN.0E0U
M_D_DQ3 1D1V_S3 1D1V_S3
M_D_DQ4
M_D_DQ5
M_D_DQ6
2
M_D_DQ7
M_D_DQ8 R1301 R1302
M_D_DQ9 RAM3B 2 OF 2 RAM4B 2 OF 2 0R0402-PAD-1-GP 0R0402-PAD-1-GP
M_D_DQ10 0D6V_S3 0D6V_S3
M_D_DQ11 B3 A3 B3 A3
1
M_D_DQ12 B5 VDDQ VSS C1 B5 VDDQ VSS C1 M_C_ODT0 M_C_ODT1
M_D_DQ13 D1 VDDQ VSS C5 D1 VDDQ VSS C5
M_D_DQ14 D5 VDDQ VSS D2 D5 VDDQ VSS D2
M_D_DQ15 F3 VDDQ VSS D4 F3 VDDQ VSS D4
M_D_DQ16 U3 VDDQ VSS E1 U3 VDDQ VSS E1
M_D_DQ17 W1 VDDQ VSS E5 W1 VDDQ VSS E5
M_D_DQ18 W5 VDDQ VSS G1 W5 VDDQ VSS G1
M_D_DQ19 AA3 VDDQ VSS G3 AA3 VDDQ VSS G3
M_D_DQ20 AA5 VDDQ VSS G5 AA5 VDDQ VSS G5
M_D_DQ21 B8 VDDQ VSS J1 B8 VDDQ VSS J1
M_D_DQ22 B10 VDDQ VSS J3 B10 VDDQ VSS J3
M_D_DQ23 D8 VDDQ VSS K2 D8 VDDQ VSS K2
M_D_DQ24 D12 VDDQ VSS K4 D12 VDDQ VSS K4 1D1V_S3 1D1V_S3
B M_D_DQ25 F10 VDDQ VSS N2 F10 VDDQ VSS N2 B
M_D_DQ26 U10 VDDQ VSS N4 U10 VDDQ VSS N4
M_D_DQ27 W8 VDDQ VSS P1 W8 VDDQ VSS P1
2
M_D_DQ28 W12 VDDQ VSS P3 W12 VDDQ VSS P3
M_D_DQ29 1D8V_S3 AA8 VDDQ VSS T1 1D8V_S3 AA8 VDDQ VSS T1 R1305 R1306
M_D_DQ30 AA10 VDDQ VSS T3 AA10 VDDQ VSS T3
VDDQ VSS VDDQ VSS 0R0402-PAD-1-GP 0R0402-PAD-1-GP
M_D_DQ31 T5 T5
F1 VSS V1 F1 VSS V1
5 M_D_DQS_DN[3:0]
1
M_D_DQS_DN0 G4 VDD1 VSS V5 G4 VDD1 VSS V5 M_D_ODT0 M_D_ODT1
M_D_DQS_DN1 T4 VDD1 VSS W2 T4 VDD1 VSS W2
M_D_DQS_DN2 U1 VDD1 VSS W4 U1 VDD1 VSS W4
M_D_DQS_DN3 G9 VDD1 VSS Y1 G9 VDD1 VSS Y1
F12 VDD1 VSS Y5 F12 VDD1 VSS Y5
5 M_D_DQS_DP[3:0] M_D_DQS_DP0 T9 VDD1 VSS AB3 T9 VDD1 VSS AB3
M_D_DQS_DP1 U12 VDD1 VSS AB5 U12 VDD1 VSS AB5
M_D_DQS_DP2 VDD1 VSS A10 VDD1 VSS A10
M_D_DQS_DP3 1D1V_S3 VSS C8 1D1V_S3 VSS C8
A4 VSS C12 A4 VSS C12
F5 VDD2 VSS D9 F5 VDD2 VSS D9
5 M_D_CLK_N0 H1 VDD2 VSS D11 H1 VDD2 VSS D11
5 M_D_CLK_P0 H5 VDD2 VSS E8 H5 VDD2 VSS E8
5 M_D_CLK_N1 K1 VDD2 VSS E12 K1 VDD2 VSS E12
5 M_D_CLK_P1 K3 VDD2 VSS G8 K3 VDD2 VSS G8
N1 VDD2 VSS G10 N1 VDD2 VSS G10
5 M_D_CKE0 N3 VDD2 VSS G12 N3 VDD2 VSS G12
5 M_D_CKE1 R1 VDD2 VSS J10 R1 VDD2 VSS J10
5 M_D_CKE2 R5 VDD2 VSS J12 R5 VDD2 VSS J12
5 M_D_CKE3 U5 VDD2 VSS K9 U5 VDD2 VSS K9
AB4 VDD2 VSS K11 AB4 VDD2 VSS K11
5 M_D_CS0_N A9 VDD2 VSS N9 A9 VDD2 VSS N9
5 M_D_CS1_N F8 VDD2 VSS N11 F8 VDD2 VSS N11
5 M_D_CS2_N H8 VDD2 VSS P10 H8 VDD2 VSS P10
5 M_D_CS3_N H12 VDD2 VSS P12 H12 VDD2 VSS P12
K10 VDD2 VSS T8 K10 VDD2 VSS T8
5 M_D_A0 K12 VDD2 VSS T10 K12 VDD2 VSS T10
5 M_D_A1 N10 VDD2 VSS T12 N10 VDD2 VSS T12
5 M_D_A2 N12 VDD2 VSS V8 N12 VDD2 VSS V8
5 M_D_A3 R8 VDD2 VSS V12 R8 VDD2 VSS V12
5 M_D_A4 R12 VDD2 VSS W9 R12 VDD2 VSS W9
5 M_D_A5 U8 VDD2 VSS W11 U8 VDD2 VSS W11
AB9 VDD2 VSS Y8 AB9 VDD2 VSS Y8
A 5 M_D_B0 VDD2 VSS Y12 VDD2 VSS Y12 A
5 M_D_B1 VSS AB8 VSS AB8
5 M_D_B2 VSS AB10 VSS AB10
5 M_D_B3 VSS VSS
5 M_D_B4
5 M_D_B5
H9HCNNNCPMMLHR-NME-GP H9HCNNNCPMMLHR-NME-GP
NTD ORS
5,12 SM_DRAMRST_N 072.H9HCN.0E0U 072.H9HCN.0E0U
Wistron Corporation
Title
DDR (DDR4-CHB)
A2
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
TEST
A
Title
DDR (RSVD) (DDR4-CHA1)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
GPIO GPP_C5 SPI_SI GPP_E6 GPP_B23 SPI_WP ME_UNLOCK (GPP_R2) CNVI debug MODES (GPP_F2)
24 ME_UNLOCK
21,61 CNV_RGI_DT Move to Page 25 Move to Page 25

18 GPP_C5_SML0ALERT_N
18 GPP_E6_JTAG_ODT
GPIO TBT LSX VCCIO conf.#0 TBT LSX VCCIO conf.#1 TBT LSX VCCIO conf.#2 TBT LSX VCCIO conf.#3 A0 GPP_E10 GPP_E11
19 HDA_SDOUT_CPU
4 TBT_LSX1_RXD
E19 E21 D12
4,71 TBT_LSX2_RXD Move to Page 25 1D8V_S5 1D8V_S5
D D
3,99 DBG_PMODE
1
R1518 R1519
20KR2J-L3-GP 20KR2J-L3-GP
2
GPP_E10 GPP_E11
18 GPP_E10 Schematic
18 GPP_E11 20190515_neal
Why GPP_E10, GPP_E11 need PU?
GPP_C5 GPP_E6
GPP_C5 / Boot Strap 0 Rising edge of This strap has a 20 kohm ± 30% internal pull-down. GPP_E6 JTAG ODT Rising edge of This strap does not have an internal pull-up or pull-down. 1D8V_S5
SML0ALERT# RSMRST# This is bit 0 (LSB) of a total of 4-bit encoded pin straps for boot 3D3V_S5 Disable RSMRST# External pull-up is recommended
configuration. 0=> JTAG ODT is disabled
This strap is used in conjunction with Boot Strap 1,2,3, (on 1=> JTAG ODT is enabled
GPP_H0, GPP_H1, GPP_H2 respectively).
1
4-bit boot strap configuration encodings:
0000 = Master Attached Flash Configuration (BIOS / CSME on DY
SPI). eSPI is enabled R1501 R1503
0010 = Master Attached Flash Configuration (BIOS / CSME on 4K7R2J-L-GP 100KR2J-1-GP
SPI). eSPI is disabled
2
0100 = BIOS on eSPI Peripheral Channel; CSME on master GPP_C5_SML0ALERT_N GPP_E6_JTAG_ODT
attached SPI
1
1000 = Slave Attached Flash Configuration (BIOS / CSME on
eSPI attached device).
1100 = BIOS on eSPI peripheral Channel; CSME on slave DY
R1509
attached SPI.
Others: Reserved 4K7R2J-L-GP
2
de-asserts.
C C
GPP_D10 GPP_E19
GPP_D10 / DDP3 I2C / Rising edge of This strap has a 20 kohm ± 30% internal pull-down. GPP_E19 / DDP1 I2C / Rising edge of This strap has a 20 kohm ± 30% internal pull-down. 3D3V_S5
ISH_SPI_CLK / TBT_LSX2 / RSMRST# 0 = DDP3 I2C / TBT_LSX2 / BBSB_LS2 pins at 1.8V 3D3V_S5 DDP1_CTRLDATA / TBT_LSX0 / RSMRST# 0=> DDP1 I2C / TBT_LSX0 / BSSB_LS0 pins at 1.8V
DDP3_CTRLDATA / BBSB_LS2 1 = DDP3 I2C / TBT_LSX2 / BBSB_LS2 pins at 3.3V TBT_LSX0_RXD BSSB_LS0 1=> DDP1 I2C / TBT_LSX0 / BSSB_LS0 pins at 3.3V
1
TBT_LSX2_RXD / pins VCC Notes: 1. The internal pull-down is disabled after RSMRST# pins VCC Notes: 1. The internal pull-down is disabled after RSMRST#
GSPI2_CLK configuration de-asserts. configuration de-asserts. DY
1
2. This signal is in the primary well. 2. This signal is in the primary well. R1513
DY 4K7R2J-L-GP
R1520
4K7R2J-L-GP
2
TBT_LSX1_RXD
2
TBT_LSX2_RXD
GPP_D12 GPP_E21
GPP_D12 / DDP4 I2C / Rising edge of This strap has a 20 kohm ± 30% internal pull-down. GPP_E21 / DDP2 I2C / Rising edge of This strap has a 20 kohm ± 30% internal pull-down. 3D3V_S5
ISH_SPI_MOSI / TBT_LSX3 / RSMRST# 0 = DDP4 I2C / TBT_LSX3 / BBSB_LS3 pins at 1.8V DDP2_CTRLDATA / TBT_LSX1 / RSMRST# 0 = DDP2 I2C / TBT_LSX1 / BSSB LS1 pins at 1.8V
DDP4_CTRLDATA / BSSB_LS3 1 = DDP4 I2C / TBT_LSX3 / BBSB_LS3 pins at 3.3 3D3V_S5 TBT_LSX1_RXD BSSB_LS1 1 = DDP2 I2C / TBT_LSX1 / BSSB LS1 pins at 3.3V
1
CAS_SPIM_MOSI / pins VCC Notes: 1. The internal pull-down is disabled after RSMRST# pins VCC Notes: 1. The internal pull-down is disabled after RSMRST#
TBT_LSX3_RXD configuration de-asserts. configuration de-asserts.
2. This signal is in the primary well. 2. This signal is in the primary well. DY
1
R1514
DY 4K7R2J-L-GP
R1515
2
4K7R2J-L-GP TBT_LSX1_VCC_CONFIG
2
TBT_LSX3_VCC_CONFIG
B B
GPP_R2 DBG_PMODE
GPP_R2 / Flash Rising edge of This strap has a 20 kohm ± 30% internal pull-down. DBG_PMODE Reserved Rising edge of This strap has a 20 kohm ± 30% internal pull-up. 1D05V_S5_OUT
HDA_SDO / Descriptor PCH_PWROK 0=> Enable security measures defined in the Flash Descriptor. RSMRST# This strap should sample high. There should NOT be any onboard
I2S0_TXD Security (Default) device driving it to opposite direction during strap
1
Override 1=> Disable Flash Descriptor Security (override). This strap sampling.
should only be asserted high using external Pull-up in Notes: 1. The internal pull-up is disabled after RSMRST#
manufacturing/debug environments ONLY. de-asserts. XDP
Notes: 1. The internal pull-down is disabled after 2. This signal is in the primary well. R1517
PCH_PWROK is high. 1KR2J-1-GP
2
DBG_PMODE
ME_UNLOCK 1 2 HDA_SDOUT_CPU
R1511 1KR2J-1-GP
EC control.
GPP_F2
1D8V_S5
GPP_F2 / M.2 CNVi Rising edge of This strap does not have an internal pull-up or pull-down. A
CNV_RGI_DT / Mode Select RSMRST# weak external pull-up is required.
1
UART0_TXD 0=>Integrated CNVi enabled.

A 1=>Integrated CNVi disabled. A
R1505
Note: When a RF companion chip is connected to the PCH
CNVi interface, the device internal pull-down resistor 100KR2J-1-GP
will pull the strap low to enable CNVi interface.
2
CNV_RGI_DT
TEST
Wistron Corporation
Title
CPU (STRAP)
A2
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
TYPEA Port1 CPU1I 9 OF 21

36 USB1_USB20_N
36 USB1_USB20_P
BT7 CV4
BT8 PCIE12_TXP/SATA1_TXP USB2P_10 CY3
66 USB1_USB30_TX_N PCIE12_TXN/SATA1_TXN USB2N_10
CE2
CE1 PCIE12_RXP/SATA1_RXP DD5
66 USB1_USB30_TX_P PCIE12_RXN/SATA1_RXN USB2P_9 DD4
BT9 USB2N_9
66 USB1_USB30_RX_N PCIE11_TXP/SATA0_TXP FP_USB20_P
BV9 CW9
SSD 66 USB1_USB30_RX_P
CF4 PCIE11_TXN/SATA0_TXN
PCIE11_RXP/SATA0_RXP
USB2P_8
USB2N_8
DA9 FP_USB20_N Finger Print
D CF3 D
63 SSD_PCIE_TX_P0 PCIE11_RXN/SATA0_RXN DD1
USB2P_7
63 SSD_PCIE_TX_N0 TYPEA Port2 BV7
PCIE10_TXP USB2N_7
DD2
BV8
66 USB2_USB20_N PCIE10_TXN
CG2 DA1
63 SSD_PCIE_TX_P1 PCIE10_RXP USB2P_6
CG1 DA2
66 USB2_USB20_P PCIE10_RXN USB2N_6
63 SSD_PCIE_TX_N1 CCD_USB20_P
BY7 DA12
63 SSD_PCIE_TX_P2
66 USB2_USB30_TX_N
BY8 PCIE9_TXP
PCIE9_TXN
USB2P_5
USB2N_5
DA11 CCD_USB20_N Camera
CG5
66 USB2_USB30_TX_P PCIE9_RXP TOUCH_USB20_P
CG4 DC8
63 SSD_PCIE_TX_N2
66 USB2_USB30_RX_N
PCIE9_RXN USB2P_4
USB2N_4
DC7 TOUCH_USB20_N Touch Panel
CB8
63 SSD_PCIE_TX_P3 PCIE8_TXP TBTB_USB20_P
CB7 DB4
63 SSD_PCIE_TX_N3
66 USB2_USB30_RX_P
CK5 PCIE8_TXN
PCIE8_RXP
USB2P_3
USB2N_3
DB3 TBTB_USB20_N TYPEC Port1
CK4
63 SSD_PCIE_RX_P0
Camera PCIE8_RXN
USB2P_2
DA5 USB2_USB20_P
TYPEA Port2
CD9 DA4 USB2_USB20_N
66 CCD_USB20_P PCIE7_TXP USB2N_2
CD8
63 SSD_PCIE_RX_N0 PCIE7_TXN USB1_USB20_P
CK1 DC11
63 SSD_PCIE_RX_P1
66 CCD_USB20_N
CK2 PCIE7_RXP
PCIE7_RXN
USB2P_1
USB2N_1
DC9 USB1_USB20_N TYPEA Port1
CG8 DP4
63 SSD_PCIE_RX_N1
Touch Panel CG7 PCIE6_TXP
PCIE6_TXN
GPP_E0/SATAXPCIE0/SATAGP0
GPP_A12/SATAXPCIE1/SATAGP1/I2S3_SFRM
DF41
CL4
63 SSD_PCIE_RX_P2 PCIE6_RXP USB_OC0_N
CL3 DD8
55 TOUCH_USB20_P PCIE6_RXN GPP_E9/USB_OC0# USB_OC3_N
DJ45
63 SSD_PCIE_RX_N2 GPP_A16/USB_OC3#/I2S4_SFRM
CJ8
55 TOUCH_USB20_N PCIE5_TXP
CJ7 DN6
63 SSD_PCIE_RX_P3 PCIE5_TXN GPP_E5/DEVSLP1
C CN2 DG8 C
CN1 PCIE5_RXP GPP_E4/DEVSLP0
63 SSD_PCIE_RX_N3 PCIE5_RXN DN29
CR8 GPP_H15/M2_SKT2_CFG3 DK29
CR7 PCIE4_TXP/USB31_4_TXP GPP_H14/M2_SKT2_CFG2 DT31
CN5 PCIE4_TXN/USB31_4_TXN GPP_H13/M2_SKT2_CFG1 DR32
CN4 PCIE4_RXP/USB31_4_RXP GPP_H12/M2_SKT2_CFG0
PCIE4_RXN/USB31_4_RXN DV9 PCIE_RCOMP_P
CU8 PCIE_RCOMP_P DT9 PCIE_RCOMP_N 2 R1601 1 100R2F-L3-GP
CU7 PCIE3_TXP/USB31_3_TXP PCIE_RCOMP_N
CT2 PCIE3_TXN/USB31_3_TXN DC12 USB_VBUSSENSE 1 R1602 2 10KR2F-L1-GP
CT1 PCIE3_RXP/USB31_3_RXP USB_VBUSSENSE DF1 USB_ID 1 R1603 2 10KR2F-L1-GP
Finger Print PCIE3_RXN/USB31_3_RXN USB_ID
USB2_COMP
DE1 USB2_COMP 1 R1604 2 113R2F-GP
USB2_USB30_TX_P CW8
66 FP_USB20_N USB2_USB30_TX_N CW7 PCIE2_TXP/USB31_2_TXP E3
66 FP_USB20_P
TYPEA Port2 USB2_USB30_RX_P CU3 PCIE2_TXN/USB31_2_TXN
PCIE2_RXP/USB31_2_RXP
RSVD_BSCAN
USB2_USB30_RX_N CT4
PCIE2_RXN/USB31_2_RXN
USB1_USB30_TX_P DA8
USB1_USB30_TX_N DA7 PCIE1_TXP/USB31_1_TXP
USB1_USB30_RX_P CV2 PCIE1_TXN/USB31_1_TXN
TYPEA Port1 AOU USB1_USB30_RX_N CV1 PCIE1_RXP/USB31_1_RXP
PCIE1_RXN/USB31_1_RXN 3D3V_S5
TGL-U-1-GP-U1
USB_OC0_N R1605 2 1 10KR2J-3-GP
B
TYPEC Port1 USB_OC3_N R1606 2 1 10KR2J-3-GP B
72 TBTB_USB20_P
72 TBTB_USB20_N 8 OF 21
CPU1H
SSD_PCIE_TX_P3 P5 V5 SSD_PCIE_TX_P1
SSD_PCIE_TX_N3 P7 PCIE4_TX_P3 PCIE4_TX_P1 V7 SSD_PCIE_TX_N1
36 USB_OC0_N SSD_PCIE_RX_P3 PCIE4_TX_N3 PCIE4_TX_N1 SSD_PCIE_RX_P1
N1 T1
SSD_PCIE_RX_N3 N2 PCIE4_RX_P3 PCIE4_RX_P1 T2 SSD_PCIE_RX_N1
66 USB_OC3_N OPT PCIE4_RX_N3 PCIE4_RX_N1 OPT
SSD_PCIE_TX_P2 T5 Y5 SSD_PCIE_TX_P0
SSD SSD_PCIE_TX_N2 T7 PCIE4_TX_P2 PCIE4_TX_P0 Y7 SSD_PCIE_TX_N0 SSD
SSD_PCIE_RX_P2 R1 PCIE4_TX_N2 PCIE4_TX_N0 V1 SSD_PCIE_RX_P0
SSD_PCIE_RX_N2 R2 PCIE4_RX_P2 PCIE4_RX_P0 V2 SSD_PCIE_RX_N0
PCIE4_RX_N2 PCIE4_RX_N0
Y12 PCIE4_RCOMP_P 1 R1609 2 2K2R2F-GP
PCIE4_RCOMP_P V12 PCIE4_RCOMP_N
PCIE4_RCOMP_N
TGL-U-1-GP-U1
A TEST A
Wistron Corporation
Title
CPU (PCIE/SATA/USB)
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
CPU1L 12 OF 21
24,63,91 PLTRST_CPU_N 3D3V_S0

PM_SLP_SUS_N DV49 BM9
24,40 PM_SLP_SUS_N SLP_SUS# PROCPWRGD DK41 PM_PWRBTN_N 1 2 SYS_RESET_N
DM43 GPD3/PWRBTN# DN41 PM_BATLOW_N R1706 10KR2J-3-GP
PM_SLP_S4_N DJ41 GPD10/SLP_S5# GPD0/BATLOW# DK43 AC_PRESENT 3D3V_S5
PM_SLP_S3_N DJ43 GPD5/SLP_S4# GPD1/ACPRESENT
24,40,54,57 PM_SLP_S3_N GPD4/SLP_S3# 3D3V_S5
DR41 CW40 PMC_ALERT_CPU_N1 2
TP1904 1 DT44 GPD6/SLP_A# GPP_B11/PMCALERT# DN27 CPU_C10_GATE_N R1734
D 24,40 PM_SLP_S4_N GPD9/SPL_WLAN# GPP_H18/CPU_C10_GATE# D
TPAD14-OP-GP DG31 10KR2J-3-GP
TP1703 1 PM_SLP_S0_N DD42 GPP_H3/SX_EXIT_HOLDOFF# 1 2LAN_WAKE_N
24 PM_PWRBTN_N DN39 GPP_B12/SLP_S0# DK39 PCIE_WAKE_N
TPAD14-OP-GP R1737 10KR1J-GP
SLP_LAN# WAKE# 1 2 PM_BATLOW_N
24,40 ALL_SYS_PWRGD PM_RSMRST_N DM35 DM41 LAN_WAKE_N R1710 10KR2J-3-GP
SYS_RESET_N DD10 RSMRST# GPD2/LAN_WAKE# DT41 TP_GPG11 1 1 2 PCIE_WAKE_N
99 SYS_RESET_N PLTRST_CPU_N DD41 SYS_RESET# GPD11/LANPHYPC/DSWLDO_MON TP1702
R1709 1KR2J-1-GP
R1701 GPP_B13/PLTRST# DN43 RT_PERST_N_GPD7
50 VCCIN_AUX_PWRGD strap GPD7
0R0402-PAD-1-GP DSW_PWROK_R DK35 2 1 VCCST_OVERRIDE
S0_PWRGD 1 2 SYS_PWROK DF10 DSW_PWROK CE5 VCCSTPWRGOOD_TCSS 1 R1703 2 VCCST_OVERRIDE R1715 100KR2J-1-GP
24,99 RSMRST_N_KBC PCH_PWROK SYS_PWROK VCCSTPWRGOOD_TCSS
1 2 PCH_PWROK_R DN35 BP8 VCCST_PWRGD_R 0R0402-PAD-1-GP
R1704 PCH_PWROK VCCST_PWRGD BP9 VCCST_OVERRIDE_R 1 R1705 2 VCCST_OVERRIDE
24 DSW_PWROK VCCST_OVERRIDE
0R0402-PAD-1-GP RTC_INTRUDER_N DM37 0R0402-PAD-1-GP 2 1 PCH_PWROK_R
SPI_VCC_SEL DT49 INTRUDER# DR12 R1717 100KR2J-1-GP
40 PCH_PWROK SPIVCCIOSEL GPP_F20/EXT_PWR_GATE# DW12 VCCST_OVERRIDE
strap GPP_F21/EXT_PWR_GATE2# VccST Override: Signal that
24 S0_PWRGD allows the PCH to keep VCCST
2 1 SYS_PWROK
powered ON (in case
TGL-U-1-GP-U1 VCCST is powered down) for R1720 100KR2J-1-GP
USB-C wake capability.
24 AC_PRESENT
40 VCCST_OVERRIDE
SPI SELECT STRAP SPI SELECT STRAP
C 71 RT_PERST_N Cap LOW → 3.3V LOW → 3.3V C
Cap DY → 1.8V HIGH → 1.8V
ALL_SYS_PWRGD1 2 VCCST_PWRGD_R
R1726 3D3V_RTC_AUX PLTRST_CPU_N R1735 1 2 0R0402-PAD-1-GP
40 CPU_C10_GATE_N
100KR2J-1-GP R1727 C1702
1
RT_PERST_N_GPD7R1736 1 2 0R2J-L-GP RT_PERST_N
73 PMC_ALERT_CPU_N DY
1
47KR2F-GP
SCD1U16V2KX-L-GP
DY R1707
2
1MR2F-GP
2
2
RTC_INTRUDER_N SPI_VCC_SEL
1
C1701
1
SCD1U16V2KX-L-GP
R1711 R1712 From EC Control
DY1MR2F-GP 4K7R2J-L-GP
2
DSW_PWROK_R 1 R1723 2 DSW_PWROK
2
0R0402-PAD-1-GP
1
R1724
100KR2J-1-GP
B B
2
Q1701
LSK3541G1ET2L-1-GP
084.03541.M001 Delay 3D3V_S5 over 10ms.
S D PM_RSMRST_N 1 2 RSMRST_N_KBC
R1721 1KR2J-1-GP
1
3D3V_S5
R1725
100KR2J-1-GP
GPD7
G
2
2
R1718
100KR2J-1-GP GPD7 Reserved Rising edge This strap has a 20 kohm ± 30% internal pull-down.
of This strap should sample LOW. There should NOT be any onboard
DSW_PWROK device driving it to opposite direction during strap
1
3D3V_S5 sampling.
3V_5V_POK_C VCCIN_AUX_PWRGD Notes: 1. The internal pull-down is disabled after
1 R1722 2 DSW_PWROK is high.
2. This signal is in the DSW well.
0R0402-PAD-1-GP
G
TEST
A 2 1 3V_5V_POK_N D S A
R1719 Wistron Corporation
10KR2J-3-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Q1702 Taipei Hsien 221, Taiwan, R.O.C.
LSK3541G1ET2L-1-GP
084.03541.M001 Title
CPU (PMU)
B
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
SPI ROM
25 SPI_WP_CPU
25 SPI_HOLD_CPU 5 OF 21
CPU1E
25 SPI_CLK_CPU 20190516_Byron
25 SPI_CS_CPU_N0
91 SPI_CS_CPU_N2 ESPI_CPU_CLK_R 1 R1801 2 ESPI_CPU_CLK
25 SPI_SI_CPU SPI_CLK_CPU DJ37 DK21 CPU_SMB_SCL 49D9R2F-GP
25 SPI_SO_CPU SPI_HOLD_CPU DG35 SPI0_CLK GPP_C0/SMBCLK DM19 CPU_SMB_SDA
SPI0_IO3 strap GPP_C1/SMBDATA
SPI_WP_CPU DJ39 strap DN19 CPU_SMB_ALERT_N ESPI_CPU_IO0_R 1 2 ESPI_CPU_IO0
SPI_SO_CPU DJ33 SPI0_IO2 GPP_C2/SMBALERT# R1802 15R2J-GP
SPI0_MISO strap
SPI_SI_CPU DJ35 strap DK19
WLAN TP1802
1SPIO_CS1_N DF35 SPI0_MOSI
SPI0_CS1#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
DM17 ESPI_CPU_IO1_R 1 2 ESPI_CPU_IO1
SPI_CS_CPU_N0 DG37 DN17 GPP_C5_SML0ALERT_N R1803 15R2J-GP
SPI_CS_CPU_N2 DF39 SPI0_CS0# GPP_C5/SML0ALERT#
SPI0_CS2# DK17 CPU_SMB_SCL_P0 ESPI_CPU_IO2_R 1 2 ESPI_CPU_IO2
GPP_E11 DJ6 GPP_C6/SML1CLK DJ17 CPU_SMB_SDA_P0 R1804 15R2J-GP
DN5 GPP_E11/SPI1_CLK/THC0_SPI1_CLK GPP_C7/SML1DATA CY50 GPP_B23_CLK_FREQ 1
To TBT
DR9 GPP_E2/SPI1_IO3/THC0_SPI1_IO3 GPP_B23/SML1ALERT#/PCHHOT#/GSPI1_CS1# TP1801 ESPI_CPU_IO3_R 1 2 ESPI_CPU_IO3
D
GPP_E1/SPI1_IO2/THC0_SPI1_IO2 strap D
DM6 DN53 ESPI_CPU_CLK_R R1805 15R2J-GP
DK6 GPP_E12/SPI1_MISO_IO1/THC0_SPI1_IO1 GPP_A5/ESPI_CLK DJ53 ESPI_CPU_IO3_R
GPP_E10 DK8 GPP_E13/SPI1_MOSI_IO0/THC0_SPI1_IO0 GPP_A3/ESPI_IO3/SUSACK# DH50 ESPI_CPU_IO2_R ESPI_CPU_CS_N_R 1 2 ESPI_CPU_CS_N
DV11 GPP_E10/SPI1_CS#/THC0_SPI1_CS# GPP_A2/ESPI_IO2/SUSWARN#_SUSPWRDNACK DP50 ESPI_CPU_IO1_R R1806 0R0402-PAD-1-GP
DW9 GPP_E8/SPI1_CS1#/SATA_LED# GPP_A1/ESPI_IO1 DP52 ESPI_CPU_IO0_R
GPP_E6_JTAG_ODT DT8 GPP_E17/THC0_SPI1_INT# GPP_A0/ESPI_IO0 DK52 ESPI_CPU_CS_N_R ESPI_CPU_RST_N_R 1 2 ESPI_CPU_RST_N
GPP_E6/THC0_SPI1_RST# GPP_A4/ESPI_CS# DL50 ESPI_CPU_RST_N_R 2 R1808 1 R1807 0R0402-PAD-1-GP
strap
SSD SDRAM_ID0 DN15
GPP_F11/THC1_SPI2_CLK
GPP_A6/ESPI_RESET# 75KR2J-GP
SDRAM_ID4 DK13
63 SSD_CLK_CPU_N SDRAM_ID3 DM13 GPP_F15/GSXSRESET#/THC1_SPI2_IO3
63 SSD_CLK_CPU_P SDRAM_ID2 DN13 GPP_F14/GSXDIN/THC1_SPI2_IO2
63 SSD_CLKREQ_CPU_N SDRAM_ID1 DJ15 GPP_F13/GSXSLOAD/THC1_SPI2_IO1 3D3V_S5
DK15 GPP_F12/GSXDOUT/THC1_SPI2_IO0
ESPI DN10 GPP_F16/GSXCLK/THC1_SPI2_CS#
GPP_F18/THC1_SPI2_INT# RN1801
AMP_ID DV14 1 4 CPU_SMB_SCL_P0
24,68 ESPI_CPU_IO0 GPP_F17/THC1_SPI2_RST# 2 3 CPU_SMB_SDA_P0
24,68 ESPI_CPU_IO1 DH3 3D3V_S0
24,68 ESPI_CPU_IO2 DH4 CL_CLK SRN1KJ-7-GP
24,68 ESPI_CPU_IO3 DF2 CL_DATA
24,68 ESPI_CPU_CS_N CL_RST# 1 2 SSD_CLKREQ_CPU_N
24,68 ESPI_CPU_RST_N
R1817 10KR1J-GP
24,68 ESPI_CPU_CLK 1 2 CPU_SMB_ALERT_N
TGL-U-1-GP-U1 Q1801
LSK3541G1ET2L-1-GP R1809 4K7R2J-L-GP
OTHER 084.03541.M001
15 GPP_C5_SML0ALERT_N 11 OF 21 SRTC_RST_N D S
CPU1K
61 SUS_CLK
3D3V_S0
24 RTCRST_ON BW1 DU14
15 GPP_E6_JTAG_ODT BW2 CLKOUT_PCIE_P6 GPP_F19/SRCCLKREQ6# DF23 RN1802
G
CLKOUT_PCIE_N6 GPP_H11/SRCCLKREQ5# DG25 1 4 CPU_SMB_SCL
CB2 GPP_H10/SRCCLKREQ4# DT24 2 3 CPU_SMB_SDA
73 CPU_SMB_SCL_P0 CB1 CLKOUT_PCIE_P5 GPP_D8/SRCCLKREQ3# DT30 RTCRST_ON
73 CPU_SMB_SDA_P0 CLKOUT_PCIE_N5 GPP_D7/SRCCLKREQ2# DV30 GPP_D6 R1836 1 2 0R2J-L-GP SRN1KJ-7-GP
15 GPP_E10 GPP_D6/SRCCLKREQ1# DW30 GPP_D5 R1835 1 DY 2 0R0402-PAD-1-GP SSD_CLKREQ_CPU_N
G
15 GPP_E11
1
BW4 GPP_D5/SRCCLKREQ0#
BW5 CLKOUT_PCIE_P4 DM1 XTL_38D4M_X2_CPU R1818 1 2 33R1J-GP XTL_38D4M_X2_CPU_R
CLKOUT_PCIE_N4 XTAL_OUT DL1 XTL_38D4M_X1_CPU R1819 1 2 33R1J-GP XTL_38D4M_X1_CPU_R R1811
XTAL_IN
100KR2J-1-GP
CL7
CL8 CLKOUT_PCIE_P3 DW41 SUS_CLK S D RTC_RST_N
C C
2
CLKOUT_PCIE_N3 GPD8/SUSCLK
CB4 DT47 XTL_32K_X2_CPU R1820 1 2 0R0201-PAD-GP XTL_32K_X2_CPU_R
CB5 CLKOUT_PCIE_P2 RTCX2 DR47 XTL_32K_X1_CPU R1821 1 2 0R0201-PAD-GP XTL_32K_X1_CPU_R Q1802
CLKOUT_PCIE_N2 RTCX1 LSK3541G1ET2L-1-GP
BY4 DN37 RTC_RST_N
BY3 CLKOUT_PCIE_P1 RTCRST# DK37 SRTC_RST_N 084.03541.M001
CLKOUT_PCIE_N1 SRTCRST#
SSD_CLK_CPU_P CN7
SSD_CLK_CPU_N CN8 CLKOUT_PCIE_P0
CLKOUT_PCIE_N0
2 R1812 1 XCLK_BIASREF DJ5
XCLK_BIASREF
60D4R2F-GP TGL-U-1-GP-U1
C1801
XTL_38D4M_X1_CPU_R 1 2
XTL_32K_X1_CPU_R
XTL_32K_X2_CPU_R
SC12P50V2JN-3GP
3
C1803(Cd)
1
C1802(Cg) 1 2 X1801
3D3V_S5 R1813 10MR2J-L-GP R1814 XTAL-38D4MHZ-32-GP C1801(Cg) C1804(Cd)
EPSON
082.30003.0191 15pF 15pF 200KR2F-L-3-GP
HARMONY
X1802 082.30040.0091 15pF 15pF
3D3V_RTC_AUX 3D3V_RTC_AUX 1 2
082.30040.0211
2
1
SEIKO
082.30003.0301 15pF 15pF HOSONIC
AMP XTAL-32D768KHZ-88-GP 082.30040.0101 12pF 12pF
1
R1833 082.30003.0191
1
NDK
R1815 10KR2J-3-GP 082.30003.0221 15pF 12pF C1802 C1803
R1816 XTL_38D4M_X2_CPU_R HOSONIC
20KR2J-L3-GP SC15P50V2JN-L-GP SC15P50V2JN-L-GP 1 2
082.30040.0161 12pF 12pF
2
20KR2J-L3-GP
C1804
2
AMP_ID SC12P50V2JN-3GP
2
SRTC_RST_N RTC_RST_N
1
C1805 C1806 NON-AMP

SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP R1834
2
10KR2J-3-GP
2
B B
GPP_B23
GPP_B23 / CPUNSSC Rising edge of This strap has a 20 kohm ± 30% internal pull-down.
Memory Configuration Memory Supplier SML1ALERT# / Clock RSMRST# 0 = 38.4 MHz clock (direct from crystal) (default)
PCHHOT# / Frequency 1 = 19.2 MHz clock (derived from 38.4 MHz crystal)
10: 16Gb 00: Samsung GSPI1_CS1# Notes: 1. The internal pull-down is disabled after RSMRST#
de-asserts.
11: 32Gb 01: Micron 2. When used as PCHHOT# and strap low, a 150K
10: SK Hynix pull-up is needed to ensure it does not override
the internal pull-down strap sampling.
11: (Reserve) 3. This signal is in the primary well.
1D8V_S5 GPP_F15 GPP_F14 GPP_F13 GPP_F12 GPP_F11 SPI0_MOSI

MEM_ID4 MEM_ID3 MEM_ID2 MEM_ID1 MEM_ID0
Vendor PN Wisrton PN Vendor Density SPI0_MOSI Reserved Rising edge of External pull-up is required. Recommend 4.7 kohm pull up.
RSMRST# This strap should sample HIGH. There should NOT be any onboard
device driving it to opposite direction during strap
1 0 0 1 0 MT53E512M32D2NP-046 WT:F SM30E51328 Micron 16GB sampling.
1 0 1 0 0 H9HCNNNBKMMLXR-NEE SM30N76602 SK Hynix 16GB
1
Follow #607872 SchChk Rev1p1

MEM_ID0_1 MEM_ID1_1 MEM_ID2_1 MEM_ID3_1 MEM_ID4_1 1 0 0 0 0 K4U6E3S4AA-MGCR SM30N76677 Samsung 16GB
PU 100K
R1823 R1825 R1827 R1829 R1831
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 1 1 0 1 0 MT53E1G32D2NP-046 WT:A SM30N76681 Micron 32GB SPI0_IO2
2
SDRAM_ID0
1 1 1 0 0 H9HCNNNCPMMLXR-NEE SM30N76603 SK Hynix 32GB
SPI0_IO2 Reserved Rising edge of External pull-up is required. Recommend 100K if pulled up to
SDRAM_ID1 RSMRST# 3.3V or 75K if pulled up to 1.8V.
SDRAM_ID2
1 1 0 0 0 K4UBE3D4AA-MGCR SM30N76678 Samsung 32GB This strap should sample HIGH. There should NOT be any onboard
SDRAM_ID3 device driving it to opposite direction during strap
SDRAM_ID4 sampling.
0=L ,1=H
1
MEM_ID0_0 MEM_ID1_0 MEM_ID2_0 MEM_ID3_0 MEM_ID4_0 SPI0_IO3

R1824 R1826 R1828 R1830 R1832
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP SPI0_IO2 Reserved Rising edge of External pull-up is required. Recommend 100K if pulled up to
A RSMRST# 3.3V or 75K if pulled up to 1.8V. A
2
This strap should sample HIGH. There should NOT be any onboard
device driving it to opposite direction during strap
sampling.
TEST
GPP_C2
GPP_C2 /
SMBALERT#
TLS
Confidentiality
Rising edge of
RSMRST#
0=>Disable IntelR CSME Crypto Transport Layer Security (TLS)
Wistron Corporation
cipher suite (no confidentiality). (Default) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1=>Enable IntelR CSME Crypto Transport Layer Security (TLS) Taipei Hsien 221, Taiwan, R.O.C.
cipher suite (with confidentiality). Must be pulled up to support
IntelR AMT with TLS. Title
de-asserts.
CPU (SPI/LPC/SMBS/XTAL/CLK)
2. This signal is in the primary well. Size Document Number Rev
A2
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
27 HDA_SYNC_CODEC
27 HDA_BITCLK_CODEC
27 HDA_SDOUT_CODEC
27 HDA_SDIN0_CPU
15 HDA_SDOUT_CPU
61 CNV_CLKREQ
61 CNV_RF_RST_N
D D
91 PIRQA_N
66 DMIC_SCL0_CPU
66 DMIC_SDA0_CPU
61 BLUETOOTH_EN
71,73 RT_FORCE_PW R 7 OF 21 CPU1G

20190510_Byron
HDA_BITCLK_CODEC 1 R1901 210R2J-2-GP HDA_BITCLK_CPUDR38 DW15

HDA_SYNC_CODEC 1 R1902 210R2J-2-GP HDA_SYNC_CPU DU37 GPP_R0/HDA_BCLK/I2S0_SCLK GPP_F8_I2S_MCLK2_INOUT DW24
HDA_SDOUT_CODEC 1 R1903 210R2J-2-GP HDA_SDOUT_CPU DT37 GPP_R1/HDA_SYNC/I2S0_SFRM GPP_D19/I2S_MCLK1
HDA_SDIN0_CPU DV37 GPP_R2/HDA_SDO/I2S0_TXD DG41 RT_FORCE_PW R
GPP_R3/HDA_SDI0/I2S0_RXD strap GPP_A23/I2S1_SCLK DT38
DV41 GPP_R7/I2S1_SFRM DV38
PIRQA_N DL53 GPP_R4/HDA_RST# GPP_R6/I2S1_TXD DW38
CNV_RF_RST_N DG51 GPP_A7/I2S2_SCLK/DMIC_CLK_A0 GPP_R5/HDA_SDI1/I2S1_RXD
DG50 GPP_A8/I2S2_SFRM/CNV_RF_RESET#/DMIC_DATA_0 DN31 DMIC_SCL0 R1905 2 1 33R2J-2-GP DMIC_SCL0_CPU
C GPP_A10/I2S2_RXD/DMIC_DATA1 GPP_S6/SNDW3_CLK/DMIC_CLK_A0 DM31 DMIC_DATA0 R1906 2 1 33R2J-2-GP DMIC_SDA0_CPU C
CNV_CLKREQ DL49 GPP_S7/SNDW3_DATA/DMIC_DATA0
DL52 GPP_A9/I2S2_TXD/MODEM_CLKREQ/CRF_XTAL_CLKREQ/DMIC_CLK_A1 DK33
GPP_A11/PMC_I2C_SDA/I2S3_SCLK GPP_S4/SNDW2_CLK/DMIC_CLK_A1 DK31
BLUETOOTH_EN DH49 GPP_S5/SNDW2_DATA/DMIC_DATA1
SC33P50V2JN-3GP
SC33P50V2JN-3GP
GPP_A13/PMC_I2C_SCL/I2S3_TXD/DMIC_CLK_B0 DW35
GPP_S2/SNDW1_CLK/DMIC_CLK_B0 DY DY
1
2 1 SNDW _RCOMP DF33 DV35
R1904 200R2F-L1-GP SNDW_RCOMP GPP_S3/SNDW1_DATA/DMIC_CLK_B1 C1902 C1901
DT32
2
GPP_S0/SNDW0_CLK DR35
GPP_S1/SNDW0_DATA
TGL-U-1-GP-U1
HDA_BITCLK_CODEC
DY
1
EC1901
SCD1U16V1KX-GP
2
B B
A TEST A
Wistron Corporation
Title
CPU (HAD/I2S/SD/DMIC)
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
CPU1F 6 OF 21
MODERN_STANDBY DC53 DR27

TP2001 1CPU_GPP_B18 DA51 GPP_B16/GSPI0_CLK GPP_D14/ISH_UART0_TXD DW27
TPAD14-OP-GP DC49 GPP_B18/GSPI0_MOSI strap GPP_D13/ISH_UART0_RXD DV25
68 CPU_UART2_TXD HDA_SPKR DC50 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# DT25
GPP_B14/SPKR/TIME_SYNC1/GSPI0_CS1# strap GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/IMGCLKOUT5
W IFI_RF_EN DC52
68 CPU_UART2_RXD TOP_SW AP 1 2 GPP_B15/GSPI0_CS0# DB45
R2011 0R0402-PAD-1-GP CY49 GPP_B6/ISH_I2C0_SCL DB44
24 TOP_SW AP GPP_B20/GSPI1_CLK GPP_B5/ISH_I2C0_SDA
D CY53 D
TPAD_INT_N CY52 GPP_B22/GSPI1_MOSI CY39
RTC_DET_N DA50 GPP_B21/GSPI1_MISO GPP_B8/ISH_I2C1_SCL DB47
GPP_B19/GSPI1_CS0# GPP_B7/ISH_I2C1_SDA
27 HDA_SPKR DV21 DD47
DT21 GPP_C9/UART0_TXD GPP_B10/I2C5_SCL/ISH_I2C2_SCL DD44
25 RTC_DET_N DR21 GPP_C8/UART0_RXD GPP_B9/I2C5_SDA/ISH_I2C2_SDA
DW21 GPP_C11/UART0_CTS# DJ8
GPP_C10/UART0_RTS# GPP_E16/ISH_GP7 DR7
DV19 GPP_E15/ISH_GP6 DR24
TOUCH_STOP_N DT19 GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_D18/ISH_GP5 DU25
DR18 GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_D17/ISH_GP4 DV31
DU19 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_D3/ISH_GP3/BK3/SBK3 DU31
DEBUG GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_D2/ISH_GP2/BK2/SBK2 DT27
3D3V_S0 RN2001 CPU_UART2_TXD DJ21 GPP_D1/ISH_GP1/BK1/SBK1 DV27
SRN47K-2-GP-U CPU_UART2_RXD DG23 GPP_C21/UART2_TXD GPP_D0/ISH_GP0/BK0/SBK0
1 4 CPU_UART2_CTS_N DJ19 GPP_C20/UART2_RXD DR51 GPP_RCOMP 1 2
2 3 CPU_UART2_RTS_N DF21 GPP_C23/UART2_CTS# GPP_RCOMP R2003 200R2F-L1-GP
24 MODERN_STANDBY GPP_C22/UART2_RTS# DN33
CPU_I2C_SCL_P0 DV18 GPP_T3/I2C7_SCL DT35
61 W IFI_RF_EN CPU_I2C_SDA_P0 DW18 GPP_C17/I2C0_SCL GPP_T2/I2C7_SDA
For Touch PAD GPP_C16/I2C0_SDA DG17
DJ23 GPP_U5/GSPI3_CLK DG19
DT18 GPP_C19/I2C1_SCL GPP_U4/GSPI3_CS0#
GPP_C18/I2C1_SDA
CPU_I2C_SCL_PD DJ29
24,67 LID_CLOSE_N CPU_I2C_SDA_PD DJ31 GPP_H5/I2C2_SCL
GPP_H4/I2C2_SDA
DF29
C DG29 GPP_H7/I2C3_SCL C
65 CPU_I2C_SCL_P0 GPP_H6/I2C3_SDA
DF25
65 CPU_I2C_SDA_P0 GPP_H9/I2C4_SCL/CNV_MFUART2_TXD
DF27
GPP_H8/I2C4_SDA/CNV_MFUART2_RXD
TGL-U-1-GP-U1
65 TPAD_INT_N
55 TOUCH_STOP_N
GPP_B14
GPP_B14 / SPKR / Top Swap Rising edge of The strap has a 20 kohm ± 30% internal pull-down.
TIME_SYNC1 / Override PCH_PWROK 0=>Disable “Top Swap” mode. (Default)
B GSPI0_CS1# 1=>Enable “Top Swap” mode. This inverts an address on access B
to SPI and firmware hub, so the processor believes it fetches the 3D3V_S0
alternate boot block instead of the original boot-block. PCH will
invert A16 (default) for cycles going to the upper two 64-KB
blocks in the FWH or the appropriate address lines (A[23:16]) as
selected in Top Swap Block size soft strap. (Refer SPI Flash
Programming Guide).
Notes: 1. The internal pull-down is disabled after
PCH_PWROK is high. RN2003
2. Software will not be able to clear the Top Swap bit 2 3 CPU_I2C_SDA_P0
until the system is rebooted. CPU_I2C_SCL_P0
3. The status of this strap is readable using the Top 1 4
Swap bit (Bus0, Device31, Function0, offset DCh,
bit4). SRN1KJ-7-GP
RN2025
GPP_B18 2 3 CPU_I2C_SCL_PD
1 4 CPU_I2C_SDA_PD
GPP_B18 / No Reboot Rising edge of The strap has a 20 kohm ± 30% internal pull-down.
GSPI0_MOSI PCH_PWROK 0=>Disable “No Reboot” mode. (Default) SRN2K2J-1-GP
1=>Enable “No Reboot” mode (PCH will disable the TCO
Timer
system reboot feature). This function is useful when
running ITP/
XDP.
Notes: 1. The internal pull-down is disabled after
PCH_PWROK is high.
A TEST A
Wistron Corporation
Title
CPU (UART/I2C/ISH)
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
61 CNV_WR_DN0
CPU1J 10 OF 21
61 CNV_WR_DP0
61 CNV_WR_DN1 CNV_WT_DP1
D22 DK47
B22 CSI_F_DP1 CNVI_WT_D1P DM47 CNV_WT_DN1
61 CNV_WR_DP1 E22 CSI_F_DN1 CNVI_WT_D1N DN49 CNV_WT_DP0
D D20 CSI_F_DP0 CNVI_WT_D0P DR49 CNV_WT_DN0 D
61 CNV_WR_CLKN A20 CSI_F_DN0 CNVI_WT_D0N DN45 CNV_WT_CLKP
B20 CSI_F_CLK_P CNVI_WT_CLKP DN47 CNV_WT_CLKN
61 CNV_WR_CLKP CSI_F_CLK_N CNVI_WT_CLKN
B18 DU43 CNV_WR_DP1
61 CNV_WT_DN0 A18 CSI_E_DP1/CSI_F_DP2 CNVI_WR_D1P DV43 CNV_WR_DN1
D18 CSI_E_DN1/CSI_F_DN2 CNVI_WR_D1N DR44 CNV_WR_DP0
61 CNV_WT_DP0 E18 CSI_E_DP0/CSI_F_DP3 CNVI_WR_D0P DT43 CNV_WR_DN0
C16 CSI_E_DN0/CSI_F_DN3 CNVI_WR_D0N DV44 CNV_WR_CLKP
61 CNV_WT_DN1 D16 CSI_E_CLK_P CNVI_WR_CLKP DW44 CNV_WR_CLKN
CSI_E_CLK_N CNVI_WR_CLKN
61 CNV_WT_DP1 D15 DN51 CNV_WT_RCOMP 1 2
E15 CSI_C_DP2 CNVI_WT_RCOMP R2101 150R2F-1-GP
61 CNV_WT_CLKN A15 CSI_C_DN2 DJ13 CNV_RGI_RSP
B15 CSI_C_DP3 GPP_F3/CNV_RGI_RSP/UART0_CTS# DG13 CNV_RGI_DT
61 CNV_WT_CLKP CSI_C_DN3 strap GPP_F2/CNV_RGI_DT/UART0_TXD DF15 CNV_BRI_RSP
L18 GPP_F1/CNV_BRI_RSP/UART0_RXD DF17 CNV_BRI_DT
61 CNV_BRI_RSP N18 CSI_C_DP1 GPP_F0/CNV_BRI_DT/UART0_RTS#
CSI_C_DN1 strap
L20 DJ10
61 CNV_RGI_RSP N20 CSI_C_DP0 GPP_F5/MODEM_CLKREQ/CRF_XTAL_CLKREQ DV15
C G20 CSI_C_DN0 GPP_F6/CNV_PA_BLANKING DK10 C
H20 CSI_C_CLK_P GPP_F4/CNV_RF_RESET#
CSI_C_CLK_N
15,61 CNV_RGI_DT H16
G16 CSI_B_DP1
61 CNV_BRI_DT G18 CSI_B_DN1
H18 CSI_B_DP0
L16 CSI_B_DN0
N16 CSI_B_CLK_P
CSI_B_CLK_N
G14
H14 CSI_B_DP2
L14 CSI_B_DN2
N14 CSI_B_DP3
CSI_B_DN3
2 1 CSI_RCOMP K14
R2102 CSI_RCOMP
150R2F-1-GP DK25
DM25 GPP_H23/IMGCLKOUT4
DN25 GPP_H22/IMGCLKOUT3
DJ25 GPP_H21/IMGCLKOUT2
B B
DR30 GPP_H20/IMGCLKOUT1
GPP_D4/IMGCLKOUT_0/BK4/SBK4
TGL-U-1-GP-U1
GPP_F0
GPP_F0 / XTAL Rising edge of This strap has a 20 kohm ± 30% internal pull-down.
CNV_BRI_DT / Frequency RSMRST# This strap should not be pulled high since 24 MHz crystal is not
UART0_RTS# Selection supported on the PCH.
0 = 38.4 MHz (default)
1 = 24 MHz
de-asserts.
TEST
A
Title
CPU (CSI/EMMC/CNVi)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
CPU1N 14 OF 21
50 VCCAUX_SENSE 1D8V_VCCIN_AUX
(1.3A)
50 VSSAUX_SENSE (27A) 1D8V_S5_VCCPRIM 1D8V_S5 Trace width > 40mil
AB12 CY18
40,50 VCCIN_AUX_VID0 VCCIN_AUX VCCPRIM_1P8 1D05V_S5_VCCDSW _OUT
AC10 CY20
AE10 VCCIN_AUX VCCPRIM_1P8 CY24 1 R2201 2 #607872 Rev1p1
40,50 VCCIN_AUX_VID1 VCCIN_AUX VCCPRIM_1P8 PDG VCCPRIM_1P8
AK2 CY26 0402 Placeholder 1PCS
AR10 VCCIN_AUX VCCPRIM_1P8 DA18 0R0805-PAD-1-GP-U
VCCIN_AUX VCCPRIM_1P8
1
AT12 DA20
AU10 VCCIN_AUX VCCPRIM_1P8 DA22 C2201
AW10 VCCIN_AUX VCCPRIM_1P8 DA24 SC1U6D3V1MX-GP
2
BV1 VCCIN_AUX VCCPRIM_1P8 DA26
D D
BV39 VCCIN_AUX VCCPRIM_1P8 DC18
BW40 VCCIN_AUX VCCPRIM_1P8 DC20
BY39 VCCIN_AUX VCCPRIM_1P8 DC22 #607872 Rev1p1
CC1 VCCIN_AUX VCCPRIM_1P8 DC24 PDG VCCPRIM_3P3
VCCIN_AUX VCCPRIM_1P8 0402 Placeholder 1PCS
CD12 DC26 0402 Placeholder 1PCS
CF10 VCCIN_AUX VCCPRIM_1P8 DD20
VCCIN_AUX VCCPRIM_1P8
(202mA)
CG12 DD22 3D3V_S5_VCCPRIM 3D3V_S5
CH10 VCCIN_AUX VCCPRIM_1P8 DV22 Place cap within
CJ1 VCCIN_AUX VCCPRIM_1P8 #607872 Rev1p1 3mm from SOC edge.
CJ12 VCCIN_AUX DA35 1 R2202 2 PDG VCCRTCEXT (Pin DV34)
VCCIN_AUX VCCPRIM_3P3 0402 0.1UF 1PCS
CK10 DC28 0R0402-PAD-1-GP 1D24V_S5_VCCDPHY_OUT
CL12 VCCIN_AUX VCCPRIM_3P3 DC30
VCCIN_AUX VCCPRIM_3P3 For CNVi
CM10 DD30
CP1 VCCIN_AUX VCCPRIM_3P3
VCCIN_AUX
1
CP10 DV34 3D3V_RTC_EXT C2202
CR12 VCCIN_AUX DCPRTC SC4D7U6D3V2MX-GP-U
CT10 VCCIN_AUX DV46 #607872 Rev1p1
0D85V_S5_VCCLDOSTD_OUT
2
CU12 VCCIN_AUX VCCLDOSTD_0P85 PDG VCCLDOSTD_0P85
VCCIN_AUX 0402 2.2UF 1PCS
CY1 DV16 1D8V_S5_CLKLDO (165mA)
Analog supply for internal clocks
AK1 VCCIN_AUX VCCA_CLKLDO_1P8 DC15
PH/PL 100R at VR side. VCCIN_AUX VCCA_CLKLDO_1P8 #607872 Rev1p1
VSSAUX_SENSE AV9 DV28 PDG VCCDPHY_1P24
VCCIN_AUX_VSSSENSE VCCDPHY_1P24 1D24V_S5_VCCDPHY_OUT 0402 4.7UF 1PCS
VCCAUX_SENSE AT9
VCCIN_AUX_VCCSENSE DD38 Place cap within
VCCDSW_1P05 1D05V_S5_VCCDSW _OUT
TP2203 1 VCC_VNNEXT_1P05 DD17
VCC_VNNEXT_1P05
#607872 Rev1p1
PDG VCCDSW_1P05
3mm from SOC edge
TPAD14-OP-GP DD18 BR3 1D05V_S5_OUT (0.8A) Supply to 0402 1UF 1PCS
VCC_VNNEXT_1P05 VCC1P05 BR4
VCC1P05 VCCST & VCCSTG
TP2202 1 VCC_V1P05EXT_1P05 DA15 BT5 VCC1P05_OUT_FET 0D85V_S5_VCCLDOSTD_OUT
C 3D3V_S5 TPAD14-OP-GP DA17 VCC_V1P05EXT_1P05 VCC1P05 C
VCC_V1P05EXT_1P05 DA31 for CNVi and other internal I/O blocks.
VCCPRIM1P05_OUT_PCH 1D05V_S5_VCCPRIM_OUT
1
R2206 1 2 VRALERT_N DB39 DC33 C2203
10KR1J-GP DV12 GPP_B2/VRALERT# VCCPRIM1P05_OUT_PCH DC31
GPP_F22/VNN_CTRL VCCPRIM1P05_OUT_PCH SC2D2U6D3V2MX-GP
DT12 #607872 Rev1p1
2
GPP_F23/V1P05_CTRL DC35 (5mA) PDG VCCRTC
VCCRTC 3D3V_RTC_AUX 0402 0.1UF 1PCS
VCCIN_AUX_VID0 DB37 DD37 3D3V_S5
(3mA) 0402 1UF 1PCS
VCCIN_AUX_VID1 DB38 GPP_B0/CORE_VID0 VCCGPPR VCCDSW_3P3 DA28
GPP_B1/CORE_VID1 VCCPGPPR 3D3V_GPPR_S5 (17.5mA)
3.3V or 1.8V 1 2 1D8V_S5
CY31 3D3V_S5_VCCPRIM R2204 0R0402-PAD-1-GP #607872 Rev1p1
VCCPRIM_3P3 CY33 VCCPGPPR is for PDG VCCDSW_3P3
VCCPRIM_3P3 Audio Power. 0402 Placeholder 1PCS
CV39 1D8V_S5_VCCPRIM Must take care
VCCPRIM_1P8
AP12 TP_VCCANA_EHV 1
this power layout
RSVD#AP12 TP2201 and add shield GND.
TGL-U-1-GP-U1 (165mA)
1D8V_S5 1D8V_S5_CLKLDO
1 R2205 2
0R0402-PAD-1-GP
PH Same as SPI Programming Guide for details
1
3D3V_S5
C2204 C2205
SC22U6D3V3MX-L1-GP
SC22U6D3V3MX-L1-GP
(1.3A)
2
RN2201
1 4 VCCIN_AUX_VID0 1D8V_S5_VCCPRIM 3D3V_S5_VCCPRIM 3D3V_RTC_AUX 3D3V_RTC_EXT 1D05V_S5_VCCPRIM_OUT
B 2 3 VCCIN_AUX_VID1 B
SRN10KJ-5-GP DY
1
1
CORE_VID0/1 can PU to
VCCPRIM_1P8 or 3P3.
DY DY DY C2212 C2213
C2206 C2207 C2208 C2209 C2210 C2211 SCD1U16V2KX-L-GP SC1U10V2KX-L1-GP
2
2
SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP SCD1U16V2KX-L-GP SCD1U16V2KX-L-GP #607872 Rev1p1
PDG VCCA_CLKLDO_1P8
680nF
0603 0OHM 1PCS
0603 47UF 1PCS
1D05V_S5_OUT 3D3V_S5 3D3V_GPPR_S5
DY DY
1
C2216 C2217 1 C2218

SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SCD1U16V2KX-L-GP
2
Close to pin DD37
A TEST A
Wistron Corporation
Title
CPU (PCH-LP PWR&Caps)
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
CPU1P 16 OF 21
18 OF 21 CPU1R CPU1Q 17 OF 21
D A27 B19 D
A32 VSS VSS B2 K34 DP53 BY44 CY44
A45 VSS VSS B23 K48 VSS VSS DR11 BY45 VSS VSS CY45
A49 VSS VSS B27 K5 VSS VSS DR16 BY47 VSS VSS CY47
AA41 VSS VSS B32 L22 VSS VSS DR22 BY49 VSS VSS CY5
AA48 VSS VSS B36 L28 VSS VSS DR28 BY9 VSS VSS D27
AB5 VSS VSS B39 L34 VSS VSS DR34 C13 VSS VSS D32
AC44 VSS VSS B52 L42 VSS VSS DT4 CA48 VSS VSS D49
AC49 VSS VSS B8 L44 VSS VSS DT50 CB41 VSS VSS D5
AD4 VSS VSS BA48 L45 VSS VSS DU11 CC10 VSS VSS DA30
AD48 VSS VSS BA53 L47 VSS VSS DU16 CC3 VSS VSS DA33
AD8 VSS VSS BB4 L49 VSS VSS DU22 CC5 VSS VSS DA53
AF4 VSS VSS BB8 M1 VSS VSS DU28 CD44 VSS VSS DC17
AF8 VSS VSS BC1 M2 VSS VSS DU34 CD48 VSS VSS DD15
AG41 VSS VSS BC2 M50 VSS VSS DU40 CD7 VSS VSS DD24
AG42 VSS VSS BD12 N22 VSS VSS DU46 CE49 VSS VSS DD26
AG44 VSS VSS BD4 N28 VSS VSS DV1 CG48 VSS VSS DD28
AG48 VSS VSS BF39 N41 VSS VSS DW51 CG9 VSS VSS DD35
AG53 VSS VSS BF4 N48 VSS VSS E13 CH41 VSS VSS DD39
AH4 VSS VSS BF41 P11 VSS VSS E19 CH42 VSS VSS DD45
C VSS VSS VSS VSS VSS VSS C
AH8 BF42 P14 E35 CH44 DD51
AK12 VSS VSS BF44 P16 VSS VSS E48 CH45 VSS VSS DD52
AK4 VSS VSS BF45 P18 VSS VSS G22 CH47 VSS VSS DE3
AK48 VSS VSS BF47 P20 VSS VSS G28 CJ3 VSS VSS DE5
AK5 VSS VSS BF5 P22 VSS VSS G34 CJ5 VSS VSS DF19
AK7 VSS VSS BF7 P33 VSS VSS G39 CJ9 VSS VSS DF37
AK8 VSS VSS BF8 P35 VSS VSS G48 CK39 VSS VSS DG15
AM1 VSS VSS BG48 P4 VSS VSS G51 CK48 VSS VSS DG21
AM2 VSS VSS BG53 P49 VSS VSS G52 CK53 VSS VSS DG27
AM4 VSS VSS BH1 P8 VSS VSS H12 CL9 VSS VSS DG33
AM8 VSS VSS BH2 R39 VSS VSS H22 CN12 VSS VSS DG39
AN41 VSS VSS BH4 R44 VSS VSS H28 CN48 VSS VSS DG45
AN42 VSS VSS BH8 T19 VSS VSS H34 CN51 VSS VSS DG5
AN44 VSS VSS BK12 T29 VSS VSS H8 CN52 VSS VSS DG53
AN45 VSS VSS BK4 T33 VSS VSS J39 CN9 VSS VSS DG6
AN47 VSS VSS BK48 T4 VSS VSS J49 CP3 VSS VSS DJ1
AN48 VSS VSS BK8 T48 VSS VSS K16 CP41 VSS VSS DJ2
AN53 VSS VSS BL49 T8 VSS VSS K18 CP42 VSS VSS DJ4
AP4 VSS VSS BM1 U19 VSS VSS K20 CP44 VSS VSS DK51
AP8 VSS VSS BM4 U25 VSS VSS K22 CP45 VSS VSS DL3
AT4 VSS VSS BM41 U39 VSS VSS K28 CP5 VSS VSS DL5
AT48 VSS VSS BM42 U49 VSS VSS CR48 VSS VSS DM10
AT51 VSS VSS BM44 V19 VSS CR53 VSS VSS DM15
AT8 VSS VSS BM45 V4 VSS CR9 VSS VSS DM21
B B
AV12 VSS VSS BM47 V8 VSS CT5 VSS VSS DM27
AV39 VSS VSS BM8 W1 VSS CU4 VSS VSS DM33
AV4 VSS VSS BN48 W16 VSS CU9 VSS VSS DM39
AV5 VSS VSS BP41 W26 VSS CV10 VSS VSS DM4
AV7 VSS VSS BP49 W30 VSS CV48 VSS VSS DM45
AV8 VSS VSS BP5 W39 VSS CV5 VSS VSS DN1
AW1 VSS VSS BP50 W41 VSS CV51 VSS VSS DN2
AW2 VSS VSS BP7 W42 VSS CV52 VSS VSS
AW48 VSS VSS BT44 W44 VSS CY17 VSS
AY4 VSS VSS BT48 W45 VSS CY22 VSS
AY41 VSS VSS BU49 W47 VSS CY35 VSS
AY42 VSS VSS BV3 W48 VSS CY41 VSS
AY44 VSS VSS BV48 Y4 VSS CY42 VSS
AY45 VSS VSS BV5 Y49 VSS VSS
AY47 VSS VSS BW10 Y50 VSS
AY8 VSS VSS BY41 Y8 VSS TGL-U-1-GP-U1
AY9 VSS VSS BY42 VSS
B13 VSS VSS
VSS TGL-U-1-GP-U1
TGL-U-1-GP-U1
TEST
A A
Wistron Corporation
Title
CPU (VSS)
B
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
SSID = KBC
1D8V_S5
3D3V_AUX_KBC
3D3V_AUX_KBC
Model_ID_BOM Ctrl
KBC PWR supply at PSL mode.
1
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
1
C2402 C2401
1 R2402 2 VBAT 3D3V_RTC_AUX 3D3V_AUX_S5 R2403 13" 100.0K 10.0K 64.10025.L0L 3.0V
SCD1U16V2KX-3GP
2
2
SC2D2U10V3KX-L-GP
0R0402-PAD-1-GP 10KR2F-L1-GP
BOM Ctrl_Model 14" 100.0K 20.0K 64.20025.L0L 2.75V
2
R2404 C2403 C2404 SKU_ID NA 100.0K 33.0K 64.33025.L0L 2.48V
0R0402-PAD-1-GP SC1U10V2KX-L1-GP
SCD1U16V2KX-3GP
2
1
NA 100.0K 47.0K 64.47025.6DL 2.24V
R2405
1
100KR2F-L3-GP NA 100.0K 64.9K 64.64925.6DL 2.0V
1
EC_AGND NA 100.0K 76.8K 64.76825.6DL 1.87V
2
3D3V_AUX_KBC_VCC R2406 R2407
0R402-DB-GP-U
0R402-DB-GP-U
NA 100.0K 215.0K 64.21535.6DL 1.048V
2
DY
1
C2405 C2406 C2407 C2408 C2409 C2410
KBC_VBKUP
KBC_VSBY
SC1U10V2KX-L1-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
2
D D
3D3V_AUX_KBC PCB VERSION
1
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
D5
H4
D8
R2408
K9
E7
K5
F9
F4
J4
U2401A 1 OF 2 64K9R2F-1-GP SA 100.0K 10.0K 3.0V
BOM Ctrl_Model
VCC
VCC
VCC
VCC
VCCSPI
AVCC
VDD/VESPI
VBKUP
VSBY
SB 100.0K 20.0K 2.75V
2
C2411 1 2 SCD1U16V2KX-3GP C2412 1 2 SC220P50V2KX-3GP
DY DY PCB_ID SC 100.0K 33.0K 2.48V
N6 ESPI_ALERT_N
D2 GPIO24/ESPI_ALERT M6 PLTRST_EC_N ESPI_ALERT_N 68 R2409 1 2 0R0201-PAD-GP
44 PWR_CHG_IMON GPIO90/AD0 LRESET#/GPIOF7/PLTRST# PLTRST_CPU_N 17,63,91 SD 100.0K 47.0K 2.24V
1
EC_AGND PCB_ID D1 N5 ESPI_CPU_CLK
E4 GPIO91/AD1 LCLK/GPIOF5/ESPI_CLK M5 ESPI_CPU_CS_N ESPI_CPU_CLK 18,68
R2410 -1 100.0K 64.9K 2.0V
36 AOU_IFLG_N SKU_ID E2 GPIO92/AD2 LFRAME/GPIOF6/ESPI_CS M4 ESPI_CPU_IO3 ESPI_CPU_CS_N 18,68
GPIO93/AD3 LAD3/GPIOF4/ESPI_IO3 ESPI_CPU_IO3 18,68 LPC interface 100KR2F-L3-GP
G2 N4 ESPI_CPU_IO2 -1M 100.0K 76.8K 1.87V
65 TPAD_EN D4 GPIO05/AD4 LAD2/GPIOF3/ESPI_IO2 M3 ESPI_CPU_IO1 ESPI_CPU_IO2 18,68 support modern standby PLTRST_EC_N
2
73 EC_I2C_INT_PD_N C1 GPIO04/AD5 LAD1/GPIOF2/ESPI_IO1 N3 ESPI_CPU_IO0 ESPI_CPU_IO1 18,68
26 FAN_ID1 GPIO03/EXT_PURST#/AD6 LAD0/GPIOF1/ESPI_IO0 ESPI_CPU_IO0 18,68 Reserved 100.0K 100.0K 1.65V
M2 ESPI_CPU_RST_N
SERIRQ/GPIOF0/ESPI_RST ESPI_CPU_RST_N 18,68
K6
GPIO11/CLKRUN#/ESPI_CS2
1
E1 J6 KBC_J6_STRAP
64 CHARGE_LED F1 GPIO94/DA0 GPIO65/SMI/LPC_ESPI_STRAP0 N13 ED2401
17,40 PM_SLP_SUS_N G5 GPIO95/DA1 ECSCI#/GPIO54 N2 FP_DELINK 66
AZ5725-01FDR7G-1-GP
20 TOP_SWAP G4 GPIO96/DA2 GPIO10/LPCPD# L2
17,40 ALL_SYS_PWRGD GPIO97/DA3 GPIO85/GA20/N2TCK WC_CS 43 Wireless charge DY
M1
KBRST/GPIO86/N2TMS SPK_MUTE_N 27
2
K10
4 eDP_BLEN_CPU K1 GPIO51/TA3 M12 PANEL_BLEN_EC R2411 1 2 0R0201-PAD-GP
17 PM_PWRBTN_N GPIO20/TA2 GPIO52/PSDAT3 M11 LCD_BLEN_CON 55
GPIO50/PSCLK3 M7 FNLK_LED 65
PROCHOT_EC F2 GPIO27/PSDAT2 N7 USB_AOU_SEL1 36
C2 GPIO80/VD_IN1 GPIO26/PSCLK2 B7 USB_AOU_PWR_EN 36
H1 GPIO07/AD7/VD_IN2 GPIO35/PSDAT1 A7 USB_PWR_EN 66
66 FP_GPIO_AL0 J1 GPIO82/VD_OUT1 GPIO37/PSCLK1 WC_SW_EN_N 43
64 BAT_LED GPIO84/VD_OUT2
A8 BAT_SCL_EC BAT_SCL_EC R2470 1 2 0R0201-PAD-GP THERM1_SCL_EC
GPIO17/SCL1/N2TCK BAT_SDA_EC BAT_SCL_EC 43,44 BAT_SDA_EC
B8 R2471 1 2 0R0201-PAD-GP THERM1_SDA_EC
EC_ENABLE_N GPIO22/SDA1/N2TMS B9 BAT_SDA_EC 43,44 1st_BATTERY / CHARGER THERM1
PSL 3D3V_AUX_S5
43 BAT_IN_N
B6
GPIO41/F_WP/PSL_GPIO41
GPIO73/SCL2/N2TCK
GPIO74/SDA2/N2TMS
A9
SMB_SCL3_EC
EC_I2C_CLK_PD
EC_I2C_DATA_PD
73
73 TBT
E8 K4
R2413 1 2 100KR1J-GP AC_IN_KBC_N E9 PSL_OUT/GPIO71 GPIO23/SCL3/N2TCK L1 SMB_SDA3_EC
R2414 1 2 KBC_PWRBTN_EC_N B1 PSL_IN1/GPI70 GPIO31/SDA3/N2TMS N11 3D3V_PD_EN THERM2
44 PWR_AC_IN_N J8 PSL_IN2/GPI06/EXT_PURST# GPIO47/SCL4A/N2TCK/DPWROK N12 3D3V_PD_EN 73
0R0201-PAD-GP
67 LID_CLOSE_N M9 GPIO42/PSL_IN3/GPI42 GPIO53/SDA4A/N2TMS/RSMRST# N9 ALERT_EC_EN 73
64 KBC_NOVOBTN_N GPIO43/PSL_IN4/GPI43 GPIO44/SCL4B PM_SLP_S4_N 17,40
N10
GPIO46/SDA4B/CIRRXM ME_UNLOCK 15
A5
17 AC_PRESENT D6 GPIO76/SPI_MOSI B2 R2475 1 2 0R0201-PAD-GP
1 2 0R0201-PAD-GP 45 5V_EN TOUCH_EN_EC B5 GPIO02/SPI_MISO F_CS0/GPIOC6 A1 1 2 15R1J-GP SPI_CS_ROM_N0 25
R2416 R2474
55 TOUCH_PWR_EN GPIO75/SPI_SCK F_SCK/GPIOC7 SPI_CLK_ROM_R 25,91
D7 A3 R2473 1 2 15R1J-GP
65 CAP_LED GPIO00/32KCLKIN F_SDIO/F_SDIO0/GPIOC5 B3 R2472 1 2 15R1J-GP SPI_SI_ROM_R 25,91
F_SDI/F_SDIO1/GPIOC4 SPI_SO_ROM_R 25,91 Q2401 84.03906.G11->84.T3906.E11(main)
A2
KBC_VCORF G10 GPIO81/F_WP#/F_SDIO2 B4 FP_RESETN 66 Prevent BIOS data loss solution
VCORF GPIO77/F_SDIO3 S0_PWRGD 17
C 1 3D3V_AUX_KBC C
AGND
GND
GND
GND
GND
GND
GND
C2413 ECRST_N
2
CHECK SC1U10V2KX-1GP
2
NPCE388PB0BX-GP R2422
J9
G9
E6
E5
H5
J5
F5
3D3V_AUX_S5 3D3V_AUX_S5
071.00388.000U 10KR1J-GP
R2423 DY
1
1
E
R2426
1 2 C2414
2
PURE_HW_SHUTDOWN_N 2 1 PURE_HW_SHUTDOWN_N_B B Q2401 SC1U10V2KX-1GP
2
26,40 PURE_HW_SHUTDOWN_N
R2424 R2425 0R402-DB-GP-U LMBT3906LT1G-1-GP
100KR1J-GP
DY 100KR1J-GP 84.T3906.E11
C
EC_AGND 10KR1J-GP
1
KBC_J6_STRAP KBC_N1_STRAP
1
U2401B 2 OF 2
R2429 R2430 KCOL[15:0] 65
1KR1J-GP 1KR1J-GP L12 D10 KCOL0
DY 26 FAN_TACH1 A11 GPIO56/TA1 KBSOUT0/GPOB0/SOUT_CR/JENK# E13 KCOL1
R2452 1 26
2 0R0201-PAD-GP FAN_TACH2 KBC_PM_SLP_S3_N B10 GPIO14/TB1 KBSOUT1/GPIOB1/TCK E12 KCOL2
2
17,40,54,57 PM_SLP_S3_N GPIO01/TB2 KBSOUT2/GPIOB2/TMS E10 KCOL3

L13 KBSOUT3/GPIOB3/TDI F13 KCOL4
64 SYS_LED K2 GPIO15/A_PWM KBSOUT4/GPOB4/JEN0# F12 KCOL5
27 KBC_BEEP B11 GPIO21/B_PWM KBSOUT5/GPIOB5/TDO F10 KCOL6
65 KB_BL_ON A10 GPIO13/C_PWM KBSOUT6/GPIOB6/RDY# G12 KCOL7
26 FAN_PWM2 A6 GPIO32/D_PWM KBSOUT7/GPIOB7 G13 KCOL8
26 FAN_PWM1 D9 GPIO66/G_PWM/PSL_GPIO66 KBSOUT8/GPIOC0 H13 KCOL9
18 RTCRST_ON
RTCRST_ON G1
GPO33/H_PWM/VD1_EN#
GPIO30/F_WP#/RTS1
KBSOUT9/GPOC1/SDP_VIS#
KBSOUT10/P80_CLK/GPIOC2
KBSOUT11/P80_DAT/GPIOC3
H12
H10
KCOL10
KCOL11
Nuvoton KBC PSL Power Switched Logic 3D3V_AUX_S5 3D3V_AUX_KBC
R2431 1 2 RSMRST_N_EC M8 H9 KCOL12
17,99 RSMRST_N_KBC 0R0201-PAD-GP N8 GPIO36/TB3/CTS1 KBSOUT12/GPO64/TEST# J13 KCOL13 3D3V_AUX_S5
1D05V_VCCST 40 S5_ENABLE 1 KBC_N1_STRAP N1 GPIO34/SIN1/CIRRXL KBSOUT13/GP(I)O63/TRIST# J12 KCOL14
AFTP2401 M10 GPIO67/SOUT1/LPC_ESPI_STRAP1 KBSOUT14/GP(I)O62/XORTR# J10 KCOL15 C2415 1 2 SCD1U16V2KX-3GP
GPIO45/E_PWM/DTR1_BOUT1 KBSOUT15/GPIO61/XOR_OUT 1.Enter PSL mode (Entry S5 after 10sec) :
1
66 PWR_LED K8 K13
66 FP_LED GPIO40/F_PWM/1_WIRE/RI1 GPIO60/KBSOUT16/DSR1# MODERN_STANDBY 20
GPIO57/KBSOUT17/DCD1#
K12 3D3V_AUX_KBC : OFF (KBC PWR supply) R2434
2
H2 FAN_ID2 26 330KR1J-GP
68 EC_DUG_TX J2 GPIO83/SOUT_CR D12 KROW[7:0] 65
R2433 KROW0
0R0201-PAD-GP
17 DSW_PWROK GPIO87/CIRRXM/SIN_CR KBSIN0/GPIOA0/N2TCK D13 KROW1
2.At PSL mode (SPEC: S5<10mW)
2
M13 KBSIN1/GPIOA1/N2TMS C12 KROW2
S
36 USB_AOU_SEL2 GPIO55/CLKOUT KBSIN2/GPIOA2 C13 R2436 R2437
KROW3 PSL mode(AC or DC):
ECRST_N A4 KBSIN3/GPIOA3 B12 KROW4 EC_ENABLE_N 1 2 EC_ENABLE_N_G_1 1 2 EC_ENABLE_N_G G
1
EXT_RST# KBSIN4/GPIOA4 B13 KROW5 Q2402

R2435 1 2 43R2J-L-GP PECI_EC J7 KBSIN5/GPIOA5 A13 KROW6 PJA3415-GP
3 PECI_CPU PECI KBSIN6/GPIOA6
EC_ENABLE#_G S5_ENABLE 3D3V_AUX_KBC 1KR1J-GP 20KR1J-GP
EC_VTT K7 A12 KROW7
VTT KBSIN7/GPIOA7 084.03415.0031
D
NPCE388PB0BX-GP
Hi Low OFF
1
C2417 C2416 071.00388.000U

SCD1U16V2KX-3GP SC100P50V2JN-3GP
G
2
DY
PSL Wake(AC or DC):
S5_ENABLE D S
B B
EC_ENABLE#_G S5_ENABLE 3D3V_AUX_KBC
Q2403
LSK3541G1ET2L-1-GP
Low Hi ON 084.03541.M001
EC GPIO PH
NOVO button Fun define: one key to recover OS. EC_GPIO47 High Active Q2404
3D3V_AUX_KBC 3D3V_S5
3D3V_AUX_S5 EC GPIO PL NOVO button wake KBC at PSL mode.
PROCHOT_EC G
2
D PROCHOT_EC_N R2446 1 2 0R0201-PAD-GP
R2459 1 2 4K7R1J-GP BAT_SCL_EC R2438 1 2 10KR1J-GP LID_CLOSE_N R2445 PROCHOT_CPU_N 3,44,46,73
R2460 1 2 4K7R1J-GP BAT_SDA_EC KBC_NOVO_BTN# KBC_PWRBTN_EC# S
100KR1J-GP
Notice:ZZ.2N702.J3101
R2477 1 2 10KR1J-GP KBC_NOVOBTN_N AC_PRESENT R2440 1 2 10KR1J-GP 2N7002K-2-GP

DY
1
R2441 1 2 100KR1J-GP BAT_IN_N
R2442 1 2 10KR1J-GP ECRST_N R2455 1 2 1KR1J-GP EC_I2C_CLK_PD FP_GPIO_AL0 R2476 1 2 100KR1J-GP
Low Low 84.2N702.J31
R2456 1 2 1KR1J-GP EC_I2C_DATA_PD
R2453 1 2 10KR1J-GP S5_ENABLE

R2454 1 2 10KR1J-GP 5V_EN
R2444 1 2 10KR1J-GP AC_PRESENT KBC_PWRBTN_EC#:Low
R2448 1 2 10KR1J-GP AOU_IFLG_N (1) 4sec: PWR
1 2 PM_PWRBTN_N
R2478 1 2 4K7R1J-GP SMB_SCL3_EC
R2447 10KR1J-GP
Button shut down 3D3V_AUX_S5 KBC_PWRBTN_N
SMB_SDA3_EC
R2479 1 2 4K7R1J-GP (2) 8sec: KBC reset
2
R2449
1
10KR1J-GP
ED2402
AZ5725-01FDR7G-1-GP
1
R2450
1 2 KBC_PWRBTN_EC_N DY
66 KBC_PWRBTN_N
2
2
470R2J-2-GP
1
R2451
100KR1J-GP C2418
SC220P50V2KX-3GP
2
1
Q2405 Q2407
LSK3541G1ET2L-1-GP LSK3541G1ET2L-1-GP
084.03541.M001 084.03541.M001
S D SMB_SCL3_EC S D THERM1_SCL_EC
26 SMB_SCL_EC_THERM2 26 SMB_SCL_EC_THERM1
A A
G
3D3V_S0 3D3V_S0
G
SMB_SDA3_EC D S THERM1_SDA_EC D S
SMB_SDA_EC_THERM2 26 SMB_SDA_EC_THERM1 26
LC40
Q2406 Q2408
LSK3541G1ET2L-1-GP LSK3541G1ET2L-1-GP
084.03541.M001 084.03541.M001
Wistron Corporation
Title
ECIO (NUVOTON_NPCE386)
A1
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
CPU 3D3V_SPI
18 SPI_CS_CPU_N0 SPI_HOLD_CPU R2530 1 2 100KR1J-GP

18 SPI_CLK_CPU SPI_WP_CPU R2529 1 2 100KR1J-GP
18 SPI_SO_CPU SPI_SI_CPU R2528 1 2 4K7R1J-GP
18 SPI_SI_CPU SPI_CS_ROM_N0 R2504 1 DY 2 10KR1J-GP
18 SPI_WP_CPU
18 SPI_HOLD_CPU
SPI_CS_CPU_N0 R2506 1 2
0R0201-PAD-GP SPI_CS_ROM_N0
SPI_CLK_CPU R2507 1 2
0R0201-PAD-GP SPI_CLK_ROM_R R2531 1 2 15R1J-GP SPI_CLK_ROM
D D
24,91 SPI_CLK_ROM_R
24,91 SPI_SO_ROM_R SPI_SI_CPU 1 2 SPI_SI_ROM_R 1 2 15R1J-GP SPI_SI_ROM

R2508 0R0201-PAD-GP R2532
SPI_SO_CPU R2509 1 2
0R0201-PAD-GP SPI_SO_ROM_R R2533 1 2 15R1J-GP SPI_SO_ROM
24,91 SPI_SI_ROM_R
SPI_WP_CPU R2510 1 2 0R0201-PAD-GP SPI_WP_ROM

SPI_HOLD_CPU R2511 1 2 0R0201-PAD-GP SPI_HOLD_ROM
24 SPI_CS_ROM_N0
20,25 RTC_DET_N 3D3V_S5 3D3V_SPI
SPI ROM 32M R2501 1

0R0402-PAD-1-GP
2
U2501 3D3V_SPI
TABLE BIOS1 SPI_CS_ROM_N0 1 8
32MB (256Mb) 8x6mm WSON8 SPI_SO_ROM 2 CS# VCC 7 SPI_HOLD_ROM
SPI_WP_ROM 3 IO1 IO3 6 SPI_CLK_ROM
Vender Vender P/N Wistron P/N 4 IO2 CLK 5 SPI_SI_ROM
GND IO0
WINBOND W25R256JVEIQ 072.25256.0L01
1
1
9
GND
MACRONIX MX77L25650FZ4I42 072.77256.0003 DY C2501
SC1U10V2KX-L1-GP
R2505
2
1KR2J-1-GP
GIGADEVICE GD25R256DYIGR 072.25256.0H03 W25R256JVEIQ-GP

C C
072.25256.0L01
2
B B
SSID = RBATT
Test point 3D3V_RTC_PWR
3D3V_AUX_S5 3D3V_RTC_AUX
1 3D3V_RTCVCC_CONN
AFTP2502 R2525 2 1 1MR1J-GP
1 3D3V_S5
AFTP2501
2
A 1 3D3V_S5 A
AFTP2503
1
3
R2527
D2503 1KR2J-L2-GP
G
TEST
1
3D3V_RTCVCC_CONN 3D3V_RTC_PWR LBAT54CLT1G-1-GP

1
075.00054.0B7D C2502
2
SC1U6D3V1MX-GP
Wistron Corporation
2
R2526 2 1 1KR2J-1-GP S D 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

RTC_DET_N 20,25 Taipei Hsien 221, Taiwan, R.O.C.
Width=20mils change to 075.00054.0B7D Q2502 Title
Del source 75.00054.T7D LSK3541G1ET2L-1-GP Flash/RTC
084.03541.M001 Size Document Number Rev
C
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
3D3V_S0
Close to Charger 3D3V_S0
1
THERM_DA2
R2629
SC2K2P50V2KX-L-GP
SC100P50V2JN-3GP
0R0402-PAD-1-GP
2
1
B C2618 C2613
Q2603
Close to thermal sensor
1
LMBT3904LT1G-GP C2614
E
SCD1U16V2KX-3GP SRN4K7J-8-GP
84.T3904.H11 RN2602
2
THERM_DC2
Close to 5V
3
4
U2603
3D3V_S0_NCT7718 1 8 CPU_SMB_SCL_THERM1 R2628 1 2 0R0402-PAD-1-GP

Close to CPU SSD D2603 THERM_DA2 2 VDD SCL 7 CPU_SMB_SDA_THERM1 R2615 1 2 0R0402-PAD-1-GP
SMB_SCL_EC_THERM1
SMB_SDA_EC_THERM1
24
24
24,40 PURE_HW_SHUTDOWN_N THERM_DA1 THERM_DC2 3 D+ SDA 6 NCT7718_ALERT_N
D D
THERM_SYS_SHDN_N A K NCT7718_CRIT_N 4 D- ALERT# 5
DY
SC2K2P50V2KX-L-GP
SC100P50V2JN-3GP
T_CRIT# GND
RB520S30-GP
1
NCT7718W-GP
B C2619 C2620
Q2605
74.07718.0B9
2
LMBT3904LT1G-GP
Close to thermal sensor
E
84.T3904.H11 3D3V_S0
THERM_DC1
3D3V_S0
1
R2634
0R0402-PAD-1-GP
2
1
1
C2617
SCD1U16V2KX-3GP SRN4K7J-8-GP
RN2601
2
Close to CPU Power
3
4
U2602
Set Q2605, U2602 3D3V_S0_NCT7718_2 CPU_SMB_SCL_THERM2
1 8 R2636 1 2 0R0402-PAD-1-GP
105c HW Thermal shutdown THERM_DA1 2 VDD SCL 7 CPU_SMB_SDA_THERM2 R2633 1 2 0R0402-PAD-1-GP
SMB_SCL_EC_THERM2 24
THERM_DC1 D+ SDA NCT7718_2_ALERT_N SMB_SDA_EC_THERM2 24
D2604 3 6
THERM_SYS_SHDN_N A K NCT7718_2_CRIT_N 4 D- ALERT# 5
PURE_HW_SHUTDOWN_N D S THERM_SYS_SHDN_N T_CRIT# GND
RB520S30-GP
Q2601 NCT7718W-GP
LSK3541G1ET2L-1-GP 3D3V_S0
74.07718.0B9
084.03541.M001 3D3V_S0 R2637 1 2 10KR2J-3-GP THERM_SYS_SHDN_N Software Control
G
HW_SHUTDOWN_Q2601_G 1 2
R2604 10KR2J-3-GP R2639 1 2 10K5R2F-GP NCT7718_CRIT_N
DY Hardware Control
R2640 1 2 10K5R2F-GP NCT7718_2_CRIT_N
C C
R2627 2 1 18K7R2F-GP NCT7718_ALERT_N 3D3V_S0
DY
R2635 2 1 18K7R2F-GP NCT7718_2_ALERT_N
1
R2601 1 2 14KR2F-GP NTC7717_ALERT_N R2607
NTC7717_SDA_THERM R2605 1 2 0R0402-PAD-1-GP SMB_SDA_EC_THERM2
0R0402-PAD-1-GP
NTC7717_SCL_THERM R2606 1 2 0R0402-PAD-1-GP SMB_SCL_EC_THERM2
ALERTA /T_CRITA PullAup Resistor v.s. Alert temperature (℃ ) Close to Ambient
2
U2604
NCT7718W Table:
NTC7717_SDA_THERM 5 1
SMBDATA SMBCLK 2
R2627 \ R2639 2.0K 7.5K 10.5K 14.0K 18.7K GND
D2605
3D3V_S0_NTC7717 4 3 NTC7717_ALERT_N K A THERM_SYS_SHDN_N
R2635 \ R2640 VS+ ALERT#
2.0K 77 87 97 107 117 RB520S30-GP
7.5K 79 89 99 109 119 G753T11U-GP
2
10.5K 81 91 101 111 121 074.75311.007F
14.0K 83 93 103 113 123 C2601 C2602
18.7K 85 95 105 115 125 SC1U6D3V1MX-GP SCD1U16V2KX-3GP
1
3D3V_S0
24 FAN_TACH1 Test pointATop
24 FAN_TACH2
4
3
B 5V_FAN1_S0 B
RN2604 AFTP2601 1
24 FAN_PWM1 FAN1 1 FAN_TACH1_CON
SRN10KJ-5-GP AFTP2602
8 AFTP2603 1 FAN_PWM1
24 FAN_PWM2 1 FAN_ID1
AFTP2604
5V_S0 5V_FAN1_S0 6 AFTP2605 1
1
2
24 FAN_ID1 FAN_ID1 5 FAN_ID

4
24 FAN_ID2 FAN_PWM1
R2641 1 2 0R0402-PAD-1-GP 3
FAN_TACH1 A K FAN_TACH1_CON 2
D2601
1
LRB520S-30T1G-GP 1
C2603 C2604
083.52030.008F 5V_FAN1_S0
SC1U10V2KX-L1-GP
SCD1U16V2KX-L-GP
7
2
ACES-CON6-44-GP-U
20.F1633.006
3D3V_S0
4
3
5V_S0 5V_FAN2_S0
RN2603
SRN10KJ-5-GP
R2602 1 2 0R0402-PAD-1-GP
FAN2
7
Test pointATop
1
2
1
FAN_ID2 5
4
FAN_ID
C2605 C2606
SC1U10V2KX-L1-GP
FAN_PWM2 3 5V_FAN2_S0
SCD1U16V2KX-L-GP
2
FAN_TACH2 A K FAN_TACH2_CON 2 AFTP2606 1

D2602 AFTP2607 1 FAN_TACH2_CON
LRB520S-30T1G-GP 1 AFTP2608 1 FAN_PWM2
6 AFTP2609 1 FAN_ID2
083.52030.008F 5V_FAN2_S0 AFTP2610 1
ACES-CON5-30-GP
A A
20.F2235.005
TEST
Wistron Corporation
Title
THERMAL/Fan Controllor
A2
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
1D8V_S0 1D8V_S0_AUD
5V_S0 5V_S0_PVDD 5V_S0 5V_S0_AUD 1D8V_S0_AUD
1 2 (1A)
R2728 0R0402-PAD-1-GP 1 2 1 2
R2730 R2729 0R0402-PAD-1-GP
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
0R0603-PAD-1-GP-U
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
2
C2705 C2706 C2707 C2708 C2711 C2712 C2713 C2714
1
C2701 C2702 C2703 C2704
1
C2715 1 2 SCD01U25V2KX-3GP
DY
D PVDD1 PVDD2 AVDD1 AVDD2 D
AGND AGND
DVDD DVDD-IO
PCB trace width of Mic1-R/Mic1-L(SLEEVE/RING2) are

1D8V_S0_AUD5V_S0_AUD 1D8V_S0 PLACE NEAR CODEC required at least 40 mil for HP crosstalk consideration
and its length should be as short as possible
1D8V_S0_AUD 1D8V_S0_AUD 5V_S0_PVDD
U2701
3 Analog Plane 36 AUDIO_PCBEEP C2716 2 1 SCD1U6D3V1KX-GP BEEP_MIX_ATT

DVDD PCBEEP
18 33 MIC_RING2
DVDD-IO MIC2-L(PORT-F-L)/RING2 34 MIC_SLEEVE MIC_RING2 30
40 MIC2-R(PORT-F-R)/SLEEVE MIC_SLEEVE 30
Analog
2
1
20 AVDD1 42 AUDIO_SPK-OUT-L+ R2731 2 1 0R2J-2-GP CODEC_SP_OUTL+
Plane NON-AMP
10KR1J-GP
2K2R1J-GP
2K2R1J-GP
AVDD2 SPK-OUT-L+ CODEC_SP_OUTL+ 29

43 AUDIO_SPK-OUT-L- R2732 2 1 0R2J-2-GP NON-AMP CODEC_SP_OUTL-
SPK-OUT-L- CODEC_SP_OUTL- 29
R2701 R2703 R2704 41 45 AUDIO_SPK-OUT-R+ R2733 2 1 0R2J-2-GP NON-AMP CODEC_SP_OUTR+
PVDD1 SPK-OUT-R+ CODEC_SP_OUTR+ 29
46 44 AUDIO_SPK-OUT-R- R2734 2 1 0R2J-2-GP NON-AMP CODEC_SP_OUTR-
PVDD2 SPK-OUT-R- CODEC_SP_OUTR- 29
1
AUDIO_CPVPP 28 30 AUDIO_HP-OUT-L R2705 1 2 47R1J-GP HP_L_JACK

CPVPP HP-OUT-L(PORT-I-L) 29 AUDIO_HP-OUT-R 1 2 47R1J-GP HP_R_JACK HP_L_JACK 30
R2706
HP-OUT-R(PORT-I-R) HP_R_JACK 30
EC_I2C_SDA_AUD_AMP 6
28 EC_I2C_SDA_AUD_AMP
2
EC_I2C_SCL_AUD_AMP 7 I2C-DATA 38 AUDIO_VREF
2K2R1J-GP
2K2R1J-GP
28 EC_I2C_SCL_AUD_AMP I2C-CLK VREF
HDA_SYNC_CODEC 15 39 AUDIO_LDO1-CAP C2717 1 2 SC2D2U6D3V2MX-GP R2707 R2708
19 HDA_SYNC_CODEC HDA_BITCLK_CODEC 14 SYNC LDO1-CAP 21 AUDIO_LDO2-CAP C2718 1 2 SC4D7U6D3V2MX-GP-U
19 HDA_BITCLK_CODEC HDA_SDOUT_CODEC 17 BCLK LDO2-CAP 19 AUDIO_LDO3-CAP C2719 1 2 SC2D2U6D3V2MX-GP
1
19 HDA_SDOUT_CODEC 1 2 33R1J-GP HDA_SDIN0_R 16 SDATA-OUT LDO3-CAP
19 HDA_SDIN0_CPU R2709
EAPD 13 SDATA-IN 31 AUDIO_MIC2-VREFO-L AGND
28 EAPD DC-DET/EAPD MIC2-VREFO-L 32 AUDIO_MIC2-VREFO-R
MIC2-VREFO-R
C R2722 1 2 0R0201-PAD-GP I2S_AMP_OUT 8 35 AUDIO_MIC2-CAP C
28 TAS2770_SDOUT R2723 1 2 0R0201-PAD-GP I2S_AMP_IN 9 I2S-IN MIC2-CAP
28 TAS2770_SDIN R2735 1 2 0R0201-PAD-GP I2S_BCLK 10 I2S-OUT 23 AUDIO_CPVEE
28 TAS2770_SBCLK TPAD14-OP-GP TP2701 1 I2S_MCLK 11 I2S-BCLK CPVEE
R2726 1 2 0R0201-PAD-GP I2S_LRCK 12 I2S-MCLK/GPIO3 27 AUDIO_CBN1
I2S-LRCK
Analog CBN1
28 TAS2770_FSYNC 26 AUDIO_CBP1 C2720 1 2 SC2D2U6D3V2MX-GP
Plane CBP1
48 24 AUDIO_CBN2
JD1 47 GPIO4/JD2(I2S-IN/I2S-OUT_JD) CBN2 25 AUDIO_CBP2 C2721 1 2 SC2D2U6D3V2MX-GP
JD1(HP_JD) CBP2
4
5 GPIO0/DMIC-DATA12 37
1 GPIO1/DMIC-CLK AVSS1 22
I2S-OE/SPDIF-OUT/GPIO2/DMIC-DATA34 AVSS2
R2727 1 2 0R0201-PAD-GP SPK_MUTE_N_AUD 2 49
24 SPK_MUTE_N PDB THERMAL_PAD
ALC3306-VA1-CG-GP AGND
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
071.03306.0A03
SC33P50V1JN-1-GP
SC33P50V1JN-1-GP
SC33P50V1JN-1-GP
SC33P50V1JN-1-GP
DY DY DY DY
1
1
C2722 C2723 C2724 C2725 C2726 C2727 C2728 C2729 C2730 C2731
DY DY
2
2
AGND AGND AGND AGND AGND AGND AGND
PLACE UNDER U175 ALC3306AGRT
C2736 1
DY 2 SCD01U25V2KX-3GP PLACE NEAR CODEC
AGND
B B
R2710 1 2 0R402-DB-GP-U
AGND
1D8V_S0_AUD
PCBeep
AUDIO JACK SENSE
1
1 2 BEEP_MIX_ATT
24 KBC_BEEP
R2711 R2718 1KR2J-1-GP
100KR1F-GP
1 2
20 HDA_SPKR
2
R2712 R2719 1KR2J-1-GP

200KR1F-GP
HP_JACK_IN_D 1 2 JD1
1
R2720
10KR2J-3-GP
D
R2713
2
22KR1J-GP Q2701
HP_JACK_IN 1 2 HP_JACK_IN_R G LSK3541G1ET2L-1-GP
30 HP_JACK_IN
1
R2736 DY C2737
SC2D2U6D3V2MX-GP
1
100KR1F-GP
2
A A
AGND AGND AGND
LBB-1
Wistron Corporation
Title
AUDIO (CODEC ALC3287)
A2 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
1D8V_S0 PVCC
(<1A)
Close to U2801 Pin9 Close to U2801 Pin8
1
C2829 C2831 C2806
AMP AMP AMP
SCD1U25V2KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
1
2
D D
1D8V_S0 PVCC
U2801
25 17
VBAT PDMCK 18
9 PDMD
AVDD 3
8 OUT_P 26 AMP_SP_OUTR+ 29
IOVDD OUT_N AMP_SP_OUTR- 29
24 AMP_AREG
AMP_SP_OUTR+ 5 AREG 7 AMP_DREG
AMP_SP_OUTR- 6 VSNS_P DREG 14 TAS2770_FSYNC
VSNS_N FSYNC IRQZ_N TAS2770_FSYNC 27
20
AMP_SP_OUTR+ C2809 1AMP2 SCD1U16V2KX-3GP BST_P 4 IRQZ# 19 AMP_MODE
AMP_SP_OUTR- C2810 1AMP2 SCD1U16V2KX-3GP BST_N 1 BST_P MODE
BST_N AMP AMP AMP AMP
1
23 10 C2832 C2811 C2812 C2813
27 EC_I2C_SCL_AUD_AMP SCL GND
1
22 15
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
27 EC_I2C_SDA_AUD_AMP
2
SDA GND 16 R2815
GND
C
27 TAS2770_SDIN
11
12 SDIN 2
AMP 470R2J-2-GP C
27 TAS2770_SDOUT TAS2770_SBCLK SDOUT PGND
13
27 TAS2770_SBCLK
2
EAPD 21 SBCLK
27 EAPD SDZ#
SDZ# connect to Audio CODEC EAPD
TAS2770RJQR-1-GP AMP
074.02770.M001
channel RIGHT
074.02770.001Z->074.02770.0013_20181109
1D8V_S0 19V_DCBATOUT 8V_AMP PVCC
Close to U2802 Pin9 Close to U2802 Pin8 (<1A)

R2809 1 2 0R0816-PAD-GP-U
AMP AMP AMP AMP AMP AMP AMP
1
1
C2814 C2815 C2817 R2802 1 2 C2818 C2819 C2833 C2834
0R3J-0-U-GP DY
SCD1U25V2KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
2
2
SC2D2U10V3KX-L-GP
SC1U25V2KX-2-GP
SC1U25V2KX-2-GP
SC1U25V2KX-2-GP
B B
1D8V_S0 PVCC
U2802
25 17
VBAT PDMCK 18
9 PDMD
AVDD 3
8 OUT_P 26 AMP_SP_OUTL+ 29
IOVDD OUT_N AMP_SP_OUTL- 29
24 AMP_AREG2
AMP_SP_OUTL+ 5 AREG 7 AMP_DREG2
AMP_SP_OUTL- 6 VSNS_P DREG 14 TAS2770_FSYNC
AMP VSNS_N FSYNC 20 IRQZ_N
AMP_SP_OUTL+ C2821 1 2 SCD1U16V2KX-3GP BST_P2 4 IRQZ# 19 AMP_MODE2
AMP_SP_OUTL- C2822 1 2 SCD1U16V2KX-3GP BST_N2 1 BST_P MODE
BST_N AMP AMP AMP AMP
1
AMP EC_I2C_SCL_AUD_AMP 23 10 C2826 C2823 C2824 C2825

SCL GND
1
EC_I2C_SDA_AUD_AMP 22 15
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
2
SDA GND 16 R2812

TAS2770_SDIN 11 GND 0R0201-PAD-GP
1D8V_S0 TAS2770_SDOUT 12 SDIN 2
TAS2770_SBCLK 13 SDOUT PGND
A SBCLK LBB-1 A
EAPD 21
2
SDZ#
AMP
1
R2810 TAS2770RJQR-1-GP AMP Wistron Corporation

4K7R2J-2-GP Change R2812 to 0ohm (device ID = 0x62) 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
074.02770.M001 Taipei Hsien 221, Taiwan, R.O.C.
to configure U2802 as channel left.
2
IRQZ_N Title
AUDIO (MIC I/F)
Need 25V rating (2X PVCC) for BST_P, BST_N Size Document Number Rev
A3 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
Main Func = AUDIO
D D
27 CODEC_SP_OUTR+
27 CODEC_SP_OUTR-
27 CODEC_SP_OUTL+
27 CODEC_SP_OUTL-
SPEAKERSPK1
CONN
5
R2901 1 2 0R2J-2-GP CODEC_SP_OUTR+ 1

28 AMP_SP_OUTR+ AMP
R2902 1 2 0R2J-2-GP CODEC_SP_OUTR- 2
28 AMP_SP_OUTR-
R2903 1
AMP 2 0R2J-2-GP CODEC_SP_OUTL+ 3
28 AMP_SP_OUTL+
R2904 1
AMP 2 0R2J-2-GP CODEC_SP_OUTL- 4
28 AMP_SP_OUTL- AMP
6
ACES-CON4-17-GP-U2
C C
20.F1621.004
SC470P50V2KX-3GP
SC470P50V2KX-3GP
SC470P50V2KX-3GP
SC470P50V2KX-3GP
2
2
EC2901 EC2902 EC2903 EC2904
Near SPK1 (SPEAKER)
1
1 CODEC_SP_OUTR+
AFTP2901
1 CODEC_SP_OUTR-
AFTP2902
1 CODEC_SP_OUTL+
PLACE NEAR SPEAKER CONNECTOR AFTP2903
To solve SPK EMI failed issue 1 CODEC_SP_OUTL-
AFTP2904
B B
LBB-1
A
Title
AUDIO (AUDIO JACK)
A4 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
R3001 1 2 0R0402-PAD-1-GP
27 HP_L_JACK
R3002 1 2 0R0402-PAD-1-GP
27 HP_R_JACK
D DY DY D
C3001 C3002
1
SC100P50V2JN-L-GP SC100P50V2JN-L-GP
Moat
2
3D3V_S0
NEAR AUDIO JACK CONN
1
R3004 AUDIO JACK SENSE

10KR2J-3-GP CLOSE TO CODEC HGNDA/HGNDB trace width >70mil,
6A10 mil trace recommend changed to sharp will be better.
2
Combo Jack
C C
AUD1
3 MIC_RING2
1 HP_L_JACK_CONN MIC_RING2
HP_L_JACK_CONN MIC_RING2 27
5 3D3V_S0_HPJD
6 HP_JACK_SYS
2 HP_R_JACK_CONN HP_JACK_SYS R3003 1 2 0R0402-PAD-1-GP
4 MIC_SLEEVE HP_R_JACK_CONN HP_JACK_IN 27
MIC_SLEEVE
PHONE-JK618-GP MIC_SLEEVE 27
022.10002.0V51
DY-EMC DY-EMC
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1
1
ED3001 ED3002 ED3003 ED3004 ED3005
1
AZ5725-01FDR7G-1-GP AZ5725-01FDR7G-1-GP AZ5725-01FDR7G-1-GP AZ5725-01FDR7G-1-GP AZ5725-01FDR7G-1-GP
075.05725.0073 EC3002 EC3003 075.05725.0073 075.05725.0073 075.05725.0073 075.05725.0073
Near AUD1 (AUDIO) TEST-EMC TEST-EMC TEST-EMC TEST-EMC TEST-EMC
2
2
2
1 MIC_RING2
AFTP3001
1 HP_L_JACK_CONN
Close to AUD1
B AFTP3002 Close to AUD1 Close to AUD1 B
1 3D3V_S0_HPJD
AFTP3003
1 HP_JACK_SYS
AFTP3004
1 HP_R_JACK_CONN
Moat
AFTP3005
1 MIC_SLEEVE ED3001,ED3002,ED3003
AFTP3006
Can change to follow P/N for smaller size. (HL and spacing issue.)
1 83.0005V.CAF
AFTP3007
83.05725.0A0 (075.05725.0073)
AGND R3005 1 2 0R0402-PAD-1-GP
AGND
TEST-EMC
EC3001 1 2 SCD1U16V2KX-3GP
LBB-1
A A
AGND Moat Wistron Corporation
Title
AUDIO (SPEAKER)
B V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
BOM1
Wistron Corporation
Title
LAN RTL8111H
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
BOM1
A A
Wistron Corporation
Title
RJ45
Custom
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
LAR-1
A
Title
CARD READER (SDIO/CONN)
A4 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
TEST
A
Title
USB (RSVD) (USB2.0 CONN)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
BOM1
A
Title
USB (USB3.0 Conn)

A4 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
Main Func = USB Charger
D D
For USB3.0 System Port1 (For AOU)

5V_S5 5V_USB1_S5 5V_S5
U3601
1 16 ILM_HI_USBAOU
IN ILIM_HI 15 ILM_LO_USBAOU
12 ILIM_LO 4
Layout Note: Close 5V_USB1_S5
OUT ILIM_SEL 5V_USB1_S5
6
CLT1 USB_AOU_SEL1 24
66 USB1_USB20_AOU_P 10 7
C 3 DP_IN CLT2 8 C
16 USB1_USB20_P DP_OUT CLT3 USB_AOU_SEL2 24
66 USB1_USB20_AOU_N 11 5
DM_IN EN USB_AOU_PWR_EN 24
16 USB1_USB20_N 2
DM_OUT
1
16 USB_OC0_N FAULTA is OD. 13 FAULT# GND
14 C3604 C3605
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
9 17
2
24 AOU_IFLG_N STATUS# GND R3601 R3602
STATUSA is OD. DY DY
2M7R2J-GP 22K1R2F-L-GP
SN1702001RTER-GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SCD1U16V2KX-L-GP
074.17020.0093
2
074.17020.0093 BOM control to SL50Q67167AA
DY DY
1
C3601 C3602 C3603

2
B Current Limit Target : 2.3A (2.1A2.45A) B

TABLE of AOU port: U3601
Vendor Vendor P/N Wistron P/N
1st TI SN1702001RTER SL50Q67167AA
2nd DIODES PI5USB2546HZHEX SL50Q67168AA
SN1702001RTER is not equivalent device of TPS2546RTER
BOM1
A
Title
USB(USB Charger)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
TEST
A
Title
USB (RSVD) (PCIE to USB3.0)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
Main Func = USB3.0 Re-driver
D D
C C
B B
BOM1
A
Title
USB (USB Redriver/Hub)
A4 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
Sequence (RSVD)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
17,24 PM_SLP_S4_N
17,24,54,57
17,24
PM_SLP_S3_N
PM_SLP_SUS_N
RUN Power
17,24,63,91 PLTRST_CPU_N
46 PWR_VCORE_VR_EN
RUN Power
17 PCH_PWROK 5V_S5 5V_S5
5V_S0/3D3V_S0
U4001
45 PWR_VDDQ_PG
4 12 SW_5V_S0_CT C4001 1 2 SC470P50V2KX-L-GP
22,50 VCCIN_AUX_VID0
1
VBIAS CT1 10 SW_3D3V_S0_CT C4003 1 2 SC470P50V2KX-L-GP
C4002 CT2
22,50 VCCIN_AUX_VID1 3D3V_AUX_S5 1 13 5V_S0_FIP
SC1U10V2KX-L1-GP
2
2 IN1#1 OUT1#13 14 R4002 1 2
D 5V_S0 (2.5A) D
6 IN1#2 OUT1#14 8 3D3V_S0_FIP 0R0816-PAD-GP-U 5V_S5
7 IN2#6 OUT2#8 9 R4004 1 2
17 VCCST_OVERRIDE IN2#7 OUT2#9 3D3V_S0 (2A)
0R0816-PAD-GP-U
C4040 U4002
17,24 ALL_SYS_PWRGD
1
3 11 SC1U10V2KX-L1-GP
1
PM_SLP_S3_N 1 2 3V_5V_S0_EN 5 EN1 GND 4 12 SW_3D3V_S5_CT C4038 1 2 SC470P50V2KX-L-GP
46 VCORE_READY EN2 15 VBIAS CT1 10
C4004 R4006 DY C4006 C4007
2
1
THERMAL_PAD CT2
SC1U10V2KX-L1-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
0R0402-PAD-1-GP C4005
2
17 CPU_C10_GATE_N 3D3V_AUX_S5 1 13
SCD1U16V2KX-L-GP G2898KD1U-GP 2 IN1#1 OUT1#13 14 3D3V_SUS_FIP 3D3V_S5
2
24,26 PURE_HW_SHUTDOWN_N IN1#2 OUT1#14
074.02898.0093 6
IN2#6 OUT2#8
8 (2A)
074.22976.0091 7 9 R4005 1 2
IN2#7 OUT2#9 0R0816-PAD-GP-U
45 1D8V_S5_EN
1 2 3D3V_EN_R 3 11
45,50 1D8V_S5_PWRGD 24 S5_ENABLE 5 EN1 GND
R4003
1
0R0402-PAD-1-GP EN2 15
C4033 DY THERMAL_PAD C4036 C4037
17,50 VCCIN_AUX_PWRGD
1
SC1U10V2KX-L1-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
C4035
2
SCD1U16V2KX-L-GP
G2898KD1U-GP
074.02898.0093
2
074.22976.0091
4,55 eDP_VDDEN_CPU
5V_S5 For CODEC / 3D3V_LCD

45 PWR_VTT_EN
3D3V_S5
1 U4003
C4012 4 12 SW_3D3V_LCD_S0_CT C4043 1 2 SC470P50V2KX-L-GP

45 PWR_VDDQ_EN VBIAS CT1 10 SW_1D8V_S0_CT
SC1U10V2KX-L1-GP C4014 1 2 SC470P50V2KX-L-GP
2
CT2 3D3V_LCD_S0
1D8V_S5 1 13 D4006
2 IN1#1 OUT1#13 14 3D3V_LCD_S0_FIP 1 2 S5_ENABLE A K PURE_HW_SHUTDOWN_N
6 IN1#2 OUT1#14 8 1D8V_S0_FIP R4032 0R402-DB-GP-U
7 IN2#6 OUT2#8 9 1 2 LRB520S-30T1G-GP
IN2#7 OUT2#9 1D8V_S0 (150mA)
R4008 0R402-DB-GP-U
1
eDP_VDDEN_CPU 3 11 C4015
EN1 GND
SCD1U16V2KX-L-GP
C PM_SLP_S3_N 1 2U4003_EN 5 C
2
1
R4029 EN2 15
C4017 C4018 0R0402-PAD-1-GP THERMAL_PAD
1
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
2
C4041 G2898KD1U-GP
DY
SCD1U16V2KX-L-GP
074.02898.0093
2
074.22976.0091
D4001
R4031 1 2 100KR1J-GP eDP_VDDEN_CPU BAT54C-12-GP
VCCIN_AUX_VID0 1
3 VCCST_READY
DY
6A/Rds(on):4.5mOhm/Tr:7~20us VCCIN_AUX_VID1 2
1D05V_S5_OUT 6A/Rds(on):4.5mOhm/Tr:7~20us
(300mA)
5V_S5 U4004 1D05V_VCCSTG_FIP 1D05V_VCCSTG
VCCST_OVERRIDE_3D3V 1 2 (500mA)
1 8 1 2 R4033 1D05V_S5_OUT 5V_S5 1D05V_VCCST_FIP 1D05V_VCCST
2 IN#1 OUT#8 7 R4009 0R402-DB-GP-U 0R0402-PAD-1-GP U4005
9 IN#2 OUT#7 6
IN#9 OUT#6 1 8 1 2
3 D4003 2 IN#1 OUT#8 7 R4010 0R402-DB-GP-U
VCCSTG_EN 4 VBIAS 5 PM_SLP_S3_N A K 9 IN#2 OUT#7 6
ON GND IN#9 OUT#6
LRB520S-30T1G-GP 3
1
1
VCCST_EN 4 VBIAS 5
DYC4019C4020 G5027CRD1D-GP-U C4023
ON GND
SCD1U16V2KX-L-GP
C4021 C4022 D4007

SCD1U16V2KX-L-GP
SC1U10V2KX-L1-GP
SCD1U16V2KX-L-GP
SC1U10V2KX-L1-GP
VCCST_READY A K VCCST_EN
2
1
G5027CRD1D-GP-U
1
LRB520S-30T1G-GP C4024 C4025 C4026
SCD1U16V2KX-L-GP
DY
2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
B B
2
D4004
CPU_C10_GATE_N A K
LRB520S-30T1G-GP
D4008
VCCST_READY A K VCCSTG_EN
LRB520S-30T1G-GP
Power Sequence / Pull High PWRGD

3D3V_S0
3D3V_S5
3D3V_S5
1
1
R4014
10KR2J-3-GP PM_SLP_SUS_N 1 2 1D8V_S5_EN
R4013 R4016 R4017
2
VCORE_READY 1 2 PCH_PWROK 0R0402-PAD-1-GP DY 100KR2J-1-GP 100KR2J-1-GP

1
R4018 DY C4027
2
1
0R0402-PAD-1-GP C4028 VCCST_OVERRIDE_Q1 VCCST_OVERRIDE_3D3V

SCD1U16V2KX-L-GP
2
SCD1U16V2KX-L-GP
2
G
D
Q4002
LSI1012LT1G-GP
3D3V_S5
3D3V_S0 (1.05V) 084.01012.0031 S D
VCCST_OVERRIDE G
1
Q4003
S
A R4021 1 2 1D8V_S5_PWRGD LSK3541G1ET2L-1-GP A
D4005 1KR2J-1-GP R4022 084.03541.M001
PM_SLP_S3_N K A 20KR2J-L3-GP
2
ALL_SYS_PWRGD
LRB520S-30T1G-GP For LPDDR4x only: 0D6V_S3 Power on to after 1D1V_S3
PWR_VDDQ_PG 1 2 TEST
R4024 PWR_VDDQ_PG 1 R4030 2
0R0402-PAD-1-GP 1 2 PWR_VCORE_VR_EN 0R0402-PAD-1-GP PM_SLP_S4_N 1 2 PWR_VDDQ_EN
R4025
0R0402-PAD-1-GP PM_SLP_S4_N 1 2 PWR_VTT_EN
R4028
0R0402-PAD-1-GP
Wistron Corporation
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
R4027 C4042 Taipei Hsien 221, Taiwan, R.O.C.
0R2J-L-GP
DYSCD1U16V2KX-L-GP
1
C4032 Title
2
DY SCD1U16V2KX-L-GP
Sequence (Power Plane Enabl
2
For PWR_VDDQ_EN RC delay Size

A2
Document Number Rev
Layout Note:Place Close to PU5101 V550_TGL -1

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
Sequence (RSVD) (DS3/S0ix)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
(65W ADT: 20V, 3.25A) MB

(95W ADT: 20V, 4.75A)
TBTB_VBUS20_CONN TBTB_VBUS20_F VINT20_IN
U4201
F4201
1 2 A1 A2
B1 S1#A1 S2#A2 B2
FUSE-5A32V-15-GP D1 S1#B1 S2#B2 D2
E1 S1#D1 S2#D2 E2
069.45001.0031 S1#E1 S2#E2
2
1
C4201 C1 C2 C4202
SC1U25V2KX-2-GP G1 G2 SC10U25V3MX-GP
D D
1
2
CSD87501L-5-GP
TBTB_GATE_VBUS_C1
TBTB_GATE_VSYS_C2
075.87501.M003
1
R4201 R4202
100R1J-GP 100R1J-GP
2
73 TBTB_GATE_VBUS
73 TBTB_GATE_VSYS
C C
B B
A TEST A
Wistron Corporation
Title
INT IO (RSVD)
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
Main Battery Connector

3D3V_RTCVCC_CONN
BT+ F4301 BT+_IN1
BATT1
FUSE-10A32V-6-GP
9 11 AFTP4302 1 BT+_IN1
069.41002.0051
1 2 BT+_IN1 1 AFTP4303 1 BAT_SCL_CON
AFTP4304 1 BAT_SDA_CON
D 2 AFTP4305 1 BAT_IN_N_1 D
R4302 2 1 33R2J-2-GP BAT_SCL_CON 3
24,44 BAT_SCL_EC BAT_SDA_CON
R4303 2 1 33R2J-2-GP 4
24,44 BAT_SDA_EC BAT_IN_N_1
R4304 2 1 33R2J-2-GP 5
24 BAT_IN_N
6
7 Top side
8 AFTP4306 1 BT+
10 12 AFTP4301 1 BAT_SCL_EC
1
AFTP4307 1 BAT_SDA_EC
C4308 C4306 C4307
ACES-CON8-89-GP
SC1KP50V2KX-1GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
2
020.F1349.0008
C C
WC_PWR VINT20_IN BATT2 is for Wireless Charge. ("WC" default DY)
BATT2
WC_PWR
9 11
WC_PWR 1
C2
D2
C1
D1
B2
E1
E2
A1
B1
2
3
VBUS
VBUS
VBUS
VBUS
VBUS
VINT
VINT
VINT
VINT
4
WC_CS 5
24 WC_CS 6
B WC_CS is 7 B
U4301 Wireless 8
OVLO
NX20P5090UK-GP charge 10 12
GND
GND
GND
ACK
EN#
WC status. To
ACES-CON8-89-GP
EC.
020.F1349.0008
A2
A3
B3
C3
D3
E3
WC
R4305 1 2 WC_SW_EN_R_N
24 WC_SW_EN_N
0R0201-PAD-GP
TEST
A
Title
INT IO (ATX/ DC/ BATT Conn)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
OFFPAGE - PIC - EE
PR4459
0R0201-PAD-GP
PH on EE Side
BAT_SCL_EC 1 2 PWR_CHG_SCL
BAT_SCL_EC
24,43 BAT_SCL_EC
PR4460
0R0201-PAD-GP
BAT_SDA_EC BAT_SDA_EC 1 2 PWR_CHG_SDA

24,43 BAT_SDA_EC
PR4457
0R0201-PAD-GP
PH on EE Side PWR_CHG_IMON 1 2 PWR_CHG_IADP
PR4458
0R0201-PAD-GP
PROCHOT_CPU_N
3,24,46,73 PROCHOT_CPU_N PROCHOT_CPU_N 1 2 PWR_PROCHOT#_CPU
D PR4461 D
0R0201-PAD-GP
CHGR_PSYS_IMVP 1 2 CHGR_CHG_PSYS
CHGR_PSYS_IMVP
46 CHGR_PSYS_IMVP PR4465 PR4464
For Adapter IN
TypeC+Tradition 上上 DY
Confirm with EE
VINT20_IN NonATypeC DY 上上
PWR_AC_IN_N
24 PWR_AC_IN_N
PR4419
1 2 PWR_ADP_TOSYS_A
19V_DCBATOUT
D01R3721F-GP-U
1
1
PC4409 PC4406 PC4407 PC4408
PWR_CHG_IMON
SC10U25V5KX-L-GP
SC10U25V5KX-L-GP
SC10U25V5KX-L-GP
SC10U25V5KX-L-GP
24 PWR_CHG_IMON 2
1
PG4402 PG4403
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
1
2.2uH, EC4401 PC4402 PC4405 PC4411
DYPC4410 PC4426 PC4425 PT4401
2
DCR=14~16.5mohm,
SC10U25V5KX-L-GP
SC10U25V5KX-L-GP
ST22U25VBM-GP
SCD1U25V2KX-L-GP
SC22U25V5MX-GP
SC10U25V3MX-GP
SC22U25V5MX-GP
SC22U25V5MX-GP
2
2
Idc=10A, Isat=13A
PU4403 10.3*11.3*3mm PU4405
2 2 DY
PWR_CHG_ACP_A
PWR_CHG_ACN_A
VAP support for BQ25710 3 3
4 1 1 4
10 PL4401 10
9 PWR_CHG_PHA 1 2 9
PWR_ADP_TOSYS_A 7 7
6 8 8 6
5 IND-2D2UH-447-GP PWR_CHG_LGB 5
1
PC4414
SC330P25V1KX-GP
SCD047U25V2KX-GP
2
1
FDMS3600-02-RJK0215-COLAY-GP
1PWR_CHG_BOOTA_A 2
PC4424
PC4413 FDMS3600-02-RJK0215-COLAY-GP
075.00046.0073 DY SCD047U25V2KX-GP
2
075.00046.0073
SC330P25V1KX-GP
PWR_CHG_LGA
1
2
PWR_CHG_BOOTB_A
PWR_CHG_REGN
PWR_CHG_SNBA
PC4415
PR4438 PR4421
DY
PWR_CHG_SNBB 1
3D3R2F-GP 3D3R2F-GP
2
1
PC4420
SC2D2U10V2KX-GP
PR4408
PWR_CHG_BOOTA
2
2
0R0603-PAD-1-GP-U
C C
PWR_CHG_HGA
56R2J-4-GP
1
BT+
PR4416
DY
2
PR4407
PC4433
2
0R0603-PAD-1-GP-U
56R2J-4-GP
2
DY1
PR4415
DY
1
PU4409
2
AONR21307-GP
PWR_CHG_BAT
GAP-CLOSE-PWR-3-GP
SCD1U25V2KX-L-GP 1 S D 8 PR4402 1 2 D01R3721F-GP-U
1
1
1
PC4434 PC4431 PC4432 PWR_CHG_AGND PWR_CHG_BOOTB 2 S D 7
SC1U25V3KX-L-GP SCD047U25V2KX-GP SCD047U25V2KX-GP 3 S D 6
D 5
2
2
PG4404
1
PC4455 G
32
31
30
29
28
27
26
25
2
1
DY SCD47U25V3KX-1GP PU4401 PC4449 PG4405 PC4450
4
SC1U25V3KX-L-GP SC10U25V5KX-L-GP
SW1
HIDRV1
BTST1
LODRV1
REGN
PGND
LODRV2
BTST2
2
1
2
GAP-CLOSE-PWR-3-GP
PR4426
2
PWR_CHG_AGND PWR_CHG_AGND PWR_CHG_AGND 1R3J-L1-GP
1 2 PWR_CHG_VBUS 1 24 PWR_CHG_HGB PC4419
VBUS HIDRV2 2 1
PWR_CHG_ACN 2 23 PWR_CHG_PHB
ACN SW2
1
PWR_CHG_ACP 3 22 PWR_CHG_VSYS PG4411 1 2 GAP-CLOSE-PWR-3-GP
ACP VSYS DY PC4427 SCD1U25V2KX-L-GP
SC10U25V5KX-L-GP
DY PC4418
SC10U25V5KX-L-GP
2
PWR_CHG_ACOK 4 21 PWR_CHG_BATDRV#
PWR_CHG_VDDA PR4434 CHRG_OK BATDRV#
1 2 PWR_CHG_ENOTG# 5 20 PWR_CHG_SRP PR4404 1 2 10R2F-L1-GP PWR_CHG_SRP_R
PR4423 PWR_CHG_AGND EN_OTG SRP
1 2 10KR2F-2-GP PWR_CHG_ILIMHIZ 6 19 PWR_CHG_SRN PWR_CHG_SRN_R
PR4405 1 2 10R2F-L1-GP
ILIM_HIZ SRN
280KR2F-GP PWR_CHG_CELLBATPRES
PWR_CHG_REGN PR4422 1 2 10R3J-3-GP 7 18
VDDA CELL_BATPRESZ PWR_CHG_VDDA
PWR_CHG_IADP 8 17 PWR_CHG_COMP2
PROCHOT#
IADPT COMP2
CMPOUT
COMP1
CMPIN
PSYS
IBAT
SDA
SCL
1
33
GND
2
PR4413
1
PR4425 BQ25710RSNR-GP PR4412 33K2R2F-GP
10
11
12
13
14
15
16
1
PC4401 100KR2J-1-GP 10KR2F-2-GP
V(ILIM) PR4423
1
SC1U10V2KX-1GP
PC4412 # of CELL VCELL_PRES PR4413

2
1PWR_CHG_COMP2_A 2
2
PR4430 PC4423 PWR_CHG_COMP1 SC18P50V2JN-1-GP
1
500mA 1.2V 402K
PWR_CHG_COMPIN
137KR2F-1-GP
PWR_PROCHOT#_CPU
SC100P50V2JN-L-GP 1-CELL 1.5V 301K
1PWR_CHG_COMPOUT
1
2
1
2
1.0A 1.4V 332K
CHGR_CHG_PSYS
PR4424 2-CELL 2.5V 140K
PWR_CHG_IBAT
40K2R2F-GP
PWR_CHG_SDA
PWR_CHG_SCL
1
1.5A 1.6V 280K 3-CELL 3.5V 71.5K
PWR_CHG_AGND PWR_CHG_AGND PR4403
2
2.0A 1.8V 237K 100KR2F-L1-GP 4-CELL 4.5V 33.2K
3.0A 2.2V 174K
PWR_CHG_COMP1_A
PWR_CHG_AGND
2
1
PC4403 PC4421 PC4472
1
3.25A 2.3V 162K
SC470P50V2KX-L-GP
SC220P50V2KX-3GP
SC33P50V2JN-3GP
PR4439
Inductor R(IADP) Fsw at POR
2
PWR_CHG_REGN PWR_CHG_AGND
2
0R0402-PAD-1-GP
1.0uH 93K ohm 1200KHz
13KR2F-GP
PC4422
2
1
2
PWR_CHG_ILIMHIZ
SC100P50V2JN-L-GP
1
B PR4432 PC4429 PC4473 B
1
1
3D3V_S5
SC1500P50V2KX-2GP
SC330P50V2KX-3GP
100KR2J-4-GP
2
2
2
1
Reserve for Power test
PR4414
PR4436 PWR_CHG_AGND
9K31R2F-GP
2
PQ4404
G PWR_CHG_ACOK
PWR_CHG_AGND
PWR_AC_IN_N D 3D3V_AUX_S5 PWR_CHG_AGND
1
Reserve for PTM

S PR4433
If it hasn't more GPIO
1
Notice:ZZ.2N702.J3101
120KR2J-GP
2
PR4441 1 DY 2 10KR2F-2-GP PR4437
2N7002K-2-GP 14K3R2F-GP PC4416
2
84.2N702.J31 PR4442 1 DY 2 10KR2F-2-GP SCD1U25V2KX-L-GP
1
2nd = 84.2N702.W31
2
3rd = 84.2N702.031
PG4401 1 2 GAP-CLOSE-PWR-3-GP
0505 PWR_CHG_AGND
PWR_CHG_AGND
buyer: 7"
A A
STD
Wistron Corporation
Title
BQ25710R_Charger
A1 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
OFFPAGE-Signal OFFPAGE-GAP PR4501 PC4506

PWR_3D3V_LDO
R4502 19V_DCBATOUT PWR_DCBATOUT_3D3V

Vin Operating range : 4~24V PWR_3D3V_LDO PR4516
0R0603-PAD-1-GP-U
PWR_3D3V_BOOT 2
SCD1U25V2KX-L-GP
1 PWR_3D3V_BOOT_A 2 1 IDC : 6A
1 2 PWR_3D3V_EN
0R0402-PAD-1-GP PG4515
Vin_Max : 26V
1
0R2J-2-GP
DY 2 PWR_3D3V_VCC Cyntec. 6.8 x7.3 x 3.0mm
DCR: 14~15mOhm
OCP : 8A
PH on EE Side GAP-CLOSE-PWR-3-GP 串BT Need Change SoluMon
Hybrid/NVDC4串 Ilimt : 8A
1
1 2 Idc : 9A , Isat : 18A
PC4522
PWR_3D3V_PG PWR_DCBATOUT_3D3V SC2D2U10V3KX-L-GP PL4501
17
2
PG4516 PU4501 IND-1D5UH-23-GP-U PWR_3D3V
GAP-CLOSE-PWR-3-GP Close to PU4501
VCC
1 2 2 6 PWR_3D3V_PH 1 2
3 VIN SW#6 19
4 VIN SW#19 20
DY
1
PG4517 PC4503 PC4502 PC4513 5 VIN SW#20 PWR_3D3V_LDO PC4514
PR4515
1
VIN
SC10U25V5KX-L-GP
SC10U25V5KX-L-GP
SC22U6D3V3MX-L1-GP
D R4503 GAP-CLOSE-PWR-3-GP SCD1U25V2KX-L-GP 10 PC4509 PC4510 PC4511 PC4512 D
NC#10
SC22U6D3V3MX-L1-GP
SC22U6D3V3MX-L1-GP
SC22U6D3V3MX-L1-GP
SC22U6D3V3MX-L1-GP
1 2 PWR_5V_EN 1 2 PWR_3D3V_EN 12 15 PWR_3D3V_LDO_A 1 2
2
24 5V_EN PWR_3D3V_EN2 11 EN LDO 16
0R0402-PAD-1-GP 0R0402-PAD-1-GP
2
ENLDO NC#16
1
PH on EE Side PG4518 PR4514 PWR_3D3V_BOOT 1
1
PWR_3D3V_PG BOOT
1MR2J-1-GP
GAP-CLOSE-PWR-3-GP 9 7 PC4507
1 2 PWR_3D3V_FB 13 PGOOD GND 8 SC10U6D3V3MX-L-GP
PWR_5V_PG 14 FB GND 18
2
VOUT GND 21
2
GND
TPS51393PRJER-GP
3D3V_AUX_S5 PWR_3D3V
Place another side , make GND plan bigger PWR_3D3V_PH
PG4519
TPS51393 JW5068B
GAP-CLOSE-PWR-3-GP PR4515 上上 DY
1
2 1 PWR_DCBATOUT_3D3V
EN rating :5 .5V
ENLDO Rising Threshold :1.5V PR4516 DY 上上
DY PR4517
1
PG4520 ENLDO Falling Threshold : 0.8V 2D2R6J-3-GP
GAP-CLOSE-PWR-3-GP EN Rising Threshold :1.3V Close to PC4511
2
2 1 PR4512
EN Falling Threshold : 1.12V 300KR2J-GP Trace used 10 mil PG4530 PWR_3D3V_SNB
2
PG4521 GAP-CLOSE-PWR-3-GP
1
GAP-CLOSE-PWR-3-GP PWR_3D3V_VOUT 1 2 PC4527
2 1
DY SC1500P50V2KX-2GP
2
PR4506
1
PC4526
PG4522 1 2 PWR_3D3V_FB2 1 2
GAP-CLOSE-PWR-3-GP PR4513
2 1 100KR2J-1-GP SC470P50V2KX-L-GP 240KR2F-L-GP
2
PG4523
GAP-CLOSE-PWR-3-GP DY PR4505
2 1 100KR2J-1-GP
1 2
3D3V_AUX_S5
PG4524
C GAP-CLOSE-PWR-3-GP C
2 1
Vin Operating range : 4~24V

Vin_Max : 26V 5V_AUX_S5
19V_DCBATOUT PWR_DCBATOUT_5V
PG4552 Ilimt : 8A Place another side , make GND plan bigger
GAP-CLOSE-PWR-3-GP
1
1 2
PR4552
PG4553 100KR2J-1-GP
GAP-CLOSE-PWR-3-GP
1 2
串BT Need Change SoluMon
Hybrid/NVDC4串 DY
2
PG4555 PWR_DCBATOUT_5V
GAP-CLOSE-PWR-3-GP PU4551
1
PG4557
2
Close to PU4551 2
VIN
PGOOD
9 PWR_5V_PG
Cyntec. 6.8 x7.3 x 3.0mm
IDC:8A
GAP-CLOSE-PWR-3-GP 3 1 PWR_5V_BOOT 1 2PWR_5V_BOOT_A 1 2 DCR: 14~15mOhm
1
1 2 PC4555 PC4554 PC4564 VIN BOOT PR4554 Idc : 9A , Isat : 18A

1
SC10U25V5KX-L-GP
SC10U25V5KX-L-GP
SCD1U25V2KX-L-GP 4 0R0603-PAD-1-GP-U PC4553

PG4559 VIN SCD1U25V2KX-L-GP
2
5 PL4551 PWR_5V
GAP-CLOSE-PWR-3-GP
2
1 2 VIN
6 PWR_5V_PH 1 2
PG4561 SW#6
GAP-CLOSE-PWR-3-GP 10 19
1 2 NC#10 SW#19 IND-1D5UH-23-GP-U
B 20 B
DY
1
16 SW#20 PC4556 PC4557 PC4558 PC4559 PC4560 PC4561
NC#16 Trace used 10 mil PG4562
5V_S5 PWR_5V GAP-CLOSE-PWR-3-GP
2
PG4551 14 PWR_5V_VOUT 1 2
GAP-CLOSE-PWR-3-GP PWR_5V_VCC 17 VOUT PC4563 PR4555
2 1 VCC SC1KP50V2KX-L-1-GP 324KR2F-GP
13 PWR_5V_FB 1 2PWR_5V_FB_A 1 2 SC22U6D3V3MX-L1-GP
PG4554 FB SC22U6D3V3MX-L1-GP
GAP-CLOSE-PWR-3-GP PWR_5V_EN 12 PWR_5V_LDO SC22U6D3V3MX-L1-GP
2 1 EN SC22U6D3V3MX-L1-GP
1
PC4562 PWR_5V_EN2 11 15 PWR_5V_LDO SC22U6D3V3MX-L1-GP

PG4556 SC2D2U10V3KX-L-GP ENLDO LDO SC22U6D3V3MX-L1-GP
1
GAP-CLOSE-PWR-3-GP PWR_5V_PH
2
2 1 PR4556
GND
GND
GND
GND
1MR2J-1-GP
1
PG4558
1
GAP-CLOSE-PWR-3-GP TPS51395PRJER-GP
2
18
21
2 1 PC4551
SC10U6D3V3MX-L-GP
DY PR4557
2D2R6J-3-GP
2
PG4560 EN rating :5 .5V
2
GAP-CLOSE-PWR-3-GP PWR_DCBATOUT_5V
2 1 ENLDO Rising Threshold :1.5V
ENLDO Falling Threshold : 0.8V PWR_5V_SNB
1
PG4563 EN Rising Threshold :1.3V
1
GAP-CLOSE-PWR-3-GP PC4566
2 1 EN Falling Threshold : 1.12V PR4511 DY SC1500P50V2KX-2GP
300KR2J-GP
2
PG4564
2
GAP-CLOSE-PWR-3-GP
2 1
PG4566
1
GAP-CLOSE-PWR-3-GP
2 1
PR4510
100KR2J-1-GP
2
A 5V_AUX_S5 PWR_5V_LDO A
PG4565
GAP-CLOSE-PWR-3-GP
2 1 PWR_5V_LDO
STD
Wistron Corporation
Title
TPS51393/TPS51395R_5V/3D3V
A2 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
OFFPAGE Reserve for Power test

3D3V_S0
1
PR4607
PH on CPU side PROCHOT_CPU_N DY 10KR2F-L1-GP ICL TGL
3,24,44,73 PROCHOT_CPU_N
VBOOT=1.8V VBOOT=0V
Fsw=568kHz@VIN=7.4V Fsw=568kHz@VIN=7.4V
2
PWR_VCORE_VR_READY ICCMAX=72A ICCMAX=66A
SVID_CLK_CPU Disable QR Disable QR
7 SVID_CLK_CPU
Disable DVID LIFT Disable DVID LIFT
PWR_VCORE_VCCST
PR4688
SVID_DATA_CPU 0R0402-PAD-1-GP
7 SVID_DATA_CPU
1
CHGR_PSYS_IMVP 1 2 PWR_VCORE_PSYS PR4613 PU4601
19V_DCBATOUT
DY1KR2F-3-GP 5V_S5 PR4605
PR4689 2D2R3F-L-GP
SVID_ALERT_CPU_N PR4604
100R2F-L3-GP
2
7 SVID_ALERT_CPU_N PROCHOT_CPU_N 1 2 PWR_VCORE_VRHOT 1 2 PWR_VCORE_VCC 24 8 PWR_VCORE_VIN 2 1
VCC VIN
1
6D2R5F-GP PC4602 PC4605
SC10U6D3V3MX-L-GP SCD22U25V3KX-GP
1 2
2
PWR_VCORE_VR_EN
D 40 PWR_VCORE_VR_EN 9 PWR_VCORE_VR_EN D
VRON
VCORE_PG ICL TGL

PH on CPU side IccMax=72A IccMax=66A PWR_VCORE_VRHOT 16
1 2 PWR_VCORE_VR_READY VR_HOT#
40 VCORE_READY R4601 12
0R0402-PAD-1-GP PR4619 3.57K 1.4K PWR_VCORE_VREF PWM1 PWR_VCORE_PWM1 47
PR4615
PWR_VCORE_VREF_A 1 2 PWR_VCORE_VREF 26
PR4666 357 0 VREF06 13
PWM2 PWR_VCORE_PWM2 47
VSSCORE_SENSE
1
PC4606 3D9R2F-GP
VSSCORE_SENSE PR4624 3.48K 1.02K SCD47U25V3KX-1GP 電電3高電電4高
7 VSSCORE_SENSE 11
0.9mohm 0.66mohm
2
PWM3
1
PR4620 PR4621 PR4622
PR4669 100 100 PR4619 PR4628 2K 2K
17K8R2F-GP
1K21R2F-2-GP
9K09R2F-GP
1K4R2F-1-GP PR4633
14
VCCCORE_SENSE NC#14
PR4655 2K 2K
2
7 VCCCORE_SENSE 15
47 PWR_VCORE_DRVEN DRVEN PR4646
VCCCORE_SENSE TGL_28W測測測測 VBOOT = 1.8V PWR_VCORE_SET1_A 0603 Size
PR4662 2.61K 4.64K
2
PR4666 = 2.74kohm PR4670
PR4663
PR4624 = 3.24kohm PWR_VCORE_SET2_A PWR_VCORE_SET3_A
DY 100KR2F-L1-GP PR4628 PR4655
2KR3F-L-GP 2KR3F-L-GP
CHGR_PSYS_IMVP 4 PWR_VCORE_ISEN1P 1 2 PWR_VCORE_ISEN1P_B 1 2
TGL_15W測測測測VBOOT = 1.8V
1
44 CHGR_PSYS_IMVP ISEN1P PWR_VCORE_ISEN1P_A 47
PR4660 PR4661
47 PWR_VCORE_TSEN
1
PR4619 = 1.4 kohm PR4662
1
100R2F-L1-GP-U
100R2F-L1-GP-U
PR4666 2K61R2F-1-GP PC4601
PR4666 = 3.92 kohm 47 PWR_VCORE_TSEN_A
PR4629
SCD1U25V2KX-L-GP
0R0402-PAD-1-GP
PR4624 = 2.87 kohm
2
PWR_VCORE_TSEN_A PWR_VCORE_TSEN 7 3 PWR_VCORE_ISEN1N 1 2 PC4608
EE side Link
2
TSEN ISEN1N PWR_VCORE_ISEN1N_A 47
PR4669 = 10 ohm SCD1U25V2KX-L-GP
SVID Pull High V 680R2F-GP
1 2
ICCMAX = 72A PWR_VCORE_SET1 22 PR4633 PR4646
PWR_VCORE_SET2 SET1
PWR_VCORE_VCCST Lily 21
SET2
2KR3F-L-GP 2KR3F-L-GP
1D05V_VCCST PWR_VCORE_SET3 20 1 PWR_VCORE_ISEN2P 1 2 PWR_VCORE_ISEN2P_B 1 2
PG4601 VR_HOT SET3 ISEN2P PWR_VCORE_ISEN2P_A 47
Thermal_Alert# 100C/97C 120C/100C
1
1
1 2 PR4625 PR4626 2K61R2F-1-GP
PR4624 PR4627 PC4610
PR4635 0603 Size
8K25R2F-1-GP
1K18R2F-GP
1K02R2F-1-GP 36K5R2F-GP SCD1U25V2KX-L-GP
PR4627 24.9K 36.5K
2
2 PWR_VCORE_ISEN2N 1 2 PC4611
2
ISEN2N PWR_VCORE_ISEN2N_A 47
SCD1U25V2KX-L-GP
2
1 2
PR4622 12.4K 17.8K 680R2F-GP
PWR_VCORE_SET1_B PWR_VCORE_TSEN_A_A 5V_S5
PR4701 110K 3.48K PWR_VCORE_SET2_B PWR_VCORE_SET3_B 5

ISEN3P
1
PR4673
10KR2F-L1-GP
1
PR4669 PR4668 PR4667
PR4659
2
100R2F-L1-GP-U
100R2F-L1-GP-U
PWR_VCORE_ISEN3
10R2F-L-GP
C 200R2F-L-GP 6 C
ISEN3N
PWR_VCORE_VCCST
2
5V_S5
1
32
PR4631 NC#32 PR4656
1
100R2F-L3-GP
PR4632 10KR2F-L1-GP
DY
1
PR4630 45D3R2F-L-GP PC4609
75R2F-2-GP SCD1U16V2KX-L-GP
DY
2
2
PR4634 31 PWR_VCORE_ANS_EN
2
0R0402-PAD-1-GP ANS_EN
2
SVID_CLK_CPU 1 2 PWR_VCORE_CLK 19
VCLK
1
PR4658
PR4636 10KR2F-L1-GP
0R0402-PAD-1-GP
SVID_DATA_CPU 1 2 PWR_VCORE_DATA 18
VDIO
電電3高 ICL TGL
2
PR4674
0R0402-PAD-1-GP 0.9mohm
SVID_ALERT_CPU_N 1 2 PWR_VCORE_ALERT# 17 IccMax=72A IccMax=66A
ALERT#
LL/IMON Compesation PR4640 31.6K 34K

NCP15XH103F03RC
28 PWR_VCORE_VSEN
Need confirm with RT If you change Chock VSEN PC4612 PC4613
PWR_VCORE_VR_READY 10 SC100P50V2JN-L-GP SC220P50V2KX-3GP
VR_READY 29 PWR_VCORE_COMP 1 2 1 2
Close to PL4701 COMP
PR4639 DY PR4640
NTC-100K-12-GP-U PC4624 1 2 34KR2F-GP
PWR_VCORE_NTC1N 1 2 SCD1U25V2KX-L-GP 1 2 1 2
PR4641 PR4671
PR4637 30 PWR_VCORE_FB 10KR2F-2-GP 0R0402-PAD-1-GP
B = 4250 10KR2F-L1-GP FB 1 2 VCCCORE_SENSE
1 2 PWR_VCORE_PSYS 23
DY PSYS
1
27 PWR_VCORE_RGND 1 2 VSSCORE_SENSE
PR4665 RGND PR4672
2K05R2F-GP 0R0402-PAD-1-GP
PWR_VCORE_VREF
2
PR4677 PR4643 PR4601

0R0402-PAD-1-GP 18K7R2F-GP 28KR2F-GP
1 2 PWR_VCORE_NTC1N_A 1 2 PWR_VCORE_NTC1P 1 2 PWR_VCORE_IMON 25 33
IMON GND
電電3高 ICL TGL

B 0.9mohm RT3613EEGQW-1-GP B
IccMax=72A IccMax=66A
PR4601 26.7K 30.1K
PR4665 2.87K 2.05K
PR4643 17.8K 18.7K
A A
C550
Wistron Corporation
Title
POWER (RT3612EB_VCORE(1/2))
A1 V550_TGL
5 4 3 2 1
5 4 3 2 1
OFFPAGE
PR4701
PWR_DCBATOUT_VCOREA 1 2
19V_DCBATOUT PWR_DCBATOUT_VCOREA 3K48R2F-GP
PG4702 PR4703
1
GAP-CLOSE-PWR-3-GP PC4704 PC4705 PC4706 PC4707 NTC-100K-12-GP-U
1 2 1 2
46 PWR_VCORE_TSEN_A PWR_VCORE_TSEN 46
SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP
2
2
B = 4250
PG4703
GAP-CLOSE-PWR-3-GP Close to Phase1 Mosfet
1 2
D D
PWR_DCBATOUT_VCOREA
PG4704
GAP-CLOSE-PWR-3-GP
1 2
5V_S5
PG4705
GAP-CLOSE-PWR-3-GP
1 2
PR4702
PG4706 2D2R2F-GP
GAP-CLOSE-PWR-3-GP 2 1 PWR_VCORE_VCCA
1 2
1
PC4731 PC4702
PG4707 SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP
GAP-CLOSE-PWR-3-GP
2
1 2
Design Current=39A
29
10
11
33
Icc(max)=70A
8
9
PU4701
VCC
PVCC
VIN
VIN
VIN
VIN
VIN
OCP>93A
1
PT4703 PC4703 PR4706 Cyntec. 6.8*7.6*2.4

ST22U25VBM-GP PR4707 31 5 PWR_VCORE_BOOTA SCD22U25V3KX-GP 2D2R3-1-U-GP PL4701 1V_CPU_CORE
DCR: 0.92 +A 7% mOhm
2
0R0402-PAD-1-GP NC#31 BOOT 7 PWR_VCORE_BOOTA_B 1 2 PWR_VCORE_BOOTA_A 2 1 COIL-D15UH-8-GP

1 2 PWR_VCORE_PWMA 1 PHASE Idc : 37A , Isat : 41A
46 PWR_VCORE_PWM1 PWM 16 PWR_VCORE_PHA 1 2
1 2 PWR_VCORE_ZCD_EN#A 2 VSWH#16 17
46,47 PWR_VCORE_DRVEN FCCM VSWH#17 18
PR4708
0R0402-PAD-1-GP 30 VSWH#18 19
2
19V_DCBATOUT PWR_DCBATOUT_VCOREB NC#30 VSWH#19 20
PG4710 VSWH#20 21 PG4708 PG4709
GAP-CLOSE-PWR-3-GP 6 VSWH#21 22 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1 2 NC#6 VSWH#22 23
1
VSWH#23 24 PT4701
27 VSWH#24 25 ST470U2D5VDM-14-GP
PG4711 35 GL#27 VSWH#25 26
2
GAP-CLOSE-PWR-3-GP GL#35 VSWH#26
PGND
PGND
PGND
PGND
PGND
PGND
PGND
NC#4
C 1 2 C
PG4712 AOZ5516QI-GP
4
32
12
13
14
15
28
34
GAP-CLOSE-PWR-3-GP 46 PWR_VCORE_ISEN1P_A
1 2 PWR_VCORE_PHA
46 PWR_VCORE_ISEN1N_A
1
PG4713
1 2 DY 2D2R5J-1-GP
2
PG4714
GAP-CLOSE-PWR-3-GP PWR_VCORE_SNBA
1 2
1
PG4715 DYPC4701
SC1KP50V2KX-L-1-GP
GAP-CLOSE-PWR-3-GP
2
1 2
PWR_DCBATOUT_VCOREB
1
PC4710 PC4711 PC4712 PC4713 PWR_DCBATOUT_VCOREB

SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP
2
5V_S5
B B
PR4710
2D2R2F-GP
2 1 PWR_VCORE_VCCB
1
PC4734 PC4708
SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP
2
29
10
11
33
3
8
9
PU4702 Cyntec. 6.8*7.6*2.4

VCC
PVCC
VIN
VIN
VIN
VIN
VIN
DCR: 0.92 +A 7% mOhm

PC4709 PR4711 Idc : 37A , Isat : 41A
PR4712 31 5 PWR_VCORE_BOOTB SCD22U25V3KX-GP 2D2R3-1-U-GP PL4702 1V_CPU_CORE
0R0402-PAD-1-GP NC#31 BOOT 7 PWR_VCORE_BOOTB_B
1 2PWR_VCORE_BOOTB_A 2 1 COIL-D15UH-8-GP
1 2 PWR_VCORE_PWMB 1 PHASE
46 PWR_VCORE_PWM2 PWM 16 PWR_VCORE_PHB 1 2
1 2 PWR_VCORE_ZCD_EN#B 2 VSWH#16 17
46,47 PWR_VCORE_DRVEN FCCM VSWH#17 18
PR4713
0R0402-PAD-1-GP 30 VSWH#18 19
2
NC#30 VSWH#19 20
VSWH#20 21 PG4701 PG4716
6 VSWH#21 22 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
NC#6 VSWH#22 23
1
VSWH#23 24
27 VSWH#24 25
35 GL#27 VSWH#25 26
GL#35 VSWH#26
PGND
PGND
PGND
PGND
PGND
PGND
PGND
NC#4
46 PWR_VCORE_ISEN2P_A
AOZ5516QI-GP PWR_VCORE_PHB
4
32
12
13
14
15
28
34
46 PWR_VCORE_ISEN2N_A
1
PR4714
A DY 2D2R5J-1-GP A
2
PWR_VCORE_SNBB
C550
1
DYPC4714
SC1KP50V2KX-L-1-GP
Wistron Corporation
2

Title
POWER (AOE6936_VCORE(2/2))
A2 V550_TGL
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
Power (VCCIN_AUX_CPUCORE(3/3))
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
Power (RSVD)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
OFFPAGE 1D8V_VCCIN_AUX
OFFPAGE_GAP
1
PR5034
0R0402-PAD-1-GP
VCCAUX_VID1 PR5017
19V_DCBATOUT PWR_DCBATOUT_VCCAUX 1 2 PWR_VCCAUX_VID1 100R2F-L1-GP-U
1 2 PWR_VCCAUX_EN
40,45 1D8V_S5_PWRGD
R5001 PG5001
2
0R402-DB-GP-U GAP-CLOSE-PWR-3-GP PR5035
1 2 0R0402-PAD-1-GP
VCCAUX_VID0 1 2 PWR_VCCAUX_VID0
VCCAUX_SENSE
PG5002
GAP-CLOSE-PWR-3-GP
1 2 VSSAUX_SENSE
PH on EE Side
1
1 2 PWR_VCCAUX_PG PG5003 PWR_DCBATOUT_VCCAUX
17 VCCIN_AUX_PWRGD PR5018
R5002 GAP-CLOSE-PWR-3-GP 100R2F-L1-GP-U
0R402-DB-GP-U 1 2
PU5003
2
2
PG5004 3
PH on CPU side GAP-CLOSE-PWR-3-GP 1 4
1
1 2 PC5003 10
DYPC5006 PC5007 PC5008
SC10U25V5KX-L-GP
SC10U25V5KX-L-GP
SC22U25V5MX-GP
D PR5007 SCD1U25V2KX-L-GP 9 D
1 2 VCCAUX_VID1 2D2R3J-2-GP 7
330uF*1
2
22,40 VCCIN_AUX_VID1 PWR_VCCAUX_BOOT 1 2PWR_VCCAUX_BOOTA 1 2 8 6
R5003
0R402-DB-GP-U PR5033 5
1 2 VCCAUX_VID0
1R3J-L1-GP
1 2
22uF*9pcs
22,40 VCCIN_AUX_VID0
R5004 OCP : 40A PWR_DCBATOUT_VCCAUX
OCP = 40A
10
0R402-DB-GP-U PR5004 PU5001 PC5004 FDMS3600-02-RJK0215-COLAY-GP
215KR2F-GP SCD1U25V2KX-GP Iccmax= 26A
BOOT
5V_S5
1 2PWR_VCCAUX_CS_DIS 1
CS_DIS VSYS
20 PWR_VCCAUX_VSYS 1 2
075.00046.0073 TDC=10A
PR5001
VCCAUX_SENSE 5D1R2J-1-GP PC5001 11 PWR_VCCAUX_HG PL5001 1D8V_VCCIN_AUX
1 2 PWR_VCCAUX_PVCC 15 UG COIL-D15UH-8-GP
VCCAUX_SENSE PVCC
SC1U10V2KX-L1-GP
PR5002
1
22 VCCAUX_SENSE 0R0402-PAD-1-GP 12 PWR_VCCAUX_PH 1 2
3D3V_S5 1 2 PWR_VCCAUX_VCC 16 PH
PR5003 VCC
Cyntec. 6.8*7.6*2.4
2
100KR2F-L1-GP 13 PWR_VCCAUX_LG
VSSAUX_SENSE DY 2 1 PWR_VCCAUX_PG 4 LG DCR: 0.92 +A 7% mOhm
22 VSSAUX_SENSE PG Idc : 37A , Isat : 41A
1
PC5002 14 PT5001
PWR_VCCAUX_EN 19 PGND ST470U2D5VDM-14-GP
VSSAUX_SENSE EN PR5008
SC1U10V2KX-L1-GP
2
1
2 PWR_VCCAUX_ISENSEP 1 2
ISENSEP 0R0402-PAD-1-GP
DY PWR_VCCAUX_VID1 17
PANASONIC
ESR: 9 mohm
2
VID1 3 PWR_VCCAUX_ISENSEN
ISENSEN PR5012
PWR_VCCAUX_VID0 18 0R0603-PAD-1-GP-U
VID0 8 PWR_VCCAUX_VOUT 1 2 PWR_VCCAUX_VOUTA
VOUT PC5010 PR5013 PC5011 PR5014
SC2K2P50V2KX-L-GP 10KR2F-2-GP SC470P50V2KX-3GP 3K4R2F-GP
PR5005 5 PWR_VCCAUX_COMP1 2 PWR_VCCAUX_COMPA
1 2 1 2PWR_VCCAUX_COMPB
1 2
100KR2F-L1-GP COMP DY DY
2 1 PWR_VCCAUX_FSWEL 9
FSWSEL 6 PC5012 PR5015
FB SC33P50V2JN-3GP 6K34R2F-GP
DY
1
1 2 1 2
DY
AGND
PR5006 7
RGND
100KR2F-L1-GP
PWR_VCCAUX_FB
HI = 800KHz RT6543AGQW-GP
21
Flot = 600KHz
1
PR5016
Low = 400KHz 0R0402-PAD-1-GP
VSSAUX_SENSE
2
VCCAUX_SENSE
PC5013
1
SC100P50V2JN-L-GP PWR_VCCAUX_PH
DY
2
C C
DY
1
PR5019
2D2R6J-3-GP
2
PWR_VCCAUX_SNB
DY
1
PC5014
SC1KP50V2KX-L-1-GP
2
B B
A A
STD
Wistron Corporation
Title
RT6543_VCCAUX
A1 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
OFFPAGE_GAP
OFFPAGE
19V_DCBATOUT PWR_DCBATOUT_VDDQ
PG5119 PWR_DCBATOUT_VDDQ
S5 GAP-CLOSE-PWR-3-GP
PWR_VDDQ_EN 1 2
40 PWR_VDDQ_EN
1
PG5123 EC5102 PC5101 PC5102 PC5117
SCD1U25V2KX-L-GP
GAP-CLOSE-PWR-3-GP SC10U25V5KX-L-GP SC10U25V5KX-L-GP SCD1U25V2KX-L-GP
1 2
S3(VTT_CNTL)
2
PWR_VDDQ_BOOT_A
D 1 2 PWR_VDDQVTT_EN PG5127 D
40 PWR_VTT_EN R5102 GAP-CLOSE-PWR-3-GP
1
0R402-DB-GP-U 1 2
1
PWR_VDDQ_VLDOIN PR5109 PC5108
5D1R3J-GP
Cyntec. 6.6 x 7.3 x 3.0 mm
SCD1U25V2KX-L-GP
DCR: 4.8~5.3 mOhm
2
Idc : 16 A , Isat : 17 A
PWR_VDDQ_BOOT 2
1
PC5103
SC10U6D3V3MX-L-GP PL5101 PWR_VDDQ
2
1 2
PH on EE Side 5V_S5 PR5110 PC5109 PC5110 PC5111 PC5112 PC5115
1
SC22U6D3V3MX-L1-GP
SC22U6D3V3MX-L1-GP
SC22U6D3V3MX-L1-GP
SC22U6D3V3MX-L1-GP
SC22U6D3V3MX-L1-GP
0R0402-PAD-1-GP
1
1D1V_S3 PWR_VDDQ 1 2 PWR_VDDQ_VCC PU5101 COIL-D68UH-9-GP
PWR_VDDQ_PG DY
PG5131 PR5106
2
1
40 PWR_VDDQ_PG GAP-CLOSE-PWR-3-GP PC5116 7 18 2D2R3J-2-GP
2 1 PR5107 SC1U10V2KX-L1-GP PVIN BST 17 PWR_VDDQ_PH DY
0R0402-PAD-1-GP 1 SW 5 PWR_VDDQ_SENSE
2
1 2 VLDOIN VDD2SNS
PG5132 13 2
1
GAP-CLOSE-PWR-3-GP VCC_5V VDDQ 4 PWR_VDDQVTT_SENSE PWR_VDDQ_SNB
2 1 VDDQSNS 6 PWR_VDDQ_VDDQREF PG5133
1
PWR_VDDQ_VDD1 14 VDDQREF PC5114
PIN_VDD1 GAP-CLOSE-PWR-3-GP
15 PWR_VDDQ1D8V_PH
DY SC1500P50V2KX-2GP
2
1
1
PG5121 PC5104 8 SW_VDD1 12 PWR_VDDQ1D8V_SENSE
2
GAP-CLOSE-PWR-3-GP SC10U6D3V3MX-L-GP PC5118 PG VDD1SNS
2 1 SCD1U16V2KX-L-GP 16
2
11 PGND_VDD1 9 PWR_VDDQVTT
PWR_VDDQ_PG 10 VDDEN PGND 3
PG5120 VDDQEN AGND
GAP-CLOSE-PWR-3-GP PWR_VDDQ_EN
1
2 1 TPS51487XRJER-GP PC5107
PC5118 put as close as TPS51487 pin14 PWR_VDDQVTT_EN PR5104 SC10U6D3V3MX-L-GP
0R0402-PAD-1-GP
2
PG5125 1 2
GAP-CLOSE-PWR-3-GP
1
2 1 PC5106
SC1U10V2KX-L1-GP
Murata. 2.5 x 2.0 x 1.2 mm
DCR:240m Ohm
2
PG5122 PWR_VDDQ1D8V
PL5103 Idc : 1.3 A , Isat : 1.5 A
GAP-CLOSE-PWR-3-GP
C 2 1 1 2 C
PC5105
1
SC22U6D3V3MX-L1-GP
PG5129 IND-4D7UH-352-GP
2
2 1 1 2
0R0402-PAD-1-GP
PG5130
GAP-CLOSE-PWR-3-GP
2 1
1D1V_S3 PWR_VDDQ_VLDOIN
PG5124
GAP-CLOSE-PWR-3-GP
1 2
0D6V_S3 PWR_VDDQVTT
1 2 1 2
R5103
0R402-DB-GP-U PG5128
GAP-CLOSE-PWR-3-GP
1D8V_S3 PWR_VDDQ1D8V
B PG5126 B
2 1
GAP-CLOSE-PWR-3-GP
A A
STD
Wistron Corporation
Title
TPS51487_VDDQ/VTT/VPP
A2 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
RSVD
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
OFFPAGE OFFPAGE_GAP
TDC=2A
Imax= 3A
3D3V_S5 PW R_1D8V_VIN
TOKO. 2.5mm×2.0mmX1.2mm PW R_1D8V
PH on EE Side DCR: 59m Ohm
PG5301 PU5301 Idc : 3 A , Isat : 3A
D 1 2PW R_1D8V_PG GAP-CLOSE-PW R-3-GP D
40,50 1D8V_S5_PW RGD R5301 1 2 PW R_1D8V_VIN 9 PL5301
0R402-DB-GP-U PGND IND-1UH-382-GP
PG5302 4 5
GAP-CLOSE-PW R-3-GP PW R_1D8V_VIN 3 PGND NC#5 6 PW R_1D8V_PH 1 2
1 2 PW R_1D8V_PG 2 VIN LX 7 PW R_1D8V_EN
PG EN
1
1 8 PC5302 PC5303
FB SGND
1
3D3V_S5 PR5303 DY
SC22U6D3V3MX-L1-GP
SC22U6D3V3MX-L1-GP
PC5301 100KR2F-L1-GP
SC22U6D3V3MX-L1-GP RT5797ALGQW -GP PC5305
2
1
SC22P50V2JN-L-GP
1 2 PW R_1D8V_EN 1D8V_S5 PW R_1D8V PR5305
40 1D8V_S5_EN
2
R5302 PG5303 DY
0R402-DB-GP-U GAP-CLOSE-PW R-3-GP 100KR2F-L1-GP PW R_1D8V_FB
2 1
1
2
PG5304 PR5304
GAP-CLOSE-PW R-3-GP 49K9R2F-L-GP
2 1
2
PG5305 PW R_1D8V_EN
GAP-CLOSE-PW R-3-GP
2 1
DY
1
PC5307
SC1U10V2KX-L1-GP
2
C C
B B
A STD A
Wistron Corporation
Title
RT5797_1D8V
A3 V550_TGL -1
5 4 3 2 1
5 4 3 2 1
OFFPAGE OFFPAGE_GAP
TDC=0.7A
PR5402 PC5402
Imax= 2.25A
2D2R5J-1-GP SCD1U25V2KX-L-GP
19V_DCBATOUT PW R_SMP_VIN 2 1 PW R_SMP_BOOT_A1 2 PW R_SMP_PH
D PG5402 PW R_SMP D
R5402 GAP-CLOSE-PW R-3-GP
1 2 PW R_SMP_EN 1 2
17,24,40,57 PM_SLP_S3_N
0R0402-PAD-1-GP
PG5403 PW R_SMP_VIN PU5401
GAP-CLOSE-PW R-3-GP PL5401
1 2 PW R_SMP_BOOT 6 1
PW R_SMP_EN 5 BOOT GND 2 PW R_SMP_PH 1 2
PC5401 PW R_SMP_FB 4 EN SW 3 PW R_SMP_VIN COIL-22UH-24-GP
FB VIN
1
PC5403 PC5405
1
SC10U25V5KX-L-GP
PR5403
SC10U25V5KX-L-GP
SC10U25V5KX-L-GP
8V_AMP PW R_SMP TPS54302DDCR-GP 100KR2F-L1-GP
2
PG5401 PC5404
2
SC100P50V2JN-L-GP
GAP-CLOSE-PW R-3-GP
2
2 1
PW R_SMP_EN PW R_SMP_FB
PG5404
1
GAP-CLOSE-PW R-3-GP
2 1
1
PC5406 PR5401
PG5405 SC1U10V2KX-L1-GP DY 6K34R2F-GP
GAP-CLOSE-PW R-3-GP
2
2 1
C C
B B
A C550 A
Wistron Corporation
Title
POWER TPS54302D
A3 V550_TGL
5 4 3 2 1
5 4 3 2 1
4 eDP_AUX_CPU_P
3D3V_LCD_S0 Layout 40 mil.
4
4
eDP_AUX_CPU_N
eDP_TX_CPU_N3
EDP 3D3V_LCD_S0 19V_DCBATOUT_LCD
4 eDP_TX_CPU_P3
4 eDP_TX_CPU_N2
4 eDP_TX_CPU_P2
LCD1
4 eDP_TX_CPU_N1
INVERTER POWER 42
4 eDP_TX_CPU_P1 Discharge circuit 40
4 eDP_TX_CPU_N0 (500mA, Peak 1.5A) 39
D 19V_DCBATOUT D
3D3V_S5 3D3V_LCD_S0 38
19V_DCBATOUT_LCD 37
4 eDP_TX_CPU_P0
F5501 36
FUSE-3A32V-29-GP 35
1
1 2 34
1
R5525 33 LCD_BRIGHTNESS
4 eDP_HPD_CPU 10KR2F-2-GP 32 LCD_BLEN_CON
69.43001.491 R5526 31
1
C5501 C5502 C5523 10R3J-3-GP 30
Q5502
2
29
4,55 eDP_BLCTRL_CPU
2
SC1U25V2KX-2-GP
SC1U25V2KX-2-GP
SCD1U25V2KX-L-GP
DISC_3D3V_LCD_ON G 28
2
DISC_3D3V_LCD 27 eDP_HPD_CON R5510 1 2 0R0201-PAD-GP eDP_HPD_CPU
Q5501 D 26
24 LCD_BLEN_CON 3 25
1 R1 S 24
4,40 eDP_VDDEN_CPU
2 Notice:ZZ.2N702.J3101
23
R2 22
2N7002K-2-GP 21
LTC024EUB-FS8-GP 84.2N702.J31 20
84.00024.A1K 19
18
17
16 eDP_AUX_CON_N C5507 1 2 SCD1U16V2KX-3GP eDP_AUX_CPU_N
15 eDP_AUX_CON_P C5509 1 2 SCD1U16V2KX-3GP eDP_AUX_CPU_P
14
13 eDP_TX_CON_P0 C5506 1 2 SCD1U16V2KX-3GP eDP_TX_CPU_P0
3D3V_S0 12 eDP_TX_CON_N0 C5505 1 2 SCD1U16V2KX-3GP eDP_TX_CPU_N0
11
9 eDP_TX_CON_N1 C5503 1 2 SCD1U16V2KX-3GP eDP_TX_CPU_N1
1
8
DY 3D3V_LCD_S0 7 eDP_TX_CON_P2 C5521 1 2 SCD1U16V2KX-3GP eDP_TX_CPU_P2
R5523 6 eDP_TX_CON_N2 C5522 1 2 SCD1U16V2KX-3GP eDP_TX_CPU_N2
1KR2J-1-GP 5
2
R5524 R5527 1 2 10KR2F-2-GP LCD_BLEN_CON 3 eDP_TX_CON_N3 C5520 1 2 SCD1U16V2KX-3GP eDP_TX_CPU_N3

33R2J-2-GP DY 2
C 1 2 LCD_BRIGHTNESS C
4,55 eDP_BLCTRL_CPU 1
R5528 1 2 100KR1J-GP LCD_BLEN_CON
DY 41
1
C5518 R5502 1 2 100KR1J-GP eDP_HPD_CPU ACES-CON40-18-GP

SC100P50V2JN-L-GP
2
R5505 1 DY 2 100KR1J-GP eDP_BLCTRL_CPU
16 TOUCH_USB20_P
Touch 3D3V_TOUCH_S0
16 TOUCH_USB20_N
(300mA)
TOUCH1
3D3V_TOUCH_S0 3D3V_TOUCH_S0_FIP Max 2A 3D3V_AUX_S5 7
20 TOUCH_STOP_N U5502 1
1 2 1 5 TOUCH_STOP_N 2
R5521 2 OUT IN 3
0R402-DB-GP-U 3 GND 4 TOUCH_PWR_EN TOUCH_USB20_N 4
OC# EN TOUCH_USB20_P 5
1
C5515 C5516 6
1
SC4D7U6D3V2MX-GP-U
G517F1T12U-GP C5517 8
SCD1U16V2KX-L-GP
SC4D7U6D3V2MX-GP-U
ED5502
ED5501
24 TOUCH_PWR_EN 074.51712.009F
2
HRS-CON6-15-GP
2
B 020.K0237.0006 B
2
DY-EMC DY-EMC
AZ5725-01FDR7G-1-GP
AZ5725-01FDR7G-1-GP
1
A A
TEST
Wistron Corporation
Title
Display (LCD/Inverter)
C
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
RSVD
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
SSID = HDMI Test point

AFTP5701 1 HDMI_CLK_CON
3D3V_HDMI_S0 1D2V_HDMI_S0 AFTP5702 1 HDMI_DATA_CON
1D8V_S5 1D2V_HDMI_S0_R 1D2V_HDMI_S0 3D3V_S0 3D3V_HDMI_S0 AFTP5703 1 5V_S0_HDMI
AFTP5704 1 HDMI_DET_CON
R5722 AFTP5705 1 5V_S0
1 2 R5721
1
0R0402-PAD-1-GP 1 2
1
0R0402-PAD-1-GP C5719 C5712 C5713 C5715 C5702 C5703 C5706 C5707 C5716 C5708 C5709 C5710 C5717 C5711 C5718
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD1U10V1KX-GP
SCD01U25V1KX-GP
SCD01U25V1KX-GP
SCD01U25V1KX-GP
SCD01U25V1KX-GP
SCD01U25V1KX-GP
SC4D7U6D3V2MX-GP-U
C5704
2
SC1U10V2KX-1GP
2
U5702
4 1
1 R5725 2 HDMI_PWR_EN 3 VIN VOUT 2 5V_S0
D 17,24,40,54 PM_SLP_S3_N EN GND D
0R0201-PAD-GP
5
SGND
1
NEAR Pin24 NEAR Pin1
C5705 NEAR Pin15,18 NEAR Pin43,46 NEAR Pin6,11 NEAR Pin30
RT9078-12GQZ-GP SC1U10V2KX-1GP
3
VOUT 1.2V, 300mA
(OC > 350mA) D5701
LBAW56LT1G-1-GP
1
HDMI CONNECTOR
2
1
RN5701
1D2V_HDMI_S0 3D3V_HDMI_S0 SRN2K2J-1-GP
5V_S0 5V_S0_HDMI
1.2V, 290mA 3.3V, 17mA
F5701
3
4
U5701 SI fine tune POLYSW-1D1A6V-9-GP-U HDMI1
1 23 HDMI_DDI_TX_ALS_P2 HDMI_DDI_TX_ALS_P3 1 2 5V_S0_HDMI 18 15 HDMI_CLK_CON

VDD33 OUT_D2P +5V_POWER SCL
SC1KP50V2KX-1GP
24 22 HDMI_DDI_TX_ALS_N2 16 HDMI_DATA_CON
VDD33 OUT_D2N SDA
SC1U10V2KX-1GP
6 DY 69.48001.081
VDD12
1
30 20 HDMI_DDI_TX_ALS_P1 C5714 HDMI_DDI_TX_CON_P0 7
15 VDD12 OUT_D1P 19 HDMI_DDI_TX_ALS_N1 C5701 EC5701 EC5702 HDMI_DDI_TX_CON_N0 9 TMDS_DATA0+ 13
SC3D3P50V1CN-GP
18 VDDTX12 OUT_D1N HDMI_DDI_TX_CON_P1 4 TMDS_DATA0- CEC 17
DY-EMC DY-EMC
2
43 VDDTX12 17 HDMI_DDI_TX_ALS_P0 SCD1U16V2KX-L-GP HDMI_DDI_TX_CON_N1 6 TMDS_DATA1+ DDC/CEC_GROUNG 19 HDMI_DET_CON
46 VDDRX12 OUT_D0P 16 HDMI_DDI_TX_ALS_N0 HDMI_DDI_TX_ALS_N3 HDMI_DDI_TX_CON_P2 1 TMDS_DATA1- HOT_PLUG_DETECT
11 VDDRX12 OUT_D0N HDMI_DDI_TX_CON_N2 3 TMDS_DATA2+ 14
VDDA12 14 HDMI_DDI_TX_ALS_P3 TMDS_DATA2- RESERVED#14
37 OUT_CLKP 13 HDMI_DDI_TX_ALS_N3 8
POWERSWITCH OUT_CLKN Close to C5703 5 TMDS_DATA0_SHIELD
C5720 1 2SCD1U6D3V1KX-GP HDMI_DDI_TX_P0_C 38 21 HDMI_DET_CON HPD_SNK, Internal pulled down ~100K. 2 TMDS_DATA1_SHIELD
4 HDMI_DDI_TX_P0 IN_D2P HPD_SNK TMDS_DATA2_SHIELD
C5721 1 2SCD1U6D3V1KX-GP HDMI_DDI_TX_N0_C 39 40 HDMI_HPD_CPU HDMI_HPD_CPU 1 2 20
4 HDMI_DDI_TX_N0 IN_D2N HPD_SRC HDMI_HPD_CPU 4 GND
R5724 11 21
C5722 1 2SCD1U6D3V1KX-GP HDMI_DDI_TX_P1_C 41 7 HDMI_CLK_CON 100KR1J-GP HDMI_DDI_TX_CON_P3 10 TMDS_CLOCK_SHIELD GND 22
4 HDMI_DDI_TX_P1 HDMI_DDI_TX_N1_C 42 IN_D1P SCL_SNK HDMI_DATA_CON HDMI_DDI_TX_CON_N3 TMDS_CLOCK+ GND
4 HDMI_DDI_TX_N1 C5723 1 2SCD1U6D3V1KX-GP 8 12 HDMI 23
IN_D1N SDA_SNK TMDS_CLOCK- (A_Type) GND
C5724 1 2SCD1U6D3V1KX-GP HDMI_DDI_TX_P2_C 44 34 SCL_SRC
C 4 HDMI_DDI_TX_P2 HDMI_DDI_TX_N2_C 45 IN_D0P SCL_SRC/AUXP SDA_SRC C
4 HDMI_DDI_TX_N2 C5725 1 2SCD1U6D3V1KX-GP 33 SKT-HDMI23-133-GP-U
IN_D0N SDA_SRC/AUXN Internally pulled up to 3.3V through 2.36K resistor.
C5726 1 2SCD1U6D3V1KX-GP HDMI_DDI_TX_P3_C 47 10 022.10025.00A1
4 HDMI_DDI_TX_P3 IN_CLKP RSV1
C5727 1 2SCD1U6D3V1KX-GP HDMI_DDI_TX_N3_C 48 26
4 HDMI_DDI_TX_N3 IN_CLKN RSV2
9 29 PS8409_SCL 1 TP5702 TPAD14-OP-GP
HDMI_ID_HDMI 32 HDMI_CEC CSCL 28 PS8409_SDA 1 TP5703 TPAD14-OP-GP
HDMI_ID CSDA
R5701 1 2 4K99R1F-GP HDMI_REXT 36 31 I2C_ADDR_HDMI 1 TP5704 TPAD14-OP-GP
RESETN_HDMI 35 REXT I2C_ADDR 27 HDMI_PRE R5703 1 2 4K7R1J-GP
4 RESET# PRE 3 DCIN_ENB_HDMI R5704 1
DY 2 4K7R1J-GP
2 PD# DCIN_ENB 5 EQ_HDMI HDMI_DDI_TX_ALS_N2 1 2 HDMI_DDI_TX_CON_N2 HDMI_DDI_TX_ALS_N1 1 2 HDMI_DDI_TX_CON_N1
12 TESTMODEB EQ R5710 0R0402-PAD-1-GP R5711 0R0402-PAD-1-GP
CEC_EN
HDMI_ID 25 49
NC#25 GND EL5701 EL5702
Input
Configuration pin, Internally pulled down at ~150Kohm PS8409AQFN48GTR2-A2-GP 1 3 1 3
L: HDMI ID enable (default)
H: HDMI ID disable. 071.08409.0B03 2 4 2 4
3D3V_HDMI_S0
FILTER-4P-264-GP FILTER-4P-264-GP
HDMI_ID_HDMI R5726 1 2 4K7R1J-GP

068.24900.2021 068.24900.2021
DY DY DY
I2C_ADDR
Input HDMI_DDI_TX_ALS_P2 1 2 HDMI_DDI_TX_CON_P2 HDMI_DDI_TX_ALS_P1 1 2 HDMI_DDI_TX_CON_P1
I2C address selection. Internally pulled down at ~150K. R5713 0R0402-PAD-1-GP R5714 0R0402-PAD-1-GP
L: Slave address 0x10-0x2F (default)
H: Slave address 0x90-0x9F; 0xD0-0xDF
RESETB
Input
Reset, ACTIVE LOW. Internally pulled up at ~150Kohm. PRE
Input HDMI_DDI_TX_ALS_N3 1 2 0R2J-2-GP HDMI_DDI_TX_CON_N3
R5716
3D3V_HDMI_S0 Output pre-emphasis setting. Internally pulled up at ~150K. DY HDMI_DDI_TX_ALS_N0 1 2 HDMI_DDI_TX_CON_N0
3D3V_HDMI_S0 L: Programmable pre-emphasis to 2.5dB. R5717 0R0402-PAD-1-GP
H: No pre-emphasis (default)
L5703
1
EL5704
1
R5705 DCIN_ENB 1 3
R5702 4K7R1J-GP Input 1 3
10KR1J-GP 2 4
B DY DC coupling enable. Internally pulled up at ~150K. 2 4
B
2
L: DC coupling input
2
EQ_HDMI H: AC coupling input (default) FILTER-4P-264-GP

RESETN_HDMI FILTER-4P-264-GP
068.24900.2021
068.24900.2021
1
DY
1
R5706 EQ
C5728 4K7R1J-GP HDMI_DDI_TX_ALS_P3 R5719 1 2 0R2J-2-GP HDMI_DDI_TX_CON_P3
SC1U6D3V1KX-1-GP
DY
Input DY HDMI_DDI_TX_ALS_P0 1 2 HDMI_DDI_TX_CON_P0
Receiver equalization setting. Internally pulled up at ~150K.
2
R5720 0R0402-PAD-1-GP
2
L: Programmable EQ for channel loss up to 13dB

H: Programmable EQ for channel loss up to 17dB (default)
M: Programmable EQ for channel loss up to 11dB
TEST-EMC
TEST-EMC ED5703
ED5701
3D3V_S0 8 1 6 HDMI_DET_CON
3
HDMI_DDI_TX_CON_N1 1 10 HDMI_DDI_TX_CON_N1
2 5 PWRNC5701 PWRNC PN5701
HDMI_DDI_TX_CON_P1 2 9 HDMI_DDI_TX_CON_P1
HDMI_DDI_TX_CON_N2 4 7 HDMI_DDI_TX_CON_N2 HDMI_DATA_CON 3 4 HDMI_CLK_CON
HDMI_DDI_TX_CON_P2 5 6 HDMI_DDI_TX_CON_P2
AZC199-04SDR7G-1-GP
1
2
RN5702
075.00199.007C
SRN10KJ-5-GP AZ1043-04F-R7G-GP
G
075.01043.0073
4
3
HDMI_CLK_CPU HDMI_CLK_CON
(Amazing 075.00199.007C/AOS 075.08105.007C)
S D
4 HDMI_CLK_CPU
EMC-TEST
Q5701 ED5702
A A
G
LSK3541G1ET2L-1-GP 8
3
084.03541.M001 HDMI_DDI_TX_CON_N0 1 10 HDMI_DDI_TX_CON_N0
HDMI_DATA_CPU S D HDMI_DATA_CON HDMI_DDI_TX_CON_P0 2 9 HDMI_DDI_TX_CON_P0

4 HDMI_DATA_CPU
HDMI_DDI_TX_CON_N3 4 7 HDMI_DDI_TX_CON_N3
BOM1
Q5702 HDMI_DDI_TX_CON_P3 5 6 HDMI_DDI_TX_CON_P3
LSK3541G1ET2L-1-GP
084.03541.M001 Wistron Corporation
AZ1043-04F-R7G-GP Taipei Hsien 221, Taiwan, R.O.C.
075.01043.0073 Title
HDMI CONN
Custom
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
Display (RSVD) DP
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
Display (RSVD) DVI
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
SSID = SATA
E E
D D
C C
B B
BOM1
Wistron Corporation
A A
Title
HDD
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
3D3V_S5 3D3V_WLAN
Main Func = WLAN R6130 1 2 0R805-DB-GP-U
(OffAPage)
21 CNV_BRI_RSP 3D3V_WLAN 3D3V_WLAN

19 CNV_CLKREQ
19 CNV_RF_RST_N Close to pin4,5 Close to pin72,73
D D
WLAN/CNVi on board
1
C6109 C6110 C6111 C6104 C6105 C6106 WLAN1
20 WIFI_RF_EN
SC10U6D3V2MX-GP-U
SCD1U16V2KX-L-GP
SCD01U25V2KX-3GP
SCD1U16V2KX-L-GP
SC10U6D3V3MX-GP
SCD01U25V2KX-3GP
19 BLUETOOTH_EN
2
76 77
4 GND GND A26
18 SUS_CLK 3D3V GND CNV_WT_CLKP
5 A19
3D3V WT_CLKP A20 CNV_WT_CLKN
21 CNV_BRI_DT WT_CLKN A7
21 CNV_RGI_RSP GND A21 CNV_WT_DP0
15,21 CNV_RGI_DT WT_D0P A22 CNV_WT_DN0
A8 WT_D0N A31
21,61 CNV_WR_CLKP A9 A4WP_IRQ# GND A23 CNV_WT_DP1
21,61 CNV_WR_CLKN A4WP_CLK WT_D1P CNV_WT_DN1
A10 A24
WIFI_RF_EN R6152 1 2 0R0402-PAD-1-GP WIFI_RF_EN_R 28 A4WP_DATA WT_D1N A50
21 CNV_WT_DP0 BLUETOOTH_EN 1 2 0R0402-PAD-1-GP BLUETOOTH_EN_R 63 W_DISABLE1# GND 29
R6153
21 CNV_WT_DN0 W_DISABLE2# PEWAKE#
31 30
27 PERST# CLKREQ# 32
21 CNV_WT_DP1 SUS_CLK SUSCLK_WLAN SUSCLK(32KHZ)_3D3V GND
R6117 1 2 33R1J-GP A25 33
21 CNV_WT_DN1 C_P32K_3D3V REFCLKN0
11 34
12 COEX_TXD REFCLKP0 35
21,61 CNV_WR_CLKP 13 COEX_RXD GND 36
21,61 CNV_WR_CLKN 42 COEX3 PERN0 37
43 CLINK_CLK PERP0 38
21 CNV_WR_DP0 44 CLINK_DATA GND 39
21 CNV_WR_DN0 CLINK_RESET PETN0 40
53 PETP0 41
21 CNV_WR_DP1 54 UART_WAKE#_3D3V GND
21 CNV_WR_DN1 55 LPSS_UART_RTS
56 LPSS_UART_RXD 45
21 CNV_WT_CLKP 57 LPSS_UART_TXD SDIO_RESET# 46
21 CNV_WT_CLKN CNV_BRI_DT CNV_BRI_DT_R LPSS_UART_CTS SDIO_WAKE#
R6151 1 2 22R1J-GP A38 47
CNV_BRI_RSP R6125 1 2 22R1J-GP CNV_BRI_RSP_R A39 BRI_DT SDIO_DATA3 48
CNV_RGI_DT R6150 1 2 22R1J-GP CNV_RGI_DT_R A40 BRI_RSP SDIO_DATA2 49
CNV_RGI_RSP R6126 1 2 22R1J-GP CNV_RGI_RSP_R A41 RGI_DT SDIO_DATA1 50
CNV_RF_RST_N A42 RGI_RSP SDIO_DATA0 51
50ohm impedance. CNV_CLKREQ A43 RF_RESET_B SDIO_CMD 52
C C
58 CLKREQ0 SDIO_CLK 68
59 PCM_SYNC/I2S_WS GND 69
60 PCM_OUT/I2S_SD_OUT USB_D- 70
Top side 61 PCM_IN/I2S_SD_IN USB_D+ 71
64 PCM_CLK/I2S_SCK GND
65 LED#2 A45
3D3V_WLAN 72 LED#1 NC#A45
73 3D3V
3D3V
AFTP6113 1 A48 A32 CNV_WR_CLKP
A49 3D3V WGR_CLKP A33 CNV_WR_CLKN
AFTP6112 1 BLUETOOTH_EN 3D3V WGR_CLKN
AFTP6110 1 WIFI_RF_EN 1 A34 CNV_WR_DP0
AFTP6114 1 3D3V_S5 2 UIM_POWER_SRC/GPIO1 WGR_D0P A35 CNV_WR_DN0
3 UIM_POWER_SNK WGR_D0N
UIM_SWP A36 CNV_WR_DP1
9 WGR_D1P A37 CNV_WR_DN1
10 I2C_CLK WGR_D1N
I2C_DATA 6
8 GND 17
14 ALERT# GND 20
15 SYSCLK/GNSS0 GND 23
TX_BLANKING/GNSS1 GND 26
A15 GND 62
A44 LNA_EN GND 74
REFCLK0 GND 75
GND 78
GND 79
GND 80
3D3V_S0 GND 81
GND 82
GND 83
R6104 1 2 10KR1J-GP WIFI_RF_EN_R GND 84
DY GND 85
7 GND 86
R6103 1 2 10KR1J-GP BLUETOOTH_EN_R 16 RESERVED#7 GND 87
DY 18 RESERVED#16 GND 88
B
19 RESERVED#18 GND 89 B
21 RESERVED#19 GND 90
1D8V_S5 22 RESERVED#21 GND 91
R6134 1 2 20KR1J-GP CNV_RGI_RSP 67 RESERVED#66 GND 95
R6135 1 DY 2 20KR1J-GP CNV_BRI_RSP RESERVED#67 GND 96
R6127 1 DY 2 10KR1J-GP CNV_BRI_DT A11 GND
DY A12 RESERVED#A11 G1
A13 RESERVED#A12 GND G2
CNV_CLKREQ R6119 1 2 10KR2J-3-GP A14 RESERVED#A13 GND G3
CNV_RF_RST_N R6120 1 2 75KR2F-GP A18 RESERVED#A17 GND G6
RESERVED#A47 GND
WLAN-MODULE-123-GP-U
054.03149.0021
A A
TEST
Wistron Corporation
Title
INT IO (WLAN M.2)
C
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Variant Name> A
Wistron Corporation
Title
INT IO (WWAN)
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
16 SSD_PCIE_RX_N1
16 SSD_PCIE_RX_P1 Main M.2 SSD

16 SSD_PCIE_TX_N1
16 SSD_PCIE_TX_P1 (1.5A)
3D3V_S0 3D3V_SSD_S0
16 SSD_PCIE_RX_N2
D D
16 SSD_PCIE_RX_P2
1 2
16 SSD_PCIE_TX_N2 R6301 SSD1
0R805-DB-GP-U
16 SSD_PCIE_TX_P2 NP2 NP1
76 NP2 NP1 77
74 76 77 75
16 SSD_PCIE_RX_N3 3_3VAUX GND
72 73
70 3_3VAUX GND 71
16 SSD_PCIE_RX_P3 3_3VAUX GND
68 69
58 SUSCLK_32KHZ PEDET(OC_PCIE/GND_SATA) 67
16 SSD_PCIE_TX_N3 NC#58 NC#67
56 57
54 NC#56 GND 55 SSD_CLK_CPU_P
16 SSD_PCIE_TX_P3 PEWAKE#/NC#54 REFCLKP
SSD_CLKREQ_CPU_N 52 53 SSD_CLK_CPU_N
PLTRST_CPU_N 50 CLKREQ#/NC#52 REFCLKN 51
16 SSD_PCIE_RX_N0 PERST#/NC#50 GND
48 49 SSD_PCIE_TX_CON_P0 C6301 1 2 SCD22U6D3V1KX-GP SSD_PCIE_TX_P0
46 NC#48 PERP0/SATA_A+ 47 SSD_PCIE_TX_CON_N0 C6302 1 2 SCD22U6D3V1KX-GP SSD_PCIE_TX_N0
16 SSD_PCIE_RX_P0 NC#46 PERN0/SATA_A-
44 45
42 NC#44 GND 43 SSD_PCIE_RX_P0
16 SSD_PCIE_TX_N0 NC#42 PETP0/SATA_B-
C 40 41 SSD_PCIE_RX_N0 C
38 NC#40 PETN0/SATA_B+ 39
16 SSD_PCIE_TX_P0 DEVSLP GND
34 NC#36 PERP1 35 SSD_PCIE_TX_CON_N1 C6304 1 2 SCD22U6D3V1KX-GP SSD_PCIE_TX_N1
18 SSD_CLK_CPU_N NC#34 PERN1
32 33
18 SSD_CLK_CPU_P NC#30 PETP1
28 29 SSD_PCIE_RX_N1
26 NC#28 PETN1 27
18 SSD_CLKREQ_CPU_N NC#26 GND
22 NC#24 PERP2 23 SSD_PCIE_TX_CON_N2 C6306 1 2 SCD22U6D3V1KX-GP SSD_PCIE_TX_N2
17,24,91 PLTRST_CPU_N NC#22 PERN2
20 21
16 3_3VAUX PETN2 17 SSD_PCIE_RX_N2
14 3_3VAUX PETP2 15
12 3_3VAUX GND 13 SSD_PCIE_TX_CON_P3 C6307 1 2 SCD22U6D3V1KX-GP SSD_PCIE_TX_P3
10 3_3VAUX PERP3 11 SSD_PCIE_TX_CON_N3 C6308 1 2 SCD22U6D3V1KX-GP SSD_PCIE_TX_N3
8 DAS/DSS# PERN3 9
4 NC#6 PETN3 5 SSD_PCIE_RX_N3
2 3_3VAUX PETP3 3
3_3VAUX GND 1
B B
NGFF_KEY_M 75P GND
SKT-MINI67P-32-GP
062.10003.0841
3D3V_SSD_S0
Top side
1
3D3V_S0
C6309 C6310 C6311 C6312
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
AFTP6301 1
2
AFTP6302 1 PLTRST_CPU_N
TEST
A
Title
INT IO (SSD M.2/ eMMC)
Custom
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
24 BAT_LED
24 SYS_LED
24 CHARGE_LED
SYS LED
D D
SYS_LED
5V_S5
1
LED1 R6402
A K SYS_LED_K R6401 2 1 510R2J-1-GP SYS_LED_Q D S 10KR2J-3-GP
LED-W-45-GP
2
Q6403
LSK3541G1ET2L-1-GP
084.03541.M001
Charge LED
Q6401
C C
LSK3541G1ET2L-1-GP
5V_S5 LED2
084.03541.M001
Orange CHARGE_LED_N_Q D S
2 4 CHARGE_LED_K R6403 2 1 240R2J-3-GP CHARGE_LED_N_Q
White
1 3 BAT_LED_K R6404 2 1 510R2J-1-GP BAT_LED_Q
G
LED-OW-2-GP-U CHARGE_LED
83.00193.D70
BAT_LED
2
1
S D BAT_LED_Q RN6401
SRN100KJ-6-GP
Q6402
B LSK3541G1ET2L-1-GP B
3
4
084.03541.M001
NOVO BUTTON
NOVO1
24 KBC_NOVOBTN_N R6407 1 2 KBC_NOVOBTN_N_R 2 1

100R2J-2-GP
3 4
1
C6401 SW-TACT-4P-74-GP-U2
SC1KP50V2KX-1GP
2
TEST
A A
Wistron Corporation
Title
LED / Button / Power Button
B
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
(OffAPage) 3D3V_S5
24 KCOL[15:0]
1
24 KROW[7:0] R6529
0R0402-PAD-1-GP CHECK
2
KB1
SCD1U16V2KX-L-GP
35
3D3V_S5_KB 1
1
CAP_LED_KB 2
D C6504 KCOL15 3 D
KCOL10 4
2
KCOL11 5
24 CAP_LED 6
KCOL14
KCOL13 7 5V_S0 5V_KB_S0
G
KCOL12 8
KCOL3 9
KCOL6 10 1 2
R6513 KCOL8 11 R6527 0R402-DB-GP-U
S D CAP_LED_KB_R 1 2 KCOL7 12
KCOL4 13 5V_KB_S0
14 KBBL1
KCOL2
Q6501 100R2J-2-GP KROW0 15 6
LSK3541G1ET2L-1-GP KCOL1 16
KCOL5 17 4
084.03541.M001 KROW3 18 Q6503 3
Vgs(th) <1.5V KROW2 19 G 2
Id= 0.1A KCOL0 20 24 KB_BL_ON
KROW5 21 D KB_BL_LED_N 1
KROW4 22
KCOL9 23 S 5
KROW6 24 Notice:ZZ.2N702.J3101
KROW7 25 2N7002K-2-GP
KROW1 26 PTWO-CON4-16-GP
27
84.2N702.J31
28
20.K0397.004
29
30
3D3V_S5_KB 31
FNLK_LED_KB 32
33
34
36
ACES-CON34-4-GP-U
20.K0724.034
24 FNLK_LED
G
C C
R6515
S D FNLK_LED_Q 1 2
100R2J-2-GP
Q6504
LSK3541G1ET2L-1-GP
084.03541.M001
3D3V_S5
B B
R6531
10KR2J-3-GP
2
TPAD1
10
R6509 1 2 0R0402-PAD-1-GP LID_CLOSE_N_R 3D3V_TPAD 8
24 TPAD_EN CPU_I2C_SCL_P0_TP 7
R6532 1 2 0R0402-PAD-1-GP I2C_TP_INT_N_CON CPU_I2C_SDA_P0_TP 6
3D3V_S0 20 TPAD_INT_N 5
3D3V_TPAD
4
3
R6512 1 2 0R0402-PAD-1-GP CPU_I2C_SDA_P0_TP I2C_TP_INT_N_CON 2
20 CPU_I2C_SDA_P0 R6530 1 2 0R0402-PAD-1-GP CPU_I2C_SCL_P0_TP
1 2 20 CPU_I2C_SCL_P0 3D3V_TPAD LID_CLOSE_N_R 1
R6528 0R402-DB-GP-U 9
HRS-CON8-10-GP
020.K0376.0008
1
DY
1
C6502 EC6508 EC6509

SC33P50V2JN-3GP
SC33P50V2JN-3GP
SCD1U16V2KX-L-GP C6503
2
SCD1U16V2KX-3GP
2
A A
TEST
Wistron Corporation
Title
INT IO (KB/TP)
A2
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
TYPEA Port1 AOU 5V_S5 5V_USB1_S5 3D3V_FP 3D3V_S5

16 USB1_USB30_TX_N
IOBD1
41
16 USB1_USB30_TX_P
1
16 USB1_USB30_RX_N
2
3
16 USB1_USB30_RX_P
4
5 KBC_PWRBTN_N 1 AFTP6601 AFTE14P-GP
36 USB1_USB20_AOU_P 3D3V_FP 3D3V_S5 3D3V_AUX_S5
D
6 D
36 USB1_USB20_AOU_N 7
8
DY 9
R6605 1 2 0R2J-2-GP 10 KBC_PWRBTN_N
1
1
11
TYPEA Port2 12 FP_RESETN
FP_GPIO_AL0
G6601 G6602
13
16 USB2_USB30_TX_N
R6606 1 2 0R2J-2-GP 14 FP_DELINK To EC.
15 FP_LED GAP-OPEN GAP-OPEN
2
16 USB2_USB30_TX_P
2
16 PWR_LED
16 USB2_USB30_RX_N
17
18
USB_PWR_EN
USB_OC3_N
TOP
19
16 USB2_USB30_RX_P FP_USB20_P
20
21 FP_USB20_N
16 USB2_USB20_P
22
23 USB1_USB20_AOU_N
16 USB2_USB20_N
24 USB1_USB20_AOU_P
25
26 USB1_USB30_RX_N
27 USB1_USB30_RX_P
28
FP 29
30
USB1_USB30_TX_N
USB1_USB30_TX_P
31
24 PWR_LED 32 USB2_USB20_N
24 FP_LED 33 USB2_USB20_P
C 16 FP_USB20_P C
34
16 FP_USB20_N
35 USB2_USB30_RX_N Top side
24 FP_RESETN 36 USB2_USB30_RX_P 5V_S5
24 FP_GPIO_AL0 37
24 FP_DELINK 38 USB2_USB30_TX_N AFTP6607 1
39 USB2_USB30_TX_P AFTP6602 1 USB2_USB20_N
40 AFTP6603 1 USB2_USB20_P
42 AFTP6604 1 FP_USB20_P
Other AFTP6605 1 FP_USB20_N
KYO-CON40-1-GP AFTP6606 1
24 USB_PWR_EN
16 USB_OC3_N 020.K3074.0040
24 KBC_PWRBTN_N
MB to TRANS BD
B B
R6603 1 2 0R0402-PAD-1-GP 1D8V_S0 1D8V_TRANS_S0 3D3V_TRANS_S0
CoAlayout
EL6601 1 2
CCD_USB20_P 2 1 CCD_USB20_CON_P R6602 LCDDB1
16 CCD_USB20_P
DY-EMC4
(300mA) 0R402-DB-GP-U 9
CCD_USB20_N 3 CCD_USB20_CON_N 3D3V_S0 3D3V_TRANS_S0 1
16 CCD_USB20_N
DLM0NSN900HY2D-GP 2
068.09002.2001 3
19 DMIC_SDA0_CPU
1 2 4
R6604 1 2 0R0402-PAD-1-GP R6601 19 DMIC_SCL0_CPU 5
0R402-DB-GP-U 1 CCD_USB20_CON_P 6
C6601 CCD_USB20_CON_N 7
SC4D7U6D3V2MX-GP-U 8
10
2
HRS-CON8-10-GP
020.K0376.0008
ED6601
8
3
CCD_USB20_CON_N 1 10 CCD_USB20_CON_N
CCD_USB20_CON_P CCD_USB20_CON_P <Variant Name>

A 2 9 A
DMIC_SCL0_CPU 4 7 DMIC_SCL0_CPU
DMIC_SDA0_CPU DMIC_SDA0_CPU
Wistron Corporation
5 6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
AZ1043-04F-R7G-GP IO Board Conn (RSVD)
075.01043.0073 Size Document Number Rev
Custom
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
Hall Sensor
D D
3D3V_AUX_S5
1
R6719
0R0402-PAD-1-GP
HALL1
2
C GMR_VDD_R 1 C
LID_CLOSE_N 2 VCC
24 LID_CLOSE_N 3 OUTPUT
GND
1
C6709
AH9247-W-7-GP
SCD1U16V2KX-L-GP
074.09247.009B
B B
TEST
A
Title
Sensor (Hall-Sensor)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
18,24 ESPI_CPU_IO0
18,24 ESPI_CPU_IO1
18,24 ESPI_CPU_IO2
18,24 ESPI_CPU_IO3
D 18,24 ESPI_CPU_CS_N D
18,24 ESPI_CPU_CLK
18,24 ESPI_CPU_RST_N
24 ESPI_ALERT_N
24 EC_DUG_TX
20 CPU_UART2_TXD
20
17,24,40,54,57
CPU_UART2_RXD
PM_SLP_S3_N
eSPI DEBUG PORT
DBG1
15
ESPI_ALERT_N 1
17,24,40 PM_SLP_S4_N
ESPI_CPU_CLK 2
C 3 C
ESPI_CPU_RST_N 4
ESPI_CPU_CS_N 5
ESPI_CPU_IO3 6
3D3V_S5 ESPI_CPU_IO2 7
ESPI_CPU_IO1 8
17,99 SYS_RESET_N ESPI_CPU_IO0 9
1 R6802 2 3D3V_DBG 10
0R0402-PAD-1-GP EC_DUG_TX 11
12
1 R6803 2 47KR2F-GP CPU_UART2_TXD 13
1 R6804 2 47KR2F-GP CPU_UART2_RXD 14
16
ACES-CON14-11-GP
20.F1637.014
DEBUG
Why don't have pin12, EC_DUG_RX from EC?
Refer to LC550.
B B
TEST
A
Title
Debug (eSPI conn)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
EAR PHONE
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
Sensor (G-sensor)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
TBT1D 4 OF 4
3D3V_S5
C7101 1 2 SCD22U6D3V1KX-GP TBT_TCSS_TX_C_P0 J1

TBT PORTS J12 VCC3P3_SX_TBTB
4 TBT_TCSS_TX_P0 ASSRXP1 BSSRXP1 TBT_TCSS_RX_RT_P1 72
C7102 1 2 SCD22U6D3V1KX-GP TBT_TCSS_TX_C_N0 J2 J11
4 TBT_TCSS_TX_N0 ASSRXN1 BSSRXN1 TBT_TCSS_RX_RT_N1 72
Port B - TypeC Side

C7104 1 2 SCD22U6D3V1KX-GP TBT_TCSS_RX_C_P0 G1 G12
Port A - Host Side

4 TBT_TCSS_RX_P0 ASSTXP1 BSSTXP1 TBT_TCSS_TX_RT_P1 72
C7103 1 2 SCD22U6D3V1KX-GP TBT_TCSS_RX_C_N0 G2 G11
4 TBT_TCSS_RX_N0 ASSTXN1 BSSTXN1 TBT_TCSS_TX_RT_N1 72
C7105 1 2 SCD22U6D3V1KX-GP TBT_TCSS_TX_C_P1 C1 C12 U7102
4 TBT_TCSS_TX_P1 1 2 SCD22U6D3V1KX-GP TBT_TCSS_TX_C_N1 C2 ASSRXP2 BSSRXP2 C11 TBT_TCSS_RX_RT_P2 72
C7106 (385mA)
4 TBT_TCSS_TX_N1 ASSRXN2 BSSRXN2 TBT_TCSS_RX_RT_N2 72 A2 A1
C7107 1 2 SCD22U6D3V1KX-GP TBT_TCSS_RX_C_P1 E1 E12 B2 VIN#A2 VOUT#A1 B1
D 4 TBT_TCSS_RX_P1 D
C7108 1 2 SCD22U6D3V1KX-GP TBT_TCSS_RX_C_N1 E2 ASSTXP2 BSSTXP2 E11 TBT_TCSS_TX_RT_P2 72 VIN#B2 VOUT#B1
4 TBT_TCSS_RX_N1 ASSTXN2 BSSTXN2 TBT_TCSS_TX_RT_N2 72 C1
M7 M10 TBTB_CT C2 PG
4 TBT_LSX2_TXD L7 PA_LSTX_SBU1 PB_SBU1 L10 TBT_SBU1 72 CT
4,15 TBT_LSX2_RXD PA_LSRX_SBU2 PB_SBU2 TBT_SBU2 72
D2 D1
73 RT_B_PWR_EN ON GND
L8
4 TBT_TCSS_AUX_P PA_AUX_P
M8
4 TBT_TCSS_AUX_N PA_AUX_N
R7101
R7102
TPS22971YZPR-2-GP
TABLE : Functional Strap 074.22971.M002
1
POC_GPIO_10 (Flash Share Strap) C7123
DY DY
1
HIGH Flash is shared between 2 ReAtimers
SC1200P50V2KX-1GP
2
2
SC1U6D3V1MX-GP C7122
1MR1J-GP
1MR1J-GP
LOGIC
2
BURNSIDE-BRIDGE-GP-U1 LOW Flash isn't shared. 1 Flash per ReAtimer
TABLE : Functional Strap
POC_GPIO_11 (Master/Slave Strap in Flash Sare Mode)

TBT1C 3 OF 4
LOGIC
VCC3P3_SX_TBTB 3D3V_S0
HIGH Set ReAtimer to be Master on shared flash SPI I/F B1 F12
B12 VSS_ANA VSS_ANA G7
D1 VSS_ANA VSS_ANA H1
LOW Set ReAtimer to be Slave on shared flash SPI I/F D2 VSS_ANA VSS_ANA H2
R7103
R7104
R7133
R7106
D11 VSS_ANA VSS_ANA H11
D12
F1
VSS_ANA
VSS_ANA GND VSS_ANA
VSS_ANA
H12
J9
Source A> VSS_ANA VSS_ANA
1
F2 K1
F7 VSS_ANA VSS_ANA K2
VCC3P3_SX_TBTB VCC3P3_SX_TBTB VCC3P3A_SX_TBTB F9 VSS_ANA VSS_ANA K11
F11 VSS_ANA VSS_ANA K12
C R7129 2 1 0R0402-PAD-1-GP VSS_ANA VSS_ANA C
VSS
VSS
VSS
10KR1J-L-GP
10KR1J-L-GP
10KR1J-L-GP
10KR1J-L-GP
SC2D2U6D3V1MX-3-GP-U1
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
BURNSIDE-BRIDGE-GP-U1
F3
F5
G5
SC18P25V1JN-GP
1
TBT1A 1 OF 4
SC47U6D3V3MX-1-GP
1
C7125 C7127 C7128 C7129 C7136 C7137 C7132
RT_SPI_MOSI C6 C9 RT_B_SML1_CLK_L R7109 1 2 0R0201-PAD-GP C7130
2
RT_SPI_MISO B4 EE_DI I2C_SCL E7 RT_B_SML1_DATA_L 1 2 0R0201-PAD-GP I2C3_CLK_PD 73
R7110
2
RT_SPI_CS_N EE_DO I2C_SDA RT_B_-SML1_INT_L I2C3_DATA_PD 73
B6 A10 R7108 1 2 0R0201-PAD-GP
EE_CS# I2C_INT
FLASH
RT_SPI_CLK C7 B10 I2C3_INT_PD_N 73

EE_CLK FORCE_PWR RT_FORCE_PWR 19,73
VCC3P3_LC_TBTB A9
POC GPIO
FLASH_BUSY# B9 RT_B_POC_GPIO_5
DEBUG
MISC &
POC_GPIO_5 A8 RT_B_POC_GPIO_6
R7114 1 2 10KR1J-L-GP VCC3P3_TBTB_TDI A3 POC_GPIO_6 B8
1 2 10KR1J-L-GP VCC3P3_TBTB_TMS C3 TDI PERST# A7 RT_SMB_SCL_P0 1 RT_PERST_N 17
R7115
TMS SMBUS_SCL TP7101
R7116 1 2 10KR1J-L-GP VCC3P3_TBTB_TCK B5 B7 RT_SMB_SDA_P0 1
JTAG
1 2 10KR1J-L-GP VCC3P3_TBTB_TDO C5 TCK SMBUS_SDA A4 RT_B_FLASH_SHARE_EN TP7102

R7117
TDO FLASH_SHARE_EN A5 RT_B_FLASH_MASTER_SLAVE
FLASH_MASTER_SLAVE A6 RT_B_POC_GPIO_12
POC_GPIO_12 L3
M11 NC_L3
THERMDA
M12
B2 TEST_EDM
FUSE_VQPS_64 L11 RT_B_L11 D7103 A K
RESET# RT_B_RESET_N 73
A11
A12 MONDC L9 RT_B_XTAL_25_IN RB521CM-30T2R-GP-U
Main
L12 NC#A12 XTAL_25_IN M9 RT_B_XTAL_25_OUT

R7121
R7122
R7105
R7123
MONDC_SVR XTAL_25_OUT
DEBUG
CPU_TEST_PER_GOOD B3 L5 RT_B_RSENSE
B11 TEST_PWR_GOOD RSENSE L4 RT_B_RBIAS 1 R7119 2
TEST_EN RBIAS
1
1
4K75R1D-GP
R7120 A1
100R1J-GP A2 ATEST_P
ATEST_N DYDY (230mA)
VCC3P3_LC_TBTB VCC0P9_SVR_TBTB
2
BURNSIDE-BRIDGE-GP-U1 BOM Control: VCC3P3_SX_TBTB VCC3P3_SX_TBTB VCC3P3A_SX_TBTB

071.BURNS.0C0U/IINTEL
10KR1J-L-GP
10KR1J-L-GP
10KR1J-L-GP
10KR1J-L-GP
B ZZ.000IC.002 (50mA) B
IC TBT RETIMER BURNSIDE BRIDGE JHL8040R A1 2 OF 4
TBT1B
9999GL/QURW
VCC3P3_ANA_TBTB L2 E6
VCC3P3_ANA VCC3P3_SX VCC0P9_SVR_TBTB
VCC3P3_LC_TBTB
E5 M4
VCC3P3_LC output VCC3P3_SVR M5
F6 VCC3P3_SVR J5 PWRNC3101 PWRNC 1 PN7201
VCC0P9_SVR_ANA
(850mA)
NC_J5 NC#J5
1
G6 J7
C7109 C7110 VCC0P9_SVR_ANA VCC3P3A
Power
E3 L1 SVR_IND_TBTB L7101 1 2 IND-D68UH-138-GP VCC0P9_SVR_TBTB
2
G3 VCC0P9_SVR SVR_IND M1
VCC0P9_SVR output SVR_IND 068.R6810.1501
0.68uH_DFE201610E-R68M-P2
E9 M2
VCC0P9_SVR_PB_ANA SVR_VSS
SC47U6D3V3MX-1-GP
SC47U6D3V3MX-1-GP
3D3V_S5 G9 M3
SC18P25V1JN-GP
VCC0P9_SVR_PB_ANA SVR_VSS C7111 C7134
Itemp=3.1A DY
1
VCC0P9_LC_TBTB J3 C7113 C7114 C7115 C7116 C7117 C7118
VCC0P9_LC Isat=4.3A
C7112
A
VCC0P9_LVR_TBTB L6
2
M6 VCC0P9_LVR J6
SC10U6D3V2MX-GP-U
VCC0P9_LVR_SENSE GND
D7104
(15mA) RB520CM-30T2R-GP R7130
2
RT_B_XTAL_25_OUT_R 1 0R0201-PAD-GP
2 RT_B_XTAL_25_OUT BURNSIDE-BRIDGE-GP-U1
K
1
RT_B_XTAL_25_IN_R 2 1 RT_B_XTAL_25_IN C7119 C7120 C7121
RETIMER_A_SPI_VCC R7132 Near PIN
1
R7124
R7125
R7126
R7127
0R0201-PAD-GP
2
SCD1U6D3V1KX-GP
3
2
X7101
2
C7124 XTAL-25MHZ-336-GP
C7126 082.30005.0931 C7133
2
SC15P25V1JN-GP SC15P25V1JN-GP
1
1
1
2K2R1J-GP 1
2K2R1J-GP 1
3K3R1J-GP 1
2
3K3R1J-GP
U7103
A RT_SPI_CS_N 1 8 A
RT_SPI_MISO 2 CS# VCC 7 RT_B_SPI_HOLD_N
RT_B_SPI_WP_N 3 DO/IO1 HOLD#/IO3 6 RT_SPI_CLK
4 WP#/IO2 CLK 5 RT_SPI_MOSI
GND DI/IO0 TABLE of X7101 :
9 TEST
GND Vender Vender P/N Wistron P/N
TXC 7R25000008 082.30005.0931
W25Q80DVZPIG-GP Wistron Corporation
072.25Q80.0B01 MURATA XRCGB25M000F2P40R0 082.30005.0911 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1MB(8Mb) 150MIL WSON-8 HOSONIC E1FB25E000005E 082.30005.0B21
WINBOND W25Q80DVZPIG Title
THUNDERBOLT RE TIMER
Custom
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
Top side TBTB_VBUS20_CONN

3D3V_LDO_PD 3D3V_LDO_PD
AFTP7207 1
AFTP7201 1
AFTP7202 1 TBT_CC1_CON
2
AFTP7203 1 TBT_CC2_CON
R7229
10KR2J-3-GP
AFTP7206 1
1
U7201
U7201_VBIAS A4 D1
VBIAS SBU1 D2 TBT_SBU1 71
SBU2 TBT_SBU2 71
C4
D VPWR D3 D
CC1 D4 TBT_CC1 73
TBT_SBU1_CON CC2 TBT_CC2 73
B1
TBT_SBU2_CON A1 C_SBU1
C_SBU2 B4 TBT_FLT_N
TBT_CC1_CON A2 FLT#
TBT_CC2_CON A3 C_CC1
C_CC2 C1
B2 GND C2
B3 RPD_G1 GND C3
SCD1U50V2KX-1-GP
RPD_G2 GND
SCD1U6D3V1KX-GP
SN1904020YBFR-1-GP
1
C7206
C7205 074.19040.M003
1
2
The VBIAS pin requires a minimum 35AVDC rated capacitor, and a 50AVDC rated capacitor is recommended.
R7208 1 2 2D2R1J-GP TBT_TCSS_TX_RC_P1 C7201 1 2 SCD22U6D3V1KX-GP TBT_SSTX_CON_P1 TBT_SSTX_CON_P2 C7203 1 2 SCD22U6D3V1KX-GP TBT_TCSS_TX_RC_P2 R7209 1 2 2D2R1J-GP
71 TBT_TCSS_TX_RT_P1 TBT_TCSS_TX_RC_N1 TBT_SSTX_CON_N1 TBT_SSTX_CON_N2 TBT_TCSS_TX_RC_N2 TBT_TCSS_TX_RT_P2 71
R7210 1 2 2D2R1J-GP C7202 1 2 SCD22U6D3V1KX-GP C7204 1 2 SCD22U6D3V1KX-GP R7211 1 2 2D2R1J-GP
71 TBT_TCSS_TX_RT_N1 TBTB_VBUS20_CONN TBT_TCSS_TX_RT_N2 71
R7212 1 2 2D2R1J-GP TBT_TCSS_RX_RC_N2 C7209 1 2 SCD33U25V1KX-1-GP-U TBT_SSRX_CON_N2
71 TBT_TCSS_RX_RT_N2 1 2 2D2R1J-GP TBT_TCSS_RX_RC_P2 1 2 SCD33U25V1KX-1-GP-U TBT_SSRX_CON_P2 TBT_SSRX_CON_N1 1 2 SCD33U25V1KX-1-GP-U TBT_TCSS_RX_RC_N1 1 2 2D2R1J-GP
R7216 C7210 C7211 R7215
71 TBT_TCSS_RX_RT_P2 TBT_SSRX_CON_P1 TBT_TCSS_RX_RT_N1 71
C7212 1 2 SCD33U25V1KX-1-GP-U TBT_TCSS_RX_RC_P1 R7219 1 2 2D2R1J-GP
TBT_TCSS_RX_RT_P1 71
C7207 C7208
ED7201
ED7202
ED7203
ED7204
ED7207
ED7208
ED7209
ED7210
C C
SCD1U50V2KX-1-GP
SCD1U50V2KX-1-GP
R7220
R7221
R7226
R7227
2
2
2
2
2
2
PESD5V0H1BSFYL-GP-U1
1
1
220KR1J-GP
220KR1J-GP
1
220KR1J-GP
220KR1J-GP
TPC Port2 (TBT/USB3.1/DP/PD)
(65W ADT: 20V, 3.25A)

(95W ADT: 20V, 4.75A)
close USB3
TBTB_VBUS20_CONN TBTB_VBUS20_CONN
B CoAlayout B
EL7201
2 1 USB3
A1 B1
3 4 TBT_SSTX_CON_P1 A2 GND GND B2 TBT_SSTX_CON_P2
TBT_SSTX_CON_N1 A3 SSTXP1 SSTXP2 B3 TBT_SSTX_CON_N2
DLM0NSN900HY2D-GP A4 SSTXN1 SSTXN2 B4
TBT_CC1_CON A5 VBUS#A4 VBUS#B4 B5 TBT_CC2_CON
068.09002.2001 TBTB_USB20_CON_P A6 CC1 CC2 B6 TBTB_USB20_CON_P
TBTB_USB20_CON_N A7 DP1 DP2 B7 TBTB_USB20_CON_N
TBT_SBU1_CON A8 DN1 DN2 B8 TBT_SBU2_CON
A9 RFU1 RFU2 B9
0R2J-2-GP 2 1 R7206 TBTB_USB20_CON_N TBT_SSRX_CON_N2 A10 VBUS#A9 VBUS#B9 B10 TBT_SSRX_CON_N1
16 TBTB_USB20_N
0R2J-2-GP 2
DY 1 R7207 TBTB_USB20_CON_P TBT_SSRX_CON_P2 A11 SSRXN2 SSRXN1 B11 TBT_SSRX_CON_P1
16 TBTB_USB20_P DY A12 SSRXP2 SSRXP1 B12
GND GND
ED7212
ED7214
ED7215
ED7213
13
CHASSIS#13 14
CHASSIS#14 15
CHASSIS#15 16
ED7211 CHASSIS#16
2
2
TEST-EMC
TEST-EMC
TEST-EMC
TEST-EMC
TBTB_USB20_CON_P 1 6 TBTB_USB20_CON_N SKT-USB28-43-GP
SCA0N88360AA
2 5 PWRNC7202 PWRNC PN7202
1
1
3 4
AZC199-04SDR7G-1-GP
075.00199.007C
A
TEST-EMC A
<Core Design>
Wistron Corporation
Title
THUNDERBOLT CONNECTOR
C -1
V550_TGL
5 4 3 2 1
5 4 3 2 1
VINT20_IN 3D3V_PD_S5 3D3V_LDO_PD TBTB_VBUS20_CONN
3D3V_AUX_S5 3D3V_PD_S5
C7301
C7302
POWER IN/OUT
VCC1P5_LDO_PD
2
R7327
2
0R0402-PAD-1-GP
U7303
1
SC10U6D3V2MX-GP-U 1
SC10U6D3V2MX-GP-U 1
D D
C7303
A1 B1 3D3V_LDO_PD 3D3V_LDO_PD
VOUT GND
A2 B2
NSR20F30NXT5G-GP
VIN ON 3D3V_PD_EN 24
SC1U25V2KX-2-GP
K
1
1
1
TPS22915BYFPR-GP 5V_S5 R7302
SC10U6D3V2MX-GP-U 1
D7301 C7304 R7301 200KR1F-GP
074.22915.009Z R7330 0R0402-PAD-1-GP
2
100KR2J-1-GP 0201
2
A
1
2
C7312
SC1U6D3V1KX-1-GP
2
1
G2
G8
H4
H1
H3
H8
C8
A3
A8
B8
R7305
F8
C7306
C7307
C7308
C7309
U7301 R7304
DY 0R2F-1-GP 51KR1F-GP
VIN_3V3
LDO_1V5#G2
LDO_1V5#H1
LDO_3V3
VSYS
PA_VBUS
PA_VBUS
PA_VBUS
PB_VBUS
PB_VBUS
PB_VBUS
2
2
(3A) 0201
2
SC10U6D3V2MX-GP-U 1
SC10U6D3V2MX-GP-U 1
SC10U6D3V2MX-GP-U 1
SC10U6D3V2MX-GP-U 1
A7
B7 PP5V
C7 PP5V G4 PD_ADCIN1
D7 PP5V ADCIN1
E7 PP5V
F7 PP5V G3 PD_ADCIN2
G7 PP5V ADCIN2
H7 PP5V
PP5V
G5
PA_CC1 TBT_CC1 72
H5
PA_CC2 TBT_CC2 72 3D3V_S5
C B5 C
PB_CC1 A5
PB_CC2
R7306
R7307
C7310
C7311
A4
42 TBTB_GATE_VSYS E8 PA_GATE_VSYS
071.20010.000U
2
42 TBTB_GATE_VBUS PA_GATE_VBUS
2
B4
SC220P25V1KX-2-GP 1
SC220P25V1KX-2-GP 1
D8 PB_GATE_VSYS
10KR2J-3-GP 1
10KR2J-3-GP 1
PB_GATE_VBUS
add 0ohm between CPU_SMB_INT#_PD and

PD pin34, in case PD FW has issue to
trigger un-expected INT# which cause
no boot(no SLP_S4#)
C1 D1
GPIO0 I2C_EC_IRQ# EC_I2C_INT_PD_N 24
G1 E1
GPIO1 I2C_EC_SCL F1 EC_I2C_CLK_PD 24 FROM EC
I2C_EC_SDA EC_I2C_DATA_PD 24
A6
71 RT_B_RESET_N GPIO2
H6
GPIO3 F2 PMC_ALERT_N R7315 1 2 0R2J-2-GP
B3 I2C2S_IRQ# DY PMC_ALERT_CPU_N 17
19,71 RT_FORCE_PWR GPIO4 E2 FROM CPU
C2 I2C2S_SCL D2 CPU_SMB_SCL_P0 18
71 RT_B_PWR_EN GPIO5 I2C2S_SDA CPU_SMB_SDA_P0 18
F6
GPIO6
G6 B1
GPIO7 I2C3M_IRQ# I2C3_INT_PD_N 71
B6 A2
B 4 USB_OC1_N GPIO8 I2C3M_SCL A1 I2C3_CLK_PD 71 B
1 2 100R1J-GP PROCHOT_PD_N C6 I2C3M_SDA#A1 B2 I2C3_DATA_PD 71
R7310
3,24,44,46 PROCHOT_CPU_N GPIO9 I2C3M_SDA#B2
TABLE I2C Addressing
GND
R7311
Master: EC
SN2001024YBGR-GP WPN 071.65994.000U I2C_EC PORT A 0x20
H2
IC PD CTRL PTPS65994AAYBGR WCSP 50P

2
Slave: PD
Master: CPU
3D3V_LDO_PD
I2C2 PORT A 0x23
R7319
RT_FORCE_PWR 2 1 Slave: PD
1
Master: PD
10KR1J-GP I2C3 PORT A 0x52
100KR1J-GP
Slave: RT
2
1
RN7301
SRN1KJ-7-GP
U7302
3
4
24 ALERT_EC_EN
I2C3_ROM_A0 1 8
2
2 A0 VCC 7 I2C3_ROM_WP_N
1
3D3V_LDO_PD R7329 3 A1 WP 6 I2C3_ROM_SCL R7323 1 2 0R0402-PAD-1-GP I2C3_CLK_PD

4 A2 SCL 5 I2C3_ROM_SDA R7324 1 2 0R0402-PAD-1-GP I2C3_DATA_PD
100KR1J-GP GND SDA
DYR7321
1
PMC_ALERT_CPU_N 10KR1J-GP 9
1
2
GND R7322
2
R7328 Q7302_G
10KR1J-GP AT24C256C-MAHL-T-GP DY10KR1J-GP
D
072.24256.0003
2
Q7302
1
G
DY
D
A Q7301 A
PMC_ALERT_N G
LSK3541G1ET2L-1-GP
S
084.03541.M001
<Core Design>
LSK3541G1ET2L-1-GP
S
084.03541.M001
Wistron Corporation
Title
TYPEC PD SN1905004
C -1
V550_TGL
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
TEST
Wistron Corporation
Title
EXT IO (TBT Re-Timer-2)
Custom
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A
Title
THUNDERBOLT CONNECTOR C
A4 -1
V550_TGL
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
GPU (RSVD) (PEG 1/5)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
GPU (RSVD) (DIGITAL 2/5)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
GPU (RSVD) (VRAM 3/5)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
GPU (RSVD) (GPIO 4/5)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
GPU (RSVD) (PWR/GND 5/5)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
GPU (RSVD) (VRAM1,2 1/4)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
GPU (RSVD) (VGA_CORE)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
GPU (RSVD) (Sequence)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
NTD ORS
Wistron Corporation
Title
GPU (RSVD) (Sequence)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
UNUSED PARTS (FIP)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
H2 H5
HOLE296R158-GP HOLE296R158-GP
ZZ.PAD01.V71 ZZ.PAD01.V71
FOR EMC
PW R_ADP_TOSYS_A
PW R_DCBATOUT_5V PW R_DCBATOUT_VCCAUX PW R_DCBATOUT_VCOREB PW R_DCBATOUT_VCOREA
1
1
TEST-EMC TEST-EMC TEST-EMC TEST-EMC
1
D D
1
EC8902 EC8903 EC8904 EC8905 EC8906
DY
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
2
2
2
2
HS1 HS2 HS3
STF237R113H62-4-GP STF237R113H62-4-GP STF237R113H62-4-GP
34.4SE26.001 34.4SE26.001 34.4SE26.001
1
HOLE1 HOLE3 HOLE4

HOLET297X262B420X288R138-S HOLET325X276B691X394R119-S HOLET348X276B499X526R119-2P-S
HOLET297X262B420X288R138-S HOLET325X276B691X394R119-S HOLET348X276B499X526R119-2P-S
C C
DY DY DY
1
1
FOR RF
1V_CPU_CORE
FC8906 FC8907 FC8908 FC8909 FC8910 FC8911
2
HOLE5 SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP
HOLE473X355R158-S HOLE6 HOLE7
HOLE473X355R158-S HOLE473X355R158-S1 HOLE355X296R158-S
1
HOLE473X355R158-S1 HOLE355X296R158-S
DY
DY DY
1
B B
1D8V_VCCIN_AUX
FC8912 FC8913 FC8914 FC8915 FC8916 FC8917
2
SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP
1
A TEST A
Wistron Corporation
Title
UNUSED PARTS (RF/EMI Capacitors)
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
INT IO (M.2 Myraid X VPU/ 2nd SSD)

A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
3D3V_S5
TABLE 071.33232.0H03 071.00750.0D03 071.09670.0I03
1
For SPI Chip Select Function: R9105
External 10KAohm pullAup (R9106)
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
0R0402-PAD-1-GP Pin TCG ST Micro NuvoTon Infineon
D D
ST: Optional No PTP Spec(V38) ST33HTPH2E32AHC0 NPCT750LABYX SLB9670VQ2.0 FW7.63
2
NuvoTon: MUST (20mA)
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA 1 VDD NC VSB VDD
3D3V_SUS_TPM
2 GND GND NC GND
3 NC NC NC NC
4 GPIO PP GPIO/PP NC
SC10U6D3V3MX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
5 NC NC NC NC
1
DY 6 GPIO NC GPIO3 GPIO
2
R9104 R9106 C9101 C9102 C9103 R9107 7 GPIO GPIO NC PP
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 8 VDD NC VHIO VDD
1
2
2
14
22
1
8
U9101
9 NC NC NC GND
NIC#1
NIC#8
NIC#14
VPS
3
NIC#3 4 10 NC NC NC NC
R9108 1 2 0R0402-PAD-1-GP SPI_CS_TPM_N2 20 NIC#4 11 NC NC NC NC
18 SPI_CS_CPU_N2 SPI_CLK_TPM SPI_CS#
R9101 1 2 15R1J-GP 19 7 12 NC NC NC NC
24,25 SPI_CLK_ROM_R SPI_SI_TPM SPI_CLK GPIO_PP
R9102 1 2 15R1J-GP 21
24,25 SPI_SI_ROM_R
R9103 1 2 15R1J-GP SPI_SO_TPM 24 MOSI 5 13 GPIO NC GPIO4 NC
24,25 SPI_SO_ROM_R MISO NIC#5 14 NC NC NC NC
11
NIC#11
17,24,63 PLTRST_CPU_N
17
SPI_RST# NIC#12
12 15 NC NC NC NC
C 15 16 GND NC GND NC C
18 NIC#15 25
19 PIRQA_N SPI_PIRQ# NIC#25 26
10 NIC#26 27 TPM_SERIRQ
31 NIC#10 NIC#27 28
NIC#31 NIC#28
6 9
13 GPIO_LP NIC#9 16
29 NIC#13 NIC#16 23
17 SPI_RSTA SPI_RSTA RSTA RSTA
30 NIC#29 NIC#23 32 18 SPI_PIRQA SPI_PIRQA PIRQA/GPIO2 PIRQA
NIC#30 NIC#32 19 SPI_CLK SPI_CLK SCLK SCLK
2 20 SPI_CSA SPI_CSA SCSA/GPIO5 CSA
GND 33
NIC#33 21 MOSI MOSI MOSI/GPIO7 MOSI
22 VDD VPS VHIO VDD
ST33HTPH2X32AHD4-GP 23 GND NC GND GND
071.33232.0J03 24 MISO MISO MISO MISO
SPI Chip Select Pin:

ST (SPI_CSA) Internal pullAup
NuvoTon (SCSA) Internal pullAup is disabled if the pin is part of the recognized host interface 25 NC NC NC NC
26 NC NC NC NC
27 NC NC NC NC
28 NC NC NC NC
TPM TABLE 29 SDA/GPIO1 NC SDA/GPIO0 NC
B
1st ST33HTPH2X32AHD4 071.33232.0J03 30 SDA/GPIO0 NC SCL/GPIO1 NC B
31 NC NC NC NC
2nd NPCT750LADYX 071.00750.0H03 32 NC NC NC GND
China TCM TABLE
1st Z32H330TCASQNA751 071.32330.0B03
A TEST A
Wistron Corporation
Title
INT IO (TPM)
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
INT IO (RSVD) (Finger Printer)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
A
Title
EXT IO (Function Key)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
Wistron Corporation
Title
EXT IO (RSVD) (Smart Card/COM/PS2)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
Wistron Corporation
Title
EXT IO (RSVD) (Docking/LPT)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
Wistron Corporation
Title
Commercial (RSVD) (SW GFX eDP)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
Wistron Corporation
Title
Consumer (RSVD) (LAN)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
TEST
Wistron Corporation
Title
Consumer (RSVD) (LAN Switch)
A
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
1
3 CPU_JTAG_TCK TP9903 TPAD14-OP-GP
1
3 PCH_JTAG_TCK TP9904 TPAD14-OP-GP
1
3 CPU_JTAG_TMS TP9905 TPAD14-OP-GP
3 CPU_JTAG_TDI 1
TP9906 TPAD14-OP-GP
C 1 C
3 CPU_JTAG_TRST_N TP9922 TPAD14-OP-GP
1
3 CPU_JTAG_TDO TP9920 TPAD14-OP-GP
1
17 SYS_RESET_N TP9921 TPAD14-OP-GP
1
3,15 DBG_PMODE TP9908 TPAD14-OP-GP
17,24 RSMRST_N_KBC 1
TP9909 TPAD14-OP-GP
1
6 CFG3 TP9910 TPAD14-OP-GP
3 CPU_JTAG_PRDY_N 1
TP9911 TPAD14-OP-GP
1
3 CPU_JTAG_PREQ_N TP9923 TPAD14-OP-GP
B B
TEST
A
Title
Debug (XDP/HDT conn)
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
LV550 TYPE-C Block Diagram

TGL
TCP0
AUX0
LSx
D 2pair TCSS TX D
2pair TCSS RX/
TCP2 AUX/LSx
AUX2
LSx
SML0
CC
PD control
TPS65994AD
SML1 SMBUS
4pair TCSS/ SBU
USB3
TBT Re-timer
C
PA_CC BURNSIDE BRIDGE C
SMBUS
TBT/DP/USB/PD
I2C I2C
I2C
CC
USB3
DP
DP_AUX/HPD
ESPI
B B
EC NPCE386PB0BX
I2C-2
I2C-3
A TEST A
Wistron Corporation
Title
Table of Content
A3
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
D D
Not Stuffed-AMP :ZZ,DY,DY-EMC,DY_RF,NON-AMP,DEBUG
Not Stuffed-NON AMP :ZZ,DY,DY-EMC,DY_RF,AMP,DEBUG
C C
B B
TEST
A
Title
SMT memo
A4
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
Intel-Power Up Sequence
Tiger Lake U POWER UP SEQUENCE DIAGRAM
-18 3D3V_AUX_S5 -17

(3D3V_DSW)
PWR_DCBATOUT_3D3V EN 3V_VOUT
TPS51393P 5V_S5
PWR_3D3V_LDO -14
LDO
VIN
45 VIN
PGOOD
S5_ENABLE 3D3V_S5
D VOUT D
-15 EN
G2898KD1U
(U4002)
40
VIN 5V_AUX_S5 -17
LDO
TPS51395PRJER
SWITCH
BATT2 WC_PWR (U4301) 5V_S5
Wireless Charge 5V_VOUT -17
PWR_DCBATOUT_5V EN
43 SWITCH 45
43 (PU4403) -18
VINT20_IN
44
SWITCH
-17 (Q2402 3D3V_AUX_KBC -16
EC_ENABLE_N
24
PD Controller &
Power switch EC_ENABLE_N
(U7501 & U4203) -17
42, 75
-17
-18 5V_S5_EN -11
3D3V_AUX_S5 VCCST_PWRGD 9
PD Adapter in VCCPD_VBUS 19V_DCBATOUT
(USB-C Port3) SWITCH
73 (PU4405) S5_ENABLE -15 12 PROCPWRGD
-19 44
PCH_PWROK 11
VSBY PSL_OUT# GPIO34
1 GPIO02 PM_SLP_S4_N
KBC_PWRBTN_N -2 2
KBC RSMRST_N_KBC
AC_IN#
NPCE386PB0BX GPIO36 RSMRST# PM_SLP_S3#
-19 (U2401) PM_PWRBTN_N 5
GPIO20 PWRBTN# Tiger Lake
CPU PM_SLP_SUS_N
BT+ 1a (CPU1) -12
BQ25710R AC_PRESENT
DC Battery GPIO77 14
(BATT1) Charger GPIO97 (delay 99ms) 24 -1 PLT_RST#
43 (PU4401)
44
DDR_VTT_CNTL
ALL_SYS_PWRGD SYS_PWROK SM_PGCNTL
8 13 SYS_PWROK 10
C10_GATE#
-13
DSW_PWROK
5a
C C
SLP_SUS# ON POWER SLP_S3# ON POWER ALL_SYS_PWRGD ON POWER

3D3V_S0
3D3V_DSW 5V_S5
3D3V_S5 VDDQ_PWRGD ALL_SYS_PWRGD
4 D4001 8
-9 VIN1 VIN2 PM_SLP_S3#
40
VIN
5
1D8V_S5 G2898KD1U
PM_SLP_SUS_N VOUT SWITCH 5V_S0
-12 EN (U4001)
1D8V_S5_PWRGD
PM_SLP_S3#
EN1 VOUT1
7 3D3V_S5
PGOOD
RT5797ALGQW EN2 VOUT2 3D3V_S0
53
40 74LVC1G07GW VCCST_PWRGD_R
ALL_SYS_PWRGD 9
8 A SWITCH
(U1701)
1D05V_S5_OUT
17
-7 1D8V_S5
VCCST_EN VIN 1D05V_VCCST

VOUT VIN1 VIN2
-8 EN 19V_DCBATOUT 5V_S5
G5027CRD1D
(U4005) G2898KD1U
40 SWITCH
(U4003) VIN VCC PWR_VCORE_PWM1
EN1 VOUT1
7
PWR_VCORE_PWM2
19V_DCBATOUT PM_SLP_S3# EN2 VOUT2 1D8V_S0 VR A
40
1D8V_S5_PWRGD
VIN
1D8V_VCCIN_AUX
-9 EN VOUT ALL_SYS_PWRGD
-6 8 EN
RT6543AGQW IMVP9
for 1D8V_VCCIN_AUX RT3613EEGQW
(PU5001) (PU4601)
B B
VCCIN_AUX_PWRGD PCH_PWROK
VR_READY 11
46
-6
50
PWR_DCBATOUT_VCORE
5V_S5
VIN VCC
1V_CPU_CORE 10
1D05V_S5_OUT PWR_VCORE_PWM OUTPUT
8 PWR_VCORE_CS EN
-8 MP86901
VIN 1D05V_VCCSTG (PU4701, PU4702,
VCCSTG_EN G5027CRD1D PU4703)
EN SWITCH VOUT 47
(U4005) -6
40
SLP_S4# ON POWER
PWR_DCBATOUT_VDDQ
VIN 1D1V_S3
PM_SLP_S4_N 4
2 S5 VOUT
0D6V_S3 5
TPS51487XRJER
for VDDQ
(PU5101)
A 1D8V_S3 A
51
3
<Variant Name>
Wistron Corporation
Title
Power Sequence
E
V550_TGL -1
5 4 3 2 1
5 4 3 2 1
TBT- Retimer1/2
POWER BLOCK DIAGRAM R7446 VIN
APE8939GN3 R7172 VIN

VIN 71 74
TypeC Adapter TBTB_VBUS20_CONN PWR Switch Vout
3D3V_RT_TCP2
CSD87501L VINT20_IN RETIMER2_PWR_EN_R EN1
Vout Vout 74
72 42 TypeC Controller
APE8939GN3 VIN
VIN
3D3V_RT_TCP1
RETIMER1_PWR_EN_R Vout
D EN1 71 D
72
SY6288C20AAC
VIN
WLAN_PWR_EN Vout 3D3V_WLAN SPI ROM
Batt Charge Ctrl EN1 55 VIN
R2501
BQ25710RSNR
25
3D3V_LCD_S0
VIN TPS54302DDCR 8V_AMP Audio AMP
VINT20_IN 19V_DCBATOUT Touch Panel
VIN VIN SY6288C20AAC 3D3V_TOUCH_S0
PR4419 Vout Vout VIN Vout R5504 VIN
PWR_SMP_EN TOUCH_PWR_EN
44 EN 54 28 EN1 55
VIN 55
RT5797ALGQW
Batty BT+ VIN 1D8V_S5
Vout LCD
PR4402 MOS PWR_1D8V_EN
Vout EN1 53 VIN
43 R5501
3D3V_S5
19V_DCBATOUT TPS51393PRJER 55
VIN
PG4515 PWR_3D3V_LDO
PG4516 LDO DSW G2898KD1U
PWR_3D3V_EN
PG4517 EN1
C
PG4518
Vout 3D3V_AUX_S5 3D3V_AUX_S5 VIN Vout
Touch Panel C
45
R7001
VIN
S5_ENABLE EN1 40 70
WLAN
R6124 VIN
61
19V_DCBATOUT G2898KD1U
VIN TPS51395PRJER 5V_AUX_S5
PG4552 VIN Vout 5V_S0
PG4553 LDO
PG4555
PWR_5V_EN 5V_S5 R4002
SSD
EN Vout VIN 3D3V_S0
PG4557
Vout R4004
VIN
PG4559 R6311
PG4561 EN1
CPU 45 63
1D05V_S5_OUT 3V_5V_S0_EN EN2 40
Vout
22
19V_DCBATOUT RT6543AGQW TPAD
VIN
1D8V_VCCIN_AUX R6507
VIN
Vout 65
PWR_VCCAUX_EN
EN 50 G2898KD1U
B B
VIN Vout 3D3V_LCD_S0
APE8939GN3 R4032
VIN 19V_DCBATOUT
1D05V_VCCST VIN TPS51487XRJER VIN 1D8V_S0
VCCST_EN EN1 Vout PG5101
Vout
R4010 PG5102 PWR_VDDQ R4008
40 eDP_VDDEN_CPU EN1
Vout 0D6V_S3 PM_SLP_S3_N EN2
PWR_VDDQ_EN 40
EN 51
3D3V_TOUCH_S0
Touch Panel
VIN
APE8939GN3
VIN 1D05V_VCCSTG 19V_DCBATOUT G517F1T12U
VIN AOZ5516QI 3D3V_AUX_S5 70
VCCSTG_EN EN1 Vout 1V_CPU_CORE VIN
R4009
40 Vout 3D3V_TOUCH_S0
Vout TOUCH_PWR_EN
PWR_VCORE_PWMA EN1 55
KBBL
PWM 47 VIN
R6505
55
19V_DCBATOUT AOZ5516QI
VIN
1V_CPU_CORE 5V_FAN1_S0
R2641 FAN*2
Vout VIN
PWR_VCORE_PWMB 5V_FAN2_S0
PWM 47 R2641
26
A A
<Variant Name>
Wistron Corporation
Title
Power Block Diagram

Custom
V550_TGL -1
5 4 3 2 1
A B C D E
PCH SMBus Block Diagram 3D3V_AUX_KBC

3D3V_S0
RN1803 ‧
SRN1KJ-7-GP
R2456 R2455
4K7R1J-GP 4K7R1J-GP
CPU_SMB_SCL
R9936
0R1J-GP CPU_SMB_SCL_XDP XDP Connect Battery Conn.
SMBCLK ‧ R9937
SCLK PR4320
100R1J-GP
CPU_SMB_SDA 0R1J-GP CPU_SMB_SDA_XDP 20.F0971.060 SCL1 ‧
BAT_I2C_SCL BAT_I2C_SCL_CN CLK_SMB 020.F1349.0008
1 SMBDATA ‧ SDA
BAT_I2C_SDA BAT_I2C_SDA_CN DAT_SMB 1
3D3V_SUS XDP1 3D3V_S5 SDA1 ‧ BATT1

PR4321
RN1801
U7201
‧
ECIO 100R1J-GP
Power Charger
SRN1KJ-7-GP EXT IO (Nuvoton PR4459
0R0402-PAD-1-GP PWR_CHG_SCL
SCL BQ25710RSNR-GP
(TypeC Controller) PWR_CHG_SDA
CPU_SMB_SCL_P0
R7156
0R1J-GP BB_SMB_SCL_RT1
R2460
10KR1J
R2461
10KR1J NPCE38APB0DX) PR4460
SDA
PU4401
SML0CLK ‧ TPS65988DJRSHR R2425 0R0402-PAD-1-GP
R7159 0R1J EC_I2C_SCL2
BB_SMB_SDA_RT1 EC_I2C_SCL_TIPD
SML0DATA
CPU_SMB_SDA_P0
‧
0R1J-GP 071.65988.0G03 I2C1_SCL
‧
SCL2
R2402
EC_I2C_SDA_TIPD 0R1J EC_I2C_SDA2
I2C2_SDA
I2C2_SCL
I2C1_SDA ‧
SDA2
GPIO5
GPIO6
3D3V_SUS R7124 R7417
NPCE38APB0DX
SMBUS_SCL
SMBUS_SDA
PCH RN1807
TBT Re-Timer
ZZ.000IC.002
I2C_SCL
BB_I2C_SDA_RT1 0R1J-GP
R7140
‧ BB_I2C_SDA_PD 0R1J-GP
R7418
BB_I2C_SDA_RT2
0R1J-GP BB_I2C_SCL_PD 0R1J-GP BB_I2C_SCL_RT2

SRN1KJ-7-GP BB_I2C_SCL_RT1 ‧
I2C_SDA
U7101
CPU_SMB_SCL_P1 3D3V_S5
‧
I2C_SCL
I2C_SDA
SML1CLK TBT Re-Timer
CPU_SMB_SDA_P1
SML1DATA ‧ R7448
0R1J-GP BB_SMB_SCL_RT2 ‧
SMBUS_SCL
2 2
R7449 ZZ.000IC.002
0R1J-GP BB_SMB_SCL_RT2
SMBUS_SDA
U7401 R2462
10KR1J
R2463
10KR1J
EXT IO
R2403 RTS5450-GR-1-GP
0R1J EC_I2C_SCL_RTPD
SMBus Address: SCL3
EC_I2C_SCL3
‧ SM_SCL 071.05450.0003
3D3V_S0
SDA3 EC_I2C_SDA3
‧ EC_I2C_SDA_RTPD
SM_SDA
R2428
RN2002
SRN2K2J-1-GP
Sensor /Touch Panel I2C_SCLK
I2C_SDA
0R1J
Connect U7501
020.K0032.0020 3D3V_S5
I2C_SCLK
I2C_SDA
I2C1_SDA CPU_I2C_SDA_TS
‧ SDA
I2C1_SCL
CPU_I2C_SCL_TS
‧ SCLK
TCBD1
‧
3D3V_S0
R2464 R2465
10KR1J 10KR1J 1D8V_AMP_S0
RN2004
SRN2K2J-1-GP
R2490
0R1J EC_I2C_SCL_SAR
IO1(SAR Connect)
SCL4A EC_I2C_SCL4
‧‧ CLK ‧
Free Fall Sensor EC_I2C_SDA_SAR PSC-CON6-GP
R6502
0R1J-GP + G Sensor
SDA4A EC_I2C_SDA4
‧ ‧ SDA
CPU_I2C_SDA_P0 CPU_I2C_SDA_TPAD Touch Pad 20.K0788.006 IO1
I2C0_SDA ‧
R6508 ‧ SDA
074.LIS2D.0A70
R2491
0R1J
1D8V_AMP_S0
R2814
2KR1F-GP
R2813
2KR1F-GP
Audio AMP
CPU_I2C_SCL_P0 0R1J-GP CPU_I2C_SCL_TPAD 020.K0255.0008
I2C0_SCL ‧ ‧ SCLK
U7001
R2429 ALC1308-CGT-1-GP
3 0R1J EC_I2C_SCL_AMP 3
TPAD1 EC_I2C_SCL_AMP_LS 074.01308.0013
3D3V_TOF_S0 ‧ SCL
EC_I2C_SDA_AMP Q2801 EC_I2C_SDA_AMP_LS
R2430
‧ SDA
‧ 0R1J
3D3V_ALS_S0
DY DY
R5530 R5529 U2801
10KR1J 10KR1J Panel / Camera / ‧
3D3V_S0 R5522
0R1J-GP
DMIC / TOF
CPU_I2C_SDA_TOF
‧ SDA
R5523 20.F1407.040 R5532 R5531
RN2003
SRN2K2J-1-GP
0R1J-GP
‧ CPU_I2C_SCL_TOF SCLK LCD1 10KR1J 10KR1J
R5526
CPU_I2C_SDA_ISH 0R1J-GP CPU_I2C_SDA_ALS
ISH_I2C0_SDA ‧ ‧ ‧
CPU_I2C_SDA_ISH
‧ ‧
R5527
ISH_I2C0_SCL
CPU_I2C_SCL_ISH
‧ ‧ ‧
CPU_I2C_SCL_ISH
‧
0R1J-GP
‧ CPU_I2C_SCL_ALS
3D3V_S0
1D8V_S0
RN2005 EC_I2C_SCL4
SRN1KJ-7-GP Q2410 EC_I2C_SDA4
DY
I2C3_SDA CPU_I2C_SDA_P3
4
CPU_I2C_SCL_P3
‧ NC#42 4
I2C3_SCL ‧ NC#40 VPU

062.10003.0991
<Core Design>
VPU1
Wistron Corporation
Title
SMBUS/I2C BLOCK DIAGRAM
V550_TGL -1
A B C D E
A B C D E
Thermal Block Diagram

1 1
3D3V_S0 5V_FAN1_S0
ECIO
2
(Nuvoton 10KR2J-L-GP VIN 2
U2603 NPCE386PB0BX) FAN_PWM1

Q2603 NCT7718W
GPIO66 ‧ FAN1
GPIO56 FAN_TACH1 FAN_TACH1_CON TACH
@Charger D+ @5V
SMB_THERM1 3D3V_S0 D2601 5V_FAN2_S0
D-
083.52030.008F
U2602 VIN
10KR2J-L-GP
Q2605 NCT7718W FAN_PWM2
@SSD D+ @CPU Power
SMB_THERM2 GPIO32 ‧ FAN2
GPIO14 FAN_TACH2 FAN_TACH2_CON TACH
D-
D2602
PAGE26 083.52030.008F
3 3
U2604
NCT7717U
@Ambient
4 <Core Design> 4
Wistron Corporation
Title
Thermal Block Diagram
V550_TGL -1
A B C D E
A B C D E
C2825
SCD22U25V3KX-GP
Audio Block Diagram
L2804 R2903
ALC1309D1_BSTB HCB1608KF-300T50-GP 0R2J-2-GP
BST_B
ALC1309D1_OUTB AUD_SPK_R- AUD_SPK_R-_CON
Audio AMP OUTB_N_RCH ‧
074.01308.0013 C2824
1 SCD22U25V3KX-GP 1
ALC1309D1_BSTA L2803 R2904

BST_A R2818 HCB1608KF-300T50-GP 0R2J-2-GP
D2R2F-1-GP
ALC1309D1_OUTA AUD_SPK_R+ AUD_SPK_R+_CON
OUTA_P_RCH ‧ ‧
SNDW1_CLK
SDW1_SCL_CPU R2830
22R1F-GP
‧
SDW0_SCL_AMP_R SDW_CLK
R_ISENSE
ALC1309D1_R_ISENSE
C2826
SPEAKER
R2829
SDW1_SDA_CPU 22R1F-GP SDW0_SDA_AMP_R SDW_DAT SCD22U25V3KX-GP 20.F1639.004
SNDW1_DATA ‧ L2805 R2901
DY DY BST_C ALC1309D1_BSTC HCB1608KF-300T50-GP 0R2J-2-GP
R2826 R2825
Do Not Stuff OUTC_N_LCH ALC1309D1_OUTC AUD_SPK_L- AUD_SPK_L-_CON
Do Not Stuff
‧
C2827
SCD22U25V3KX-GP
R2801
SDW0_SCL_CPU 0R1J-GP SDW0_SCL_AMP L2806 R2902
SNDW0_CLK ALC1309D1_BSTD
R2802
‧ BST_D R2819
D2R2F-1-GP
HCB1608KF-300T50-GP 0R2J-2-GP
SDW0_SDA_CPU 0R1J-GP SDW0_SDA_AMP ALC1309D1_OUTD AUD_SPK_L+ AUD_SPK_L+_CON
SNDW0_DATA
‧ OUTD_P_LCH ‧ ‧ SPK1
ALC1309D1_L_ISENSE
L_ISENSE
R2828 R2827
0R1J-GP 0R1J-GP
U2801
2 2
SDW0_SCL_AUD R2714
22R1J-GP
SDW0_SCL_AUD_R
CPU SDW0_SDA_AUD
R2703
R2715
22R1J-GP SDW0_SDA_AUD_R
3KR1F-GP
R1904 R2726 HDA
SDW_DATA
SDW_CLK
HDA_BCLK HDA_BITCLK_CPU33R2J-2-GP HDA_BITCLK_CODEC Do Not Stuff
HDA_BCLK_AUD
R1901 R2725 HDA ‧ MHDA_BCLK R2743
HDA_SYNC HDA_SYNC_CPU 33R2J-2-GP HDA_SYNC_CODEC Do Not Stuff HDA_SYNC_AUD AUO_MIC_VREFO_R 2K2R1J-GP L2705
MHDA_SYNC
R1905 R2731 HDA MIC2-VREFO-R BLM18SG121TN1D-GP
HDA_SDO HDA_SDOUT_CPU 33R2J-2-GP HDA_SDOUT_CODEC Do Not Stuff HDA_SDO_AUD MHDA_SDATA-OUT AUO_MIC_R AUD_SELEEVE
R2732 HDA
HDA_SDIN0_AUD
SLEEVE/MIC2-R(PORT-F-R) ‧
HDA_SDI0 HDA_SDIN0_CPU Do Not Stuff
MHDA_SDATA-IN
R2744
AUO_MIC_VREFO_L 2K2R1J-GP L2702
MIC2-VREFO-L BLM18SG121TN1D-GP
AUO_MIC_L AUD_RING
HDA_SYNC_AUD RING2/MIC2-L(PORT-F-L) ‧
1D8V_DVDD
Audio
Audio Codec L2703
BLM18SG121TN1D-GP R2905 Jack
3 ‧ ALC711 AUO_HPOUT_L
‧
AUD_HPOUT_L 30D1R2F-L-GP
AUD_HPOUT_L_R 3
HPOUT-L/USB-DN_OUT
AUO_LINE1_L
022.10002.00U1
LINE1-L(PORT-C-L)
R2733 C2723 L2704
DY
Do Not Stuff DY R2735 SC10U25V3MX-GP BLM18SG121TN1D-GP
Do Not Stuff AUO_HPOUT_R R2906
AUD_HPOUT_R30D1R2F-L-GP AUD_HPOUT_R_R
HPOUT-R/USB-DP_OUT
AUO_LINE1_R ‧
LINE1-R(PORT-C-R)
DMIC_SCL_AUD_R C2724
‧ DMIC_CLK 1D8V_AVDD
SC10U25V3MX-GP
DMIC_SDA_AUD_R
‧ DMIC_DATA
DY Do Not Stuff
DY Do Not Stuff
R2461
071.00711.0D03 10KR1J
R2734
R2736
R2708 R2907
AUO_HPJD_N 0R1J-GP AUD_HPJD_N 0R2J-2-GP AUD_HPJD_N_R
AGP1 ‧ AUD1
U2701
R5551
DY Do Not Stuff
DMIC_SDA_AUD
4 4
R2729 R5516 <Core Design>
DY Do Not Stuff
DMIC_SDA_CPU 33R2J-2-GP DMIC_SDA_CON
DMIC_DATA1 ‧ Wistron Corporation
R5550
DMIC_SCL_AUD
DY
Do Not Stuff DMIC 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R2730 R5513 Title

DMIC_SCL_CPU 33R2J-2-GP DMIC_SCL_CON Audio Block Diagram
DMIC_CLK_A1 DY Do Not Stuff
‧ LCD1 Size Document Number Rev
V550_TGL -1
A B C D E

Wistron 19869-1 Thinkbook 13s Gen2 Intel

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Wistron 19869-1 Thinkbook 13s Gen2 Intel

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5 4 3 2 1

The naming rule is

PCB Layer Stackup

PCB P/N: 19869

D 13”14” FHD LCD Battery Charger/Selector D

with touch eDP x4 LPDDR4X 3733MHz Channel A LPDDR4X-Memory Down 1 BQ25710 44

Touch Panel Intel CPU System DC/DC

Type C (TBT) TBT RETIMER HDA/SNDW

SMBUS Hall Sensor 67 DC/DC 1D8V_S3

I2C Touch Pad 65

USB3.1 USB3.0 Re-Driver USB3.1 USB1(USB3.0)AOU

1D05V_VCCSTG_TERM 1D05V_VCCSTG_TERM #575683 Rev0p95

1 R311 2 PCH_OPI_RCOMP GPP_F10

2. This signal is in the primary well.

LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL) DDR4/LP4/LP5/LP5 CMD Flip

TGL-U-1-GP-U1 Wistron Corporation

46 VSSCORE_SENSE 1V_CPU_CORE 13 OF 21 1V_CPU_CORE

(1.5A) 1D1V_S3 AA39 AF9

Lack of VCCPLL_OC / VCC1P8A / VCCPLL

Monday, July 27, 2020

1D8V_S5 1D05V_VCCSTG 1D05V_VCCST #607872 Rev1p1

#607872 Rev1p1 TEST

21,61 CNV_RGI_DT Move to Page 25 Move to Page 25

Why GPP_E10, GPP_E11 need PU?

UART0_TXD 0=>Integrated CNVi enabled.

TYPEA Port1 CPU1I 9 OF 21

USB_OC0_N R1605 2 1 10KR2J-3-GP

24,63,91 PLTRST_CPU_N 3D3V_S0

C1805 C1806 NON-AMP

1D8V_S5 GPP_F15 GPP_F14 GPP_F13 GPP_F12 GPP_F11 SPI0_MOSI

Follow #607872 SchChk Rev1p1

MEM_ID0_0 MEM_ID1_0 MEM_ID2_0 MEM_ID3_0 MEM_ID4_0 SPI0_IO3

71,73 RT_FORCE_PW R 7 OF 21 CPU1G

HDA_BITCLK_CODEC 1 R1901 210R2J-2-GP HDA_BITCLK_CPUDR38 DW15

MODERN_STANDBY DC53 DR27

1D05V_S5_OUT 3D3V_S5 3D3V_GPPR_S5

C2216 C2217 1 C2218

Close to pin DD37

3D3V_AUX_KBC PCB VERSION

PURE_HW_SHUTDOWN_N 2 1 PURE_HW_SHUTDOWN_N_B B Q2401 SC1U10V2KX-1GP

17,40,54,57 PM_SLP_S3_N GPIO01/TB2 KBSOUT2/GPIOB2/TMS E10 KCOL3

EXT_RST# KBSIN4/GPIOA4 B13 KROW5 Q2402

C2417 C2416 071.00388.000U

R2477 1 2 10KR1J-GP KBC_NOVOBTN_N AC_PRESENT R2440 1 2 10KR1J-GP 2N7002K-2-GP

R2453 1 2 10KR1J-GP S5_ENABLE

18 SPI_CS_CPU_N0 SPI_HOLD_CPU R2530 1 2 100KR1J-GP

24,91 SPI_SO_ROM_R SPI_SI_CPU 1 2 SPI_SI_ROM_R 1 2 15R1J-GP SPI_SI_ROM

SPI_WP_CPU R2510 1 2 0R0201-PAD-GP SPI_WP_ROM

20,25 RTC_DET_N 3D3V_S5 3D3V_SPI

SPI ROM 32M R2501 1

GIGADEVICE GD25R256DYIGR 072.25256.0H03 W25R256JVEIQ-GP

3D3V_RTCVCC_CONN 3D3V_RTC_PWR LBAT54CLT1G-1-GP

R2526 2 1 1KR2J-1-GP S D 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Close to Charger 3D3V_S0

3D3V_S0_NCT7718 1 8 CPU_SMB_SCL_THERM1 R2628 1 2 0R0402-PAD-1-GP

24 FAN_ID1 FAN_ID1 5 FAN_ID

FAN_TACH2 A K FAN_TACH2_CON 2 AFTP2606 1

PCB trace width of Mic1-R/Mic1-L(SLEEVE/RING2) are

3 Analog Plane 36 AUDIO_PCBEEP C2716 2 1 SCD1U6D3V1KX-GP BEEP_MIX_ATT

AVDD2 SPK-OUT-L+ CODEC_SP_OUTL+ 29

AUDIO_CPVPP 28 30 AUDIO_HP-OUT-L R2705 1 2 47R1J-GP HP_L_JACK

PLACE UNDER U175 ALC3306AGRT

R2712 R2719 1KR2J-1-GP

PT4703 PC4703 PR4706 Cyntec. 6.87.62.4

PU4702 Cyntec. 6.87.62.4