(Solved) - The flip-flop circuit in Figure 7–95(a) is used

to generate a... (1 Answer)

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The flip-flop circuit in Figure 7–95(a) is used to generate a binary

count sequence. The gates form. 1 answer below »

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The flip-flop circuit in Figure 7–95(a) is used to generate a binary count sequence. The
gates form a decoder that is supposed to produce a HIGH when a binary zero or a binary
three state occurs (00 or 11). When you check the QA and QB outputs, you get the
display shown in part (b), which reveals glitches on the decoder output (X) in addition to
the correct pulses. What is causing these glitches, and how can you eliminate them?

1 Approved Answer

ALTAF B answered on February 25, 2022

4 Ratings (5 Votes)

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Answer : Glitches occur in real-world circuits for a variety of reasons: 1. Clock is applied
asynchronously, resulting in mismatches between gate inputs as changes in Qa are not
reflected in Qb at the same time. CURE: Each flipflop of the counter is provided a
synchronised clock, which greatly lowers the problem. 2. There are some delays in giving
output to the desired inputs because practical gates are used. These are gate delays, and
as the number of stages of gates used grows, so do the delays (since output of first goes
as input to second stage). CURE: Use quality gates with the shortest propagation time.
Depending on the application, the type of gate, such as ECL or TTL, should be carefully
selected. 3. When inputs to gates arrive at different times, the gate output becomes
ambiguous. CURE: When designing the circuit's wiring, take special attention to ensure
that the inputs to both terminals of the gates travel nearly the same length of conductor. 4.
Because flipflops are made up entirely of gates, all of the preceding precautions apply to
them as well.

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