Module - I: Students of S3 - IT & CS (2004) Have Made Contribution Towards The Construction of This Technical Document

S O LI D S T A TE E L E CT R O N I CS
MODULE - I Students of S3 – IT & CS (2004)

have made contribution towards the construction of this
Technical Document.
..:: QUESTION BANK ::..
Division of Computing Sciences

Rajagiri School of Engineering and Technology
MODULE - I
TRANSISTOR CIRCUITS

Solid State Electronics Question Bank for Third Semester CS & IT 2
This is a vague compilation of Questions and Solution Tips. The Reader must verify the answers independently
1. What is meant by thermal runaway in a transistor? Explain.
When current flows through the collector circuit, it produces heat at the collector
junction. This increases the temperature of the collector junction. More minority carriers are
generated in base collector region (since more bonds are broken).The leakage current ICBO
increases. This increase is very high since the leakage current is extremely temperature
dependent. It almost doubles for every 6 o rise in temperature in germanium and for every 10o
rise in silicon.
IC= B IB +ICEO.
ICEO = (1+B) ICBO.
So any increase in ICBO (current from collector to base when emitter open) is
magnified (1+B) times that is 200 to 300 times. This increases the collector current This
increase in the collector current produces an increase in the power dissipated at the collector
junction. This in turn further increase the collector current. This process is cumulative or
cyclic which would eventually destroy the transistor permanently. This is called thermal
runaway.
In practice, thermal runaway is prevented by the use of stabilization circuitry. For

transistors, handling small signals the power dissipated at the collector is small. Such
transistors have little chances of thermal runaway. However, in power transistors the power
dissipated at the collector junction is larger. So the chances of thermal runaway is also higher.
2. What is a heat sink? List the factors, which determine its efficiency.
To reduce the chance of thermal runaway, the rise of temperature at the collector
junction to a dangerous level can be checked if we make a suitable provision for rapid
conduction of heat away from the collector junction. This can be achieved by the use of a
sheet of metal called heat sink. Connecting the heat sink to a transistor increases the area
from which heat is to be transferred to the atmosphere.
Heat moves from the transistor to the heat sink by conduction, and then it is removed
from the sink to the ambient by convection and radiation. Even if we use a heat sink, which
can hold the temperature at ambient temperature the maximum power rating must be
considered.
For maximum efficiency the heat sink should
1. Be in good thermal contact with the transistor case.

2. Have the largest possible surface area
3. Be painted black
4. Be mounted in a position such that free air can flow past it.

3. Prove mathematically that the operating point does not depend on beta, in a potential
divider bias circuit.
To determine the operating point, consider the input section of the voltage divider
biasing circuit.
The base current IB is very small compared to the currents in R1 and R2.
I1 ~ I2
So,
VB=R2/ (R1+R2) * VCC
The voltage across the emitter resistor RE
VE=V2-VBE
Then the emitter current is
IE= V2-VBE
And
VC=VCC-ICRC
VCE=VC-VE = (VCC-ICRC)-IERE
Since collector current is approximately equal to emitter current
VCE=VCC-(RC+RE) IC
Since in the above analysis nowhere does beta appear in any equation, which means
that operating point does not depend upon the value of beta.
4. A transistor in a fixed bias amplifier circuit was replaced by another transistor of

beta equaling 150 instead of 60.if IB of transistor is equal to 100 microampere and
collector saturation current was 10 mill ampere. Find the new operating point.
Even though the transistor is changed, the base current remains the same that is 100
microampere.
The collector current becomes
IC=B*IB = 150*100E-6=15 mA

The collector saturation current was 10mA.This would be same even if the transistor
is replaced. But the calculated current IC is seen to be greater than IC(Sat).Hence the transistor
is now in saturation. So the operating point can be specified as
IC = IC(SAT) = 10mA
VCE = 0V
5. What are the advantages and disadvantages of a R-C coupled amplifier.
Advantages
• It has excellent frequency response. The gain is constant over the audio frequency
range which is the region of most importance for speech, music etc.
• It has lower cost since it employs resistor and capacitors, which are cheap.
• The circuit is very compact as the modern resistors and capacitors are small and
extremely light.
Disadvantages
• The R-C coupled amplifiers have low voltage and power gain.
• They have the tendency to become noisy with age, particularly in moist climates.
• Impedance matching is poor. It is because the output impedance of R-C coupled
amplifier is several hundred ohms, whereas the input impedance of a speaker is only a
few ohms. Hence, little power will be transferred to the speaker.
6. What are the applications of a R-C coupled amplifier.
The R-C coupled amplifiers have excellent audio fidelity over a wide range of
frequency. Therefore, they are widely used as voltage amplifiers e.g. in the initial stages of
public address system. If other type of coupling is employed in the initial stage, this result in
frequency distortion, which may be amplified in next stages. However, because of poor
impedance matching, R-C coupling is rarely used in the final stage.
7. Give an account on the operation of the R-C coupled amplifier.
When a.c. signal is applied to the base of the first transistor, it appears in the
amplified form across its collector load Rc. The amplified signal developed across Rc is
given to base of next stage through coupling capacitor Cc. The second stage does further
amplification of the signal. In this way, cascaded stages amplify the signal and the overall
gain is considerably increased.
It may be mentioned here that total gain is less than the product of the gains of
individual stages. It is because when a second stage is made to follow the first stage, the
effective load resistance of first stage is reduced due to the shunting effect of the input
resistance of the second stage. This reduces the gain of the stage, which is loaded by the next
stage. For instance, in a 3-stage amplifier, the gain of first and second stages will be reduced
due to loading effect of next stage. However, the gain of the third stage, which has no loading
effect of subsequent stage, remains unchanged. The overall gain shall be equal to the product
of the gains of three stages.
+ Vcc
R1 Rc R1 Rc
Cc Cc
Cin
input
signal R2 R2 Re Ce
output
Re Ce
8. Write a short note on the frequency response of a R-C coupled amplifier.
At low frequencies (<50Hz), the reactance of coupling capacitor Cc is quite high and hence
very small part of signal will pass from one stage ot the next stage. Moreover, Ce cannot
shunt the emitter resistance Re effectively because of its large reactance at low frequencies.
These two factors cause a falling of voltage gain at low frequencies.
At high frequencies (>20KHz), the reactance of Cc is very small and it behaves as a short
circuit. This increases the loading effect of next stage serves to reduce the voltage gain.
Moreover, at high frequency, capacitive reactance of base-emitter junction is low which
increases the base current. This reduces the current amplification factor β. Due to these
reasons, the voltage gain drops off at high frequency.
At mid-frequencies (50Hz to 20KHz), the voltage gain of the amplifier is constant. The effect
of coupling capacitor in this frequency range is such so as to maintain a uniform voltage gain.
Thus, as the frequency increases in this range, reactance of Cc decreases which tends to
increase the gain. However, at the same time, lower reactance means higher loading of first
stage and hence lower gain. These factors almost cancel each other, resulting in a uniform
gain at mid frequency.

9. What are the different types of coupling in amplifiers?
The coupling between stages of amplifications may also be used to classify

amplifiers. There are four main groups: direct-coupled amplifiers, resistance-capacitance
(RC)-coupled amplifiers, impedance-coupled amplifiers, and transformer-coupled amplifiers.
Direct-coupled Amplifiers : The following figure shows a direct-coupled amplifier

consisting of two stages. A dc voltage is applied directly to the grid of the first stage. The
plate output of this first stage is then connected directly to the grid of the second stage. The
bias and plate supply voltage (B+) for each succeeding stage must be greater than that of the
preceding one. Direct-coupled amplifiers are used in vacuum tube voltmeters and electronic
voltage regulators where small dc voltage changes must be amplified.
Figure : Direct coupled amplifiers
Resistance-capacitance (RC)-coupled Amplifiers : The following figure illustrates the

most widely used method for coupling between audio stages. The bias for each stage is
furnished by cathode voltage. The coupling capacitor, Cc, provides an ac path from the plate
of the first stage to the grid of the following stage but blocks any dc voltage. The load
resistor, RL, has a large value so that a large voltage change can be coupled to the grid of the
next stage. When a signal is applied to the first stage, voltage variations occur across RL.
These voltage variations are then coupled through the RC circuits, Cc and Rg, to the grid of
the second tube. The coupling capacitor, therefore, performs the double function of
providing a low-impedance ac path and of blocking dc plate voltage from the grid of the
second tube.

Figure : RC-coupled Amplifier.
Impedance-coupled Amplifiers : The figure shows how an impedance-coupled circuit

differs from an RC-coupled circuit. Plate-load resistor RL is replaced by inductor L. The
inductance makes possible a greater gain for a given band of frequencies by presenting a low
impedance for dc and increasing as the signal frequency increases. Prior to an applied signal,
the dc plate voltage is higher if the plate load is an inductance rather than a resistance.
However, for a given band of high frequencies, the impedance of L becomes greater than that
of RL in the RC-coupled amplifier. Therefore, a greater variation occurs across the
inductance at the higher frequencies, and a greater gain results.
Figure : Impedance-coupled Amplifier.
Transformer-coupled Amplifiers : The figure illustrates another type of coupling often

used to couple audio frequencies - the untuned transformer. Because of the step-up property
of the transformer, greater gain can be obtained with transformer coupling than with RC or
impedance coupling. This greater gain, however, is obtained at the expense of narrowing the
amplified bandwidth. Also, note that the transformer performs the double function of
coupling ac variations and blocking the dc plate voltage from the grid of the next stage. The
tuned transformer is usually used to couple radio-frequency amplifier stages. Capacitors
(shown as dotted lines in figure) are placed parallel to the transformer primary and secondary,

forming two parallel-tuned circuits. Greater gain and narrower bandwidth result from tuned
transformer coupling if the merit factor (Q) of the tuned circuits is high.
10. What is meant by amplification?
The basic amplifying elements are, namely valves (vacuum tubes), bipolar transistors
and FETs. The term "amplify" basically means to make stronger. The strength of a signal (in
terms of voltage) is referred to as amplitude, but there is no equivalent for current.
To understand how any amplifier works, you need to understand the two major types of
amplification, and a third "derived" type:
• Voltage Amplifier - an amp that boosts the voltage of an input signal

• Current Amplifier - an amp that boosts the current of a signal
• Power Amplifier - the combination of the above two amplifiers
In the case of a voltage amplifier, a small input voltage will be increased, so that for
example a 10mV (0.01V) input signal might be amplified so that the output is 1 Volt. This
represents a "gain" of 100 - the output voltage is 100 times as great as the input voltage. This
is called the voltage gain of the amplifier.
In the case of a current amplifier, an input current of 10mA (0.01A) might be amplified to
give an output of 1A. Again, this is a gain of 100, and is the current gain of the amplifier.
If we now combine the two amplifiers, then calculate the input power and the output
power, we will measure the power gain:
P=VxI (where I = current, note that the symbol changes in a formula)
Input Impedance : Amplifiers will be quoted as having a specific input impedance. The sort
of load it will place on preceding equipment, such as a preamplifier. It is neither practical nor
useful to match the impedance of a preamp to a power amp, or a power amp to a speaker.
The load is that resistance or impedance placed on the output of an amplifier. In the case of a
power amplifier, the load is most commonly a loudspeaker. Any load will require that the
source (the preceding amplifier) is capable of providing it with sufficient voltage and current
to be able to perform its task. In the case of a speaker, the power amplifier must be capable of
providing a voltage and current sufficient to cause the speaker cone(s) to move. This
movement is converted to sound by the speaker.
Output Impedance : The output impedance of an amplifier is a measure of the impedance or

resistance. It has nothing to do with the actual loading that may be placed at the output. For
example, an amplifier has an output impedance of 10 Ohms. This is verified by placing a load
of 10 Ohms across the output, and the voltage can be seen to decrease by 1/2. However,
unless this amplifier is capable of substantial output current, we might have to make this
measurement at a very low output voltage indeed, or the amplifier will be unable to drive the
load.
Feedback : Feedback in its broadest sense means that a certain amount of the output signal
is "fed back" into the input. An amplifier - or an element of an amplifying device - is
presented with the input signal, and compares it to a "small scale replica" of the output signal.
If there is any difference, the amp corrects this, and ideally ensures that the output is an exact

replica of the input, but with a greater amplitude. Feedback may be as a voltage or current,
and has a similar effect in either case.
11. Give applications of emitter follower
The emitter follower has the following principal applications:
1. To provide current amplification with no voltage gain

2. Impedence matching
Current amplification without voltage gain : Emitter follower is a current amplifier that has
no voltage gain. There are many instances where an increase in current is required but no
increase in voltage is needed. In such a situation, an emitter follower can be used. Consider
the two stage amplifier. Suppose this two stage amplifier has the desired voltage gain but
current gain of this multistage amplifier is insufficient. In that case, we can use an emitter
follower to increase the current gain without increasing the voltage gain.
Impedance matching: An emitter follower has high input impedance and low output
impedance. This makes the emitter follower an ideal circuit for impedance matching.
Consider an impedance matching by an emitter follower. Suppose the output impedance of
the source is 120 while that of load is 20 .Emitter follower has an input impedance of
120 and output impedance of 22 ..it is connected between high impedance source and low
impedance load. The net result of this arrangement is that the maximum power is transferred
from the original source to the original load. When an emitter follower is used for this
purpose it is called a buffer amplifier. it may also be noted that the job of impedance
matching can also be accomplished by a transformer. However the emitter follower is
preferred for this purpose. it is because emitter follower is not only more convenient than a
transformer but it also has much better frequency response ie.,it works well over a large
frequency range.
12. Determine the voltage gain of the emitter follower shown in figure.
Voltage gain,
Av=RE/(r'e+ RE)
r'e=25mV/IE

voltage across R2,
V2=Vcc/(R1+R2)*R2
=10/(10+10)*10=5V
voltage across RE,
VE=V2 -VBE
=5-0.7=4.3V
emitter current
IE=VE/ RE
=4.3V/5k =0.86mA
r'e =25mV/IE=25mV/0.86mA=29.1
voltage gain,
Av = RE/( r'e + RE )
=5000/(29.1+5000)=0.994
13. For the emitter follower circuit, find input impedance
voltage across R2,
V2=Vcc/(R1+R2)*R2
=10/(10+10)*10=5V
voltage across RE,

VE=V2 -VBE
=5-0.7=4.3V
emitter current
IE=VE/ RE
=4.3V/4.3k =1mA
A.C.emitter resistance,
r'e =25mV/IE=25mV/1mA=25
effective external emitter resistance,
R'E= RE RL
=4.3k 10 k
=3 k
Zin(base) (r'e +R'E )
=200(0.025+3)=605 k
input impedence of the emitter follower
R1 R2 Zin(base)
=4.96 k
14. Determine the output impedence of the emitter follower shown in fig.given that r'e
=20 .
Zout= r'e + R'in

R'in = R1 R2 Rs
=452
Zout=20+(452/200)
=20+2.3
=22.3
15. Explain by using a circuit diagram, a ‘Darlington Pair’. Mention its advantages?
THE DARLINGTON PAIR : This is a very special way of direct coupling of two transistors.
The two are connected with their collectors to the same point. The emitter of the first
transistor is connected directly to the base of the next.
A common emitter amplifier with Darlington. The two transistors are interconnected with
their collectors, while the emitter of the first transistor feeds into the base of the second.
An emitter resistor (RE1) is sometimes used for the first transistor to achieve faster switching.
Common collector amplifier with Darlington. With this amplifier extremely high input
resistances and extremely low output resistances can be achieved.
The advantage of the Darlington is the VERY HIGH CURRENT GAIN, which is the
product of the current gains of the individual transistors. For values up to 20 000 can be
achieved.
The Darlington has three terminals, like a normal transistor. In fact it can be
considered as ONE transistor. The characteristics or this Darlington transistor can then be
expressed in terms of the characteristics of the individual transistors:
= 1* 2
rBE = rBE1 + 1*rBE2
Darlington transistors are available in normal transistor housings, e.g. BC517 or BD675.
A Darlington pair in one housing. As for normal transistors, the terminals are called
collector, base and emitter.
Different circuit symbols are used for Darlington transistors.
A transistor amplifier stage using a Darlington pair is normally considered as ONE amplifier
stage, although two transistors are used.
16. Explain about ‘Darlington Amplifier’?
DARLINGTON AMPLIFIER : A CC stage followed by another CC stage has an input

2
resistance of about (β + 1) times the emitter resistance of the second stage. More precisely,
using the β transform, it is
If RE1 is removed, the second term is about β2 times RE2. Furthermore, if the collectors are
connected together, the result is a Darlington stage, as shown below.

This stage can be viewed as a "Darlington transistor" because it has three terminals and an
equivalent β of about β . Darlington BJTs can be used in any of the three BJT
2
configurations.
17. Briefly discuss about ‘Cascaded Amplifier’ using a diagram?
Amplifiers are cascaded when the output of the first is the input to the second. The
combined gain is
where vi2 = vo1. The total gain is the product of the cascaded amplifier stages.
The complication in calculating the gain of cascaded stages is the non-ideal coupling
between stages due to loading. Two cascaded CE stages are shown below.
Because the input resistance of the second stage forms a voltage divider with the
output resistance of the first stage, the total gain is not the product of the individual
(separated) stages.
The total voltage gain can be calculated in either of two ways. First way: the gain of the first
stage is calculated including the loading of ri2. Then the second-stage gain is calculated from
the output of the first stage. Because the loading (output divider) was accounted for in the
first-stage gain, the second-stage gain input quantity is the Q2 base voltage, vB2 = vo1.
Second way: the first-stage gain is found by disconnecting the input of the second
stage, thereby eliminating output loading. Then the Thevenin-equivalent output of the first
stage is connected to the input of the second stage and its gain is calculated, including the
input divider formed by the first-stage output resistance and second-stage input resistance. In
this case, the first-stage gain output quantity is the Thevenin-equivalent voltage, not the
actual collector voltage of the stage-connected amplifier. The second way includes interstage
loading as an input divider in the gain of the second stage while the first way includes it as an
output divider in the gain of the first stage.
By cascading a CE stage followed by an emitter-follower (CC) stage, a good voltage

amplifier results. The CE input resistance is high and CC output resistance is low. The CC
contributes no increase in voltage gain but provides a near voltage-source (low resistance)
output so that the gain is nearly independent of load resistance. The high input resistance of
the CE stage makes the input voltage nearly independent of input-source resistance. Multiple
CE stages can be cascaded and CC stages inserted between them to reduce attenuation due to
inter-stage loading.
18. Explain about ‘Emitter Follower’?
EMITTER FOLLOWER : An emitter follower circuit shown in the figure is widely used in
AC amplification circuits. The input and output of the emitter follower is the base and the
emitter, respectively, therefore this circuit is also called common-collector circuit.
DC operating point
Solving these equations, we can get, IB, IE and VCC.

AC small-signal equivalent circuit:
We assume and therefore can be ignored, and have
Voltage gain:
As , is smaller than but approximately equal to

1.
The input resistance:
The input resistance is in parallel with the resistances of the circuit to its right
including the load , which can be found by . But as
we have
Comparing this with the input resistance of the common-emitter circuit
, we see that the emitter follower has a very large input

resistance.

The output resistance:
The output resistance is in parallel with the resistances of the circuit to its left
including the source, which can be found by , where
and we have
Alternatively, this resistance can be found as , where is the output
voltage with load open-circuit and is the current with load short-circuit
. To find and , the voltage source with internal resistance and
a load can be converted by Thevenin's theorem to
and can be found to be
now we have
The overall output resistance is
Comparing this with the output resistance of the common-emitter circuit

, we see that the emitter follower circuit has very small output resistance.
Conclusion: Emitter follower does not amplify voltage. However, due to its large
input resistance drawing little current from the source, and its small output resistance capable
of driving heavy load, it is widely used as both the input and output stages for a multi-stage
voltage amplification circuit due to its property of very favorable input/output resistances
19. EXPLAIN THE THEORY OF THERMAL RUNAWAY.
The maximum average power Pdmax which a transistor can dissipate depends upon the
transistor construction and may lie in the range from a few milli watts to 200W.This
maximum power is limited by the temperature that the collector to base junction can
withstand.For silicon transistors this temperature is in the range 150 degrees to 225 degrees
and for germanium it is between 60 to 100 degrees.The junction temperature may rise either
because the ambient temperature rises or because of self heating.The maximum power
dissipation is usually specified for the transistor enclosure or maximum temperature of 25
degrees.The problem of self heating results from the power dissipated from the collector
junction.
As a consequence of the junction power dissipation, the junction temperature rises and
in turn increases the collector current with a subsequent increase in power dissipation. If this
phenomenon named thermal runaway continues then it may result in permanently
damaging the transistor.
20. EXPLAIN THE FIXED BIAS CIRCUIT.
The Fig refers to the common emitter collector characteristics and the ac and dc load
lines.The Fig9.2 shows the points Q1 and Q2which refers to the operating point at the middle
of the dc load line and the point which gives as large as an output possible without too much
distortion respectively.

Biasing is usually done to prevent thermal runaway which damages the transistor
permanently. One kind of biasing is the fixed bias circuit.
The Fig 2 shows a fixed bias circuit
FIG 2
Analyzing the input loop of the circuit by KVL
Vcc=IbRb + Vbe.
Ib=(Vcc-Vbe)/Rb.
Ic=βIb.
Analyzing the output loop of the circuit by KVL.
Vcc=Ic+Vce
Vce=Vcc-Ic.Rc.
Hence through the input and output loop we have calculated the output current(Ic) and
output voltage (Vce).
The current Ib is constant and the network in the dig 2 is called the fixed bias circuit.
In summary we see that selection point Q depends upon a number of factors. Among these
factors are the ac and dc loads of the stage the available power supply the maximum power
ratings, the peak signal excursions to be handled by the stage and the tolerable distortion.

21. DERIVE THE EQUATIONS OF THE SELF BIAS CIRCUIT.
A circuit which is used to establish a stable operating point is the self biasing configuration.
The circuit is shown in Fig9.5
The physical reason for an improvement in stability with the circuit is the following:
If Ic increases or tends to increase because Ico has risen as a result of the elevated
temperature, the current in Re increases. As a result of the voltage drop across Re the base
current is decreased. Hence Ic will increase less than it would have, had there been no self
biasing resistor Re.
Kirchoffs voltage law around the collector circuit yields
-Vcc+Ic(Re+Re)+Ie.Re+Vce=0
Kirchoffs voltage law around the base circuit is
V=Ie.Re+Vbe+(Ib+Ic)Re.
Hence in the active region the collector current is given by
Ic=βIb+(1+β)Ico.

22. A Silicon Transistor Whose Common Emitter Output Characteristics Are Shown In
Dig 4 Is Used In The Circuit With Vcc=22.5v,Rc=5.6k,Re=1k,R2=10k,And R1=90k.For
This Transistor β=55.Find The Q Point.
In many cases transistor characteristics are not available but β is known .Then the
calculation of Q point is carried out as shown.
We know that
Ic=βIb.
V=10*22.5/100
Rb=(10*90)/100
Kirchoffs voltage law applied to the collector and base circuits respectively yields
-22.5+6.6Ic +Ib+Vce=0.
0.65-2.25+Ic+10.0Ib=0
Therefore
-1.60+Ic+10/55Ic=0.
Ic=1.36mA
Ib=24.8µA
Also we know that
-22.5+6.6*1.36+0.025+Vce=0.
Hence
Vce=13.5V.

23. Draw the circuit of a two stage RC coupled amplifier ?
24. Discuss the disadvantages of an RC coupled amplifier?
RC coupled amplifiers have a few disadvantages. The resistors use dc power and so
the amplifier has low efficiency. The capacitor tends to limit the low-Frequency response of
the amplifier and the amplifying device itself limits the high-Frequency response.
25. Diagram, explain the construction of a single stage RC coupled amplifier?
An RC Coupled amplifier consists of a transistor connected in the emitter

configuration with necessary circuit components.
Biasing is done by a potential divider arrangement using resistors R1 &R2. VCC is

applied across the R1-R2 combination .The voltage across the resistor R2 with point ‘B’
positive is connected to the base of the transistor, thereby forward biasing the base – emitter
junction. The upper end of R1 is at a potential positive with respect to point ‘B’. This voltage
across the resistor R1 is applied across the base – collector junction to reverse bias that
junction. Thus transistor is biased in the active region.
Collector load resistor RL is in series with the collector .The output voltage is obtained
across this resistor

Coupling capacitance Cc is connected at the collector to block dc from appearing at

the output.AC signal output is taken through the capacitor CC.
RE – CE circuit : The RE – CE combination is connected in series with the cathode to

obtain temperature stability and for proper functioning of the amplifier.
26. Why is an emitter bypass capacitor used in an RC coupled amplifier?
If an emitter resistor Re is used for self-bias in an amplifier and if it is desired to avoid

the degeneration, and hence the loss of gain due to Re, we bypass this resistor with a very
large capacitance .The effect of this capacitor is to affect adversely the low-frequency
response. It is used to avoid negative feedback.
27. What is an amplifier? What are the various types of amplifiers?
AMPLIFIER: A circuit that increases the amplitude of the given input signal is an amplifier.
A small a.c. signal fed to the amplifier is obtained as a larger a.c. signal of the same
frequency at the output. They constitute the essential parts of many communication circuits
such as television and radio.
CLASSIFICATION OF AMPLIFIERS:
Amplifiers can be classified as follows:

(a) Based on the transistor configuration

1. Common emitter amplifier
2. Common collector amplifier
3. Common base amplifier
(b) Based on the active device

1. BJT amplifier
2. FET amplifier
(c) Based on the Q-point (operating condition)

1. Class A amplifier
2. Class B amplifier
3. Class AB amplifier
4. Class C amplifier
(d) Based on the number of stages
1. Single stage amplifier
2. Multistage amplifier
(e) Based on the output

1. Voltage amplifier
2. Power amplifier
(f) Based on the frequency response

1. Audio frequency (AF) amplifier
2.Intermediate frequency (IF) amplifier
3.Radio frequency (RF) amplifier
28. Explain the classification of amplifiers on the biasing conditions?
Based on the amount of transistor bias and amplitude of the input signal, amplifiers
can be classified as class A , class B, class B and class c.
CLASS A AMPLIFIER: In a class A amplifier, the transistor is biased such that the output
current flows, i.e. the transistor is on for the full cycle (360)
of the input a.c. signal.
CLASS B AMPLIFIER: In the class B amplifier the transistor bias and the amplitude of the
input signal are selected such that the output current flows ,i.e. the transistor is ON for less
than one half cycle (180) of the input a.c. signal .
CLASS C AMPLIFIER: In a class c amplifier the transistor bias and the amplitude of the
input signal are selected such that the output current flows i.e. the transistor is ON for less
than one half cycle (180) of the input a.c. signal.
29. Explain the different coupling schemes used in amplifiers?
When amplifiers are cascaded, it is necessary to use a coupling network between the
output of one amplifier and the input of the following amplifier. This type of coupling is
called inter stage coupling. Basically these coupling networks serve the following two
purposes.
1. it transfers the a.c. output of one stage to the input of the next stage.
2. it isolates the d.c conditions of one stage to the next.
The three coupling schemes commonly used in multistage amplifiers are:
1. Resistance-capacitance (RC) coupling: It is the most commonly used coupling in

discrete device amplifier as it is least expensive and has satisfactory frequency
response. In this method the signal developed across the collector resistor Rc of each
stage is coupled through capacitor Cc into the base of the next stage of one stage from
the following stage. The amplifiers using this coupling scheme are called RC coupled
amplifiers.
2. Transformer coupling: In this method the primary winding of the transformer acts as
a collector load and the secondary winding transfers the a.c. output signal directly to
the base of the next stage. Such a coupling increases the overall circuit gain and the
level of the inter stage impedance matching. However transformers with broad
frequency response are very expensive and hence, this type of coupling is restricted
mostly to the power amplifiers where efficient impedance matching is a critical
requirement for maximum power transfer and efficiency. The amplifiers using this
coupling scheme are called Transformer coupled amplifiers.
3. Direct coupling: In this method the a.c. output signal is fed directly to the next stage.
No reactance is included in this coupling network. Special d.c. voltage level circuits
are used to match the output d.c. levels. It is used when amplification of low
frequency signals is to be done. Further, coupling devices such as capacitors,
transformers cannot be used at low frequencies because their size becomes very large.
The amplifiers using this coupling scheme are called direct-coupled amplifiers or d.c.
amplifiers.
30. What is current gain in RC coupled amplifier.?
Current gain is the ratio of the output current to the input current.
we represent it as Ai.
Ai=Io/Is
it can also be represented as peak to peak values.
Ai=Iop-p/Isp-p.
Ai=Io/Is=(-hfb)Re*Rc/(Re+Ze)(Rc+Rl)

31. What is the voltage gain?
voltage gain is the ratio of output voltage to input voltage. It is represented as Av,vo-voltage
output,Vi-voltage input,Ic-collector current,Ie-emitter current is the impedance
Av=Vo/Vi=Vop-p/Vip-p
Av=Vo/Vi=(Ic*Zac)/(Ie*Zin)
Vo= Ic(Rc||RL)=(-hfb)Ie(Rc||RL)
Vi=Ie{hib+Rb(1+hfb)}
Av=(-hfb)(Rc||Rl)/hib+Rb(1+hfb)
32. What is power gain?
Power gain is the ratio of power delivered to the load to power delivered to the amplifier is
the power gain.
Ap=Po/Pi
=VoIo/ViIs
=Av*Ai
33. Why the gain of the amplifier decreases if the CE is avoided?
When the ce is connected in the circuit, ac signals get bypassed through it to the
ground. In the absence of Ce, ac signals produces voltage drop across Re. In effect, this drop
acts as a negative feedback voltage to the base of the transistor. negative feedback causes a
decrease in gain.
34. Mention some characteristics of transistors?
• When a NPN transistor is working, there is always a constant 0.6 volt drop between
the base and emitter, i.e., the base is always ~ 0.6 volts more positive than the emitter-
-
• There is no output at the collector, until the base has reached ~ 0.6 volts and the base
is drawing current, i.e., any signal that appears at the base that is not up to ~ 0.6 volts
is never seen at the collector.
• The base requires a current, not a voltage to control the collector current.
• The collector is a current source: it does not source a voltage.
• The collector appears to output a voltage when a resistor is connected between it and
power source.
• The collector is at high impedance when compared to the emitter.

• The transistor can output an amplified signal either from the collector or the emitter
(or both).
• When operating with a collector resistor (RL): the output voltage from the collector is
an amplified voltage.
• When operating with only an emitter resistor (Re): the output voltage from the emitter
is not an amplified voltage, because it is always ~ 0.6 volts, below the input (base)
voltage--hence the name voltage follower. But because the emitter can source large
amounts of current to the "LOAD," it can be said as CURRENT amplification.
• The collector--being high impedance--cannot drive a low impedance load.
• The emitter--being low impedance--can drive a low impedance load.
• The voltage gain from the collector is greater than one (Gv > 1).
• The voltage gain from the emitter is less than one (Gv < 1).
• Both the collector and the emitter: output ~ the same power: E x I = P.
35. Explain common base configuration?
Common-base transistor amplifiers are so-called because the input and output voltage
points share the base lead of the transistor in common with each other, not considering any
power supplies
The most striking characteristic of this configuration is that the input signal source
must carry the full emitter current of the transistor. Because the input current exceeds all
other currents in the circuit, including the output current, the current gain of this amplifier is
actually less than 1 (notice how Rload is connected to the collector, thus carrying slightly less
current than the signal source). In other words, it attenuates current rather than amplifying it.
In the common-base circuit, we follow basic transistor parameter: the ratio between collector
current and emitter current, which is a fraction always less than 1. This fractional value for
any transistor is called the alpha ratio, or ratio.

36. Explain common collector configuration?
It is called the common-collector configuration because (ignoring the power supply

battery) both the signal source and the load share the collector lead as a common connection
point:
Since the emitter lead of a transistor is the one handling the most current (the sum of
base and collector currents, since base and collector currents always mesh together to form
the emitter current), it would be reasonable to presume that this amplifier will have a very
large current gain .the current gain for a common-collector amplifier is quite large, larger
than any other transistor amplifier configuration.
The load voltage will always be about 0.7 volts less than the input voltage for all
conditions where the transistor is conducting. Cutoff occurs at input voltages below 0.7 volts,
and saturation at input voltages in excess of battery (supply) voltage plus 0.7 volts. Because
of this behavior, the common-collector amplifier circuit is also known as the voltage-follower
or emitter-follower amplifier. This amplifier configuration has a voltage gain of slightly less
than 1In the common-collector configuration, though, the load is situated in series with the
emitter, and thus its current is equal to the emitter current. With the emitter carrying collector
current and base current, the load in this type of amplifier has all the current of the collector
running through it plus the input current of the base. This yields a current gain of plus 1:

37. Explain a common emitter configuration without a feedback.
A simple common emitter transistor amplifier--having no negative feedback--is not an

ideal amplifier. This is because of the variability of gain from one transistor to another:
making uniform gain, from amplifier to amplifier is impossible. Also, without feedback some
amplifiers--having transistors with excessive gain--might be unstable and prone to be
oscillate, as well as, poor signal to noise and distortion ratios ;low input impedance (poor
impedance matching between stages, etc), and susceptibility to temperature extremes.
Without negative feedback, high ambient temperatures can raise the operating point, thus
heating the device further; ending with this positive (thermal) feedback, bringing on the
transistor's permanent failure.
When (negative) feedback is introduced, most of these problems diminish or

disappear, resulting in improved performance and reliability. The amount of feedback is
dependent on the relative signal level dropped across this resistor, e.g., if the resistor value
approached that of the collector load resistor, the gain would approach unity (Gv ~ 1).

38. What are the Current relations in common emitter configuration?
In a CB configuration Ie is the input current and Ic is the output current. These

currents are relayed through the equations given below
Ie=Ic+Ib
Ic= Ie+Icb0
In CE configuration, Ib becomes the input current and the Ic is the output current. We
are interested in knowing how the output Ic is related with the input current Ib. That is, we
should find a relation such as
Ic=f(Ib)
To obtain the relation, we simply substitute the expression of Ie from the equations
given earlier,so that
Ic= Dc(Ic+Ib)+Icbo
or
(1- dc)Ic= dcIb+Icbo
or
Ic=( dc/(1- dc))Ib+(1/(1- dc))Icbo
In thjis equation,Ic is given in terms of Ib. The equations can be simplified somewhat by
defining
dc/(1- dc)
and
Iceo=Icbo/(1- dc)
thus equation becomes
Ic= dcIb+Iceo
39. Explain output CE characteristics?
1. In the active region ic increases slowly as Vce increases. The slope of the curved is
greater than the CB output characteristics. In common emitter output characteristics
the input current characteristics is constant,i.e ib is constant, but current Vc increases
with Vce.
2. When Vce falls below a few tenth of a volt ,Ic decreases this occurs as Vce drops
below the value of Vbe; the collector base junction then becomes forward-biased. In
this region both junctions of the transistor are forward biased. The transistor is
working in the saturated region. It is called saturation region because the current Ic
no longer depends upon the input current Ib.
3. In the active region ,the collector current is dc times greater than the base current.
Thus, small input current,Ib produces a large output current Ic.
4. The collector current is not zero when Ib is zero. It has a value of Iceo, the reverse
leakage current. The current Iceo is related with.Icbo by the eqn
Iceo=1/(1- dc)*Icbo
Or
Iceo=(1+ dc)Icbo
40. Why CE configuration is widely used in amplifier circuits?
The main ability of an transistor lies in amplifying weak signals. The transistor cannot
alone perform this function; we have to connect some passive components and a biasing
battery. Such a circuit is called an amplifier. The main utility of a transistor lies in
amplifying a circuit. An amplifier is something which is capable of amplifying. A CE
configuration is popularly used for amplification, because its input resistance is about 1
and the output resistance about 10 k . A transistor in the CE configuration makes a much
better amplifier because it has got high current gain, voltage gain and power gain. To obtain
proper amplification cascading of transistors can be done. CE configuration is best suited for
cascaded amplifiers. If we consider a two stage cascaded amplifier then the first stage works
as a voltage source for the second source. The input resistance of the second stage serves as a
load resistance for the first source. The output resistance of the first stage is the internal
resistance of the voltage source. The internal resistance of the source must be low compared
to load resistance .Again, the second amplifier stage will deliver more power to the the load
only if its output resistance is low. Thus we find that a good amplifier stage is one which has
high input resistance and low output resistance.
41. A transistor is connected in common emitter configuration collector supply voltage

Vcc is 10 volts load resistance Rl is 800ohm,voltage drop across load resistance is 0.8v
and current gain =0.96.Determine collector – emitter voltage and base current?
Collector voltage supply Vcc=10V
Voltage drop across load resistance IcRl=0.8V
Collector emitter voltage Vce=Vcc-IcRl=10-0.8=9.2
Collector current ,Ic=IcRL/RL=0.8/800=1.0mA
Collector gain factor , = /(1- )=0.96/(1-0.96)=24

Base current,Ib =Ic/ =1.0mA/24=41.67µA
42. Compare RC coupled and Transformer coupling?
Particular RC coupled Transformer coupled

Frequency response Excellent in audio frequency Poor in audio frequency range
range
Cost Less cost More cost
Impedance matching Poor Excellent
Use Voltage amplification Power amplification
43. Mention the advantages and disadvantages of direct coupled coupling?
Advantages:
1.Simple circuit due to minimum use of resistor

2.Low cost due to absence of expensive coupling device
Disadvantages:
1.It cannot be used for amplifying high frequencies

2.The opertaing point is shifted due to temperature variations.
44. Draw different configuration of transistor amplifiers?
NPN Common Emitter Amplifier
The common emitter configuration lends itself to voltage amplification and is the most
common configuration for transistor amplifiers.

2. NPN Common Base Amplifier
This configuration is used for high frequency applications because the base separates
the input and output, minimizing oscillations at high frequency. It has a high voltage gain,
relatively low input impedance and high output impedance compared to the common
collector.
3. NPN Common Collector Amplifier
The common collector amplifier, often called an emitter follower since its output is
taken from the emitter resistor, is useful as an impedance matching device since its input
impedance is much higher than its output impedance. It is also termed a "buffer" for this
reason and is used in digital circuits with basic gates.
45. What are transistor amplifiers? What is meant by efficiency of an amplifier? What
is amplifier coupling?
The AMPLIFIER is a device that enables an input signal to control an output signal.
The output signal will have some (or all) of the characteristics of the input signal but will
generally be larger than the input signal in terms of voltage, current, or power.
A transistor amplifier is a current-control device. The current in the base of the

transistor (which is dependent on the emitter-base bias) controls the current in the collector.
Once current is controlled it can be used to give a voltage gain or a power gain.
The efficiency of an amplifier refers to the amount of power delivered to the output
compared to the power supplied to the circuit. Since every device takes power to operate, if
the amplifier operates for 360° of input signal, it uses more power than if it only operates for
180° of input signal. If the amplifier uses more power, less power is available for the output
signal and efficiency is lower. Since class A amplifiers operate (have current flow) for 360°
of input signal, they are low in efficiency.
Whether an amplifier is one of a series in a device or a single stage connected

between two other devices, there must be some way for the signal to enter and leave the
amplifier. The process of transferring energy between circuits is known as COUPLING.
46. What are frequency response curves? How are they made?
Every amplifier has a frequency-response curve associated with it. They provide a
"picture" of the performance of an amplifier at various frequencies. The amplifier for which
the frequency-response curve is created is tested at various frequencies. At each frequency,
the input signal is set to some predetermined level of voltage (or current). This same voltage
(or current) level for all of the input signals is used to provide a standard input and to allow
evaluation of the output of the circuit at each of the frequencies tested. For each of these
frequencies, the output is measured and marked on a graph. The graph is marked "frequency"
along the horizontal axis and "voltage" or "current" along the vertical axis. When points have
been plotted for all of the frequencies tested, the points are connected to form the frequency-
response curve. The shape of the curve represents the frequency response of the amplifier.
47. What is their relation with gain? What are the factors affecting frequency response
of an amplifier?
Some amplifiers should be "flat" across a band of frequencies. In other words, for
every frequency within the band, the amplifier should have equal gain (equal response). For
frequencies outside the band, the amplifier gain will be much lower. For other amplifiers, the
desired frequency response is different. For example, perhaps the amplifier should have high
gain at two frequencies and low gain for all other frequencies. The frequency-response curve
for this type of amplifier would show two "peaks." In other amplifiers the frequency-response
curve will have one peak indicating high gain at one frequency and lower gain at all others.
The frequency response of an a.c. circuit is limited by the reactive elements

(capacitance and inductance) in the circuit. This is caused by the fact that the capacitive and
inductive reactances vary with the frequency.
In other words, the value of the reactance is determined, in part, by frequency. A

totally resistive circuit would have no frequency limits. However, there is no such thing as a
totally resistive circuit because circuit components almost always have some reactance. In
addition to the reactance of other components in the circuit, most amplifiers use RC coupling.
This means that a capacitor is used to couple the signal in to and out of the circuit. There is
also a certain amount of capacitance and inductance in the wiring of the circuit. The end
result is that all circuits are reactive.

48. What are the advantages of an RC coupling over a direct coupling? Draw a basic
Rc coupling network and explain.
1-12 Figure 1-10.—RC-coupled transistor amplifier.

The network of R1, R2, and C1 enclosed in the dashed lines of the figure is the
coupling networkR1 acts as a load resistor for Q1 (the first stage) and develops the output
signal of that stage The capacitor, C1, "blocks" the dc of Q1's collector, but "passes" the ac
output signal. R2 develops this passed, or coupled, signal as the input signal to Q2 (the
second stage). This arrangement allows the coupling of the signal while it isolates the biasing
of each stage. This solves many of the problems associated with direct coupling. RC coupling
does have a few disadvantages. The resistors use dc power and so the amplifier has low
efficiency. The capacitor tends to limit the low-frequency response of the amplifier and the
amplifying device itself limits the high-frequency response. For audio amplifiers this is
usually not a problem; techniques for overcoming these frequency limitations will be covered
later in this module. The direct-coupled amplifier is not very efficient and the losses increase
as the number of stages increase. Because of the disadvantages, direct coupling is not used
very often.
This explains why the low frequencies are limited by the capacitor. As frequency
decreases, X increases. This causes more of the signal to be "lost" in the capacitor. The
C
formula for X also shows that the value of capacitance (C) should be relatively high so that
C
capacitive reactance (X ) can be kept as low as possible. So, when a capacitor is used as a
C
coupling element, the capacitance should be relatively high so that it will couple the entire
signal well and not reduce or distort the signal

49. Which of the 3 transistor configuration is best to use in cascade if maximum voltage
gain is to be realized?
The common collector configuration is not used for intermediate stages because the
voltage gain of such a stage is less than unity. Hence it is not possible to increase the overall
voltage amplification by cascading common collector stages.
Ground-base RC-coupled stages are seldom cascaded because the voltage gain of such
and arrangement is approximately the same as that of the output stage alone.
In the common emitter stage however the short circuit current gain is greater than unity.
It thus makes it possible to increase the voltage amplification by cascading such stages.
Thus in a cascade the intermediate transistor should be connected in a common emitter

configuration.
50. What is the speciality of a darlington transistor?
A darlington pair behaves like a single transistor with a very high current gain. The total gain
of the darlington is the product of the gains of the individual transistors.
darlington = 1 * 2
Besides it takes up less space than using two discrete transistors in the same configuration.
51. Why a common collector amplifier is called an emitter follower?
When the input voltage goes through its positive half cycle, the output voltage is also
seen to go through its positive half cycle. In other words the output and input are in phase
with each other. Besides the magnitude of the output and input are about the same. Thus the
emitter voltage (i.e. output voltage) closely follows the input voltage. Hence the name emitter
follower.
52. Due to what special property does an emitter amplifier work as a buffer amplifier?
The circuit design of the emitter follower is such that it has a high input impedance and
a low output impedance. Due to this it is capable of giving power to a load connected to its
output without requiring much power at the input. It thus works as a buffer amplifier.

53. Mention The Three Transistor Configurations?
The three transistor configurations are
1)Common emitter configuration

2)Common base configuration
3)Common collector configuration
Common emitter configuration: In this circuit the emitter is common to both input and the
output.Such a configuration is also known as grounded emitter configuration. Here the input
current and the output voltage are taken as the independent variables, whereas the input
voltage and putput current are the dependent variables.
VBE=f1(VCE,IB)
IC=f2(VCE,IB)
Common base configuration: In this circuit the base is common to both input and the
output.Such a configuration is also known as grounded base configuration. Here the output
current is completely determined by the input current and the output voltage VCB=VC. This
output relation can be written as
IC= 2(VCB,IE)
Common collector configuration:In this circuit the collector is common to both the input
and the output.Such a configuration is also known as grounded collector configuration.When
the base current is Ico the emitter current will be 0 and no current will flow in the load.
54. Explain Common Emitter Circuit With The Help Of A Circuit Diagram?
Most transistor circuits have the emitter,rather than the base,as the terminalcommon to both
input and output.Such a common emitter or grounded configuration is indicated above.In the
common emitter configuration the input current and the output voltage are taken as
independent variables,whereas the input voltage and output current are dependent variables.
VBE=f1(VCE,IB)
IC=f2(VCE,IB)

Here the voltage VBE is the voltage across base and the emitter. The emitter region is
grounded. The emitter base junction is forward biased and the collector base junction is
reverse biased. The output is taken through RL ie across collector and the emitter.
55. Explain The Input And Output Characteristics Of Common Emitter Configuration?
INPUT CHARACTERISTICS
Input characteristics:In the figure the abscissa is the base current IB, The ordinate is the
base to emitter voltage VBE, and the curves are given for various values of collector to
emitter voltage VCE. We observe that, with the collector shorted to the emitter and the
emitter forward biased, the input characteristics is essentially that of a forward biased diode.
If VBE becomes 0,then IB will be 0,since under these conditions both emitter and collector
junctions will be short circuited. In general increasing VCE with constant VBE causes a
decrease in base width WB’ and results in a decreasing recombination base current. These
considerations account for the input characteristics.
OUTPUT CHARACTEERISTICS

Output characteristics: This family of curves may be divided into three regions just as was
done for common base configuration. They are active region, saturation region and cut off
region. In the active region the collector junction is reverse biased and the emitter junction is
forwad biased. The active region is the area right of the ordinate VCE=a few tenths of a volt
and above IB=0.In this region the transistor output current responds most sensitively to an
input signal.If the transistor is to be used as an amplifying device without appreciable
distortion it must be restricted to operate in this region.
The common emitter characteristics in the active region are readily understood
qualitatively on the basis of common base configuration. From Kirchoff’s current law the
base current is
IB=-(IC+IE)
IC=Ico+ IB/1-
If we define by
= /1-
IC=(1+ )Ico+ IB
56. FIND THE TRANSISTOR CURRENTS IN THE CIRCUIT.A SILICON

TRANSISTOR WITH =100 AND Ico=20Na=2*10^-5ma IS UNDER
CONSIDERATION?
Since the base is forward biased, the transistor is not cut off. Hence it must be either
in its active region or in saturation. Assume that the transistor operates in the active region.
From KVL applied to the base circuit with IB expressed in mA we have
-5+200IB+VBE=0
A reasonable value for VBE is 0.7V in the active region. Hence

IB=5-0.7/200=0.0215mA.
Since Ico<<Ib,then IC is nearly equal to IB =2.15mA.
We must now justify our assumption that the transistor is in the active region by verifying
that the collector junction is reverse biased. From KVL applied to collector circuit e obtain
-10+3IC+VCB+VBE=0
Or
VCB=-3*2.15+10-0.7=2.85V
For an n p n device a positive value of VCB represents reverse biased collector junction and
the transistor is indeed in the active region. IB and IC in the active region are independent of
the collector circuit resistance Rc.
57. Determine the lower cutoff frequency for the network given below, using the
following parameters:
CS= 10 F CE= 20 F CC= 1 F

RS= 1k R1= 40k R2= 10k RE= 2k RC= 4k
RL= 2.2k
= 100 ro= VCC= 20V
Ans. Determining re for dc conditions:

RE = (100)(2k )=200k
VB = R2VCC = 10k (20V) = 200V = 4V
R2+R1 10k + 40k 50
IE = VE = 4V-0.7V = 3.3V = 1.65mV

RE 2k 2k
re = 26mV = 15.76
1.65mA
re = 100(15.76 ) = 1576 = 1.576k
AV = Vo = -RC||RL = (4k )||(2.2k ) = -90

Vi re 15.76
Zi = Ri = R1||R2||re
= 40k ||10k ||1.576k
= 1.32k
Vi = RiVs => Vi = Ri == 1.32k = 0.569

Ri + Rs Vs Ri + Rs 1.32k + 1k
AVs = Vo = Vo Vi = (-90)(0.569)
Vs Vi Vs
= -51.21
Ri = R1||R2||re = 40k ||10k ||1.576k = 1.32k

fLs = 1 == 1 - = 6.86Hz---------
2 (Rs + Ri)Cs (6.28)(1k + 1.32k )(10F)
58. What is the advantage of a two-stage overloaded RC coupled amplifier over a single
stage one? What are it’s uses?
It is a frequently encountered configuration. Here, the transistor switch Q2 is driven

not directly by a gating signal, but rather by the output of a preceding transistor Q1. The
transistor Q1 has, applied to it, a gating signal which drives this transistor alternately from
cutoff to clamp and back again. Accordingly, in the absence of the loading effect of
transistor Q2, the signal at the collector of Q1 would be a gating waveform of the same form
as the input signal, except inverted polarity. When Q1 is cut off, the output impedance of Q1
is equal to the collector-circuit resistance. When transistor Q1 is in saturation, the output
impedance is the parallel combination of collector-circuit resistance and the collector
saturation resistance , and hence nominally equal to the latter. The circuit is designed as
shown below.

59. In an amplifier, the maximum voltage gain is 1500 and occurs at 1kHz. It falls to
1060.5 at 20kHz and at 20Hz. Determine (i) lower cut-off frequency (ii) upper cut-off
frequency and (iii) bandwidth.
Maximum gain = 1500
x% of 1500 = 1060.5
Thus,
x = 70.7%
(i) Lower cut-off frequency = f1 = 20Hz

(ii) Upper cut-off frequency = f2 = 20kHz
(iii) Bandwidth = f2-f1 = 19.98kHz
60. (i)What are the different types of plots for frequency response in an RC coupled
amplifier?
(ii)What is a Bode Plot? What are it’s uses?
The different types of frequency response curves that can be plotted are:
1) Normalized gain versus frequency plot.

2) Decibel plot of normalized gain versus frequency plot
3) Phase plot of gain versus frequency plot.
Using this plot, we can find out:
(i)the upper cut-off frequency

(ii)the lower cut-off frequency
(iii)Bandwidth
This plot is very useful in applications of communication nature.
A Bode Plot is the piecewise linear plot of the asymptotes and associated breakpoints of the
magnitude of gain versus frequency plot.
Using this, we observe that:
• A change in frequency by a factor of 2, equivalent to 1 octave, results in a 6-dB

change in the ratio as noted by the change in gain from mid-value of lower cut-off
frequency to it’s full value.
• For a 10:1 change in frequency, equivalent to 1 decade, there is a 20-dB change in
ratio as demonstrated between 1/10th of lower cut-off frequency to it’s full value.

61. What is a darlington pair?
The Darlington circuit consists of two cascaded emitter followers with

infinite emitter resistance in the first stage.here the two transistor form a composite pair, input
impedance of the second transistor consisting of the emitter load resistance of the first
transistor.
• Darlington emitter follower has high input impedance than the single stage emitter
follower.
• Its voltage gain is less close to unity than a single stage emitter follower.
• The output impedance of a darlington circuit may be greater than or less than that of a
single transistor emitter follower, depending upon the value of resistance.
• Major drawback of Darlington transistor pair is that the leakage current of the first
transistor is amplified by the second; hence the overall leakage current is high.
A Darlington pair is two transistors connected together to give a very high current gain.
In addition to standard (bipolar junction) transistors, there are field-effect transistors which
are usually referred to as FETs.
The emitter current of Tr1 is the base current of Tr2.
A change in base current of Tr1 can give a change 100 times larger in its emitter
current. A change in the base current of Tr2 has a similar effect on its emitter current.
Therefore there is an overall amplification of 100 x 100 = 10000 times. This circuit is
sometimes called the Super Alpha Pair. It is often used as a power output stage.
62. Explain the working of a darlington pair?
This is two transistors connected together so that the current amplified by the first is
amplified further by the second transistor. The overall current gain is equal to the two
individual gains multiplied together:

Darlington pair current gain, hFE = hFE1 × hFE2

(hFE1 and hFE2 are the gains of the individual transistors)
This gives the Darlington pair a very high current gain, such as 10000, so that only a
tiny base current is required to make the pair switch on. A darlington pair behaves like a
single transistor with high current gain.
It has three leads which are equivalent to the leads of a standard individual transistor.
To turn on there must be 0.7V across both the base-emitter junctions which are connected in
series inside the Darlington pair, therefore it requires 1.4V to turn on.
Darlington pairs are available as complete packages but you can make up your own
from two transistors; TR1 can be a low power type, but normally TR2 will need to be high
power. The maximum collector current Ic(max) for the pair is the same as Ic(max) for TR2.
A Darlington pair is sufficiently sensitive to respond to the small current passed by
your skin and it can be used to make a touch-switch as shown in the diagram. For this circuit
which just lights an LED the two transistors can be any general purpose low power
transistors. The 100k resistor protects the transistors if the contacts are linked with a piece
of wire.
63. Write a note on emitter follower?
The emitter follower (EF) configuration is shown

The emitter follower (EF) configuration is shown
The EF amp has a voltage gain of approximately one. The point is that an EF has a
very low output resistance and a high input resistance. It is therefore used as a buffer which is
placed in between a high resistance source and a low resistance load, thereby providing the
necessary current to the load without sagging the voltage.
64. Write a note on feedback of emitter follower?
The emitter follower can be seen to be an example of negative feedback when the
relationship
is put in the form
which when compared to

shows that B=1. The gain with feedback is
The gain of 1 can be seen as a result of all the output being fed back to the input.
Feedback in the Common Emitter:
The input/output relationships:
can be combined in the form
which when compared to the form
gives
The application of negative feedback in this case with the value of B shown leads to an
amplification
which corresponds to the approximate voltage gain obtained by other approaches:

65. Write a note on the application of emitter-follower?
An emitter follower can serve as a buffer for a voltage source. The voltage divider at
left is a poor voltage source because it is so strongly affected by the value of the load resistor.
The same voltage divider with the transistor buffer at right will supply power to keep the
voltage constant over its range of operation.
The simple voltage divider will give a 4V output for an open circuit, but quickly drops
when larger loads (smaller load resistors) are connected. The buffer helps to keep the output
voltage more nearly constant. You can change the value of the load resistor below to explore
the effect of the buffer.
66. Describe the construction of a two stage RC coupled amplifier with diagram.
A cascaded arrangement of common-emitter transistor stages is shown above. The

output Y1 of one stage is coupled to the input X2 of the next stage via a blocking capacitor Cb
which is used to keep the d-c component of the output voltage at Y1 from reaching the input
X2. The resistor Rg is the grid leak and the plate circuit resistor is Rp. The cathode resistor Rk,
the emitter resistor Re, the screen resistor Rsc, and the resistor R1 and R2 are used to establish
the bias. The bypass capacitors, used to prevent the loss of amplification due to negative
feedback, are Ck in the cathode, Cz in the emitter, and Csc in the screen circuit. High
frequency response is limited by the presence of junction capacitances.
67. It is desired to have a sag or tilt of no more than 10% when a 50Hz square wave is
impressed on an amplifier stage. The output circuit resistance is Rv=1K. What
minimum value of coupling resistance is required if transistors with Ri=1K are used?
f1/f*100%
f1= 1/(2 (Ro’ +Ri’ )Cb)
à P=100 f1/f= 1/((Ro’ +Ri’ )Cb 10

à Cb 1/10(Ro’ +Ri’ )
Now, Ri=Rc=1K
à Cb 1/10*2000 F = 50 F
68. Explain low-frequency response of RC coupled amplifier. What are the reasons for
reduction in gain at low frequencies?
The RC coupled amplifier circuit contains capacitors. Capacitors (and inductors) are
frequency-dependent elements. Since they are present in the circuit, the output immediately
becomes a function of frequency. Shown above is the frequency response curve of an RC
coupled amplifier. The curve illustrates how the magnitude of voltage gain of an amplifier
varies with input signal.
The gain is constant only for a limited set of frequencies known as the mid-frequency
range. In mid-frequency range, the coupling capacitor and the bypass capacitor behaves as
though short circuited.
When frequency is low, the capacitors have high reactance (Xc=1/2 fc) which results
in a less gain as compared to the mid-frequency region. At zero frequency, the reactance of
the capacitor will be infinitely large and there will be no output.

69. What is meant by gain of an amplifier?
Gain refers to the ratio of magnitude of output signal to that of the input signal. Gain
is expressed as either voltage gain (Av), current gain (Ai) or power gain (Ap). Although every
amplifier has certain values for all three gains, the most relevant and recognized one is power
gain.
The logarithm of the power gain is expressed as decibels (dB).
70. Explain the frequency response curve of a RC coupled amplifier
The frequency response curve of a typical RC coupled Amplifier is shown below:
In mid frequency range(50 Hz to 20KHz),the voltage gain of the amplifier is constant,

as is from the analysis. With the increase in the frequency in this range, the reactance of the
coupling capacitor Cc reduces thereby increasing the gain but at the same time lower
capacitive reactance causes higher loading resulting in lower voltage gain. Thus the two
effects cancel each other and uniform gain is obtained in mid frequency range.
At low frequency range(below 50 Hz), higher capacitive reactance of coupling

capacitor Cc allows very small part of signal to pass from one stage to the next and also
because of higher reactance of emitter bypass capacitor CE, allows very small part of signal
to pass from one stage to the next and also because of higher reactance of emitter bypass
capacitor CE, the emitter resistor RE is not effectively shunted. Thus the voltage gain falls off
at low frequencies.

At high frequency range(exceeding 20KHz),the gain of the amplifier decreases with

increase in frequency. Several factors are responsible for this reduction in gain. At high
frequencies,the reactance of coupling capacitor Cc becomes very small and Cc behaves as a
short circuit. This increases the loading of next stage and reduces the voltage gain. At high
frequencies, capacitive reactance of base-emitter junction is low and so the base current is
increased and current gain factor ß is reduced. At high frequencies, the inter electrode
capacitance Cbc connects the output circuit to electrode capacitances, there are wiring
capacitances Cw1,Cw2, and input capacitor CIN of the next stage. The effect of these can be
represented by a single shunt capacitance given as
Ca=Cw1+Cw2+CIN
Rc Cs
R1||R2||hie
+V
The output section of the amplifier is shown in fig.above from the ac point of view,for
high frequency considerations. The capacitance Cs is the equivalent shunt capacitance as
given by equation.
Here collector current Ic is made up of three currents I1,I2,I3. With the increase in
frequency of the input signal,the reactive impedance of the shunt capacitance Cs decreases,
being inversely proportional to frequency and as a result the current I2 through this
capacitance Cs increases. This reduces both currents I1 and I3 since total current is almost
constant(Ic). The output voltage Vout being the product of I3 and R decreases. Thus higher
the frequency , the lower is the impedance offered by Cs and lower will be the output voltage
Vout.
71. Explain the bandwidth for the curve and the applications of an RC coupled
amplifier.
Frequency response curve of an RC coupled amplifier was shown above(prev page).

The cut off frequencies f1 and f2 are marked . The difference of the two frequencies i.e the
upper cut off frequency f2 and the lower cut off frequency f1 is called the bandwidth.(BW).
Therefore BW = f2 - f1.
The BW of an amplifier can also be defined as the range of frequencies from lowest to
the highest over which the amplifier delivers sufficient gain. The word sufficient here
depends on the applications however…but the common convention is to take the gain when
its dropped by 3 dB.
To decide what BW an audio amplifier requires it again depends mostly on the

application. For eg for a telephone circuit, the range is 300hz to 3300 hz, whereas for a hi-fi
audio system the BW required is 20 hz – 20 Khz.

Applications : The RC coupled transistor amplifiers are widely used as voltage

amplifiers(in the initial stage of public address systems) because of their excellent audio
fidelity over a wide range of frequency.However,because of poor impedance matching, this
type of coupling is rarely employed in the final stages.
72. Why do we cascade amplifiers? Why is RC coupling the most widely used coupling
between 2 stages of a cascading amplifier?
The voltage or power gain or frequency response obtainable from a single stage
amplifier is usually not sufficient to meet the needs of either a composite electronic circuit or
load device, so cascading of amplifiers is required to provide greater voltage of current
amplification of both. RC coupling is the most widely used coupling between the two stages
of a cascaded or multi stage amplifier because it is cheaper in cost, it is a very compact circuit
and provides excellent frequency response.
73. Explain the significance of the Coupling capacitor and the RE – CE circuit.
The function of the coupling capacitor is to isolate the amplifier input circuit from the
source. Since capacitor blocks dc it does not allow the dc components from the input circuit
to get to the base of transistor and to change the Q point.
Additional requirement of Cin is that it must pass the input ac signal unattenuated.
Hence the lower cut-off frequency (LCF) of the amplifier is determined by the coupling
capacitor.
The RE – CE combination is connected in series with the cathode to obtain

temperature stability stability and proper functioning of the amplifier.
74. Describe transistor stability parameters
The two parameters are

• The stability factor ,K
• Stability measure,ß1
These parameters determine the transistor stability

• K>1, ß1>0 –unconditionally stable
• K<1, ß1>0 –conditionally stable
• K<1, ß1<0 –unstable
This representation does not give a direct indication of the transistor model of the effects on
the stability performance. To evaluate the stability parameters in terms of the stability factor
first the S parameters are converted to Y parameters.
K=(2Re(Y(11)Re(Y(22))-Re(Y(12)Y(21))/Y(12)Y(21)>1
ß1=Re(Y(22))(Go^2+Y(11)^2)-Re(Y(11)Y(12)Y(21)>0)

75. Why is there a Bandwidth shrinkage in Cascaded Amplifiers?
Consider a cascade of n amplifier stages. These stages are assumed to be

identical and non interacting, the input impedence of a stage is sufficiently high and
does not appreciably shunt the output impedance of the preceding stage.
A A A A
1 2 3 4
For each stage,
Avhigh = Avmid /(1+j(f/fH))

|Avhigh| = |Avmid | / ((1+(f/fH)2)½
For n-stages
|Avhigh|n = |Avmid|n / [1+(f/fH)2]n/2
The upper cut-off frequency for the overall amplifier is the frequency at which the
denominator of 2 ½. Hence
[1+(fHn/fH)2]n/2 = 2 ½
where fHn is the upper cut-off frequency of the overall amplifier. Therefore
(fHn/fH)2 = 2 1/n – 1
Or
fHn = fH(2 1/n – 1)½
The factor (21/n – 1)½ is called the bandwidth shrinkage factor. Its value
decreases as the number of stages in the cascade (n) increases.
Similarly we can show that the lower cut-off frequency for the overall
amplifier is given by
fLn = fL / (21/n – 1)½
Since fH » fL the bandwidth of the amplifier is given by
BW = fH – fL ~ fH
Hence overall bandwidth is
BWn = BW(2 1/n – 1)½
Thus the overall bandwidth of a multistage amplifier shrinks due to cascading.

76. Write a short note on the working of Darlington Amplifier?
A Darlington Amplifier is one that is employing the Darlington pair of

transistors. It is a cascaded emitter follower circuit.
5V
+V
R1
5V 1k Q1 Q2
+V
NPN NPN
5V
+V
R2
1k
5V 5V
+V
+V
Darlington Circuit of Two C.C Stages
The arrangement is such that the first transistor’s emitter is connected to the
base of the second transistor. Further the two collectors are tied together and are
connected to the collector supply. Thus the second transistor forms the load
impedance of the first amplifier.
Assuming that the ‘h’ parameters of the two transistors, Q1 and Q2 are the
same, it can be shown that the voltage gain of the Darlington stage is less than
unity. The input resistance of the complete Darlington Emitter Follower Circuit is
much higher than the input resistance of the emitter follower circuit. The output
resistance will be low.
The input signal varies the base current of the first transistor. This produces
the variation in the collector current in the first transistor. The emitter load of the
first stage is the input resistance of the second stage. The emitter current of the first
transistor is the base current of the second transistor.
The circuit is therefore a cascade of two emitter followers. Hence the gain is
less than the gain of the emitter follower circuit which is less than unity. To provide
a reasonable operating current in the first stage the second stage should be a power
stage.
77. What are the 3 transistor configurations?
The three configurations are common base (CB),common collector (CC) & common
emitter(CE). The connection in which the base terminal is made common to both input &
output is called CB configuration. the input is fed between the emitter and the base. the
output signal is developed between the collector and the emitter or the collector common, we
can have what are known as CE or CC configurations,respectively. In all the configurations,
emitter-base junction is always forward-biased and the collector-bias junction is always
reverse biased. In all the three configuration the transistor is working in the active region
B
RL
B
RL
C

78. Explain the input characteristics of CB configuration.
mA
VCB=10
VCB=0
vEB
The Cb input characteristics are plotted between emitter current iE and the
emitter base voltage v EB for different values of collector -base voltage v CB. Emitter base is
the PN junction diode is forward biased. This junction becomes the better diode as v CB
increases.
79. Why CE Configuration is widely used in amplifier circuits?
The main utility of a transistor lies in its ability to amplify weak signals. The
transistor alone cannot perform this function. We have to connect some passive components
& a biasing battery. Such a circuit is then called an amplifier. In most of the applications we
use a no: of amplifier stages. Such a connection of amplifier stages is known as cascaded
amplifier. In such an amplifier,input resistance of the first stage acts as the load resistance to
the source. The performance of the first stage is not disturbed when second stage is
connected. For this output resistance of the first stage should be low & input resistance of
second stage should be high. A good amplifier stage is one which has high input resistance &
low output resistance. A transistor in CB configuration has a very low input resistance & very
high output resistance. It is the reverse of what we desire. That is why CB configuration is
unpopular . Input resistance of CC configuration is very high & output resistance is quite low.
But the voltage gain of the CC amplifier is very low. Comparatively, the CE configuration is
much better as regards its input& output resistances. Its input resistance is about 1 k &
output resistance is about 10 k A transistor in the CE configuration makes a much better
amplifier. The current gain,voltage gain 7 power gain of CE is much better than those of CB.
80. How Beta of a transistor is related to it alpha?
The dc current gain of a transistor when connected in CE configuration is ßdc. The

same transistor connected in CB configuration gives a dc current gain of dc. If the value
of dc of a transistor is known, its ßdc can be calculated.
ßdc = dc/(1- dc)

ßdc- ßdc* dc= dc
ßdc= dc *(1+ ßdc)
dc= ßdc/( ßdc+1)
The ac beta , ß= ic/ ib
Ie=Ic+Ib
Ie= Ic+ Ib
dividing by Ic we get,
Ie/ Ic=1+( Ib/ Ic)
1/ =1+(1/ß)
ß= /(1- )
81. What is thermal runaway? State one method to prevent the same.
The effect of changes in leakage current (ICO) and current gain(β) on the dc bias point
is given by the equation
IC = βIB + (1+β) ICO.
The collector current increases with the increase in temperature since
β increases with increase in temperature.
ICO doubles in value for every 100C increase in temperature.
This leads to increased power dissipation with further increase in temperature. Being a
cumulative process it can lead to thermal runaway resulting in burn-out of the transistor. The
self-destruction of an unstabilized transistor is called thermal runaway.
However, if by some technique, IB is made to fall with increase in temperature

automatically, then decrease in the term βIB can be made to neutralize the increase in the term
(1+β)ICO, thereby keeping IC almost constant. This will achieve thermal stability resulting in
bias stability.
Stabilization technique makes use of a resistive biasing circuit that permits such a
variation of base current (biasing current) IB as to maintain the collector current IC almost
constant in spite of variations in reverse saturation current ICO and β.
∆T = Tj – TA = θPD

where, PD= power in watts dissipated at the collector junction

TA = ambient temperature
Tj = junction temperature
θ = constant of proportionality called thermal resistance
Condition for thermal stability:
∂PC/∂Tj < ∂PD/∂Tj
where, P C = heat released at the collector junction
∂PC/∂Tj < 1/θ
(∂PC/∂IC) (∂IC/∂Tj) < 1/θ
82. Explain the applications of emitter follower.
Because of high input impedance and low output impedance an emitter follower is
capable of transferring maximum power from the high impedance source to low impedance
load. When an emitter follower is employed for this purpose it is called a buffer amplifier.
The emitter follower is more preferred than a step-down transformer for impedance matching
because it is more convenient and it also provides a better frequency response.
Emitter follower can also be deployed in circuits where high current gain is required
without increase in voltage gain.
83. Draw and explain the circuit of a potential divider bias CE amplifier. Explain the
function of each component in the circuit.
Frequency response and amplifier circuit:
Low frequency response:
1. High impedance of coupling capacitors CC1 & CC2 towards low frequency signals.
XC = 1/2πfC
2. Effective input voltage at base reduced due to bypass capacitor CE
Vbe = Vs – i1RE where, i1 is the current through RE.
Mid frequency response: No capacitor action & gain is a constant.
High Frequency response:

(i) β ↓ with ↑ in frequency
(ii) Depletion (junction) capacitances action.
Cbc : ↑ feedback thereby ↓gain
Cbe : low impedance path to ground thereby input impedance ↓
Cce : shunting effect
(iii) Wiring capacitances

Cw1 : ↓ input impedance.
Cw2 : ↓ output impedance by equation

Cs = Cce + Cw2 + Ci
Frequency response of RC coupled amplifier:
The resistors RI and R2 are the biasing resistors. Assume for the time being, that the
capacitor CE is replaced by a short circuit. The resistors RI, R2 are in parallel and are
equivalent to a resistor R. This resistance forms a part of the load resistance of the previous
(first) stage. It really does not matter whether the output voltage Vo is taken at the left side or
at the right side of the resistor R. The capacitor Cc is in series with the resistor R, and this
series combination is in parallel with the collector resistor Rc. The whole of this impedance
forms the ac load for the preceding stage. But the effective output of the stage is the ac
voltage developed across the resistor R. At mid-frequencies (and also at high frequencies),
the reactance of the capacitor Cc is sufficiently small compared to R. We can treat it as a
short-circuit so that the resistor R comes in parallel with the resistor Rc. In such a case, the
voltage VI across resistor Rc will be the same as the voltage across R.
However, at low frequencies, the reactance of Cc [= I /(21T/C)] becomes sufficiently

large. This causes a significant voltage drop across Cc. The result is that the effective output
voltage V decreases. The lower the frequencies of this signal, higher will be the reactance of
the capacitor Cc. At zero frequency (dc signals), the reactance of capacitor Cc is infinitely
large (an open circuit). The effective output voltage Vo then reduces to zero. Thus we see that
the output voltage Vo (and hence the voltage gain) decreases as the frequency of the signal
decreases below the mid-frequency range. The other component, due to which the gain
decreases at low frequencies, is the bypass capacitor CE. The capacitor CE is connected
across the emitter resistor RE.. This capacitor is meant to bypass the ac current to ground.
The impedance of this capacitor is quite low (as good as a short-circuit) in the mid-frequency
range as well as in high-frequency range. Therefore at these frequencies the emitter is
effectively grounded for ac current.
However, as the frequency decreases, the reactance of the capacitor CE becomes

comparable to resistance RE. The bypassing action of the capacitor is no longer as good as at
mid- and high-frequencies. The emitter is not at ground potential for ac. The emitter current ir
divides into two parts, i1 and i2. A part of current i, passes through the resistor R E. The rest
of the current passes through the capacitor CE. Due to current i, in RE, an ac voltage VRE is
developed.: When the polarity of the input signal voltage is as shown in figure, the current i.
flows from the emitter to ground. The effective input voltage is thus reduced. The output
voltage of the amplifier will now naturally be reduced. In other words, the gain of the
amplifier reduces. This reduction in gain occurs due to the inability of the capacitor CE to
bypass ac current. The lower the frequency, the higher is the impedance of the capacitor CE,
and greater is the reduction in gain.
Note that the resistor RE is not only a part of the input section, but also is a part of the
output section. The voltage VRE developed across the resistor RE depends upon the output
ac current. In this way, the effective input to the amplifier depends on the output current. The
reduction in gain due to such a process is technically described as negative current feedback
effect.
In Fig. ,there is also a coupling capacitor Cc in the input section of the amplifier. Due
to this capacitor, the effective input voltage is reduced at low frequencies in much the same
way as the effective output voltage is reduced due to the coupling capacitor in the output
section. Thus, the coupling capacitor in the input side is also responsible for the decrease of
gain at low frequencies. In practical circuits, the value of the bypass capacitor CE is very
large (= 100 .uF). Therefore, it is the coupling capacitor that has the more pronounced effect
in reducing the gain at low frequencies.
84. Sketch An Rc Coupled Two Stage Amplifier. Draw Its Frequency Response Curve
And Account For Its Stages.
R1 RL
Rc
Cc2
Cc
Ro
Cc1
R2 Re
CRe
R2 R3 Ce
1k
(A two stage RC coupled amplifier)
The figure above shows a two stage RC coupled amplifier. The signal developed
across collector resistor Rc of the first stage is coupled with the base of the second stage
through a capacitor Cc. The coupling capacitor Cc blocks DC voltage from first stage, from
reaching the second stage. So the DC biasing of the next stage is not interfered with. Hence
Cc is also known as blocking capacitances.
Some loss of signal voltage always occurs due to drop across Cc.
If we are amplifying signals above 10 hz, the scheme is more suitable. It is a

convenient
and least expensive way of building a multistage amplifier.
RC coupled amplifier finds its application in amplifiers used in TV,radio,tape recorders etc.
FREQUENCY RESPONSE CURVE:
The performance of an amplifier is judged by observing whether all frequency

components are amplified equally well. This we can observe on the frequency response
curve.The curve illustrates how the magnitude of voltage gain of an amplifier varies with the
frequency of the input signal.It can be plotted by measuring the voltage gain for different
frequencies of the sinusoidal voltage fed to the input.
The gain is constant for a limited band of frequencies.This frequency is called mid
frequency range and mid band gain Avm.
On both sides of mid gain, the gain decreases.In mid frequency range,the coupling
capacitor and the bypass capacitor works as good as being short circuited.
But when frequenc is low,the capacitors have greater value of reactance, since the
reactance of the capacitor Xc= 1/2 fC.
The coupling capacitor affects the gain of the amplifier at low frequencies. R1 and R2
are the biasing resistors. Assuming that the bypasss capacitor is replaced by a short circuit.R1
and R2 are the input impedance of the next stage,which are in parallel and equivalent to the
resistance R. The coupling capacitor Cc is in series with R and this series combination is in
parallel with the collector resistor Rc.The whole of this impedance forms the AC load for the
preceding stage. But the effective output of this stage, is the AC voltage developed across the
resistor R. At the mid frequency the reactance of Cc is sufficiently small compared to the R.

We can treat it as a short circuit. R comes in parallel with Re. in which case the
voltage across Rc will be the same as the voltage across R.But at low frequencies, the
reactance of Cc, is sufficiently large causing significant drop across Cc. As a result, the
output voltage decreases.Lower the frequency of the signal higher will be the reactance of Cc,
and more will be the reduction in output voltage.
Lower the frequency , higher will be the impedance of Ce, and greater is the reduction
in gain. Due to the coupling capacitor Cc, the effective output voltage is reduced at low
frequency, which is also responsible for the decrease of gain at low frequencies.
Therefore in short:
In mid frequency range(50 Hz to 20KHz),the voltage gain of the amplifier is constant,

as is from the analysis. With the increase in the frequency in this range, the reactance of the
coupling capacitor Cc reduces thereby increasing the gain but at the same time lower
capacitive reactance causes higher loading resulting in lower voltage gain. Thus the two
effects cancel each other and uniform gain is obtained in mid frequency range.
At low frequency range(below 50 Hz), higher capacitive reactance of coupling

capacitor Cc allows very small part of signal to pass from one stage to the next and also
because of higher reactance of emitter bypass capacitor CE, allows very small part of signal
to pass from one stage to the next and also because of higher reactance of emitter bypass
capacitor CE, the emitter resistor RE is not effectively shunted. Thus the voltage gain falls off
at low frequencies.
85. Explain the effect of feedback on amplifier bandwidth?
The bandwidth of an amplifier is defined as the range of frequencies for which the
gain remains constant.The gain –bandwidth product of an op-amp is always a constant.The
gain of an op-amp and its bandwidth are inversely propotional to one another.The bandwidth
of an op-amp can be increased by providing feedback signal to its input.The product of
closed-loop gain and closed-loop bandwidth is same as the product of open-loop gain and
open-loop bandwidth.i.e.
AFBWCI=ABWOL (1)
The op-amp 741 has an open-loop gain of 200,000 and a bandwidth of about
5Hz.Therefore,the product of its open-loop gain and bandwidth is
ABWol=200,000*5Hz=1MHz.
The open-loop gain –bandwidth product of a 741 is 1MHz.The left-hand side of

eqution (1) is the product of closed-loop gain and closed-loop bandwidth.No matter what the
values of R1 and RF ,the product of closed-loop gain and closed-loop bandwidth must equal
the open-loop gain-bandwidth product,i.e.for 741 the closed-loop gain-bandwidth product
must also be 1 MHz.
The open-loop response is shown in Figure . The open –loop gain has a maximum
value of 200,000. When the operating frequency increases to 5 Hz ,the open – loop gain is
down to 0.707 of its maximum value . The gain keeps dropping off with increasing
frequency .After the upper cut-off frequency,fOL,the gain drops by 20dB/decade.The unity-
gain frequency is the frequency where the open-loop gain has decreased to unity. In figure
funity equals 1MHz
The curve in figure represents the closed-loop response of an op-amp.It can be seen
from this figure that the open-loop gain decreases continuously until it approaches the value
of closed-loop gain .Then , the closed-loop gain starts to decrease and at fCL,the closed-loop
gain is down to 0.707 of its maximum value.Thereafter,both the curves superimpose and
decrease to unity at funity.
If the feedback resisters are changed , the closed-loop gain will change to a new value
and so will the closed-loop cut-off frequency.But ,because the gain-bandwidth product is
constant,the closed-loop curve superimposes the open-loop curve beyond cut-off frequency.
86. What is thermal runaway.
The problem of self heating arises due to dissipation of power at the collector
junction. The leakage current ICBO is extremely temperature dependent and increase with the
rise of temperature of collector base junction. An increase in ICBO causes an increase in
collector current IC considerabely. With the increase in collector current ,collector power
dissipation increase which raises the junction temperature which leads to further increase in
collector current. The process is cumulative and may lead to the eventual destruction of the
transistor . This phenomenon is called thermal runaway.

87. Write a short note on heat sink
For transistors handling small signals ,the power dissipated at the collector is
small.Such transistors have little chances of thermal runaway .However in power transistors
,the power dissipated at the collector junction is larger .This may cause the junction
temperature to rise to a dangerous level .We can increase the power handling capacity of a
transistor if we make a suitable provision for rapid conduction of heat away from the junction
.This can be achieved by using a sheet of metal called heat sink.As the power dissipated
within a transistor is predominantly the power dissipated at its collector base junction
,sometimes the collector of the power transistor is connected to its metallic base The case of
the transistor is then bolted on to a sheet of metal .The sheet serves a heat sink. Connecting
heat sink to a transistor increases the area from which heat is to be transferred to the
atmosphere .Heat moves from the transistor to the heat sink by conduction ,and the it is
removed from sink to the ambient by convection and radiation.
Properties of a good heat sink
For maximum efficiency, a heat sink should be
1)Be in good thermal contact with the transistor case

2)Have the largest surface area
3)Be painted black
4)Be mounted in a position such that free air can flow past it.
88. Write short notes on the Stability Factor of Biasing circuits.
The degree of success achieved in stabilizing Ic in the face of variations in Ico is

expressed in terms of stability factor S and it is defined as the rate of change of collector
current w.r.t Ico keeping â and VBE constant.
S=dIc/dIco at constant â and VBE
From the above equation it is obvious that smaller is the value of S ,higher is the
stability.The ideal value of S is unity (because Ic includes Ico) but it is never possible to
achieve it in practice.Actually there are two stability factors Sv and S â are defined as below:
Sv=ÄIc/ÄIBE at constant Ico and â
SB ÄIc/ÄI â at constant Ico and VBE
General expression for Stability Factor
S=1+â/(1- âdIB/dIc)

89. With a circuit diagram explain how a transistor in common-base configuration

amplify signals.
The common-base terminology is derived from the fact that the base is common to the
input and output sides of the configuration. Also the base is the terminal closest to ,or at,
ground potential. The input characteristics for a transistor in common base configuration can
be obtained by plotting a graph with VBE as x-axis and IE as the y-coordinate at various levels
of output voltage VCB. Also the output characteristics can be observed by plotting VCB along
x-axis and IC along y-axis for various levels of IE.
The output or collector set of characteristics has three basic regions of interests : the
active, cut-off and saturation regions. The active region is the region normally employed for
linear (undistorted) amplifiers. In the active region the base-emitter junction is forward
biased, while the collector-base junction is reverse-biased.
The signal to be amplified Vs is applied to the input leads, ie. between the emitter and
the base. The electrons leaving the base take two paths. A small percentage combines with
the holes in the base region and constitute the base current, while the majority of these diffuse
towards the collector junction. The collector junction is reverse biased and these electrons can
easily cross the junction and form the collector current. This collector current is allowed to
pass through a high resistor connected in series with the collector. The voltage developed
across the load resistor is the amplified output voltage.
The amount of collector current depend upon the recombination at the base, the
smaller the recombination the larger the collector current.
A small base current controls large collector current. If the base-emitter voltage is
increased slightly, more electrons are injected into the base region, which will be more than
the base can use (recombination). This results in a larger collector current. In short, a small
change in the base voltage cause very large change in the collector current. This is current
amplification. The large collector current passing through the load resistor produces high
voltage across which will be several times greater than the small input voltage applied to the
input.
90. What is meant by biasing transistor?
The purpose of dc biasing of transistor is to obtain a certain dc collector current at a

certain dc collector voltage. These values of current and voltage are expressed in terms of
operating point. To obtain the operating point we make use of some circuits called biasing
circuits. Only the fixing of a suitable operating point is not sufficient It must also be ensured
that it remains there. In a transistor the operating point shifts with the use of circuit. Such a
shift of operating point may drive the transistor into undesirable region. There two reasons
for the shift of operating point. Firstly the transistor parameters are temperature dependent.
Secondly the parameters (like beta) change from unit to unit. The requirements of biasing a
transistor are: establish the operating point in the active region of the characteristics, so as
that on applying the input signal the instantaneous operating point does not move to
saturation or cut off region. Stabilize the collector current against temperature variations.
Make the operating point independent of transistor parameters so that it does not shift when
the transistor is replaced by another of the same type of circuits.
91. Two Stage Rc Coupled Amplifier
V1
12V
+V
R1 R3 R5 R7
47k 2.2k 47k 2.2k C3 V2
C2 10uF
10uF 10V
C1 +V
15uF
Q1 Q2
BC107 BC107
R9
22ohms
+ R6 R8
Vs1 R2 R4 10k
10V 10k 680ohms 680 ohms
V3
- 10V
+V
It is the most popular type of a multistage amplifier because it is cheap and provides
excellent audio fidelity over a wide range of frequencies.It is usually employed for voltage
amplification.
Coupling capacitor is used to connect the output of first stage to the base i.e, input of
second stage and so on.The coupling from one stage to next stage is achieved by a coupling
capacitor followed by a connection to a shunt resistor.Such amplifiers are called RC coupled
amplifiers.
Operation

When an ac signal is applied to the base of the first transistor it appears in the
amplified form across its collector load Rc .The amplified signal developed across Rc is
given to the base of the next tsage through Cc.The second stage does further
amplification.Thus cascaded stages amplifies the signal and the overall gain is increased.
The total gain is less than the product of the gain of the individual stages i.e,
Total gain <β1×β2
This is because the second stage is made to fall on the first stage .The effective load
resistance of the first stage is reduced due to the shunting effect of the input resistance of the
second stage.
Frequency response
1. Αt low frequency i.e,less than 50 Hz reactance of Cc is going high hence same part of
the signal will pass from one stage to next stage.CE cannot shunt RE because of its
large reactance at low frequency.These factors cause falling of voltage gain.
2. At higher frequencies i.e, greater than 20 kHz reactance of Cc is very small and it
behaves as a short circuit.This increase the loading effect of the next stage and
reduces the voltage gain.At high frequencies, the capacitive reactance of base-emitter
is very low which increases the base current.So β reduces and voltage gain drops off.
3. At mid frequency i.e, 50Hz to 20kHz ,the voltage gain is constant.Cc in this frequency
range is such as to maintain a uniform voltage gain.Thus as frequency increases
reactance of Cc decreases that tends to increase the gain.However lower reactance
means higher loading of first stage and hence lower gain.So the two factors cancel
each other resulting in a uniform gain at mid frequencies.
Advantages
1. Αids excellent frequency response.The gain is constant over the audio frequency
range
2. It has lower cost since it employs resistors and capacitors which are cheap.
3. The circuit is very copact as modern resistors and capacitors are small and extremely
light.
Disadvantages
1. It has low voltage and power gain.

2. They have the tendency to become noisy with age particularly in moist climate.
3. Impedance matching-the output impedance of Rc coupled amplifier is several hundred
ohms whereas that of a speaker is only a few ohms.Hence little power will be
transferred to the speaker.
Application
It has excellent audio fidelity over a wide range of frequencies.So they are widely used as
voltage amplifiers.

92. What is meant by Thermal Runaway?Explain with reference to a transistor.How is

it avoided in circuits?
The collector current of a transistor increases with increasing temperature.The

characteristics of a transistor are thus temperature dependent.At high temperatures(150-200
degree Celsius),the semiconductor material degenerates and hence their performance is
unpredictable.The following characteristics of transistor are temperature dependent:emitter
junction resistance,beta,base-emitter voltage and leakage current.
The leakage current,an important transistor parameter,increases exponentially with

temperarture and can set a limit to the operating temperature of a transistor.Increasing
leakage current results in increasing collector current,and also increasing collector junction
temperature,with a still further increase in leakage current.Thus a vicious cycle is set
up,which if not kept under check,will result in the transistor being permanently damaged.It is
referred to as’Thermal Runaway’.
Even in absence of emitter current,a minute collector current flows through the
transistor.Denoted by Icbo,this current represents the current between collector and base with
an open emitter.Icbo doubles for every 10 degree Celsius rise in temperature.At room
temperature,the leakage current in silicon transistors is far less than that in germanium
transistors.It is part of the total collector current and is also unpredictable.An increase in
leakage current brings about a corresponding increase in the collector current,resulting in a
shift of the operating point.Special biasing techniques keep the shift in the operating point
stabilized.
Even in the absence of base current,a minute current flows through the collector of a
transistor.Denoted by Iceo,this current represents the current between collector and emitter
with an open base.Iceo is also temperature dependent.Special biasing techniques are
employed to swamp the changes in Iceo.
T=Tj-Ta= Pd.where,
T=temperature rise in collector junction.

Tj=junction temperature.
Ta=ambient temperature.
Theta=constant of proportionality called thermal resistance which depends on size of
transistor.
The steady state temperature rise at collector junction is proportional to power

dissipated and theta is constant of proportionality.
delta Pc/delta Pj<1/theta.

This condition must be satisfied to prevent thermal runaway.If the temperature gets
elevated due to thermal runaway continuously at some point,it may result in permanent
damage to the transistor.
93. What is the need for bias stabilization in BJT?
BJT or bi-polar junction transistor is a three terminal, two junction semiconductor

device and the conduction is due to the majority and minority carriers, hence it is a bi-polar
device. BJT amplifies the electrical signal as they transferred from the input to the output.
A few advantages of the BJTS are given below
• Low current requirement

• Small size
• Less weight
• Long operating the shelf life
• Rugged in nature
Transistor terminals : BJTS have three terminals namely base terminal, emitter terminal and
collector terminal .The emitter layer is a source of charge carriers and is heavily doped with a
moderate cross-sectional area .The collector collects the charge carriers emitted by the emitter
region and has a moderate doping and large cross-sectional area. The base is in between these
and it acts as a path for the movement of charge carriers .In order to reduce the recombination
of electrons and holes in the base region ,this region is lightly doped and is of narrow cross-
sectional area. The width of the base region should be less than the diffusion length of the
carriers present in the base region. BJT is classified into two types based on the type of
semiconductor connected
Regions of operation in BJT : Transistor find many applications like amplifier, switch etc.
depending upon the polarity and the magnitude of the applied voltages across the junctions,
there are three distinct regions which a bi-polar junction transistor can be operated ,when the
transistor is configured for a particular application ,it must be operated in a particular region.
There are three regions in which we can operate a transistor they are the active region, the
cut-off region and the saturation region.
When the emitter junction is forward biased and the collector junction is reverse
biased the region of operation is the active region and when both the emitter junction and
the collector junction is forward biased the transistor is said to be in the saturation region.
When both the emitter junction and the collector junction is reverse biased the transistor is
said to be in the cut-off region.
Need for biasing : Baising is necessary to establish the quiescent operating point so that the
device operates with the linear region without exceeding the maximum power dissipation
curve.
Operating point or quiescent point: It is fixed in the active region of the transistor
characteristics within the maximum constraints it either shortens the life time of the device or
destroys the device. The operating point is fixed for a particular value of base current IB ,

collector current IC and collector emitter voltage drop VCE. If any of these parameters change
them, the quiescent point tends to change.
Factors affecting Q-point
• Change in ß
• Changes in temperature
Effect of change in temperature on VBE
VBE decreses by 2.5mV per degree C in temperature the base current IB is fixed bias
.with the increase in temperature the base-emitter voltage VBE decreases which inturn
increases the difference between VBE and collector biasing voltage VCC and therefore base
current IB increases.even a small increase in IB increase collector current IC to a larger extent
and VCC drops .Hence the Q-point fixed on these two parameters varies.
Changes in ß
The parameter ß changes with
• Change in device
• Change in temperature
No two transistors have the same electrical parameters. even if we choose a transistor
of the same specification the ß value changes over a range of 1-3.since IC is dependent on ß
the collector current and the collector emitter voltage VCE will vary, which results in a
variation of the Q-point. ß also increases with increase in temperature which causes in
stability with the Q-point due to the dependence of IC on ß .
Temperature affects parameters like ßac,ICEO,VBE and ICO that in turn affects the Q-
point since the variation of the above parameters causes variations in the collector current and
hence collector emitter voltage. A circuit should be designed considering the variations of the
above parameters so that the stability is high.

SO LI D S T A TE E L E C TR O N I C S
MODULE - II
FIELD EFFECT TRANSISTORS

1. Why FET is called a voltage-controlled device? Why its input resistance is high?
In the case of a FET the output current ID is a function of the voltage VGS applied to
the input circuit. Hence FET is known as a voltage controlled device. The equation that
governs the working of a FET is called Shockley’s equation given by,
ID = IDSS[1 – (VGS/VP)2]
where, ID is the drain current
IDSS is the maximum saturation current

VGS is the voltage applied between gate and source
VP is the pinch-off voltage
A FET requires virtually no input current and hence IG is always made zero. This
gives an extremely high input resistance to FET. The range of its input impedance is at a level
of 1 to several 100MΩs.
2. Sketch the drain characteristics of enhancement type MOSFET.
Drain Characteristics of Enhancement type MOSFET
3. With a cross sectional view, explain the working of a depletion type MOSFET Draw a
biasing amplifier circuit
DEPLETION-TYPE MOSFET : Two types of FETs: JFETs and MOSFETs. MOSFETs are
further broken down into depletion type and enhancement typeThe terms depletion and
enhancement define their basic mode of operation, while the label MOSFET stands for metal-
oxide-semiconductor-field-effect transistor. Since there are differences in the characteristics
and operation of each type of MOSFET. The depletion-type MQSFET, which happens to
have characteristics similar to those of a JFET between cutoff and saturation at IDSS but then
has the added feature of characteristics that extend into the region of opposite polarity for V
GS'
Basic Construction
The basic construction of the n-channel depletion-type MOSFET is provided in

Figure. A slab of p-type material is formed from a silicon base and is referred to as the
substrate-Jet is the foundation upon which the device will be constructed In some cases,
thesubstrate is internally connected to the source terminal However, many discrete devices
provide an additional terminal labeled SS, resulting in a four-terminal device,. The source and
drain terminals are connected through metallic contacts to n-doped regions lirlked by an n-
channel as shown in the figure. The gate is also connected to a metal contact surface but
remains insulated from the n-channel by a very thin silicon dioxide SiO2 layer. SiO2is Ii
particular type of insulator referred to as a dielectric that sets up opposing (as revealed by the
prefix di-) electric fields within the dielectric when exposed to an externally applied field.
The fact that the SiO2 layer is an insulating layer reveals the following fact:
There is no direct electrical connection between the gate terminal and the channel of a
MOSFET:
In addition:
It is the insulating layer of SiO2 in the MOSFET construction that accounts for the
very desirable high input impedance of the device.
In fact, the input resistance of a MOSFET is often that of the typical JFET, even
though the input impedance of most JFETs is sufficiently high for most applications. The
very high input impedance continues to fully support the fact that the gate current is
essentially zero amperes for dc-biased configurations.
The reason for the label metal-oxide-semiconductor FET is now fairly obvious: metal
for the drain, source, and gate connections to the proper surface-in particular, the gate
terminal and the control to be offered by the surface area of the contact, the oxide for the
silicon dioxide insulating layer, and the semiconductor for the basic structure on which the n-
and p-type regions are diffused. The insulating layer between the gate and channel has
resulted in another name for the device: insulated- gate FET or IGFE1; although this label is
used less and less in current literature.
Basic Operation and Characteristics
In Figure the gate-to-source voltage is set to zero volts by the direct connection from
one terminal to the other, and a voltage V DS is applied across the drain-to-source terminals.
The result is an attraction for the positive potential at the drain by the free electrons of the n-
channel and a current similar to that established through the channel of the JFET. In fact, the
resulting current with VDS = 0 V continues to be labeled IDss, as shown in Figure.
In Figure, VDS has been set at a negative voltage such as -1 V. The negative potential
at the gate will tend to pressure electrons toward the p-type substrate (like charges repel) and
attract holes from the p-type substrate (opposite charges attract) as shown in Figure.
Depending on the magnitude of the negative bias established by VDS, a level of
recombination between electrons and holes will occur that will reduce the number of free
electrons in the n-channel available for conduction. The more negative the bias, the higher the
rate of recombination. The resulting level of drain current is therefore reduced with
increasing negative bias for VDS as shown in Figure for VDS = -1V,-2V, and so on, to the
pinch-off level of - 6 V. The resulting levels of drain current mid the plotting of the transfer
curve proceeds exactly as described for the JFET.
For positive values of V GS' the positive gate will draw additional electrons (free
carriers) from the p-type substrate due to the reverse leakage current and establish new
carriers through the collisions resulting between accelerating particles. As the gate-to-source
voltage continues to increase in the positive direction, the drain current will increase at a
rapid rate for the reasons listed above. The vertical spacing between the V GS = 0 V and V
GS = + 1 V curves of Fig is a clear the application of a voltage V GS = + 4 V would result in a
drain current of 22.2 mA, which could possibly exceed the maximum rating (current or power)
for the device. As revealed above, the application of a positive gate-to-source voltage has
"enhanced" the level of free carriers in the channel compared to that encountered with V GS
= 0 V.

4. Give the Shockley s equation for the transfer characteristics of JFET’s?
ID=IDSS(1-VGS/VP)
Where ID is the drain current and VGS is the voltage across gate and source. The
squared term of the equation will result in a non linear relation between ID and VGS producing
a curve that grows exponentially with decreasing magnitudes of VGS. the transfer

characteristics defined by shockley s equation are unaffected by the network in which the
device is employed.
5. What is the significance of giving a negative voltage to the gate higher than that of the
source?
This is done to reach the saturation at a lower of level of VDS. The resulting saturation
level for ID has been reduced and the fact will continue to decrease as VGS is made more and
more negative. Eventually, VGS when VGS=-VP will be sufficiently low to establish a
saturation level that is essentially 0mA (practically it is turned off).
6. What is the Voltage controlled resistance region?
In this region the JFET can actually be employed as a variable resistor whose
resistance is controlled by the applied gate-to-source voltage. The slope of the curve of the
resistance of the device between the drain and the source is a function of the applied voltage
VGS.
7. What is Pinch-off voltage?
The reverse bias is relatively large near the source. As a result, the depletion region
intrudes into the channel near the drain, and the effective channel area is constructed. Since
the resistance of the constituent channel is higher, the I-V plot for the channel begins to
depart from the straight line that was valid at low current levels. As the voltage VD and
current ID are increased still further, the channel region near the drain becomes more
constituted by the depletion region and the channel resistance continues to increase. As VD is
increased, there must be some bias voltage at which the depletion region meet near the drain
and eventually pinch off the channel. When this happens, the current Id cannot increase
significantly with further increase in VD

8. Draw the Circuit symbols for N- channel JFET, P-channel JFET,

Enhancement MOSFETs and Depletion MOSFETs?
JFET
(a) N-Channel D
(b) P-Channel
ID +
G Q1 +
VDD
NJFET
+ I
-- G
VDS -
+ VGG VGS Is
- -
S
+
ID
Q2
PJFET + VDD
+
+ IG VDS
VGG VGS
Is
- -
Depletion MOSFETs
(a) N-Channel
(b) P-channel
D
Q3 Q4
NMOS PMOS
B B
G G
S S
Enhancement MOSFET
(a) N-channel
(b) P-channel

D D
Q5 Q6
NMOS PMOS
G B G B
S S
9. Explain the construction and operation of Enhancement MOSFET?
The construction of an N-channel enhancement MOSFET is shown in figure below. Two

highly doped N+ regions are diffused in a lightly doped substrate of P-type silicon substrate.
One N+ region is called the source S and other one is called the drain D. They are separated
by 1 mil(10-3 inch).A thin insulating layer of SiO2 is grown over the surface of the structure
and holes are cut into the oxide layer ,allowing contact with source and drain. Then a thin
layer of metal aluminum is formed over the layer of SiO2.This metal layer covers the entire
channel region and it forms the gate G.
The metal area of the gate , in conjunction with the insulating oxide layer of SiO2 and the
semiconductor channel forms a parallel plate capacitor. This device is called the insulated
gate FET because of the insulating layer of SiO2.This layer gives extremely high input
impedance for the MOSFET.
If the substrate is grounded and a positive voltage is applied at the gate, the positive
charge on G induces an equal negative charge on the substrate side between the source and
drain regions. Thus, an electric field is produced between the source and drain regions. The
direction of the electric field is perpendicular to the plates of the capacitor through the oxide.
The negative charge of electrons which are minority carriers in the P-type substrate forms an
inversion layer. As the positive voltage on the gate increases, the induced negative charge in
the semiconductor increases. Hence the conductivity increases and current flows from source
to drain through the induced channel. Thus the drain current is enhanced by the positive gate
voltage.

N-channel Enhancement MOSFETs
VGG
+
S D
G Al
SiO2 + + + + + + +
-+ -+ - - - - -
+ + + + + + +
- - -
----------------
N+ + + + N+ ID
----- Induced
N-Channel
P-Type substrate
VDD
+
10. Explain the construction and operation of Depletion MOSFETs?
The construction of an N-channel depletion MOSFET is shown in figure below, where an

N-channel is diffused between the source and drain to the basic structure of MOSFET .
With VGS=0 and the drain D at a positive potential with respect to the source ,the
electrons (majority carriers)flow through the N-channel from S to D. Therefore the
conventional current ID flows through the channel D to S. If the gate voltage is made
negative, positive charge consisting of holes is induced in the channel through SiO2 of the
gate-channel capacitor. The introduction of the positive charge causes depletion of mobile
electrons in the channel. Thus a depletion region is produced in the channel. The shape of the
depletion region depends on VGS and VDS .Hence the channel will be wedge shaped. When
VDS is increased ,ID increases and it becomes practically constant at certain value of VDS,
called the pinch-off voltage. The drain current ID almost gets saturated beyond the pinch-off
voltage.
Since the current in an FET is due to majority carriers (electrons for an N-type materials),
the induced positive charges make the channel less conductive, and ID drops as VGS is made
negative.
The depletion MOSFET may also be operated in an enhancement mode. It is only

necessary to apply a positive gate voltage so that negative charges are induced into the N-
type channel. Hence, the conductivity of the channel increases and ID increases. As the
depletion MOSFET can be operated with bipolar input signals irrespective of doping of the
channel, it is also called as dual mode MOSFET.

N-channel Depletion MOSFETs
VGG
+
S D
G Al
SiO2 - - - - - - -
- -
-+- -+- - +- - +
--+
- - -+- -+
N+ ++++++++++++++++
+ + + N+
+++++ Induced ID
N-Channel
P-Type substrate
VDD
+
11. Compare MOSFET with JFET?
a. In enhancement and depletion types of MOSFET,the transverse electric field induced

across an insulating layer deposited on the semiconductor material controls the
conductivity of the channel.In the JFET the transverse electric field across the reverse
biased PN junction controls the conductivity of the channel.
b. The gate leakage current in a MOSFET is of the order of 10-12 A.Hence the input
resistance of a MOSFET is very high in the order of 1010 to 1015Ω.The gate leakage
current of a JFET is of the order of 10-9A and its input resistance is of the order of
108Ω.
c. The output characteristics of the JFET are flatter than those of the MOSFET and
hence , the drain resistance of a JFET (0.1 to 1MΩ)is much higher than that of
MOSFET(1 to 50 kΩ).
d. JFETs are operated only in the depletion mode.The depletion type MOSFET may be
operated in both depletion and enhancement mode.
e. Comparing to JFET , MOSFETs are eaiser to fabricate.
f. MOSFET is very susceptible to overload voltage and needs special handling during
installation.It gets damaged easily if it is not properly handled.
g. MOSFET has zeo offset voltage.As it is a symmetrical device, the source and drain
can be interchanged.These two properties are very useful in analog signal switching.

h. Special digital CMOS circuits are available which involve near-zero power
dissipation and very low voltage and current requirements.This makes them most
suitable for portable systems.
i. MOSFETs are widelt used in digital VLSI circuits than JFETs because of their
advantages.
12. What are the two common types of FET amplifier?
The two common FET type amplifiers are common-source amplifier and common –
drain amplifier.
JFET Common Source Amplifier
The common source configuration for a FET is similar to the common emitter bipolar
transistor configuration, and is shown in figure 5.17. The common source amplifier can
provide both a voltage and current gain. Since the input resistance looking into the gate is
extremely large the current gain available from the FET amplifier can be quite large, but the
voltage gain is generally inferior to that available from a bipolar device. Thus FET amplifiers
are most useful with high output-impedance signal sources where a large current gain is the
primary requirement. The source by-pass capacitor provides a low impedance path to ground
for high frequency components of and hence AC signals will not cause a swing in the bias
voltage.
Figure 5.17: JFET common source amplifier.
Since the FET gate current is small we can make the approximations and
: the source is positive with respect to the gate for reverse-bias. Since at low
frequencies we can ignore the capacitor the source voltage is given by
Using the transconductance equation we can write

With the approximation we can write the drain voltage as
The voltage gain is thus
If , this reduces to
JFET Common Drain Amplifier
The common drain FET amplifier is similar to the common collector configuration of
the bipolar transistor. A general common drain JFET amplifier, self-biased, is shown in
figure 5.18. This configuration, which is sometimes known as a source follower, is
characterized by a voltage gain of less than unity, and features a large current gain as a result
of having a very large input impedance and a small output impedance.
Figure 5.18: JFET common drain amplifier.
Using AC circuit analysis
The voltage gain between the gate and source is
If , and we have a voltage follower.

13. What the voltage gains in the FET amplifier?
For common source
Voltage gain=Vo/Vi =-µRd/Rd+rd
where µ is the amplification factor,Rd the drain resistance and rd the resistance series to
the drain gate of FET.
For common drain
Voltage gain=µRsVgd/(µ+1)Rs+rd
where µ is the amplification factor,Rs the source resistance,Vgd the input voltage and rd
the resistance in series to the drain.
14. In a CD amplifier,given Rs =4k , µ=50 and rd= 35k .Find the voltage gain Av.
The voltage gain,
Av=Vo/Vi=µRs/(µ+1)Rs+rd
= 50*4* (103)/ (50+1)*4*103+35*103
=0.836
The positive value indicates that Vo and Vi are in phase, further note that the gain is
greater than one.
15. In a CG amplifier, Rd=2k ,gm=1.43 *10-3 and rd=35k . Evaluate the voltage gain.
Av=Vo/Vi
=(gmrd+1)Rd/Rd+rd
=(1.43*10 -3*35*10 3+1)2*103/2*10 3+35*10 3
=2.75
16. Which are the three basic configurations of FET amplifiers?
The three basic configurations of FET amplifiers are
• Common source(CS)- It is most frequently used as it provides good voltage

amplification
• Common drain(CD) or source follower-It is used as a buffer amplifier. It has
high input impedance and near unity voltage gain.
• Common gate(CG)- It is used as a high frequency amplifier.
17. What is voltage gain of common source (CS) amplifier?
Source resistor (Rs) is used to set the Q point but is bypassed by Cs for midfrequency
operation.
RD
D
G
Vo
+ S +
Vi RG RS C1
- Cs
Common source amplifier
D
G
rd
+ +
Vs1
10V RG Vgs µVgs
RD
- -
Small signal equivalent circuit of CS amplifier
From the small signal equivalent circuit,
Output voltage,
Vo = -RDµVgs / (RD + rd)

where Vgs = Vi , the input voltage
Therefore,the voltage gain,
Av =Vo / Vi = -µRD / (RD + rd)

18. Give a general account of common drain amplifier?
The output is taken over the source terminal and when the dc supply is replaced by its
short circuit equivalent, the drain is grounded .That is why ,it is called common drain .
The voltage source in the output circuit is expressed in terms of Vgd using Thevenin’s
theorem.
VDD
S
+
Vi RG Rs
- Vo
D
Common drain amplifier
G
rd/(µ+1)
Rs
+ +
Vi RG Vgd µVgd/(µ+1)
- -
D
Small signal equivalent circuit of CD amplifier
The output voltage

Vo =Rs /(Rs + rd/µ+1) * µVgd/(µ+1)
= µRsVgd /(µ+1)Rs + rd
where Vgd =Vi ,the input voltage
Therefore,

Voltage gain
Av = Vo/Vi = µRs /(µ+1)Rs + rd
19. What is the voltage gain of common gate amplifier?
The controlled source gmVgs is connected from drain to source with rd in parallel.The
resistor is connected Rs is connected from source to ground.The isolation between input and
output circuits has been lost since the gate terminal is connected to the ground.
Cc Cc
+ D +
S
G RD
R1
Vi Rs Vo
R2
Common gate amplifier
rd
S gmVgs
+
Vi Rs RD
-
G
Small signal equivalent circuit of CG amplifier
By applying KCL to the small signal equivalent circuit, ir = id –gmVgs
Applying KVL to the outer loop,
Vo = (id –gmVgs)rd + Vsg
But ,Vsg = -Vgs = Vi and id = -Vo/RD
Therefore ,
Vo = (-Vo /RD + gmVi)rd + Vi
Voltage gain,
Av =Vo/Vi = (gmrd +1)RD /(RD + rd)
20. Give an introductive notes about FET amplifier.
The small signal models for the common source FET can be used for analyzing the
three basic FET amplifier configurations: (i) Common source (CS), (ii) Common drain (CD)
or Source-follower, and (iii) Common gate (CG). The CS amplifier which provides good
amplification is most frequently used. The CD amplifier with high input impedance and near-
unity voltage gain is used as a buffer amplifier and the CG amplifier is used as high
frequency amplifier. The small signal current-source model for the FET in CS configuration
is shown down (fig 1); the voltage-source model can be derived by finding the Thevenin’s
equivalent for the output part.
+ +
Is1 R1
100mA RESISTOR
- -
fig 1
21. Explain the high-frequency response of FET amplifier.
The analysis for the high frequency response of the FET amplifier is almost the same
as that of the BJT amplifier. The FET amplifiers are interceded and wiring capacitances that
will determine the high frequency characteristics of the amplifier. The capacitors C(6) and
C(7) typically vary from 0.1 to 10 pF, while the capacitance C(8) usually vary from a bit
higher range from 0.1 to 1 pF. Since the network is an inverting amplifier, a Miller effect
capacitance will appear in the high frequency ac equivalent network. At high frequencies, Ci
will approach a short circuit equivalent network and Vgs will drop in value and reduces the
overall gain. At the frequencies where Co approaches its short circuit equivalent, the parallel
output voltage Vo will drop in magnitude.

fi= 1 .
2 *R(th) i*Ci
R (th)i = R1|| R2,
Ci = C(2) +C(6)+Cm,
Cm = (1-A)*C(7)
fo= 1 .
2 *R(th)o*Co
R4
RESISTOR
C4
1uF
C7 +
1uF
+
R1 C1
RESISTOR 1uF Q1
NJFET + C8
+
1uF
+
+
+
R2 C2 C6 C5
RESISTOR 1uF 1uF 1uF R5
RESISTOR
+
+ C3
Vs1 R3 1uF
10V RESISTOR
-
R(th) o = R(4) || R(5)
Co = C(5)+C(8)+Cn,
Cn = ( 1 – (1/A))*C(7)
22. Write a brief note on common drain amplifier
Since voltage at the gate-drain is more easily determined than that of the voltage at
gate-source, the voltage source in the input circuit is expressed in terms of voltage at the gate-
source using Thevenin’s theorem.

The output voltage is given by:
Vo = R(1 ) * µ * Vgs = µ*R(1)*Vgs .

R(1) + r . µ+1 ((µ + 1)*R(1)) + r
µ+1
Vd
Q1
NJFET
+
Vs1 R1
10V R2
RESISTOR RESISTOR
-
Vo
Vgd=V
Av = Vo/Vi = µR(1) .
((µ+1)*R(1)) + r
23. On a CD amplifier Rs=4k , µ=50 and r =35k . Evaluate the voltage gain Av.
Av = Vo/Vi = µRs .
(µ+1)Rs + r
= 50×4×10^3 .
((50+1)×4×10^3) + (35×10^3)
= 0.836
The positive value indicates that the voltages Vo and Vi are in phase and further note that
Av <1, for CD amplifier.

24. Give the principle of biasing a FET amplifier.
To correctly bias the FET, the gate needs to be negative with respect to the source.
Bias is obtained in the following manner:
Drain current flows through the source resistor and develops a voltage across it,
making the emitter positive with respect to the zero volts rail. There is no gate current, so
there is no current through the gate resistor. This means that there is no voltage across this
resistor so it will be zero volts at both ends. This means that there is zero volt on the gate.
Therefore the source is positive with respect to the gate. The gate is negative with respect to
the source. The fet is biased correctly. When a signal voltage is applied to the gate, it controls
drain current. When the signal goes more negative the drain current is reduced and voltage
across drain resistor is less. The drain voltage goes more positive. When the signal goes less
negative the drain current is increased and the voltage across the drain resistor is more. The
drain voltage goes less positive. In both cases, the drain voltage does the opposite of gate
voltage.
25. What is the advantage of using JFET as an amplifier?
As an amplifier of small time-varying signals, the JFET has a number of valuable

assets. First of all it has a very high input resistance (a reverse biased p-n junction), which is
one of the characteristics of an ideal voltage amplifier. For this reason, it is widely used in
instrumentation circuits such as digital voltmeters and oscilloscope input amplifiers. In
general, a JFET generates less internal noise. Hence it is used in numerous audio and video
amplifiers. JFETs have very low power consumption and are used to good advantage in the
design of operational amplifiers where input offset voltage and input currents need to be
minimized.
26. Which are the different FET amplifiers?
A FET can be used as a small-signal amplifier by connecting one of its lead to signal
ground. The other two leads then serve as the input and the output. The amplifiers
constructed with a single FET are named according to which lead is connected to ground. The
common source (CS) amplifier has its source connected to ground. The input signal is applied
to the gate and the output is taken at the drain.
The input to the Common Drain (CD) amplifier is applied to the gate while the output
is taken at the source. For the common gate amplifier (CG), the input is at the source and the
output is at the drain.
Source Feedback (SF) amplifier is similar to the CS connection, but there is a resistor
connected between the source and the ground. Thus, none of the FET leads are connected to
ground. The SF has two output signals, one at the source and one at the drain

27. What is Pinch off voltage (Vp)
As the voltage Vds is increased from 0 to a few volts, the drain current will increase
as determined by Ohm’s law and the plot of Id versus Vds will appear as shown below. The
relative straightness of the plot reveals that for a region of lower values of Vds, the resistance
is essentially a constant. As Vds increases and reaches a level called Vp the depletion region
widens causing reduction in the channel width, this reduction in channel width causes the
resistance to increase and forces a curve in the graph. This level of voltage Vp is called pinch
off voltage. Actually pinch off is the condition at which both the p parts touch thus blocking
the current. But this doesn’t really happen. The current Id maintains a saturation level
referred to as Idss because of the existence of a very small channel with high density current.
As Vds is increased after attaining Vp, the region of close encounter between the 2 deletion
regions will increase, but the kevel of Id remains essentially the same. In essence therefore
once Vds > Vp, the JFET has the characteristics of a current source.
28. How does the value of Idss and Vp change with the change in Vgs
The value of Vp and and Idss can be controlled by adjusting the value of the gate to
sorce voltage ie Vgs. This is done by setting Vgs more and mire negative. In other words the
gate terminal will be set at lower potential levels when compared to the source.
As a result of setting a negative Vgs,the saturation level Idss is reached earlier at a

lower level when compared to Vgs = 0 v.The resulting saturation level for Id has been
reduced and in fact will continue to decrease as Vgs is made more and more negative. The
pinch off voltage also continues to drop in a parabolic manner as we decrease the value of
Vgs.

29. What is Idss. What are the conditions for its maximum value
The term ‘Idss’ refers to saturation condition of the Drain current. From the above
graph it’s clear that as the value of Vgs goes on decreasing, the value of Id also decreases,
hence to obtain maximum Idss the primary condition should be that Vgs must be equal to
zero. Also the applied Vds should be greater than Vp so that the saturation level is attained.
Hence the conditions are
1. Vgs = 0 V
2. Vds > Vp

30. What is Schokleys Equation. Find out a relation between Vgs and Ids?
Schokleys Equation is used for defining the relation between the Gate source voltage
and the Drain current. The relation is :
Id = Idss(1 – (Vgs/Vp)^2)
From this relation we get,
Vgs = Vp*(1-sqrt(Id/Idss))
Vgs : Gate to Source Voltage

Id : Drain Current
Idss : Saturation Current
Vp : Pinch off Voltage
31. What Are The Differences Between Enhancement And Depletion Mosfet?
Depletion MOSFET:Here a slab of p_type material is formed from a silicon base and referred
to as substrate. It is the foundation upon which the device will be constructed. In some cases
the substrate is internally connected to a source terminal. Many discrete devices provide an
additional terminal labelles SS resulting in a four terminal device. The source and drain
terminals are connected through metallic contacts to n doped regions linked by an n channel.
The gate is also connected to metallic contact surface but remains insulated from the n
channel by a very thin silicon dioxide layer.SiO2 is particular type of insulator referred to as
dielectric that sets up opposing electric fields within the dielectric when exposed to an
externally applied field.

• When gate to source voltage is set to 0,by direct connection from one terminal to
another a current is established through the channel.
• When VGS has been set at negative voltage, it will tend to pressure the electrons
towards the p type substrate, the drain current is reduced .
• When VGS has been set at positive voltage the positive gate will draw additional
electrons from the p type substrate and hence resulting in increase in current.
Enhancement MOSFET:Here also the slab of p type material called the substrate is provided.
The substrate is connected to a source terminal. Many discrete devices provide an additional
terminal labeled SS resulting in a four terminal device. The source and drain terminals are
connected through metallic terminals to the n doped region. The gate is also connected
through a metallic terminal and through an SiO2 to the p type substrate.
Here the basic construction is same as that of depletion MOSFET.The

only difference is the absence of the channel as the basic construction of the device. It has the
four source terminal,sorce,drain and the p type substrate.
When the gate to source voltage is 0, since there is no n channel there

will be no current flow.
When the gate to source voltage is positive,the electrons in the p substate will be attracted
towards the gate,which will result in the increase in the carriers and hence in the increase in
the flow of current between the source and drain.
32. Explain the ideal drain characteristics of the JFET?
The JFET consists of a thin layer of n-type material with two ohmic contacts, the
source S and the drain D ,along with two rectifying contacts ,called the gates G .If a positive
voltage is placed between drain and source, electrons will flow from source to drain .This
conducting path between the source and the drain is called a channel.
When VGS=0v
when a positive voltage Vds has ben applied across the channel and the gate has been
connected directly to the source to establish the condition VGS=0v.The result is a gate and
source terminal at the same potential and a depletion region in the low end of each p-
material .the instant the voltage VDD=VDS is applied ,the electrons will be drawn to the drain
terminal ,establishing a conventional current ID, here ID=IS..It is important to note that the
depletion region near the top of both the p-materials are wider this is due to the fact that the
upper region is more reverse biased than the lower region that is the the greater the applied
reverse bias ,the wider the depletion region .the fact that the p-n junction is reverse biased for
the length of the channel results in a gate current of zero amperes .The fact at that IG=0A is
an important characteristics of the JFET .
As the voltage VDS is increased from 0V to a few volts ,the current will increase as
determined by ohms law and the plot of ID versus VDS will appear as shown in the graph.The
relative straightness of the plot reveals that for the region of low values otVDS, the resistance
is essentially constant .As VDS increases and reaches upto a value vp,the depletyion region
will widen ,causing a noticeable change in the channel width.The reduced path of conduction
causes the resistance to increase and the curve in the graph to occur.The more horizontal the
curve the higher the resistance ,suggesting that the resistance is approaching infinite ohms in
the horizontal region.
If VDS is increased to a level where it appears that the two depletion regions would
touch a condition reffered to as pinch –off will result .The level of VDS that establishes this
condition is refferd to as pinch –off voltage and it is denoted by VP.In actuality the term
pinch-off is a misnomer in that it suggests the current ID is pinched –off and drops of to 0A
.In reality a very small channel exsists ,with a current of very high density .The fact that ID
does not drop off at pinch–off and maintains saturation level .It is verified by the fact that the
absence of a drain current would remove the possibility of different poyential levels through
the n-channel material to establish the varying levels of reverse bias along the p-n junction
.The result would be a loss of the depletion region distribution that caused pinch off in the
first place.As VDS is increased by VP the region of close encounter between the two depletion
regions will increase in length along the channel ,but the level of ID remains exactly the same
,therefore once VDS>VP the JFET has the characteristics of a current source .
IDSS is the maximum drain current for a JFET and is defined by the conditions VGS=0V and
VDS>VP.
ID Saturation level
VDS
33. Why FET is a voltage sensitive device explain from the drain characteristics?
The JFET consists of a thin layer of n-type material with two ohmic contacts,the
source S and the drain D ,along with two rectifying contacts ,called the gates G .If a positive
voltage is placed between drain and source,electrons will flow from source to drain .This
conducting path between the source and the drain is called a channel.

Consider holding the drain source voltage fixed and varying the gate-source voltage
.As the gate-source voltage is made negative ,the gate channel pn junction is reverse biased
,increasing the depletion red\gion between the gate and source .This decreases the channel
width ,increasing the channel resistance.if the drain-source voltage VDS is kept constant ,the
current IDS decreases .when the gate-source voltage is made positive,the depletion region
decreases until,for large positive gate-source voltages ,the channel opens .then the pn-
junction between gate and channel becomes forward biased and current flows from the gate
to the source current
Summarizing we find that varying the gate voltage varies the channel width ,and
hence the channel resistance .This inturn varies the current from drain to source,IDS .We see
that it is the gate-source voltage variation which varies IDS ; thus the FET is a voltage
sensitive device ,compared with the junction transistor , which is a current sensitive device.
34. Define amplification factor,drain resistance and transconductance and derive the
relationship between drain resistance and trans conductance?
Drain resistance
It is the ratio of change in drain-source voltage ( VDS) to the change in drain current
ID) at constant gate-source voltage ie ac drain resistance
rd VDS ID at constant VGS.
Transconductance
The control that the gate voltage has over the drain current is measured by the
transconductance gfs and is similar to the transconductance gm of the tube. It may be as
follows It is the ratio of the change in drain current ( ID) to the change in gate to source
voltage ( VG) at constant drain-source voltage is
Transconductance gfs ID VGS at constant VDS.
Amplification factor
It is the ratio of the drain –source voltage ( VDS) to the change in the gate to source
voltage ( VGS) at constant drain current .
Amplification factor, VDS VGS at constant ID.
Ampilification factor of a JFET indicates how much more control the gate voltage
has over drain current than has the drain voltage.
VDS VGS
multiplying the numerator and denominator on R.H.S by ID,
we get

=( VDS VGS)*( ID ID)=( VDS ID)*( ID GS)
=rd*gfs
ie
amplification factor =ac drain resistance *transconductance
35. Explain from the drain characteristics that a JFET has infinite resistance?
When VGS=0v
when a positive voltage Vds has been applied across the channel and the gate has
been connected directly to the source to establish the condition VGS=0v.The result is a gate
and source terminal at the same potential and a depletion region in the low end of each p-
material .the instant the voltage VDD=VDS is applied ,the electrons will be drawn to the drain
terminal ,establishing a conventional current ID, here ID=IS..It is important to note that the
depletion region near the top of both the p-materials are wider this is due to the fact that the
upper region is more reverse biased than the lower region that is the the greater the applied
reverse bias ,the wider the depletion region .the fact that the p-n junction is reverse biased for
the length of the channel results in a gate current of zero amperes .The fact that IG=0A is an
important characteristics of the JFET .
As the voltage VDS is increased from 0V to a few volts ,the current will increase as
determined by ohms law and the plot of ID versus VDS will appear as shown in the graph.The
relative straightness of the plot reveals that for the region of low values otVDS, the resistance
is essentially constant .As VDS increases and reaches upto a value vp,the depletyion region
will widen ,causing a noticeable change in the channel width.The reduced path of conduction
causes the resistance to increase and the curve in the graph to occur.The more horizontal the
curve the higher the resistance ,suggesting that the resistance is approaching infinite ohms in
the horizontal region.
If VDS is increased to a level where it appears that the two depletion regions would
touch a condition reffered to as pinch –off will result .The level of VDS that establishes this
condition is refferd to as pinch –off voltage and it is denoted by VP.In actuality the term
pinch-off is a misnomer in that it suggests the current ID is pinched –off and drops of to 0A
.In reality a very small channel exsists ,with a current of very high density .The fact that ID
does not drop off at pinch–off and maintains saturation level .It is verified by the fact that the
absence of a drain current would remove the possibility of different poyential levels through
the n-channel material to establish the varying levels of reverse bias along the p-n junction
.The result would be a loss of the depletion region distribution that caused pinch off in the
first place.As VDS is increased by VP the region of close encounter between the two depletion
regions will increase in length along the channel ,but the level of ID remains exactly the same
,therefore once VDS>VP the JFET has the characteristics of a current source .
IDSS is the maximum drain current for a JFET and is defined by the conditions
VGS=0V and VDS>V
ID Saturation level
When VGS<0V the graph will be as follows
IDSS
VGS=0V
VGS=-1V
VGS=-2V
0
VD

For p-channel devices the graph is as follows
IDSS
VGS=0V
VGS=1V
Breakdown region
VGS=2V
V DS
36. In The Drain Characteristics Of FET What Does The Region At Pinch Off?
Field Effect Transistors (FETs) utilize a conductive channel whose resistance is

controlled by an applied potential.
Junction Field Effect Transistor (JFET) : In JFETs a conducting channel is formed of n or p-

type
semiconductor (GaAs, Ge or Si).Connections are made to each end of the channel, the Drain
and
Source. In the implementation shown below a pair of gate electrodes of opposite doping with
respect to the channel are placed at opposite sides of the channel. Applying a reverse bias
forms a depletion region that reduces the cross section of the conducting channel. (from Sze)
Changing the magnitude of the reverse bias on the gate modulates the cross section of the
channel.

First assume that the drain voltage is 0. Increasing the reverse gate potential will increase the
depletion width, i.e. reduce the cross section of the conducting channel, until the channel is
completely depleted. The gate voltage where this obtains is the “pinch-off voltage” VP.
Now set both the gate and drain voltages to 0. The channel will be partially depleted
due to the “built-in” junction voltage. Now apply a drain voltage. Since the drain is at a
higher potential than the source, the effective depletion voltage increases in proximity to the
drain, so the width of the depletion region will increase as it approaches the drain. If the sum
of the gate and drain voltage is sufficient to fully deplete the channel, the device is said to be
“pinched off”.
Increasing the drain voltage beyond this point moves the pinch-off point towards to
the source.
FET Channel Cross Section Along Channel

Channel Length 5 µm, Channel Depth 1 µm
37. WHAT ARE THE DIFFERENT PARAMETERS OF JFET?
A bipolar junction transistor (BJT) is a current controlled device that is output

characteristics of the device are controlled by the base current and not by the base voltage.
However in a field effect transistor(FET), the output characteristics are controlled by input
voltage(the electric field) and not by input current. This is the biggest difference between BJT
and FET.There are two basic types of field effect transistor
a)JUNCTION FIELDEFFECT TRANSISTOR.

b)METAL OXIDE SEMICONDUCTOR TRANSISTOR
.
A junction field effect transistor is a three terminal semiconductor device in which
current conduction is by one type of carrier that is electrons or holes.
To learn the different parameters of the JFET we first need to know the importance of
certain terms
PINCH OFF VOLTAGE :It is the minimum drain source voltage at which the drain current
essentially becomes constantFor the proper functioning of the JFET it is necessary that drain
voltage is greater than pinch voltage.
GATE SOURCE CUT OFF VOLTAGE .It is the gate source voltage where the channel is
completely cut off and the drain current becomes zero.It is interesting to note that the value of
gate source voltage should always have the same magnitude as the pinch off voltage.
The different parameters of JFET are:
a.c drain resistance(rd):
Corresponding to the a.c plate resistance, we have a.c drain resistance in a JFET.It
may be defined as follows:
It is the ratio of change in drain –source voltage( Vds) to the change in drain
current(Id) at constant gate source voltage ie,
a.c drain resistance rd= Vds/ Id at constant Vgs
Referring to the output characteristics of JFET it is clear that the drain resistance of a
JFET has a large value ranging from 10k to 1k
Transconductance(gfs):
The control that the gate voltage has over the drain current is measured by
transconductance and is similar to the transconductance of the tube.It may be defined as
follows:
It is is the ratio of the change in drain current ( Id) to the change in gate source
voltage(Vgs) at constant drain source voltage that is
Transconductance=Id/Vgs at constant Vds.
The transconductance of a JFET is usually expressed either in mA or microamperes.
Amplification factor(µ).
It is the ratio of change in drain source voltage to the change in gate source voltage at
constant drain current
Amplification factor= Vds/ Vgs at constant Id
Amplification factor of a JFET indicates how much more control the gate voltage has
over drain current than has the drain voltage.
Relation among JFET parameters.
The relationship among JFET parametes can be established as under:
We knowµ=Vds/Vgs
Hence
µ=rd*gfs.
Amplification factor=a.c drain resistance*transconductance..
38. What happens when a negative bias is applied to the gate of a FET?
The result of applying a negative bias to the gate is to reach the saturation level at a
lower level of VDS where VDS is the voltage between the source and the drain. The resulting
saturation value for ID has been reduced and it will continue to decrease as VGS becomes
more and more negative. The pinch off voltage continues to drop in a parabolic manner as
VGS becomes more and more negative. Eventually, VGS when VGS=-VP will be sufficiently
negative to establish a saturation level and for all practical purposes the device has been
“turned off”.
39. Plot the n-channel characteristics of JFET?
40. Write down Shockley’s equation. What is its importance?
ID=IDSS[1-(VGS/VP)]^2
Shockley’s equation is used to plot transfer characteristics. The transfer characteristics

defined by Shockley’s equation are unaffected by the network in which the device is
employed.
A linear relation exists between IC and IB. Double the level of IB and IC increase by a
factor of two also. But this linear relation does not exist between the output and input
quantities of a JFET. The relation between ID and VGS is also given by this equation.
41. Explain the transfer characteristics in a few words.
The transfer characteristics are a plot of an output (or a drain) current versus an input
controlling quantity. There is therefore a direct transfer from input to output variables. If the
relationship were linear, the plot of ID versus VGS would result in a straight line between IDSS
and VP. However a parabolic curve will result because a vertical spacing between steps of
VGS on the drain characteristics decreases as VGS becomes more and more negative.
42. How can a JFET be used as a voltage controlled resistor. Explain from drain
characteristics?
The region to the left of the pinch off locus is referred to as the ohmic region or the
voltage controlled region. In this region the JFET can actually be employed as a variable
resistor whose resistance is controlled by the applied gate source voltage. Not in the
characteristic shown below that the slope of each curve and therefore the resistance of the
device between the drain and source for VDS < VP is a function applied voltage VGS. As VGS
becomes more and more negative, the slope of each curve becomes more and more horizontal
corresponding with an increase in resistance level. The following approximation will provide
a good first approximation to the resistance level in terms of the applied voltage VGS
rD = r0/(1-VGS/VP)2
where r0 the resistance with VGS =0 V and rD the resistance at a particular level of gate
source voltage.
It is important to note that the depletion region is wider near the top of both p-type
material. The reason for this is that the drain current flowing through the channel sets up a
drain resistance that varies with the length of the channel. This phenomenon can be used for
the making of a variable resistor.
43. How can a JFET be used as a constant current source? Explain from the drain
characteristics.
As the VDS voltage is increased from 0 to a few volts, the current will increase as
determined by ohm's law and the plot of ID versus VDS will appear as shown below.
The relative straightness of the graph reveals that for the region of low voltage level
referred to as VP. The depletion region will widen, causing a noticeable reduction in the
channel width. The reduced path of conduction causes the resistance to increase and the curve
in the graph to occur. The more horizontal the curve the more the resistance, suggesting that
the resistance is approaching infinite ohms. If VDS is increased to a level where it appears
that the two depletion regions will touch. A condition known as pinch off will result. The
level of VDS that establishes this condition is referred to as pinch off voltage. The term pinch
off is a misnomer which actually means that the value of ID has become 0 A. this is hardly
the case as the ID still maintains a saturation level defined as IDSS. In reality a very narrow
channel still exists, with a current of very high density. The fact that ID does not drop off to 0
at pinch-off and maintains a saturation level is verified by the fact : the absence of the drain
current would remove the possibility of different potential levels through out the n channel
material to establish the varying levels of reverse bias along the p-n junction. The result
would be a loss of depletion region distribution that caused pinch off in the first place.
The fact about the constant current IDSS can be used to make a JFET a constant
current source as its current value remain constant. The JFET is thus a very versatile device
and can be used as a current source with much stabler characteristics than a zener diode
current regulator.
44. What is transconductance? Explain its significance from the transfer characteristics.
Transconductance is the transistor gain of the JFET; it indicates the amount of control
the gate voltage has on the drain current. The transconductance is defined as
gm = d(ID)/d(VGS)
Using the expression for the ideal drain currents derived, we can write the expressions
for the transconductance.
The drain current for n-channel depletion mode device in the non-saturation region
region was given by equation for the pinch off current.
The derivation of the equation for the transconductance leads to the relation shown below
gms = (-2IDSS)(1-VGS/VP)/VP
The transconductance shows the significance of the transfer characteristics of a JFET.
The transfer characteristic of an FET relate the transfer of the input directly with the
output. That is the drain current is directly plotted with the gate source voltage. The graph on
the left slowly diminishes in its amplitude as it approaches the x axis. In theory the graph
touches the x axis and channel pinches off. But in practical sense the graph does not tough the
x axis but goes parallel to it with out touching it. For this reason the gm of the JFET is always
a constant value. The transconductance of the JFET relates the ease with which the drain
current flows at a particular value of the gate source voltage. The measure of
transconductance is done in siemens.
45. Explain shockly's equation and its significance in plotting the transfer
characteristics.
The linear relationship does not exists in the output of the JFET, the relationship is
given by the shockley's equation.
ID = IDSS(1-VGS/VP)2
where ID ----> drain current at the given value of VGS.

IDSS----> drain source saturation current.
VGS----> gate source voltage.
VP----> pinch off voltage.
Significance:-
The squared term of the equation will result in the no linear relationship between ID
and VGS, producing the graph shown below.
For the dc analysis to be performed , a graphical manner rather than mathematical

approach will in general be more direct. The solution is defined by the point of intersection of
VDS =0 V and ID axis. The transfer characteristics employed by shockley's equation are
unaffected by the network in which the device is employed. The transfer characteristics are a
plot of the output current versus an input-controlling quantity. There is therefore a direct
transfer from input to the output variables when employing the curve.
Applying shockley's equation:
The transfer curve can be obtained from shockley's equation given simply the values
of IDSS and VP. The levels of IDSS and VP define the limits of the curve on both the axes and
leave only the necessity of finding a few intermediate points. The validity of the equation as a
source of the transfer curve is best demonstrated by examining a few specific levels of one
variable and finding the resulting level of the other as follows :
Substituting VGS = 0 V
-----> ID = IDSS(1 - VGS/VP)2

-----> ID = IDSS(1 – 0/VP)2
-----> ID = IDSS|VGS = 0 V
If VGS = VP then the value of ID is 0.
-----> ID = 0 A|VGS = VP
46. What the major advantages FET transistors over BJT transistors?.
a. BJT transistor (bipolar junction transistor) is a bipolar device - the prefix bi-revealing
that the conduction level is a function of two charge carriers, electrons and holes
where as the FET is a unipolar device depending solely on electron or hole
conduction.
b. For the FET an electric field is established by the charges present that will control the
conduction path of the output circuit without the need for direct contact between the
controlling and controlled quantities.
c. FET has high input impedance. This permits high degree of isolation between input
and output circuits.
d. FETs are more temperature stable than BJTs.
e. FETs are usually smaller in construction than BJTs, making them particularly
useful in integrated-circuit (IC) chips.
f. A FET has a negative temperature coefficient of resistance. This avoids the risk of
thermal runaway.
g. Compared to BJT a FET has a longer life period and high efficiency
h. In FET, there are no junctions as in an ordinary transistor. The conduction is through

an n-type or p-type semiconductor material. For this reason, noise level in FET is
small
47. What are the different types of MOSFET transistors?
The metal-oxide semiconductor field-effect transistor (MOSFET) is a three-terminal

active device which has many applications in both analog and digital electronics. The three
terminals are the source (S), the drain (D), and the gate (G). The gate is insulated from the
channel, which permits the gate-to-source voltage to be either positive or negative without the
flow of gate current for both the n-channel and the p-channel devices.
There are two types of MOSFET's: the depletion mode device and the enhancement
mode device. In each, the current which flows in the drain-to-source channel is a function of
the voltage applied from gate to source. In the depletion mode device, the channel is
conducting when the gate-to-source voltage is zero. In contrast, in the enhancement mode
device, the channel is non-conducting when the gate-to-source voltage is zero. For
enhancement mode devices, the drain current is zero until the gate-to-source voltage exceeds
a value that is known as the threshold voltage (Vt).
There are n-channel and p-channel type MOSFET transistor
A p-channel MOSFET (PMOS) transistor is fabricated on an n-type substrate with p+

regions for the drain and source, and holes as charge carriers.
Schematic:
Terminals:
Gate: G Source: S Drain: D
A n-channel MOSFET (NMOS) transistor is fabricated on an p-type substrate with n- regions

for the drain and source, and electrons as charge carriers.
Schematic:
Terminals:
Gate: G Source: S Drain: D
48. Explain the construction of JFET?
The basic construction of the p-channel JFET is shown in figure. The major part of
the structure is the p-type material that forms the channel between the embedded layer of p-
type material. The top of the p-type channel is connected through an ohmic contact to a
terminal referred to as the drain, while the lower end of the same material is connected
through an ohmic contact to a terminal referred to as source. The two n-type materials are
connected together and to the gate terminal. The two n-regions connected together are
reverse biased with respect to the p-type substrate. A second battery, Vds is used to pull
current out of the source, by applying a negative voltage between the drain and the source.
The reverse biased n-p junctions creates a depletion region which extends into the p-type
material through which the holes travel as they go from source to drain . By adjusting the
value of Vgs, one can make the depletion region smaller or larger, thus increasing or
decreasing the drain current. There is more reverse bias across the p-n junctions at the drain
end of the channel than at the source end. Thus, a more accurate depiction of the JFET would
be what is shown in figure 3. When the drain/source voltage gets large enough, the two
depletion regions will join together, and, just as with the MOSFET, the channel pinches off,
as shown in figure 4.
Figure 1: JFET
Figure 2: Biasing a JFET
Figure 3: Depletion region controls current
Figure 4: Pinch-Off
49. How does a MOSFET amplify electrical signals?
While a minimum requirement for amplification of electrical signals is power gain,

one finds that a device with both voltage and current gain is a highly desirable circuit
element. The MOSFET provides current and voltage gain yielding an output current into an
external load which exceeds the input current and an output voltage across that external load
which exceeds the input voltage.
The current gain capability of a Field-Effect-Transistor (FET) is easily explained by

the fact that no gate current is required to maintain the inversion layer and the resulting
current between drain and source. The device has therefore an infinite current gain in DC.
The current gain is inversely proportional to the signal frequency, reaching unity current gain
at the transit frequency.
The voltage gain of the MOSFET is caused by the fact that the current saturates at
higher drain-source voltages, so that a small drain current variation can cause a large drain
voltage variation.
50. An n-channel JFET has G0=2.0mA/V and Vp= -4.0 V. Find

(a) The drain current for vGS = -1.0 V and vDS = 2.0 V.
(b) The current at pinch-off for vGS = -1.0 V.
(c) IDSS for the given transistor.
Solution:
(a) Drain current, iD =G0 Vp[(vDS/-Vp) – 2/3((vDS+VSG)/-Vp)3/2 + 2/3(vSG/-Vp) 3/2]

=-(2.0mA V-1)(-4.0 V)[(2.0 V)/-(-4.0 V) -2/3((2.0 + 1.0 V)/-(-4.0 V))3/2
+ 2/3[1.0 V/-(-4.0 V)3/2]
=1.21 mA
(b) To calculate drain current at pinch-off voltage, we need to calculate the drain-to-source
voltage for the given gate-to-source voltage. It is calculated as:
VDS= -Vp-VSG = -Vp + VGS
= -(-4.0)+(-1.0) = 3.0 V
Then IDD = -G0 Vp[(VDS/-Vp)-2/3+2/3(VGS/Vp)3/2)]

= -(2.0mAV-1)(-4.0 V){[3.0V/-(-4.0 V)]-2/3+2/3[-1.0 V/-(-4.0 V)]3/2}
= 1.33 mA
(c) IDSS can be calculated by setting vGS=0 V. The vDS is then equal to +4.0 V.
IDSS= -G0Vp[(VDS/-Vp)-2/3]
= -(2.0mAV-1)(-4.0 V){[4.0V/-(-4.0 V)]-2/3}
= 2.67 mA.
51. Find vs in an ideal MOS Si-Si02 capacitor if dOX = 0.1 µm and NA= 1015 cm-3 when
the applied gate potential is 10V and no inverted charge is present. κr(SiO2) = 3.9
Solution:
COX OX/dOX
= [3.9*8.854*10-12(Fm-1)]/[0.1*10 -6m]
= 3.453*10-4(Fm-2)
v0 = eNA S/(COX) 2
= 0.14 V
The surface potential for vG = 10V is
vS =vG+v0-√(2vGv0+v02)
=10+0.14-√(2*10*(0.14)2)
= 8.46 V
If there is an injected surface charge density of –102 nC/cm2, the use of
Qinv = -100*10-9 C/cm2*104 cm2/m2 = -2.90 V

COX 3.453*10-4
modifies the surface potential as,

.
vS =vG+Qinv+v0-√ (2(vG+Qinv) v0+v02)
COX COX .
= 10-2.90+0.14- √2(10-2.90)0.14 + (0.14)2
=5.82 V
52. For a transistor, when vGS = -2.0 V, find VDSsat if Vp= -4.0 V for an n-channel
depletion mode MOSFET.
Solution:
Vp= -(VDSsat + vSG)
but vSG = -vGS = -(-2.0) V
Substituting this in the above equation;
-4.0 V = -(VDSsat + 2.0 V)
ie VDSsat = 2.0 V
This is the value of vDS where the pinch-off will occur for the given gate-to-source voltage.
53. For an n-channel (p-type substrate) silicon enhancement-mode MOS transistor

using SiO2 as an oxide, find the threshold voltage if NA= 1017cm-3, dOX=0.1um, and
κr(SiO2)= 3.9. Assume Qinv ≈ 0.
Solution:
For Si,
EI=Ev+EG/2= Ev+1.07eV/2=Ev+0.535eV
The Fermi level for the p-type Si semiconductor is
EF =Ev+kt/e ln(Nv/NA)
=Ev+0.026 ln(2.5*1025/1023)
=Ev + 0.144 eV
The potential vb is
evb=EI-EF
=(Ev+0.535)-(Ev+0.144)
evb=0.391eV
vb= 0.391 V
Also
COX= eOX/dOX= 3.453*10 -4 F/m2

.
VT= 2(0.391)+ √2(1.6*10 C)(10 )(11.8*8.854*10
-19 23 -12
F/m)(2*0.391)
3.453*10-4 F/m2
ie VT= 5.46 V
54. Describe small signal FET.What are its characteristics?
Small signal FET is the FETs used for amplification. The linear characteristic of FET
is used for this purpose The input of small signal FET is very small.The small signal FET
cannot be used for switching function of FET since it requires large input signal.
The characteristics of small signal FET is shown in the figure. The linear portion of that
diagram is used for the amplification purpose.
The source drain characteristics give ID against VDs, with VGS as parmeter. For VGS =0
and ID=0, the channel between the gate junction is entirely open. In response to a small
applied voltage VDs,the n-type bar acts as a simple simple semiconductor resistor and the
current Id increases linearly with VDs.With increasing current the ohmic voltage drop
between the source and the channel region reverse biases the junction,and the conducting
portion of the channel begins to constrict.Because of ohmic drop along the length of the
channel itself,the construction is not uniform .Eventually,a voltage VDs is reached at which
the channel is pinched off.At this the current Id begins to leave off and approach a constant
value.
If a gate voltage VGS is applied in the direction to provide additional reverse

bias,pinch off will occur for smaller value of VDs and the maximum drain current will be
smaller.
55. What are the applications of JFET?
• FET is used as a buffer in measuring instruments, receivers since it has high input
impedance and low output impedance.
• FET’s are used in RF amplifiers in FM tuners and communication equipment for
the low noise level.
• Since the input capacitance is low, FET’s are used in cascade amplifiers in
measuring and test equipment.
• Since the device is voltage controlled, it is used as a voltage variable resistor in
operational amplifiers and tone controls.
• FET’s are used in mixer circuits in FM and TV receivers and communication
because the inter modulation distortion is low.
• It is used in oscillator circuits, because frequency drift is low.
• As the coupling capacitor FET’s are used in low frequency amplifiers in hearing
aids and inductive transducers.
• FET’s are used in digital circuits in computers, LSD and memory circuits because
of its small size.
56. Compare MOSFET with JEFT
a. In enhancement and depletion types of MOSFET, the transverse electric field induced
across an insulating layer deposited on the semiconductor material controls the
conductivity of the channel. In the JEFT the transverse electric field across the reverse
biased PN junction controls the conductivity of the channel.
b. The gate leakage current in a MOSFET is of the order of 10-12 A. Hence the input
resistance of a MOSFET is very high in the order of 1010 to 1015 Ω. The gate leakage
current of a JEFT is of the order of 10-9 A and its input resistance is of the order of
108Ω .
c. The output characteristics of the JFET are flatter than those of the MOSFET and
hence, the drain resistance of a JFET (0.1 to 1 MΩ) is much higher than a MOSFET
(1 to 50 MΩ).
d. JFETs are operated only in the depletion mode. The depletion type MOSFET may be
operated in both depletion and enhancement mode.
e. Comparing to JFET, MOSFETs are easier to fabricate.
f. MOSFET is very susceptible to overload voltage and needs special handling during
installation. It gets damaged easily if it is not properly handled.
g. MOSFET has zero offset voltage. As it is s symmetrical device, the source and drain
can be interchanged. These two properties are very useful in analog signal switching.
h. Special digital CMOS circuits are available which involve near-zero power
dissipation and very low voltage and current requirements. This makes them most
suitable for portable systems.
i. MOSFETS are widely used in digital VLSI circuits than JFETs because of their
advantages.
57. Explain the operation of N-channel FET.
Transistor is a linear semiconductor device that controls current with the application
of a lower-power electrical signal. Transistors may be roughly grouped into two major
divisions: bipolar and field-effect. In the last chapter we studied bipolar transistors, which
utilize a small current to control a large current. In this chapter, we'll introduce the general
concept of the field-effect transistor -- a device utilizing a small voltage to control current --
and then focus on one particular type: the junction field-effect transistor. In the next chapter
we'll explore another type of field-effect transistor, the insulated gate variety.
All field-effect transistors are unipolar rather than bipolar devices. That is, the main
current through them is comprised either of electrons through an N-type semiconductor or
holes through a P-type semiconductor. This becomes more evident when a physical diagram
of the device is seen:
In a junction field-effect transistor, or JFET, the controlled current passes from source
to drain, or from drain to source as the case may be. The controlling voltage is applied
between the gate and source. The current does not have to cross through a PN junction on its
way between source and drain: the path (called a channel) is an uninterrupted block of
semiconductor material. In the image just shown, this channel is an N-type semiconductor.
Generally, N-channel JFETs are more commonly used than P-channel. .
With no voltage applied between gate and source, the channel is a wide-open path for
electrons to flow. However, if a voltage is applied between gate and source of such polarity
that it reverse-biases the PN junction, the flow between source and drain connections
becomes limited, or regulated, just as it was for bipolar transistors with a set amount of base
current. Maximum gate-source voltage "pinches off" all current through source and drain,
thus forcing the JFET into cutoff mode. This behavior is due to the depletion region of the PN
junction expanding under the influence of a reverse-bias voltage, eventually occupying the
entire width of the channel if the voltage is great enough.
Bipolar transistors are normally off devices: no current through the base, no current
through the collector or the emitter. JFETs, on the other hand, are normally on devices: no
voltage applied to the gate allows maximum current through the source and drain. Also take
note that the amount of current allowed through a JFET is determined by a voltage signal
rather than a current signal as with bipolar transistors. In fact, with the gate-source PN
junction reverse-biased; there should be nearly zero current through the gate connection. For
this reason, we classify the JFET as a voltage-controlled device, and the bipolar transistor as
a current-controlled device.
If the gate-source PN junction is forward-biased with a small voltage, the JFET

channel will "open" a little more to allow greater currents through. However, the PN junction
of a JFET is not built to handle any substantial current itself, and thus it is not recommended
to forward-bias the junction under any circumstances.
REVIEW:
• Field-effect transistors control the current between source and drain connections by a
voltage applied between the gate and source. In a junction field-effect transistor
(JFET), there is a PN junction between the gate and source, which is normally
reverse-biased for control of source-drain current.
• JFETs are normally on (normally-saturated) devices. The application of a reverse-
biasing voltage between gate and source causes the depletion region of that junction
to expand, thereby "pinching off" the channel between source and drain through
which the controlled current travels.
• It may be necessary to attach a "bleed-off" resistor between gate and source to
discharge the stored charge built up across the junction's natural capacitance when the
controlling voltage is removed. Otherwise, a charge may remain to keep the JFET in
cutoff mode even after the voltage source has been disconnected.
58. What are the basic operations of MOSFET?
The gate to source voltage is set to zero volts by the direct connection from one
terminal to the other,and a voltage Vds is applied the drain to source terminals.The result is
the attraction for the positive potential on at the drain by the free electrons if the n-channel
and a current similar to that established through the channel of the JFET.In fact the resulting
current with Vgs=0V continues to be labeled Idss.
Vgs has been set at a negative voltage such as -1V.The negative potential at the gate
will tend to pressure electron towards the p-type substrate and attract holes from p-type
substrate .Depending on the negative bias established by Vgs ,a level of recombination
between electrons and holes will occur that will reduce the number of free electron in the n
channel available for conduction .The more negative the bias the higher rate of recombination
.The resulting value of drain current is therefore reduced with increasing negative bias for
Vgs.
59. Explain the drain and transfer characteristics of P-channel enhancement MOSFET.
In p-channel enhancement MOSFET here is a n-type substrate and p doped regions

under drain and source regions. The fabrication begins with a base (the substrate) that is
highly resistive n-type semiconductor. The base forms the body of the transistor. It is needed
to control the channel. Diffused into the body are two low-resistivity p-type regions that are
separated by an n-type substrate. One of the two regions is called the drain and the other is
the source. A narrow p-type channel is also fabricated in the region between the drain and the
source. The p-type channel behaves like a conducting bar that connects the drain to the
source.
SiO2 Layer p – channel n-substrate
To create a gate terminal for the P-DFET, a thin layer of silicon dioxide (SiO2 ) is
grown over the surface of the p-channel. Finally, a thin film of aluminum is deposited over
the insulating layer of silicon dioxide. The entire thin film acts as the gate of a P-DFET.
Operation:In the fabrication of a p-channel depletion field-effect transistor, the gate is

insulated from the channel. Therefore, the gate current is negligible regardless of the gate
voltage with respect to the source. For this reason, the PDFET is also referred to as an
Insulated Gate Field-Effect Transistor (IGFET).The channel has finite conductivity and
allows the current to flow from source to drain when the drain is held at a negative potential
with respect to the source even when the gate is an open circuit. Thus, a P-DFET is a
normally ON device. The gate enables us to control the current in the device until the gate
voltage becomes greater than or equal to the pinch-off voltage and the P-DFET turns OFF.It
has got two modes of operation:(1)Depletion mode operation and (2)Enhancement mode
operation
ENHANCEMENT OPERATION:
As the gate terminal is insulated from the channel by the silicon dioxide layer, we can
also apply a negative voltage at the gate with respect to the source ( GS v ). The application
of the negative voltage at the gate with respect to the source pulls more holes into the channel
which, in fact, results in the widening of the channel and increasing its conductivity. This, in
turn, increases
the drain current. The drain current continues to increase as GS v becomes more and
more negative. Since the negative gate voltage increases (enhances) the channel’s
conductivity, the P-DFET is said to operate in its enhancement mode when the gate voltage is
negative with respect to the source voltage.In summary, a p-channel DFET can be operated in
its depletion mode as a p-channel JFET or in its enhancement mode. There, of course, is no
such thing as the enhancement mode operation of a P-JFET.
Characteristics (1)Transfer characteristics and (2)drain characteristics:
60. what is the difference between field effect transistor and the bipolar junction
transistor?
The important points of the comparison between the field effect transistor ands the
bipolar junction transistor are:
Sl.no Field effect transistor(FET) Bipolar junction transistor(BJT)

1. It is a unipolar device.i.e,current in the It is a bi polar device i.e, current in the
device is carried by either holes or device is carried by both the electrons
electrons and the holes.
2. Like the vacuum tube, it is a voltage It is a current controlled device i.e, the
controlled device i.e., voltage at the base current controls the amount of the
gate terminal controls the amount of collector current.
the current flowing through the
device.
3. Its input resistance is very high and is Its input resistance is very low and is of
of the order of several mega ohms. the order of few kilo ohms.
4. It has a negative temperature It has a positive temperature at the very
coefficient at very high current levels. high current level. It means that the
it means that the current decreases as collector current increases with the
the temperature increases increase in the temperature.
5. It does not suffer from minority carrier It suffers from minority carrier storage
storage effects and has higher effects and has lower switching speeds
switching speeds and cut off and cut off frequencies.
frequencies.
6. It is less noisy and is more suitable as it is more noisy.
an input amplifier for the low level
signals.
7. it is much simpler to fabricate. it is comparatively very difficult to
fabricate.
61. What are the advantages of the n-channel MOSFET over the p-channel?
The main advantage of the n-channel MOSFET over the p-channel is due to the fact
that charge carriers in n-channel devices are the electrons which have a mobility of about
1300 cm 2/v.s. on the other hand, the charge carriers in the devices are the holes which have a
mobility of about 500 cm2/V.S.since the current in a semiconductor is directly proportional to
the mobility the current in the n=-channel is more than 2 times that of the p-channel for the
same dimension.
The ON resistance of the n-channel MOSFET is one third that of the p-channel .it
means that in order to achieve the same value of the current and ON resistance, the p-channel
requires 3 times the area of the equivalent n-channel MOSFET .thus electronic currents using
n-channel are much smaller in size than those in p-channel .this results in higher packing
density.
62. What is Trans conductance?
It is ratio of small change in drain current to the corresponding change in the gate-to-
source voltage for a constant gate-to-source voltage .it is also called forward Trans
conductance or forward transmittance.
Gm ID VGS
The value of the trans conductance is expressed in terms of siemens (s) or mhos .the
transfer characteristic of JFET is apart of parabola i.e., it is non linear . Therefore the value
varies depending upon the location on the curve as set by gate-to-source voltage. It has a
greater value near the top of the curve than that near the bottom.
63. What are the uses of MOSFET?
The most common use of MOSFET transistors today is the CMOS (complementary
metallic oxide semiconductor) integrated circuit which is the basis for most digital electronic
devices. These use a totem-pole arrangement where one transistor (either the pull-up or the
pull-down) is on while the other is off. Hence, there is no DC drain, except during the
transition from one state to the other, which is very short. As mentioned, the gates are
capacitive, and the charging and discharging of the gates each time a transistor switches
states is the primary cause of power drain.
The C in CMOS stands for 'complementary'. The pull-up is a P-channel device (using
holes for the mobile charge carriers) and the pull-down is N-channel (electron carriers). This
allows busing of the control terminals, but limits the speed of the circuit to that of the slower
P device (in silicon devices). The bipolar solutions to push-pull include 'cascode’ using a
current source for the load. Circuits that utilize both unipolar and bipolar transistors are called
BiFet. A recent development is called 'vertical P'. Formerly, BiFet chip users had to settle for
relatively poor (horizontal) P-type FET devices. This is no longer the case and allows for
quieter and faster analog circuits.
FETs can switch signals of either polarity, if their amplitude is significantly less than
the gate swing, as the devices (especially the parasitic diode-free DFET) are basically
symmetrical. This means that FETs are the most suitable type for analog multiplexing. With
this concept, one can construct a solid-state mixing board, for example.
The power MOSFET has a 'parasitic diode' (back-biased) normally shunting the
conduction channel that has half the current capacity of the conduction channel. Sometimes
this is useful in driving dual-coil magnetic circuits (for voltage spike protection), but in other
cases it causes problems.
The high impedance of the FET gate makes it rather vulnerable to electrostatic
damage; though this is not usually a problem after the device has been installed.
A more recent device for power control is the insulated-gate bipolar transistor, or
IGBT. This has a control structure akin to a MOSFET coupled with a bipolar-like main
conduction channel. These have become quite popular.
64. Sketch the depletion MOSFET drain characteristics
The depletion-type MOSFET has a structure similar to that of the enhancement-type

MOSFET with one important difference: The depletion MOSFET has a physically implanted
channel. An n-channel depletion type MOSFET has an n-type silicon region connecting the
n+ source and drain regions at the top of the p-type substrate. Therefore, if a voltage Vds is
applied between drain and source, a current Id flows for Vgs=0. There is no need to induce a
channel, unlike the case of the enhancement MOSFET.
The channel depth and its conductivity can be controlled by Vgs in exactly the same
manner as in the enhancement-type device. Applying a positive Vgs enhances the channel by
attracting more electrons into it, however, applying a negative Vgs, causes electrons to be
repelled from the channel; and the channel becomes shallower and its conductivity decreases.
The negative Vgs is said to deplete the channel of its charge carriers, and this mode of
operation (negative Vgs) is called depletion mode. As the magnitude of Vgs is increased in
the negative direction, a value is reached at which the channel is completely depleted of
charge carriers and Id is reduced to zero even though Vds may be still applied. This negative
value of Vgs is the threshold voltage of the depletion-type MOSFET.
65. Explain the construction of depletion MOSFET?
A slab of p-type material is formed from a silicon base and it is referred to as the
substrate. It is the foundation upon which the device is constructed. In some cases substrate
is internally connected to the source terminal. The source and the drain terminals are
connected through metallic contacts to n-doped regions linked by an n-channel. The gate is
also connected to a metal contact surface but remains insulated from the n-channel by a very
thin SiO2 layer. So there is no direct electrical connection between the gate terminal and the
channel of a MOSFET. Insulating layer of SiO2 also accounts for the very desirable high
input impedance of the device.
66. Explain the working of depletion MOSFET?
The gate voltage can control the resistance of the n-channel but as the gate is insulated
from the channel, we can apply either a positive or a negative gate voltage.
When a negative voltage is applied to VGS, it will tend to pressure electrons toward
the p-type substrate and attract holes from the p-type substrate. Depending on the magnitude
of the negative bias established by VGS, recombination between electrons and holes will occur
that will reduce the number of free electrons in the n-channel available for conduction. The
more the negative bias, the higher the rate of recombination. The resulting level of drain
current is therefore reduced with increasing negative bias for VGS. The device is said to be
operating in the ‘depletion mode’.
When a positive voltage is applied to VGS, the positive gate will draw additional
electrons from the p-type substrate due to the reverse leakage current and establish new
carriers through the collisions resulting between accelerating particles. As the gate-to-
source voltage continues to increase in the positive direction, the drain current will increase at
a rapid rate. The device is said to be operating in the’ enhancement mode’
67. Why depletion MOSFET is known as “normally-on MOSFET”? Draw the symbol of
n-type and p-type depletion MOSFET.
In depletion type MOSFET the drain current flows even when VGS is made zero.
Also it can have drain current in either the depletion mode or the enhancement mode. Such a
device is known as “normally-on MOSFET”.
The drain current is given by the formula:
ID= IDSS [1- VGS/VGS (OFF)] ^2
n-channel
p-channel
68. Draw the circuit of a common drain FET amplifier and explain.
FET amplifier circuit
The weak signal is applied between gate and source and amplified output is obtained
in the drain-source circuit. For the proper operation of FET, the gate must be negative w.r.t
source i.e. input circuit should always be reverse biased. This is achieved either by inserting a
battery VGG in the gate circuit or by a circuit known as biasing circuit.
A small change in the reverse bias on the gate produces a large change in the drain
current. This fact makes FET capable of raising the strength of a weak signal. During the
positive half of signal, the reverse bias on the gate decreases. This increases the channel
width and hence the drain current. During the negative half cycle of the signal, the reverse
voltage on the gate increases. Consequently, the drain current decreases. The result is the
small change in voltage at the gate produces a large change in the drain current. These large
variations in drain current produce large output across the load RL. In this way, FET acts as
an amplifier.
There are three basic FET amplifier configurations. They are:
• Common source (CS)

• Common drain (CD)
• Common gate (CG)
Common drain amplifier:When an ac signal drives the gate of JFET, it produces an ac drain
current. It flows through Rs and produces an ac output voltage that is approximately equal to
the input voltage and is in phase with it.
fig.(a) COMMON DRAIN AMPLIFIER
In the figure, R3 = Rs.
From the figure:
Vin = Vgs+gmVgsRs
Vin = (1+gmRs) Vgs
Vout = gmVgsRs
Vout/Vin = gmVgsRs/ (1+gmRs) Vgs = Rs/(1/gm)+Rs
Rs>=1/gm
Vout = Vin Rs/(Rs+(1/gm))
Zin depends on the type of biasing circuit used. In case of voltage divider biasing
circuit, Zin = R1 and R2 in parallel.
The common drain amplifier with high input impedance and near-unity voltage gain is
used as a buffer amplifier. The common drain amplifier is also known as “SOURCE
FOLLOWER”.
69. How does current flow through the channel of a JFET after pinch off?
It is seen that above the pinch off voltage at a constant value of VDS (saturation drain
current, ID increases with an increase of VGS (gate voltage). Hence, a JFET is suitable for use
as a voltage amplifier, similar to a transistor amplifier.
Even at VDS=VP (pinch off voltage), the drain current is not reduced to zero. If the
drain current is to be reduced to zero, the ohmic voltage drop along the channel should also
be reduced to zero. Further, the reverse biasing to the gate source PN junction essential for
pinching off the channel would also be absent.
The drain current ID is controlled by the electric field that extends into the channel due
to reverse biased voltage applied to the gate; hence, this device has been given the name
Field Effect Transistor.
70. Draw the common source drain and transfer characteristics of a JFET. How are
they useful?
The graph below shows variation of the drain current Id as a function of the drain
voltage (Vds) for various values of the gate voltage (Vgs) in an n-channel JFET. The current
decreases and the pinch-off occurs at lower drain voltages as the gate is made more negative.
At any drain voltage, The drain current reduces to zero if the magnitude of gate voltage
becomes equal to the magnitude of pinch-off voltage (Vp) . We have a general relation:
Vds = Vgs + Vp
The sharp increase in the drain current at higher drain voltages is due to the breakdown.
The pinch-off voltage is given by the eq(1).
W=Width of the device, L=Length of the channel , 2d=depth of the channel
Eq(2) gives the drain current before saturation ( Vds<Pinch-off voltage Vp).The drain
current in the saturation region is given by eq(3).The maximum saturation drain current Idss
flows when Vgs=0 and is given by eq(4). Experimentally ,the transfer characteristics are
given by the eq(5) and are plotted below.
71. Explain the drain characteristics of JFET with external bias?
It gives relation between Id and Vds for different values of Vgs.(which is called the
running variable). The above drain characteristic graph can be used for explanation.
It is seen that as the negative gate bias voltage is increased:
(i)pinch off voltage Vp is reached at a lower value of Vds than when Vgs=0.
(ii)value of Vds for breakdown is decreased.
It is seen that with Vgs=0,Id saturates at Idss and the characteristics shows Vpo=5v
When an external bias of -1v is applied ,gate-channel junction still require -5v to achieve
pinch-off .It means that Vds=4v is now required instead of previous 4v.
72. What is the significance of source gate cutoff voltage?
The source gate cutoff voltage is also called pinch off voltage. It is obtained when
VDS increases and approaches a level referred to as VP, the depletion region widens ,
causing the resistance to increase. If VDS is increased to a level where the it appears that the
two depletion regions would touch a condition known as pinch off voltage is obtained. When
plotted against IDSS the region to the right of the pinch off locus is the region typically
employed in linear amplifiers (amplifiers with minimum distortion) and is commonly referred
to as constant-current, saturation, or linear amplification region.
MODULE - III
OSCILLATORS

1. Explain the effect of positive feedback in amplifiers? What is the effect of various
values of loop gain?
Positive feedback in a circuit is obtained when the output of the circuit given back to
the input is in phase with the input and when the circuit satisfies the Barkhausen criterion. In
the above circuit the output waveform will still exist after the switch is closed if the condition
βA=1
where, A is the gain of the amplifier in the circuit and β is known as the feedback
factor.
is met. This is known as the Barkhausen criterion for oscillation.
For the circuits with loop gains
(i) βA<1 : The circuit is said to be under-damped.

(i) βA=1 : The circuit is said to be critically damped.
(i) βA<1 : The circuit is said to be over damped.
2. Draw the circuit of a Hartley oscillator.
3. Draw and explain the circuit of Wein bridge oscillator. Obtain the expressions for the
(i) frequency of oscillation and (ii) condition for oscillation. Will oscillations take place if
the bridge is balanced?
Wien bridge oscillator is one of the most popular type of oscillators used in audio and
sub. audio frequency ranges (20 - 20 kHz). This type of oscillator is simple in design,
compact in size, + Vcc and remarkably stable in its frequency output. Furthermore, its output
is relatively free from distortion and its frequency OUTPUT can be varied easily. However,
the maximum frequency output of a typical Wien bridge oscillator is only about 1 MHz. It
employs two transistors, each producing a phase shift of 180, and thus producing a total
phase-shift of 360 or 0degree.
The circuit diagram of Wien bridge oscillator is shown in figure. It is essentially a

two- stage amplifier with an R-C bridge circuit. R-C bridge circuit {Wien bridge) is a lead-
lag network. The phase-shift across the network lags with increasing frequency and leads
with decreasing frequency. By adding Wien-bridge feedback network, the oscillator becomes
sensitive to a signal of only one particular frequency. This particular frequency is that at
which Wien bridge is balanced and for which the phase shift is 0degree. If the Wien-bridge
feedback network is not employed and output of transistor Q2 is fedback to transistor Ql for
providing regeneration required for producing oscillations, the transistor Ql will amplify
signals over a wide range of frequencies and thus direct coupling would result in poor
frequency stability. Thus by employing Wien-bridge feedback network frequency stability is
increased. In the bridge circuit Rl in series with Cl, R3' R4 and R2 in parallel with C2 form
the four arms.
Thus we see that in a bridge circuit the output will be in phase with the input only
when the bridge is balanced i.e., at resonant frequency given by expression (20.39). At all
other frequencies the bridge is off-balance i.e. the voltage fedback and output voltage do not
have the correct phase relationship for sustained oscillations.
So this bridge circuit can be used as feedback network for an oscillator, provided that
the phase shift through the amplifier is zero. This requisite condition is achieved by using a
two stage amplifier, as illustrated in fig. In this arrangement the output of the second stage is
supplied back to the feedback network and the voltage across the parallel combination C2 R2
is fed to the input of the first stage. Transistor Ql serves as an oscillator and amplifier
whereas the transistor Q2 as an inverter to cause a phase shift of 180°. The circuit uses
positive and negative feedbacks. The positive feedback is through Rl' C1, R2' C2 to transistor
Ql and negative feedback is through the voltage divider to the input of transistor Ql. Resistors
Ra and R4 are used to stabilize the amplitude of the output.
The two transistors Ql and Q2 thus cause a total phase shift of 360° and ensure proper
positive feedback. The negative feedback is provided in the circuit to ensure constant output
over a range of frequencies. This is achieved by taking resistor R4 in the form of a
temperature sensitive lamp, whose resistance increases with the increase in current. In case
the amplitude of the output tends to increase, more current would provide more negative
feedback. Thus the output would regain its original value.
4. Draw a neat circuit of Colpitt’s oscillator using an n-p-n transistor. Give its
equivalent circuit obtain expressions for (i) frequency of oscillation and(ii) minimum
gain for sustained oscillations.
The Colpitt's oscillator circuit is a superb circuit and is widely used in commercial signal
generators upto 100 MHz. The basic circuit of a Colpitt's oscillator is shown in fig.It basically
consists of a single stage inverting amplifier and an L-C phase shift net,vork, as obvious from
the circuit diagram shown. The two series capacitors C1 and C2 form the potential divider
used for providing the feedback voltage-the voltage developed across capacitor C2 provides
the regenerative feedback required for sustained oscillations. Parallel combination of RE and
CE along with resistors Rl andR2 provides the stabilized self bias. The collector supply
voltage V cc is applied to the collector through a radio.frequency choke (RFC) which permits
an easy flow of direct current but at the same time it offers + Vcc very high impedance to the
high frequency currents. The presence of coupling capacitor Cc in the circuit , which blocks
dc but
provides path for ac.
Transistor itself produces a phase shift of 180 and another phase shift of 180 is
provided by the capacitive feedback. Thus a total phase shift of 360 is obtained which is an
essential condition for developing oscillations. The output voltage is derived from a
secondary winding L' coupled to Basic Circuit For Colpitts Oscillator. the inductance L. The
frequency is determined by Fig. the tank circuit and is varied by gang-tuning the two
capacitors CI and Cz. It is to be noted that capacitors C1 and Cz are ganged. As the tuning is
varied, values of both capacitors vary simultaneously, the ratio of the two capacitances
remaining the same.
Working : When the collector supply voltage V cc is switched on, the capacitors C1 and Cz
are charged. These capacitors C1 and Cz discharge through the coil L, setting up oscillations
of frequency. The oscillations across capacitor Cz are applied to the base-emitter junction and
appear in the amplified form in the collector circuit. Of course, the amplified output in the
collector circuit is of the same frequency as that of the oscillatory circuit. This amplified
output in the collector circuit is supplied to the tank circuit in order to meet the losses. Thus
the tank circuit is g:etting continuously energy from the circuit to make up for the losses
occurring in it and, therefore, ensures undamped oscillations. The energy supplied to the tank
circuit is of correct phase and gain exceeds unity, oscillations are sustained in the circuit
5. How oscillations start up in an oscillator?
The noise voltage produced due to the random motion of electrons in resistors or in
active devices provides the starting voltage for an oscillator. The noise voltage contains
almost all sinusoidal frequencies and this gets amplified and appears at the output of the
amplifier. This amplified output drives the feedback network which is either a resonant
circuit or a phase shift network. Because of this feedback voltage the feedback signal is
maximum at a particular frequency or the phase shift required for the positive feedback is
correct at this frequency. This particular frequency is the frequency of the oscillator. Thus
although the noise voltage contains all the frequencies the output of the oscillator will contain
a single sinusoidal frequency.
6. Why positive feedback is used in oscillator?
The main application of positive feedback is in oscillators. An oscillator

generates AC output signal without any input AC signal. A part of the output is fed back to
the input and this feedback signal is the only input to the internal amplifier. This signal is
amplified again and again to produce oscillations. In positive feedback the feedback voltage
is in same polarity with the input signal. And this positive signal is amplified to produce
oscillations. Thus positive feedback is used in an oscillator to increase the gain. The case of
negative feedback the feedback voltage is in opposite polarity with the input signal. This is
amplified to produce growing oscillation. Thus the gain will decrease.
7. Why negative feedback is employed in Wein Bridge Oscillator. Also explain the
working of oscillator?
The Wein Bridge Oscillator consists of two stages of the RC coupled amplifier and a
feedback network. The block diagram given in figure explain the principle of working of this
oscillator. Here the two blocks are A1 and A2. These two represents two amplifier stages.
The output of the second stage goes to the feedback network. The voltage across the parallel
combination C2R2 is fed to the input of the first stage. First amplifier stages produce 1800
phase shift and the second amplifier also provides 180 0 phase shift. Total phase shift is 3600.
Therefore it is evident that for the oscillation to be maintained, the phase shift through the
coupling network must be zero. It can be shown that this condition occurs at a frequency
given by
f = 1
2 (C1C2R1R2)1/2
R1 R3
C1
R4
R2 C2
Further, it can be shown that when the above condition is satisfied, we must have
=1/3. this means that the amplifier must have a gain of at least 3.(A =1)
Circuit diagram can be redrawn as:
To have a gain of 3 is not difficult. On the other hand to have a gain as low as 3 may
be difficult. For this reason, we add some amount of negative feedback. The negative
feedback also improves the stability of the amplifier. R3 and R4 are used to provide negative
feedback in order to reduce the gain.
Circuit diagram of Wein Bridge Oscillator
Vcc
R1 R3 R5 RC R6 Rc
Cc Cc
1uF
C1
Tr1 Tr2
NPN NPN
R4 RE R7 Re
R2 C2
The resistors R1 and R2 are voltage divider biasing resistors and Rc load resistor. No
bypass capacitor in the circuit in order to provide negative feedback. The frequency of
oscillation is given by
f = 1
2 (RC)
By varying the value of C1 and C2 or by varying the value of R1 and R2 we can vary
the frequency. The oscillation are used to produce several MHz of frequency. Usually used as
audio frequency amplification.
The Wein Bridge Oscillator is the most popular oscillator used in audio and sub audio
ranges. It is simple in design, compact and remarkably stable in its output. The output is free
from distortion and its frequency can be varied easily. The maximum frequency output is
about 1Mhz. it is also a phase shift operator which employs two transistors each producing a
shift of 180 0 and in total about 3600 or 0 0 shift. It is a two stage amplifier with an RC bridge
circuit. RC bridge circuit is a lead-lag circuit. Phase shift across the network lags with
increasing frequency and leads with decreasing frequency by adding frequency between
network. Oscillator is sensitive a signal of only one particular frequency(frequency to which
it is balanced for, for which the shift is zero). R1 in series with C1; R3, R4 and R2 in parallel to
C2 form the four arms of the bridge. From the analysis, for the bridge to be balance:
R3 [R2 ] R4 [R1 - j]
=
(1+jwC2R2) C1
w = 1
(C1C2R1R2)1/2
f = 1
2 (C1C2R1R2)1/2
let C1= C2 = C, R1= R2= R
f = 1
2 (RC)
In the bridge circuit the output is in phase with input only when the bridge is
balanced. At all other frequencies, the bridge is off balance. Feedback voltage and output
voltage do not have correct phase relationship for sustained oscillation. Hence the bridge
circuit is used as a feedback network provided the shift is 0 0 .
8. What is the basic principle of oscillation in an RC phase shift oscillator. With a neat
sketch explain its working?
For producing oscillations there must have positive feedback. Positive feedback
occurs only when the feedback voltage is in phase with the original input signal. This
condition can be achieved in two ways. Take a part of the output of a single staged
amplifier(giving a phase shift of 1800) and then pass it through a phase shift network giving
an additional phase shift of 1800. thus a total phase shift of 180 0 + 1800 = 3600(which is
equivalent to a phase shift of 00) occurs, as the signal passes through the amplifier and the
phase shift network. This is the principle of a phase shift oscillator.
Phase Shift Oscillator

Vcc
Rc C2 OP
R1 C C C
Q1
NPN R R
R2
Re Ce R
Figure shows a phase shift oscillator. Here the combination of ReCe provides
self bias for the amplifier. The phase of the signal at the input(for the time being, we assume
the presence of the signal at the input)gets reversed when it is amplified by the amplifier. The
output of the amplifier goes to a feedback network. The feedback network consists of three
identical Rc sections. Each RC section provides a phase shift of 180 01 thus a total of 60×3 =
1800 phase shift is provided by the feedback network. The amplifier provides 1800 phase
shift. Total phase shift is 3600. the output of the feedback network is now in same phase as
the originally assumed input to the amplifier. If the condition A = 1 is satisfied, oscillations
will be maintained. From this, the frequency of oscillation is given by
f = 1 × 1
2 (RC) (6+4k)1/2
hfe > 4k+23+29/k where hfe is the current gain
For an optimum value of k,

Hfe > 44.5
The range of frequency is from several hertz to several hundred hertz. It is used for producing
audio frequency range. If we change any value of capacitor or any value of resistor we can
change the frequency. The value of 3 capacitor change simultaneously then a large change is
developed is frequency.
9. Explain the principle of transistor phase shift oscillator ?
The phase shift oscillator consists of an inverting amplifier stage coupled to a three
stage RC filter network. The network contributes a total of 180 degrees phase shift. With the
180 degree shift due to the inverting amplifier, the signal returned to the amplifier input is
shifted 360 degrees. The R and C values for the network must be chosen so that the gain of
the amplifier and network stages is unity. These are the necessary conditions for oscillation:
1. The phase shift through the amplifier and the network must be 360 degrees.
2. The magnitude of the gain of the amplifier and the feedback network must be
one. (In practice try to make the gain slightly >1.)
Together these two condition are the Barkhausen Criterion or the necessary conditions
for oscillation. Figure 1. shows the basic relationship.
Inpu + Outpu υ OUT

Σ A t
+
β ( ω)
Figure 1. The block diagram of a phase shift oscillator
10. Find the frequency of oscillation, amplifier gain ?
The transfer function is found to be
R 3C 3 s 3
β ( s) = , (1)
( RCs ) 3 + 6( RCs ) 2 + 5RCs + 1
where the equation is written as a Laplace transform (s=jω). Analysis of this function will
reveal that the frequency of oscillation is
1
ω 0 = 2π f 0 = , (2)
RC 6
Rf
and the amplifier gain, A, must be = 29 .
R1
11. Draw the circuit of a transistor phase shift oscillator?
12. Explain the operation of oscillators.
Oscillator is a circuit that changes dc energy from the power supply into ac energy.
An amplifier provided with a positive feedback becomes an oscillator and it produces an
output signal even though there is no external input signal. The function of the oscillator is
just the reverse of a rectifier. The block diagram of an oscillator is given below:
Figure 1 ( B = β)
Consider the block diagram of figure 2. A voltage source Vin drives the input
terminals of an amplifier. The amplifier output voltage is AVin and it drives the feedback
network producing a feedback voltage Vf = AβVin. If the circuit of the amplifier and the
feedback network provide correct phase shift, then this feedback voltage Vf will be in phase
with signal Vin that drives the input terminals of the amplifier. Now, if switch is closed and
simultaneously the voltage source Vin is removed, the feedback voltage Vf will drive the
input terminals of the amplifier. If Aβ is less than 1, AβVin will be less than Vin, the signal
feedback is not sufficient to drive the amplifier and the feedback circuits and the output
signal will die out. If Aβ is greater than 1, the output signal builds up resulting in oscillations
with growing magnitude. If Aβ is equal to 1, AβVin = Vin and the output voltage is a sine
wave whose amplitude remains constant.
When the oscillator circuit is switched on, the only signal source at input is the noise
voltage generated by the resistors. This noise voltage gets amplified and then appears at the
output. This amplified noise now drives the feedback circuit, which can be a resonant, or a
phase shift network. The feedback voltage is maximum at a particular frequency and also the
phase shift for positive feedback is correct at this frequency. So we get oscillations at one
frequency only though noise voltage contains all frequencies.
13. What is Barkhausen criterion? Why is the value of Aβ kept slightly greater than 1?
The condition |Aβ| = 1 is called the Barkhausen criterion. It implies that when |Aβ| =
1, there exists an output voltage even in the absence of any externally applied signal. If
|Aβ| = 1, the feedback voltage is sufficient for producing self sustained oscillations.
If Aβ = 1 precisely, then after sometime it is found that Aβ will either become lower
or higher than unity. This is due to the change in the characteristics of the active devices with
voltage, temperature or age. If Aβ < 1, the removal of input signal source will result in dying
out of oscillations. If Aβ > 1, then the amplitude of the oscillations will continue to increase
until clipping occurs because of saturation and cut-off causing the voltage gain to reduce.
Hence, Aβ is kept slightly larger than unity so that any variation in circuit parameters may
not cause Aβ to become less than unity.
14. What are the conditions required to be fulfilled to sustain the oscillations?
The conditions required to be fulfilled to sustain the oscillations are:
1. The loop gain must be greater than unity at oscillator frequency.

2. After the desired output level is reached, Aβ must decrease to 1.
3. At oscillator frequency, net phase shift around the loop must be zero or integer
multiple of 360 degrees so that the feedback signal is in phase with the starting
infinitesimal voltage.
4. The amount of energy fed back to input must be sufficient to overcome the energy
losses in the input circuit.
15. Give the classification of oscillators. Discuss the frequency stability of oscillators.
Oscillators are classified in the following different ways.
1. According to the waveforms generated:
• Sinusoidal oscillator: This oscillator generates sinusoidal voltage or currents.

• Relaxation oscillator: This oscillator generates voltages or currents, which
vary abruptly one or more times in a cycle of oscillation.
2. According to the fundamental mechanisms involved:
• Negative resistance oscillator: It uses negative resistance of the amplifying

device to neutralize the positive resistance of the oscillator.
• Feedback oscillator: It uses positive feedback in the feedback amplifier to
satisfy the Barkhausen criterion.
3. According to the frequency generated:
SL NO: NAME OF THE OSCILLATOR FREQUENCY RANGE

1. Audio frequency oscillator (AFO) Up to 20kHz.
2. Radio frequency oscillator (RFO) 20kHz to 30MHz.
3. Very high frequency (VHF) oscillator 30MHz to 300MHz.
4. Ultra high frequency (UHF) oscillator 300MHz to 3GHz.
5. Microwave frequency oscillator Above 3GHz.
4. According to the type of circuit used, sine wave oscillators can be classified as
• LC tuned oscillator: These oscillators operate well at high frequencies.

• RC phase shift oscillator: These oscillators operate well at low frequencies.
The frequency stability of an oscillator is a measure of its ability to maintain the

required frequency as precisely as possible over as long a time interval as possible. The
following are the factors, which contribute to the change in frequency.
a) Due to the change in temperature, the values of the frequency-determining components

like resistor, inductor will change.
The variation of frequency with temperature is given by,
S = (∆ω/ω0) / (∆T/T0) parts per million per degree Celsius
where ωo, T0 are the desired frequency of oscillation and the operating temperature
respectively.
b) Due to the variation in the power supply, unstable transistor parameters, change with
climatic conditions and aging.
c) The effective resistance of the tank circuit is changed when the load is Connected.
d) Due to the variation in biasing conditions and loading conditions.
The frequency stability is given by,
S = dθ/dω
where dθ is the phase shift introduced for a small frequency change in nominal
frequency fr. The circuit giving the large value of dθ/dω has the more stable oscillator
frequency.
16. Draw and explain Colpitt’s oscillator
Colpitt’s oscillator is a superb circuit which is used widely in commercial signal

generations of frequency of 100 Mhz . It consists of a single state inverting amplifiers and
an (phase shift network). The two series capacitors C1 and C2 form the potential divider for
providing the feedback voltage ie. Voltage developed across the capacitor C2 provides the
regenerating feedback.If you consider positive feedback is applied to compensate for the
losses in the tuned circuit, the amplifier and feedback circuit create a negative resistor. When
Z1 and Z2 are capacitive, the impedance across the capacitors can be estimated from a
formula I won't lay on you here because it includes beta, hie, as well as XC1 and XC2. Suffice
to say it can be shown that the input impedance is a negative resistor in series with C1 and
C2. And the frequency is in accordance with:
The Colpitts configuration places the crystal from the base of the transistor to ground.
As it employs an emitter-follower, the bulk of the phase shift is provided by the capacitors,
with the balance provided by the feedback path through the crystal. The crystal is parallel-
resonant with the series combination of the Colpitts capacitors. Loop gain is optimized with a
base-emitter capacitor lower in value than the emitter-ground capacitor. In applications above
70 M H z however, it is often beneficial to reverse this ratio, as additional signal feedback to
the base may be required.
The Colpitts can be utilized in either a common-emitter or common-collector

configuration. This allows compatibility whether you are driving high, medium, or low
impedance applications. In the common-collector configuration, the resistor between the
collector and source voltage is normally eliminated for optimum power transfer to the load.
The load’s equivalent impedance should also be considered when arriving at the physical
value for the emitter-ground capacitor.
A well-designed Colpitts oscillator can be utilized through the K H z range, up to

approximately 130M H z. Overtone operation is achieved by adding an inductive component
in parallel with the emitter-ground capacitor. Common-emitter wiring will provide the best
high frequency performance as it minimizes the effects of and variations in load
characteristics. The transistor’s Miller capacitance also has a reduced impact in the common-
emitter configuration.
17. Explain Crystal Oscillator
The frequency of a crystal-controlled oscillator is held constant to a high degree of

accuracy by the use of a quartz crystal. The frequency depends almost entirely on the
dimensions of the crystal (essentially its thickness); other circuit values have comparatively
negligible effect. However, the power obtainable is limited by the heat the crystal will stand
without fracturing. The amount of heating is dependent upon the r.f. crystal current which, in
turn, is a function of the amount of feedback required to provide proper excitation. Crystal
heating short of the danger point results in frequency drift to an extent depending upon the
way the crystal is cut. Excitation should always be adjusted to the minimum necessary for
proper operation.
Crystal-Oscillator Circuits : The simplest crystal-oscillator circuit is shown in Fig. 6-2A.

An equivalent circuit is shown in Fig. 6-2B., where C4 represents the grid -cathode
capacitance and C5 indicates the plate-cathode, or output capacitance. The ratio of these
capacitors controls the excitation for the oscillator, and good practice generally requires that
both of these capacitances be augmented by external capacitors, to provide better control of
the excitation.
18. With a neat circuit diagram explain the working of a Hartley oscillator using an npn
transistor and obtain the expression for oscillation frequency and for minimum gain for
sustained oscillation.
The Hartley oscillator is widely used as a local oscillator in radio receivers.

Hartley oscillator is the same as colpitt’s oscillator except that phase shift network consists of
two inductors L1 and L1 and a capacitor instead of two capacitors and one inductor. The
output of the amplifier is applied across the inductor L1 and the voltage across inductor L2 is
the feedback voltage. The coil L1 is inductively coupled to the coil L2, the combination
functions as an autotransformer. However, because of direct connection, the junction of L1
and L2 cannot be directly grounded. Instead another capacitor is CL is used. The collector
supply voltage Vcc is applied to the collector through a radio frequency choke, which permits
an easy flow of direct current but at the same time, it offers very high impedance to the high
frequency currents. The presence of the coupling capacitor Cc in the output circuit does not
permit the dc currents to got to the tank circuit. The radio frequency energy developed across
RFC is capacitively coupled to the tank tank circuit through the capacitor Cc. The output of
the phase shift network is coupled from the junction of L2 and C to the amplifier input at
base through coupling capacitor Cc, which blocks dc but provides path to ac. Transistor itself
produces a phase shift of 180 degree and another phase shift of 180 degree is provided by the
feedback. Thus a total phase shift of 360 degree is obtained which is an essential condition
for developing oscillations. The output voltage derived from a secondary winding L’ coupled
to the inductance L1.
Working: - When the collector supply voltage Vcc is switched on, the capictor gets charged.
The capacitor discharges through the inductor, setting up oscillations of frequency: -
f=1/(2π*[C (L1+L2+2M)]1/2)
Considering the fact that there exists mutual inductance between the two coils because the
coils are wound on the same core, their net effective inductance is increased by mutual
inductance M. so in this case effective inductance -
L= L1+L2+2M.
Frequency of oscillation:
hie(Z1+Z2+Z3)+Z1Z2(1+ hfe )+Z2Z3=0

Here Z1=jwL1+jwM ; Z2= jwL2+jwM and Z3=1/jwC= -j/w C
Substituting in the general equation-
hie((jwL1+jwM) + (jwL2+jwM )+-j/w C)+ (jwL1+jwM ) (jwL2+jwM) (1+ hfe )+

(jwL2+jwM )( -j/w C)=0
jwhie [L1+L2+2M-1/w2C] - w2 (L2+M)[(L1+M)(1+hfe)-1/ w2C]=0
Equating the imaginary part of above equation to zero-
jwhie [L1+L2+2M-1/w2C]=0
L1+L2+2M-1/w2C=0
Or
w2C= 1/(L1+L2+2M)
or
f=w/2π=1/(2π*[C (L1+L2+2M)]1/2)
The above equation gives the frequency of oscillation
Equating the real component of equation to zero-
(L1+M)(1+ hfe) – 1/ w2C=0
Or
(1+ hfe)= 1/ (w2C(L1+M))= (L1+L2+2M)/(L1+M)
=1+(L2+M)/(L1+M)
Or
hfe =(L2+M)/(L1+M)
As for for other oscillator circuits, the lopp gain must be greater than one to ensure the circuit
oscillates.
So,Aβ>=1
Or
A>=β>=(L1+M)/(L2+M)
Hartley oscillator can also be use for generating RF signals. Varying the indications,
which can be done by making the core movable, can easily vary the frequency. Another
method of varying frequency is of varying capacitance. Hatley oscillator is not suitable for
low frequency work because at low frequency, the value of indications required becomes
large.
19. What is an oscillator? Discuss the advantages of Oscillators.
An oscillator is a system consisting of active and passive circuit elements to produce a

sinusoidal or other repetitive waveforms at the output without the application of an external
input signal. The function of an oscillator is opposite to that of a rectifier that converts ac
power into a dc power. Oscillations are produced without any external signal source. The
only input power to an oscillator is the d. c. power supply. It receives d. c. energy and
changes it into a. c. energy of desired frequency. The frequency of oscillations depend upon
the constants of the device.
Advantages
Although oscillations can be produced by mechanical devices (e.g. alternators), but

electronic oscillators have the following advantages:
(i) An oscillator is a non-rotating device. Consequently, there is little wear and tear
and hence longer life.
(ii) Due to the absence of moving parts, the operation of an oscillator is quite silent.
(iii) An oscillator can produce waves from small(20 Hz) to extremely high
frequencies(>100 MHz).
(iv) The frequency of oscillators can be easily changed when desired.
(v) It has good frequency stability i. e. frequency once set remains constant for a
considerable period of time.
(vi) It has very high efficiency.
20. Discuss the essentials of an oscillator?
The essential components of an oscillator are
(i) Tank Circuit: It consists of inductance coil(L) connected in parallel with

capacitor (C0. the frequency of oscillations in the circuit depends upon the
values of inductance of the coil and capacitance of the capacitor.
(ii) Transistor Amplifier: The transistor amplifier receives d. c. power from the
battery and changes it into a.c. power for supplying to the tank circuit. The
oscillations occurring in the tank circuit are applied to the input of the transistor
amplifier. Because of the amplifying properties of the transistor, we get
increased output of these oscillations. This amplified output of oscillations is
due to the d.c. power supplied by the battery. The output of the transistor can be
supplied to the tank circuit to meet the losses.
(iii)Feedback circuit: The feedback circuit supplies a part of collector energy to the
tank circuit in correct phase to aid the oscillations i.e. it provides positive
feedback.
21. What is the basic principle of oscillators?
In an oscillating circuit, the amplitude of voltage or current oscillations decays with

time owing to the dissipation of energy in the resistance contained in the circuit. If a negative
resistance is incorporated in the circuit to generated energy that compensates for the loss of
energy through the passive resistance, oscillations with undiminished amplitude can occur.
Basically, therefore, a negative resistance must be provided in an oscillator. This is
accomplished in a feedback oscillator by providing an external positive feedback to make the
overall gain infinite. In a negative resistance oscillator, the desired negative resistance is
supplied by internal positive feedback.
No external signal is applied to an oscillator. When the power supply to the system is
switched on, a noise voltage is produced. The frequency spectrum of noise being very wide, it
always has a voltage component at the frequency required for the oscillator. Thus the initial
signal to trigger the oscillations is obtained from the noise voltage. The ac power of the
output signal is supplied by the dc supply source.
22. Give the classification of Oscillators.
Depending on the type of the output waveform, oscillators are classified as sinusoidal
(or harmonic) oscillators and relaxation oscillators. if the generated waveform is sinusoidal or
nearly so with a definite frequency , the oscillator is said to be a sinusoidal oscillator. If the
output waveform is non-sinusoidal (such as square or saw-tooth waveforms), the oscillator is
termed a relaxation oscillator.
When the current-voltage characteristic of the active device in the oscillator has a
negative slope over some portion of its operation, the oscillator is said to of negative
resistance type. A tunnel diode oscillator is a negative resistance oscillator. If the oscillator
contains a positive feedback amplifier with the loop gain adjusted for an infinite overall gain,
the oscillator is called a feedback oscillator. Both negative resistance and feed back
oscillators can be sinusoidal and relaxation types. Feedback-type sinusoidal oscillators can
again be classified as LC(inductor-capacitor-) and RC (resistor-capacitor) oscillators.
Oscillators can also be grouped on the basis of the frequency of the generated signals. Thus
oscillators producing signals in the audio frequency (AF) range, radio frequency (RF) range
etc. are called audio frequency (AF) oscillators , radio frequency (RF) oscillators etc.
The use of LC feedback oscillators is in generating RF signals. Eg. Tuned collector,

Hartley, and Colpitt oscillators are oscillators of this class.
The application of RC oscillators is mainly for the generation of AF waveforms.

Phase-shift and Wien-bridge oscillators belong to this category.
Sometimes, for a higher frequency stability, piezoelectric crystals are used in place of
the LC circuit in a sinusoidal oscillator. Such oscillators are known as crystal oscillators.
23. What are the performance measures of oscillator circuits?
1. Stability: This is determined by the passive components. R, C and L determine

frequency of oscillations. If R changes with T, f changes so stability is affected.
Capacitors should be of high quality low leakage. So silver mica and ceramic
capacitors are widely used.
2. Amplitude stability: to get large output, amplification is to be done.
3. Output power: class A, B and C operations can be done. Class C gives largest output
but harmonics are more.
4. Harmonics: Undesirable frequency components are harmonics. An elementary
sinusoidal oscillator circuit is shown in figure.
C
L
L and C are reactive elements. They can store energy. The capacitor stores energy
whenever there is voltage across its plates. Inductor stores energy in its magnetic field
whenever current flows. Both C and L are lossless, ideal devices. So quality factor is infinity.
Energy is introduced into the circuit by charging capacitor to ‘V’ volts. If switch is open, C
cannot discharge because there is no path for discharge current to flow.
Voltage across C is V volts. When switch is closed, current flows. So the charge
across capacitor C decreases and voltage across C decreases. so as the energy stored in
capacitor decreases, the energy stored in inductor L increases, because current is flowing
through L. thus total energy in the circuit remains the same as before. When V across C
becomes 0, current through the inductor is maximum and the current starts charging C in the
opposite direction. So V across C becomes negative. Thus we get sinusoidal oscillations from
LC circuit.
24. QUARTZ CRYSTALS
Synthetic quartz is composed of Silicon and Oxygen (Silicon Dioxide) and is cultured
in autoclaves under high pressure and temperature. Quartz exhibits piezoelectric properties
which generate an electrical potential when pressure is applied on the surfaces of the crystal.
Conversely, when an electrical potential is applied to the surfaces of a crystal, mechanical
deformation or vibration is generated. These vibrations occur at a frequency determined by
the crystal design and oscillator circuit. Under proper conditions, quartz can be used to
stabilize the frequency of an oscillator circuit.
FREQUENCY STABILITY: The amount of frequency deviation from the ambient

temperature frequency over the operating temperature range. This deviation is associated with
a set of operating conditions including: Operating Temperature Range, Load Capacitance,
and Drive Level. This parameter is specified with a maximum and minimum frequency
deviation, expressed in percent (%) or parts per million (ppm). The frequency stability is
determined by the following primary factors: Type of quartz cut and angle of the quartz cut.
Some of the secondary factors include: mode of operation, drive level, load capacitance, and
mechanical design.
25. Explain the conditions to be satisfied for sustained oscillations in an oscillator circuit
with the help of block diagram.
The essential condition for sustained oscillations are :
• | AB | = 1,i.e. the magnitude of loop must be unity.

• The total phase shift around the closed loop is zero or 360 degrees.
Basic Amplitude
Amplifier Vo Limiter Vot
Positive
Feedback
Network
Block Diagram Of An Oscillator
The condition that | AB | = 1 gives a single and precise value of AB which should be
set throughout the operation of the oscillator circuit.But in practice,as transistor
characteristics and performance of other circuit components change with time,|AB| will
become greater or less than unity.Hence,in all practical circuits |AB| should be set greater
than unity so that the amplitude of oscillations will continue to increase without limit but
such an increase in amplitude is limited by the onset of the nonlinerarity of operation in the
active device associated with the amplifier as shown in the figure above.In this circuit,AB is
larger than unity for positive feedback.This onset of nonlinearity is an essential feature of all
practical oscillators.
26. What are crystal oscillators?
Crystal oscillators are oscillators where the primary frequency determining element is
a quartz crystal. Because of the inherent characteristics of the quartz crystal the crystal
oscillator may be held to extreme accuracy of frequency stability. Temperature compensation
may be applied to crystal oscillators to improve thermal stability of the crystal oscillator.
Crystal oscillators are usually, fixed frequency oscillators where stability and
accuracy are the primary considerations. For example it is almost impossible to design a
stable and accurate LC oscillator for the upper HF and higher frequencies without resorting to
some sort of crystal control. Hence the reason for crystal oscillators.
The frequency of older FT-243 crystals can be moved upward by crystal grinding.
27. Discuss the operation of a transistorized phase shift oscillator with the help of
a diagram? Explain the phase shifting circuit?
An oscillator is a circuit which converts electric energy at d.c (zero frequency )

to electric energy at frequency varying from a few hertz to gigahertz . Stated simply ,
it is a source of alternating voltage or current . An electronic oscillator is, essentially,
a feedback amplifier that supplies its own input i.e, it requires not external signal to
initiate or maintain the energy conversion process.
The voltage divider R1-R2 provides DC emitter base bias, Re and Ce

configuration provides temperature stability and prevent AC signal degeneration and
collector resistor Rc controls the collector voltage. The oscillator output voltage is
capacitively coupled to the load by Cc.
Vcc
Cc
22uF Vo
+
Rc
R1 1.2k
82k 0.1uF 0.1uF 0.1uF
+ + +
22 uF
+ R5
20mV NPN 1.5k 1.5k 1.5k
R2
1kHz 18k
Re
+
0.47k Ce
100uF
Vo
The phase shift circuit or the feedback network consists of three identical RC
sections. Each RC section produces a phase shift of 60 0.Therefore the net phase shift
of the feedback network is 600*3=1800. The transistor amplifier produces a phase shift
of 1800.The total phase shift between the input and the output circuit is 3600 or 0 0.
Hence the feedback is positive.
The circuit is set into oscillations by any random or variation caused in the
base current, that may be either due to noise inherent in the transistor or minor
variation in voltage of DC power supply. This variation in base current is amplified
in the collector circuit. The output of the amplifier is supplied to an RC feedback
network.
The resistors RC,RB and RE provide dc bias for the transistor amplifier. The
capacitor CE is the emitter bypass capacitor. At one particular frequency the phase
shift in each RC section is 60 0.Note that the maximum phase in one RC section is
limited to 900. This means that a two section feedback network is not possible because
an infinite gain would be required to overcome attenuation in the feedback network at
a total phase shift of 180 0.
When dc power supply Vcc is switched on the circuit produces oscillations.

The variation in the base current is amplified in the collector circuit. Then it is
feedback through the phase shift network and finally applied to the base. The
oscillations will be maintained if the loop gain Av =1. The frequency of oscillations
depends on the RC values.
• The frequency of oscillations is given by f = 1/2 RC 6 = 0.065/RC
• The feedback fraction of the RC network is = 1/29
• In order to satisfy the Barkhausen criterion, Av = 1, the open loop gain, Av of

the amplifier stage must be greater than 1/ or 29.
• There is only one frequency at which the overall phase shift is 1800, so that a
sine-wave output is obtained.
28. What are the necessary conditions to maintain sustained oscillation?
The use of positive feedback that results in a feedback amplifier having closed-loop
gain |Af| greater than 1 and satisfies the phase conditions will result in operation as an
oscillator circuit. An oscillator circuit then provides a varying output signal. If the output
signal varies sinusoidally the circuit is referred to as a sinusoidal oscillator. If the output
voltage rises quickly to one voltage level and later drops quickly to another voltage level, this
circuit is generally referred to as a pulse or square wave oscillator.
Feedback circuit used as an oscillator
To understand how a feedback oscillator circuit performs as an oscillator consider the

feedback circuit of the figure. When the switch at the amplifier input is open, no oscillation
occurs. Consider that we have a fictitious voltage at the amplifier input(Vi). This result is an
output voltage V0=AVi. After the amplifier stage and in a voltage Vf (AVi) after the
feedback stage. Thus we have a feedback voltage Vf AVi where BA is referred to as the
loop gain. If the circuits of the base amplifier and feedback network provide A of a correct
magnitude and phase, Vf can be made equal to Vi. Then, when the switch is closed and
fictitious voltage Vi is removed, the circuit will continue operating since the feedback voltage
is sufficient to drive the amplifier and feedback circuits resulting in a proper input voltage to
sustain the loop operation. The output waveform will still exist after the switch is closed if
the condition ‘ A=1’ is met. This is known as the Barkhausen criterion for oscillation.
In reality, no input signal is needed to start the oscillator going. Only the condition
A=1 must be satisfied for self sustained oscillations to result. In practice, A is made greater
than 1 and the system is started oscillating by amplifying noise voltage which is always
present. Saturation factors in the practical circuit provide an “average” value of A of 1. The
resulting waveforms are never exactly sinusoidal. However, the closer the value A is to
exactly 1, the more nearly sinusoidal is the waveform.
Another way of seeing how the feedback circuit provides operation as an oscillator is
obtained by nothing the denominator in the basic feedback equation Af=V0/Vs=A/(1+ A).
When A=-1 or magnitude one at a phase angle of 180 degree, the denominator becomes zero
and the gain with feedback, Af becomes infinite. Thus an infinitesimal signal (noise voltage)
can provide a measurable output voltage, and the circuit acts as an oscillator even without an
input signal.
The conditions necessary for sustained oscillation can be summarized as follows:
1. There should be a positive feedback.

2. The loop gain of the circuit must be equal to or greater than 1 i.e. A <=1.
3. The phase shift around the circuit must be zero or 360 degrees.
The non-sinusoidal oscillation at steady state can happen at 2 states:
1. is not exactly 1.
2. Due to saturation.
And decimal signal or noise voltage can provide a measurable output voltage and the circuit
can act as oscillator even without an input signal.
29. Explain with the help of a circuit diagram,the operation of COLPITTS

OSCILLATOR.
Oscillator is a circuit used to generate a.c voltage without a.c.input signal.The energy to
generate a.c.voltage is supplied from a d.c.source.If the output voltage is a sine wave,the
oscillator is called sinusoidal or harmonic oscillator.There is also another type of oscillator
called relaxation oscillator which generates voltages or currents which vary abruptly one or
more times in a cycle of oscillation.
In a Colpitts oscillator,Z1 and Z2 are the capacitors,Z3 is an inductor,R1,R2,RE are resistors

which provide d.c.bias to the transistor.Cc1 and Cc2 are coupling capacitors.CE is a bypass
capacitor.The capacitors C1,C2 and an inductor L together form the feedback network which
determines the frequency of the oscillator.
Vcc
R1 R2 C5
1k 1k 1uF Vout
C2
1uF
Q1
NPN
R3 R4 C1
1k 1k 1uF
C3 C4
1uF 1uF
L1
1uH
Colpitts Oscillator
When Vcc ,that is ,the supply voltage is on,a transient current is produced in the
circuit.As a result damped harmonic oscillations are set up in the circuit.The oscillatory
current in the tank circuit produces a.c.voltages across capacitors C1 and C2.The terminal 3
will be at zero potential as it is earthed. At any instant when terminal 1 is at positive potential
with respect to terminal 3, terminal 2 will be at negative potential with respect to
terminal 3 at the same instant.So,the phase difference between terminals 1 and 2 is always
180.In common emitter mode the phase difference between input and output is 180.
Therefore ,the total phase difference is equal to 360.Thus ,at the frequency determinant,for
tank circuit,the required condition for sustained oscillation is satisfied.The circuit acts as an
oscillator when the feedback is adjusted so that the loop gain A = 1.
The frequency of the oscillation is
fr = 1 / 2 LC
Where,
1/C = 1/C1 +1/C2
so,
C = C1C2 / (C1 + C2)
general equation for the oscillator
hie(Z1+ Z2+ Z3) + Z1Z2(1+hfe) + Z1Z3 = 0

For this oscillator,
Z1 = 1/j C1 = -j/ C1
Z2 = 1/j C2 = -j/ c2
Z3 = L
Substituting these values in the general equation for the oscillator
hie(Z1+ Z2+ Z3) + Z1Z2(1+hfe) + Z1Z3 = 0,
we get ,
jhie(1/ C1 + 1/ C2 – L) + ((1+ hfe) ^2C1C2 – L/ C1) = 0
The frequency of oscillation, fr = r /2 is found by equating the imaginary part of the

equation
jhie(1/ C1 + 1/ C2 – L) + ((1+ hfe) 2C1C2 – L/ C1) = 0 to zero.

Thus ,we get,
fr = r/2 = 1 / 2 (C1 + C2)/LC1C2
Substituting fr = r/2 = 1 / 2 (C1 + C2)/LC1C2 in jhie(1/ C1 + 1/ C2 – L) + ((1+

hfe) 2C1C2 – L/ C1) = 0 , the condition for maintanence of oscillations is obtained as
hfe = C2 / C1
MODULE - IV
WAVEFORM GENERATORS

1. Draw and explain the working of a negative clamping circuit.
Negative clamping circuit
The clamping network shown above is a negative clamping circuit that will clamp the
input signal to a negative dc level.
During the interval 0à T/2 the network the network will appear as shown below with the
diode in the ‘on` state effectively shorting out the effect of the resistor R. The resulting RC
time constant is so small that the capacitor will charge to V volts very quickly. During this
interval the output voltage is directly across the short circuit and vo = 0V.
When the input switches to the –V state, the network will appear as shown below with the
open-circuit equivalent for the diode determined by the applied signal and stored voltage
across the capacitor – both `pressuring’ current through the diode from cathode to anode.
Since vo is in parallel with the diode and resistor, applying Kirchoff’s voltage law around the
input loop will result in
]
-V-V-vo = 0
vo = -2V.
Input signal Output signal
2. With a suitable block circuit, show how linear sweep voltage is generated.
The above figure shows a basic sweep waveform generator. The switching action of the
switch causes the capacitor C to be alternately charged and discharged. The waveform
generated by this basic circuit is not exactly linear, even if the ratio of the sweep voltage Vs
and the supply voltage V is kept high. However, the linearity can be improved if feedback
arrangement is made with this basic circuit.
Feedback can be improved if an auxiliary variable voltage generator va is introduced in

such a way that variable voltage va is always equal to voltage developed across capacitor C.
Applying Kirchoff’s voltage law to the circuit shown,
V – iR – vc + va = 0
iR = V , if vc = va
i = V/R
i.e. the charging current i is independent of charging capacitor C and is constant.
Voltage across capacitor , vc = [V/CR] t
Hence, by introducing an auxiliary variable voltage generator in the basic R-C series
circuit in the above manner, perfect linearity can be achieved in the output waveform of the
circuit.
3. In a differentiating circuit ,R=10 kΩ,and C=2.2µF.If the input voltage goes from 0V
to 10 V at a constant rate in 0.4s,determine the output voltage.
Solution:
e0 = RC× d/dt(ei)
= RC× dei/dt
R=10 kΩ, C=2.2µF
dei/dt = (10-0)/0.4 = 25 V/s
e0 = (10×10 3) ×(2.2×10 -6) ×25 = 0.55 V
4. Draw and explain an RC integrator .Derive the relation between input and output
voltage .
Solution:
A circuit in which the output voltage is directly proportional to the integral of the
input is known as an integrator circuit i.e,
Output ∝ ∫input
An integrator circuit is a simple RC series circuit with output taken across the
capacitor as shown in figure
let ei be the input alternating voltage let i be resulting alternating current . Since R is
very large as compared to capacitive reactance Xc of the capacitor,it is reasonable to assume
that voltage across R(i.e. eR) is equal to the input voltage i.e,
ei =eR
i = eR /R
= ei /R
the charge q on the capacitor at any instant is
q=∫idt
output voltage , e = q/C

= ∫ idt/C
=(∫(ei/R)dt)/C
=(1/RC)∫ei.dt
∝ ∫ei.dt (since RC is a constant)
Output voltage∝ ∫input
5. Write a note on clampers.
Clamper is a circuit that "clamps" a signal to a different dc level. The different types
of clampers are positive negative and biased clampers.
A clamping network must have a capacitor, a diode and a resistive element. The
magnitude R and C must be chosen such that the time constant RC is large enough to ensure
that the voltage across the capacitor does not discharge significantly during the interval the
diode is non- conducting.
Positive Clamper : The circuit for a positive clamper is shown in the figure. During the
negative half cycle of the input signal, the diode conducts and acts like a short circuit. The
output voltage . The capacitor is charged to the peak value of input voltage Vm. and it
behaves like a battery. During the positive half of the input signal, the diode does not conduct
and acts as an open circuit. Hence the output voltage . This gives a positively
clamped voltage.
Negative Clamper : During the positive half cycle the diode conducts and acts like a short
circuit. The capacitor charges to peak value of input voltage Vm. During this interval the
output Vo which is taken across the short circuit will be zero.
During the negative half cycle, the diode is open. The output voltage can be found by
applying KVL.
Biased Clamper : The circuit of a positively biased clamper is shown in the figure. During the
negative half cycle of the input signal the diode is forward biased and acts like a short circuit.
The capacitor charges to . Applying the KVL to the input side
The voltage across the resistor will be equal to the source voltage Vs.
During the positive half cycle of the input signal, the diode is reverse biased and it
acts as an open circuit. Hence Vs has no effect on Vo. Applying KVL around the outside loop.
6. Draw the waveforms and circuit diagrams of clipping.
figure 1:input waveform

figure 2:positive clipping
figure 3:negative clipping
figure 4:combinational clipping
7. What is a clipper? Describe the operation of a biased clipper and combination

clipper.
The circuit with which the waveform is shaped by removing (or clipping) a portion of
the input signal without distorting the remaining part of the alternating waveform is called a
clipper. Clipping circuits are also referred to as voltage (or current) limiters, amplitude
selectors or slicers. These circuits find extensive use in radars, digital computers, radio and
television receivers etc.
Biased clipper: In some applications, it is required to remove a small portion of positive or

negative half cycle of the signal voltage and hence the biased clipper is used. The name bias
is designated because the adjustment of the clipping level is achieved by adding a biasing
voltage in series with the diode or resistor. The different types of biased clippers are:
• Biased positive clipper

• Biased positive clipper with reverse polarity of the batteryVR.
• Biased negative clipper
• Biased negative clipper with reverse polarity of the batteryVR.
Combination clipper: This is the combination of a biased positive clipper and a biased
negative clipper. When the input signal voltage Vi ≥ +VR1, diode D1 conducts and acts as a
closed switch, while D2 is reverse biased and acts as a open switch. Hence, the output voltage
cannot exceed the voltage level of +VR2 during the positive half cycle. Similarly the output
voltage Vo cannot go below the voltage level of –VR2 during the negative half cycle.
8. What is a clamper? Differentiate between a clamper and clipper.
Clamping network shifts (clamps) a signal to a different dc level, i.e. it introduces a dc

level to an ac signal. Hence the clamping network is also known as dc restorer. These circuits
find application in television receivers to restore the dc reference signal to the video signal.
During the positive half cycle, the diode conducts, i.e. it acts like a short circuit. The
capacitor charges to V volts. During this interval, the output which is taken across the short
circuit will be Vo = 0 V. During the negative half cycle, the diode is open.
The difference between clipping and clamping circuits is that while the clipper clips
off an unwanted portion of the input waveform, the clamper simply clamps the maximum
positive or negative peak to a desired dc level
9. Give a brief description of integrating circuits.
Integration is a summation of area. An integrating circuit produces an output voltage

which is proportional to the area enclosed by the input waveform. The shape of the output
voltage waveform is dependant upon the relationship between the time constant (RC) and the
pulse width (PW). An integrating circuit is an RC circuit with the output taken across the
capacitor and RC ≥ (10 x PW).
10. Give a brief description of differentiating circuits.
Differentiation is a measure of the rate of change. A differentiating circuit produces

an output voltage which is proportional to the rate of change of the input. When the output
from an RC circuit is taken across R, the output voltage is the differential of the input.
11. What is positive clipper? Give 2 types of its applications.
In the series positive clipper, when the input voltage is positive, the diode does not
conduct and acts an open circuit and hence the positive half cycle does not appear at the
output, that is the positive half cycle is clipped off. When the input cycle is negative, the
diode conducts and acts as a closed switch (short circuit), the negative half cycle appears at
the output.
In the stunt positive clipper, when the input voltage is positive, the diode conducts and
acts as a short-circuit and hence there is zero signal at the output, i.e. the positive half cycle is
clipped off. When the input signal is negative, the diode does not conduct and acts as an open
switch, the negative half cycle appears at the output.
It is evident that positive clippers introduce as half wave rectifier. Thus the positive
clipper has clipped the positive half cycle completely and allowed to pass the negative half
cycle of the input signal.
12. Write notes on clamping.
Clamping network shifts (clamps) a signal to a different d.c level, that is it introduces
a d.c. level to an a.c signal. Hence, the clamping network is also known as d.c reference
signal to the video signal. The clamping network has the various circuit components like a
diode, a capacitor and a resistor. The time constant for the circuit Γ=RC must be large so that
the voltage across the capacitor does not discharge significantly when the diode is not
conducting.
In the clamper circuit the diodes are assumed to be ideal. A square waveform with
maximum amplitude of V is given as the input to the network. During the positive half cycle,
the diode conducts, ie it acts like a short circuit. The capacitor charges to V volts. During this
interval, the output which is taken across the short circuit will be V0= 0 V. During the
negative half cycle, the diode is open. The output voltage can be found out by applying
Kirchoff’s Law.
-V-V-V0 = 0
Therefore, V0= -2V
The analysis of the clamper circuit can be done as follows. Determine the portion of
the input signal that forward biases the diode. When the diode is in short circuit condition, the
capacitor charges up to a level determined by the voltage across the capacitor in its equivalent
open circuit state. During the open circuit condition of the diode, it is assumed that the
capacitor will hold on to all its charge and therefore voltage. In the clamper networks, the
total swing of the output is equal to the total swing of the input signal.
13. What is the principle of operation of an integrating circuit?
The RC integrator is typically a series RC circuit that uses the capacitor to develop its
output. Since voltage cannot change instantly across a capacitor, because it takes time to
charge, the output of an integrator lags the input voltage. When a sine wave voltage is applied
to an integrator little or no distortion takes place. In other words, when a sine wave voltage is
applied to the input a sine wave voltage develops across the integrator's output (the
capacitor). The output is attenuated, however, and lags Va.
The input to our integrator is a square wave and it undergoes a great amount of
distortion as it is processed by the RC integrator circuit . The first thing to go is the sharp
corner of the square wave. 90-degree corners of a waveform represent very fast voltage
transitions. Since the voltage across a capacitor cannot change instantly (because charging
and discharging require time), and since an integrator uses a capacitor to develop its output,
these transitions are lost on the integrator's output.The pulse portion of the wave is the time
period in which the capacitor is forced to charge.” idle" or "off" time is the time the capacitor
is given to discharge.
14. What is a differentiator circuit?
By introducing electrical reactance into the feedback loops of op-amp amplifier

circuits, we can cause the output to respond to changes in the input voltage over time.
The differentiator produces a voltage output proportional to the input voltage's rate of change.
A differentiator circuit produces a constant output voltage for a steadily changing input
voltage. The circuit must place the full transition voltage across its output at the instant of the
transient (instantaneous, or very fast, voltage change). Since a capacitor operates as a short
circuit (zero resistance) for the first transient instant, it transfers all the transient voltage to the
resistor. Over time the capacitor charges, which results in its effective resistance (reactance)
increasing exponentially thereby reducing the current exponentially. By using the capacitor’s
charging current to develop the output voltage across the resistor the RC differentiator
produces the correct output across its output terminals for differentiation.
15. What is a clipper circuit?
Clipping circuits are linear wave shaping circuits. The main function of ‘clipper’ is
that it clips off a part of input waveform i.e., it cut off the positive and negative portions of
the input waveform. If the clipper cuts-off positive part of the input waveform, it is called
“positive clipper”. And if clipper cuts-off the negative portion of input waveform, it is called
“negative clipper”. Clipper is also used to slice off an input waveform between two preset
voltage levels.
16. What is the need of the resistance used in a clipper?
Resistor is used in a clipper to limit the current through the diode. To avoid the
damage due to excessive current through it. Usually in a clipper, diode operates in two
modes, either ‘ON’ or ‘OFF’. When the diode is ON, the series resistance must be much
higher than forward resistance of the diode because almost all input voltage will drop across
the input resistor. But when the diode is OFF, series resistance must be very smaller than the
reverse resistance of the diode. The value of resistance used in a clipper is the mean of
forward resistance and reverse resistance. It is given by
Resistance, R= (Rf.Rr)
Where Rf – is the forward resistance of the diode and

Rr – is the reverse resistance of the diode.
17. Explain biased and double clipper circuits.
Clipper can be either forward biased or reverse biased.
If a battery is connected in series with the diode in a positive clipper,we get a biased
clipper circuit.Here Vi is the input voltage given.VB is the voltage across the battery and
output voltageis Vo.If the voltage level at input is greater than (Vi+VD)(VD is the voltage
drop across the diode ,)which is .7V for silicon and .2V For germanium at 25 degree
celcius,the diode conducts.The output voltage becomes (Vi+VD) at the instance input voltage
exceeds (Vi+VD).If input voltage is less than this value dsiode is reverse biased and acts like
an open switch.
In a biased negative clipper,both the polaritiesof the diode and battery are reversed.So
a part of negative half cycle is cut off.
Combination of positive and negative clipper is called a double clipper.Here a part of

both negative and positive half cut off.
The clipping level for +ve clipper is (VB1+VD1),where VD1 is the knee voltage of
diode D1 and for diode 2 it is (VB2+VD2) where VD2 is the knee voltage of diode D2.
18. Discuss in brief on combination clippers.
Combination clippers are a combination of biased positive and negative clippers.

With a combination clipper, a portion of both positive and negative half cycles of the input
can be removed or clipped.
The circuit action is as follows.When the positive input voltage is greater than V1v
diode D1 conducts and diode D2 remains reverse biased.Therefore a voltage V1 appears
across the load. The output stays at +V1v so long as the input voltage exceeds V1.On the
otherhand during the –ve halfcycle,The diode D2 will conduct heavily and the output of –
V2v appear across the resistor.
19. Write short note on a negative clamper.
A circuit which places the negative peak of a signal at a desired level is known as a
negative clamper
(1).During the positive half-cycle of the input signal ,the diode is forward biased.
Therefore ,the diode behaves as a short.The charging time constant (RC)is very small
so that the capacitor will charge to V volts very quickly.During this interval output
voltage is directly across the short circuit.Therefore Vout =0.
(2).During the negative half-cycle the diode is reverse biased and behaves as an open
circuit.since the discharging time constant is much greater than the time period of the
input signal,the capacitor remains almost fully charged to V volts during the off time
of the diode.
20. Differentiate between an integrator and differentiator.
INTEGRATOR DIFFERENTIATOR
1 Integrators are circuits in which Differentiators are circuits in which
output voltage is proportional to output is proportional to derivative of
the integral of the input. input.
2 The time constant RC of the circuit The time constant RC is of the circuit
should be very large as compared should be much smaller than the time
to the time period of the input wave. period of the input wave.
The value of R should be 10 or more The value of Xc should be 10 or more

times larger than Xc tlmes larger than R
4 Circuit: Circuit:
5 Eg:When input is a square wave output is Eg:When input is a triangular wave

triangular output is rectangular
21. Explain the application of clippers.
There are numerous clipper applications. In general clippers are used to perform one of the
following two functions:
• Changing the shape of the waveform .

• Circuit transient protection.
Changing the shape of waveform.- Clippers can alter the shape of a waveform..For example
a clipper can be used to convert a sine wave into a rectangular wave,square wave etc.They
can limit either the negative or positive alteration or both alternations of an a.c. voltage .
Circuit Transient protection.-Transients can cause considerable damage to many types of

circuits e.g a digital circuit .In that case a clipper diode can be used to prevent the transient
from reaching that circuit.
22. What are the features of clamping circuits?
The clamping circuit does not change the peak to peak or r.m.s value of the waveform
.Thus the input waveform and clamped output have the same peak to peak value.If we
measure the input voltage and clamped output with an a.c voltmeter the readings will be the
same.
A clamping circuit changes the peak and average values of a waveform.This point
needs explanation .Thus if a input waveform has a peak value of 5V and average value over
a cycle is zero and the clamped output varies between 10V and 0V.Then the peak value of the
clamped output is 10V and average value is 5V.Hence we arrive at a very important
conclusion that a clamper changes the peak value as well as the average value of a waveform.
23. Discuss the output waveforms for a differentiating circuit.
The output waveform from a differentiating circuit depends upon the time constants and
shape of the input wave.Three important cases will be considered.
When input is a square wave.-When the input fed to a differentiating circuit is a square
wave,output will consist of sharp pulses.During the OC part of the input wave, its amplitude
changes abruptly and hence the differentiated wave will be sharp narrow pulse. However
during the constant part CB of the input , the output will be zero because the derivative of a
constant is zero.
Since time constant RC of the circuit is very small w.r.t time period of input wave and
Xc >>R ,the capacitor will become fully half cycle, the output of the circuit will be zero
because the capacitor voltage neutralizes the input voltage and there can be no current flow
through R.Thus we get a sharp pulse at the output during the start of each half cycle of input
wave while for the remainder part of the half cycle of input wave , the output will be zero.In
this way , a symmetrical output wave with sharp positive and negative peaks is
produced.Such pulses are used in many ways in electronic circuits e.g in television
transmitters and receivers,in multivibrators to initiate action etc.
input waveform output waveform
When input is a triangular wave.-When the input fed to differentiating circuit is a triangular
wave, the output will be a rectangular wave.
O A B C D
During the period OA of the input wave its amplitude changes at a constant rate and
therefore the differentiated wave has a constant value for each constant value for each
constant rate of change .During the period AB of the input wave, the change is less abrupt so
that the output will be a very narrow pulse of rectangular form. Thus when a rectangular
wave is fed to a differentiating circuit , the output consists of a succession of rectangular
waves of equal or unequal duration depending upon the shape of the input wave.
When input is a sine wave.- A sine wave input becomes a cosine wave and a cosine wave
input becomes an inverted sine wave at the output .
24. Discuss the output waveforms for an integrating circuit.
The output waveform from an integrating circuit depends upon time constant and shape of the
input wave. Two important cases are:
When input is square wave.- When the input fed to an integrating circuit is a square wave,the
output will be triangular wave .As integration means summation therefore , output from an
integrating circuit will be the sum of all the input waves at any instant. This sum is zero at A
and goes on increasing till it becomes maximum at C.After this the summation goes on
decreasing to the onset of negative movement CD of the input.
input B C
output
When input is rectangular wave.When the input fed to an integrating circuit is a rectangular
wave ,the output will be a triangular wave.
25. Explain the conditions under which an RC circuit behaves as

a) An integrator b) Differentiator
Differentiator is a circuit in which the output voltage is directly proportional to the

derivative of input. Output=kdip/dt. Since the derivative of constant is zero, the output will be
zero. As the RC ckt is very small with respect to the time period of input and exceed much
greater than R,a sharp narrow pulse is obtained as the output when a square wave is given as
the input. During early part of the half cycle, the capacitor gets charged. But during the
remaining part of the half cycle, output is zero as the capacitor voltage utilizes input voltage
and there can be no current flow. Thus we get a sharp pulse during the start of each half cycle
and remaining part has zero output.
Vo=IR=Rc*dVi/dt
Integrator is a circuit in which the output voltage is proportional to the integral of the
input. Output=k integralof input. Integration means the summation of output from an
integrator i.e. the sum of all input wave at any instant. When the input is a square wave, the
output is triangular. Here the time constant of circuit is very large in comparison with time
period of input signal. Hence the voltage drop across the capacitor will be very small in
comparison to the drop across resistor. The current is Vin/R since the whole of Vin is
appearing across R, the output voltage across V is Vo=1/C (integral of I with respect to
time)=1/(RC) (integral of Vin with respect to time). Voltage drop across ‘c’ increases as time
passes. It is necessary that RC>=1.5T where T is period of input wave. When a pulse
waveform is given at the input, the capacitor charges through Rc& the output voltage builds
up. As long as the input voltage is present, the capacitor continues to charge. When the input
is terminated, output falls to zero as the capacitor discharges. As the value of Rc increases,
amplitude of output decrease and output decreases and output waveform becomes linear. It is
because charging current does not vary much through a high value resistor. Constant current
through a capacitor gives linear output. If input is a square wave, the capacitor charges and
discharges from –ve voltage to the positive voltage input.
26. Draw the differentiator circuit. Explain its principle of operation with necessary
waveforms
A circuit in which the output voltage is directly proportional to the derivative of the
input signal is called differentiator circuit i.e. v0=d/dt(input). A differentiating circuit can be
arranged by a simple RC series circuit. Here the values of R and C are selected in such a way
that the time constant (RC) of the circuit should be very small than the time period of the
input wave and reactance of the capacitor is very large as compared to the value of the
resistor. Thus the current flowing in the differentiator circuit is to a large extent decided by
the capacitive reactance; the current will be leading the input voltage by 90 degrees
approximately. Due to this current, the voltage developed across the resistor also leads the
input voltage by 90 degrees.
If the input is a sinusoidal signal and given by
vi=V sin( t)
Then the output will be leading this voltage by 90 degrees.
vo=Vsin( t+90)= V cos( t).
Thus we find that the output is a differentiated form of the input signal. This can be proved
mathematically.
The output voltage VO= i*R
But since XC>>R, the current (i)is dependent upon capacitor alone. Therefore, the rate of
change of charge across the capacitor gives the current
i=d Q/dt
but the charge Q across the capacitor C is given as
Q=C*VC
Where VC is the voltage across the capacitor
i=d Q/dt = d/dt(C*VC) =C* d(vt)/dt
vo= i* R=CR*d/dt(vt)
When a dc voltage is applied to the differentiating circuit, its output will be zero since the
derivative of a constant is zero. For a square wave input, the differentiator output will be
sharp narrow pulses. When the input to the differentiator circuit is a triangular wave, the
output will be a square or rectangular wave. For a sine wave input, the output of the
differentiator will be a cosine wave.
27. What is Miller integrator? Describe an integrator circuit.
MILLER INTEGRATOR : Consider a basic RC circuit in which the opening of switch

provides a sweep voltage.Yhe waveform generated by this basic circuit is not exactly
linear,even if the ratio of the sweep voltage and the supply voltage is kept high.The linearity
can be improved if the feedback arrangement , such as Miller sweep circuit is made with this.
Feedback can be provided if an auxiliary variable voltage generator is introduced in

such a way that variable voltage is always equal to the voltage developed across the
capacitor.
INTEGRATOR CIRCUIT
A circuit in which output voltage is directly proportional to the integral of the input is
known as an integrating circuit. An integrating circuit is a simple RC series circuit with
output taken across the Capacitor C.
In order that circuit renders good integration, the following conditions should be full-filled.
1. The time constant RC of the circuit should be very large compared to the time period
of the input wave.
2. The value of R should be 10 or more times larger than Xc.
Let ei be the input alternating voltage and let i be the resulting alternating current. Since R
is very large compared to capacitive reactance Xc of the capacitor, it is reasonable to assume
that the voltage across R(i.e. eR) is equal to the input voltage.i.e.
The charge on the capacitor at any instant is
output voltage,
(RC is constant)
Thus the output is proportional to the time integral of the input.
28. The input to the differentiator circuit is a sinusoidal voltage of peak value 5mv and
frequency 1kHZ.find out the output if R=100K and C=10^-6F
Solution.
The equation of the input voltage is
V1=5*sin2*3.14*1000*t=5 sin 2000*3.14*t mv
=CR=(10^-6)*10^5=0.1
V0=.1*(d(5sin 2000*3.14*t)
=(.5*2000*3.14)cos 2000*3.14*t
=1000*3.14cos2000*3.14t mv
Hence output is a cosinusoidal voltage of ferquency 1 kHZ and peak value 1000 *3.14nV.
29. what is a positive clipper?Explain its action with the help of a circuit.
A positive clipper is the circuit which is used to cut off the positive half cycle. The
circuit will be as shown below. The output voltage V0 is that which is dropped across R.
During the positive half cycle of the signal (i) voltage acts as an open switch. Hence al the
applied voltage drops across D and none across R.So there is no output signal voltage. Thus
the positive half cycle is clipped away as shown in (ii)
During the negative half cycle, terminal B is positive and so it forward
biases D which acts as a short. Hence there is no voltage drops across D.Consequently ,all the
applied signal voltage drops across R and none across D.As a result,the negative half cycle of
the input signal is allowed to pass through the clipper circuit.Hence the circuit acts as a
positive clipper.
D1
DIODE
+ R1
1k
5V
-
Here during the positive half cycle ,it reverse biases D1and during the negative half cydleit
forward biases D1
30. What are the differences between positive and negative clamper?
Positive clamper Negative clamper

During the negative half cycle During the negative half cycle
1.the diode is forward biased.. 1.the diode is reverse biased
2.it shorts out the resistor 2.it acts as an open circuit
3.time constant will be zero 3.time constant will not be equal to zero
4.capacitor charges to -V 4.capacitor discharges to discharge through R
5.The signal stays at that level for negative 5.Thus the signal is pushed downward
half cycle by V volts and the peak falls to zero level
During the positive half cycle

1.the diode is forward biased..
During the positive half cycle
6.the diode is reverse biased 2.it shorts out the resistor
7.it acts as an open circuit 3.time constant will be zero
8.time constant will not be equal to zero 4.capacitor charges to V
9.capacitor discharges to discharge through R 5.The signal stays at that level for positive half
cycle
10.Thus the signal is pushed upward by V so
that the negative peak falls to zero
31. Explain the basic principle of linear sweep voltage generator
A linear time base generator or sweep generator is one that provides an output
waveform, a portion of which exhibits a linear variation of voltage or current with time.
The voltage – time base circuit finds a major application in CRO. Among several
methods to achieve sweep linearity, the Miller circuit and Bootstrap circuit are commonly
used. In the Miller circuit, an operational integrator is used to convert a step into a ramp
waveform. In the Bootstrap circuit, a constant current is approximated by maintaining nearly
constant voltage across a fixed resistor in series with a capacitor.
32. With the help of a npn transistor circuit and wave forms explain the working of an
astable multivibrator
In astable multivibrator both transistors are coupled to each other through capacitors
as shown in the circuit diagram. Whichever transistor is off at any moment cannot remain off
indefinitely; its base will become forward biased as that capacitor charges towards +5 volts.
Figure : Astable Multivibrators
Once that happens, that transistor will turn on, thereby turning the other one off. If we
pick a moment when Q1 has just turned off and Q2 is on, then the left end of C2 is at -5 volts.
This negative voltage decreases as C2 charges through R2 towards +5 volts. However, the
moment C2 charges enough to provide forward bias to the base of Q1, Q1 turns on and the 5
volt drop in Q1's collector voltage is coupled through C1 to the base of Q2. This turns Q2 off
at once. As we saw in the previous experiment, the time that Q1 remains on and Q2 remains
off is 0.693RC, which for the component values shown here is about 1 second.
Now Q2 is held off while C1 charges through R1, until Q2's base becomes forward
biased. At that point the transistors switch states again and the whole thing starts over. There
is no stable state where the circuit can come to rest, so this circuit is known as an astable
multivibrator.
The time Q2 remains off is set by R1 and C1, just as the time Q1 remains off is set by
R2 and C2. For our circuit, the components are of the same values on each side, so the timing
will be the same on each half of the cycle. This is not required; the two halves of the circuit
can have totally different time intervals. They actually operate independently of each other,
even though they work together.
Since this particular circuit will spend about 1 second on each half cycle, the total
cycle time, or period, is about 2 seconds. The operating frequency of the circuit is the
reciprocal of the period, or 0.5 Hz.
33. Use necessary circuit and waveforms to explain the working of a Bootstrap sweep
generator
The bootstrap circuit illustrated in figure given below is a commonly used method for
achieving a constant charging current. Here, transistor Q1 acts as a switch and Q2 as an
emitter follower which is connected across capacitor C. Therefore, the output voltage V0 will
be approximately equal to the voltage across C. The transistor, therefore, provides a low
resistance output terminal for the saw-toothed generator.
Figure : Bootstrap Sweep Generator Circuit
Initially, Q1 is ON and Q2 is OFF. Hence, C1 is charged to the supply voltage Vcc

through diode D and the output voltage V0 is zero. When a negative pulse, as shown in
waveform figure, is applied to the base of Q1 and Q1 is turned OFF. Now, capacitor C1
discharges and capacitor C starts charging through resistor R. As a result, the base voltage of
Q2 and V0 start increasing from zero volts. Therefore, diode D becomes reverse biased. The
value of capacitor C1 is much larger than that of capacitor C. The voltage across R remains
substantially constant throughout the charging process and thus the charging current (iR) is
maintained constant. So, capacitor C is charged with a constant current which causes the
voltage across C, i.e. the output voltage V0 to increase linearly with time with the relation, V0
= Vcct/RC.
Figure : Output waveform of Bootstrap Sweep Generator
When the negative pulse at the input is removed, C discharges through Q1 and V0
reduces to zero. Then capacitor C1 again charges to supply voltage Vcc through diode D.
The bootstrap sweep circuit is called so because the circuit itself pulls up by its own
bootstrap.
34. Draw and explain diode clipping circuit
A diode clipping circuit can be used to limit the voltage swing of a signal. Clipper
circuits are used to clip a portion of the waveform. They are also known as amplitude
limiters. The basic principle of clipping circuits is based on the unidirectional property of a
diode.
During forward biased condition, diode acts like a close switch and during reverse
biased condition; diode acts like an open switch. Clipping circuit may be classified as flows:
1. Positive clipping circuits.

2. Negative clipping circuits.
3. Biased clipping circuits.
4. Combinational or trapezoidal circuits.
The resistor is used in series with the source ton avoid the damage due to excessive
current.
Positive Clippers
The shunt connected positive clipper, in which the diode conducts for positive half
cycle and hence, the output is a straight line. During the negative half cycle the diode does
not conduct and hence the input appears as the output.
Negative Clippers
The shunt connected negative clipper, in which the diode does not conduct for the
positive half cycle and hence, the output is same as the input. During the negative half cycle,
the diode conducts so the output is a straight line.
Trapeziodal Clippers
During The Positive half cycle, the diode D1 will be open circuited and the input
appears as the output until, the applied bias voltage value is reached by the source. After this
point, the diode is a short circuit and if causes the output to be straight line of conduction.
During the negative half, until the bias value is reached, the diode is an open circuit and
hence input appears as output, the diode is shorted after this and the out put is the straight line
of conduction.
Figure : Diode clipping circuit and its output waveform.
35. Write notes on clamping
When a signal drives an open-ended capacitor the average voltage level on the output
terminal of the capacitor is determined by the initial charge on that terminal and may
therefore be quite unpredictable. Thus it is necessary to connect the output to ground or some
other reference voltage via a large resistor. This action drains any excess charge and results in
an average or DC output voltage of zero.
A simple alternative method of establishing a DC reference for the output voltage is

by using a diode clamp as shown in figure . By conducting whenever the voltage at the output
terminal of the capacitor goes negative, this circuit builds up an average charge on the
terminal that is sufficient to prevent the output from ever going negative. Positive charge on
this terminal is effectively trapped.
Figure : Diode clamp circuit and its output waveform.
36. Describe the working of bistable multivibrator
A bistable circuit is one which can exit indefinitely in either of two stable states and
which can be induced to make an abrupt transition from one state to the other by means of
external excitation. Bistable Multivibrator is a two stage regenerative amplifier.Such
interconnected amplifiers pairs are known as Eccles Jordan circuit, Flip-Flop and Binary.
Bistable Multivibrator has 2 astable states. Only the application of a suitable trigger pulse
makes the circuit to change to the other stable state.Thus one trigger pulse causes the
multivibrator to flip from one state to the another and the next pulse causes it to flop back to
its original state.
As shown here, the circuit we're looking at really is nothing more than two basic
inverters, each taking its input from the other's output. If, when power is first applied, Q1
turns on, its output will be a logic 0. This will be applied to Q2's input resistor, keeping Q2
turned off so that its output will be a logic 1. This logic 1 will be applied back to Q1's input
resistor, keeping Q1 turned on and holding the entire circuit locked into this stable state.
Figure : Bistable Multivibrator
On the other hand, if Q1 stays off at power-up, it will apply a logic 1 to Q2's input,
thus turning Q2 on. The resulting logic 0 output from Q2 will in turn hold Q1 off. The circuit
will then remain in this stable state indefinitely.
Figure : Output Wave Form
Because this circuit has two possible logical states, it is known technically as a
multivibrator. Because it has two possible stable states, it is a bistable multivibrator. It is also
the most basic possible binary latch circuit. In the next few experiments we'll look at ways to
expand this circuit and modify its behavior. But first, we'll examine the operation of this basic
circuit.
Application
• Bistable multivibrator is used as counters and storing of binary information.

• It is used as frequency divider in timing circuits.
• It can also be used for generation of pulses.
37. With the help of circuit diagram explain a Miller Sweep generator
Figure given below shows the circuit of a Miller integrator or a sweep circuit.
Transistor Q1 acts as a switch and transistor Q2 is a common – emitter amplifier. i.e. a high
gain amplifier. Consider the case when Q1 is ON and Q2 is OFF. At this condition, the
voltage across the capacitor C and the output voltage V0 is equal to Vcc.
Figure : Circuit diagram of Miller Inegrator
When a negative pulse is applied to the base of Q1, the emitter – base junction of Q1 is
reverse biased and hence Q1 is turned OFF. Thus, the collector voltage (Vc1) of Q1 increases
which increases the bias to Q2 and as a result Q2 is turned ON. Since Q2 conducts, Vout
begins to decrease. Because the capacitor is coupled to the base of transistor Q2, the rate of
decrease of output voltage is controlled by rate of discharge of capacitor. The time constant
of the discharge is given by τd = RB2C.
As the value of time constant is very large, the discharge current practically remains
constant. Hence, the run down of the collector voltage is linear. When the input pulse is
removed, Q1 turns ON and Q2 turns OFF. The capacitor charges quickly to +Vcc through Rc
with the time constant τc=RcC.
Figure : Output waveform of Miller Integrator
38. Draw and explain an RC integrator, with equations
RC Integrator is a low pass RC circuit in which the output is taken across capacitor.
The low pass RC circuit gives considerable gain when low frequency signal is applied. It is
because of the high reactance offered by the capacitor at low frequencies. The integrator
circuit gives the output proportional to the integral of the input signal.
Voltage across the capacitor Vo = 1/C∫idt
Ie, 1/RC∫Vidt
Vo∝∫Vidt
The gain shown by this circuit decreases considerably with increase in frequency.
This gives triangular wave to square wave input, cosine wave to sine wave input and a
parabolic wave to a triangular wave input.
220k
0.1uF
1kHz
20Vp-p
Figure : Circuit Diagram of an Integrator
39. Draw and explain a monostable multivibrator. Mention a few of its applications
The monostable configuration consists of two amplifier stages interconnected in such

a manner as to possess one stable state. The circuit diagram of a monostable multi is shown in
fig 1.The output of transistor A1 at y2 is coupled to the input at x1 through a resistor
attenuator in which C1 is a small commutating capacitor. The dc coupling found in a binary
from y1 to x2 is here replaced by capacitive coupling through C. While the resistor R at the
input of A2 is shown returned to the supply voltage VCC, this feature of the circuit is not
essential and R may be returned to a lower potential.
Figure : Monostable Multivibrator
As you can see in the schematic diagram to the right, the monostable multivibrator is
very similar in design to the bistable multivibrator you have already demonstrated. The
primary difference is the use of a capacitor (C in the schematic) as one of the cross-coupling
elements. The resistor is still present (R in the schematic), but now connects the base of Q2 to
+5 volts instead of to the collector of Q1.
Of course, the capacitor will take a certain amount of time to charge, but once it does
so it will carry no current, and Q2 will be turned on by the current through its 15K base
resistor. This in turn holds the Q output at logic 0. This output is also applied as before,
holding Q1 off. Assuming the T (Trigger) input is also quiescent at logic 0, Q3 is also off and
the circuit will remain indefinitely in this state.
At this point, C is charged to just about +5 volts (less VBE of Q2), with the Q1
collector connection being positive. The circuit will remain in this state until a logic 1 signal
is applied to the T input.
When an input signal is received at T, Q3 turns on and pulls the left end of capacitor
C down to ground. Since the capacitor voltage cannot change instantaneously, this forces the
right end of C to -5 volts, immediately turning Q2 off. This in turn applies a logic 1 to Q1's
input, turning Q1 on. At this point, the input to T can be discontinued; the Q output is logic 1
and Q1 will remain on.
Under these circumstances, the left end of C remains locked to ground through Q1's
collector. But the right end gradually charges through R, Q2's base resistor, towards +5 volts.
However, it never gets there; as soon as this voltage allows Q2's base to become forward
biased, Q2 turns on and turns Q1 off again. This returns the circuit to its quiescent state.
Thus, this circuit cannot maintain a logic 1 output indefinitely; this is not really a
stable state for this circuit. The circuit has only one stable state (Q = 0). It is therefore known
as a monostable multivibrator.
The duration of the quasi-stable state (Q = 1) is determined by the two components R

and C. Because the capacitor only charges to half the total range (from -5 volts to 0, while
charging towards +5 volts), the duration of the output pulse is 0.693RC, where 0.693 is the
natural logarithm of 2, R is in ohms, and C is in farads. For the component values shown
here, the timing interval is 0.693 × 15,000 × 0.0001 = 1.04 seconds. So this circuit will
produce a 1-second pulse each time it is triggered.
If the T input has already returned to logic 0, C will rapidly recharge through the 1K
collector resistor and be ready for another input trigger signal. If T remains at logic 1, C will
remain discharged until T drops again to logic 0. Then C will fully recharge in about 0.5
second and be ready for another trigger signal.
40. Draw and explain a differential circuit
A differentiator is a high pass RC circuit having a very small time constant. It is a

circuit which gives an output voltage proportional to the derivative of the input voltage. A
high pass RC circuit is a circuit, which allows only high frequency to pass through.
The output current I = C dVi/dt.
∴V out= Rcdvi/dt
∴Vo α d (vi)/dt
For a high pass RC circuit to act as differentiator time constant (τ) of the circuit (RC)
should be very much less than the input time period (T). Here if we give a constant input we
get no output. For sine wave as input we get cosine wave as output. For square wave we get
narrow pulses as output.
0.001uF
1.5k
1kHz
20Vp-p
Figure : Circuit Diagram of a Differentiator
41. Explain the different types of multivibrators
Multivibrator is basically a two-stage amplifier with output of one supplied back to

the input of the other .
Feedback System
First Stage Feedback Second Stage

Transistor Transistor
System
Figure : Block diagram of a Multivibrator
Multivibrator is a switching circuit and may be defined as an electronic circuit that

generates non-sinusoidal waves, such as rectangular waves, saw tooth waves, square waves
etc. Multivibrators are capable of storing binary numbers, counting pulses, synchronsing
arithmetic operations and performing other, essential functions in digital systems.
In a multivibrator, each amplifier stage supplies feedback to the other stage in such a
way that one transistor is driven to saturation and the other to cut-off or vice-versa. This is
termed as the state of the multivibrator. The condition in which the multivibrator may remain
indefinitely until the circuit is triggered by some external signal is termed as the stable state.
There are only two possible states of a multivibrator are as follows:
First state: Transistor T1 ‘on’ and transistor T2 ‘off’

Second state: Transistor T1 ‘off’ and transistor T2 ‘on ’
Depending upon the type of coupling network employed, the multivibrators are
classified into the following three categories.
1. Astable or free-running multivibrator.

2. Monostable or single-shot multivibrator.
3. Bistable or flip-flop multivibrator.
The first one is the non-driven type whereas the other two are the driven type (also called
triggered oscillators).
Multivibrators are used for various purposes such as generation of non-sinusoidal

waveforms ( square, rectangular, sawtooth etc.) and pulses occurring periodically, frequency
division, synchronized generation of pulses and extended waveforms, generation of time
delays, storage of binary bit of information etc.
MODULE - V
POWER SUPPLY & SPECIAL DIODES

1. Draw the circuit of a 7805 voltage regulator? Explain the functions of the capacitors
used at its input and output sides.
Functions of capacitors used at input and output sides:

The capacitor at the input side is used to filter the unregulated input voltage and is
connected to the IC’s IN terminal.
The capacitor at the output side is used to filter the regulated output voltage mostly for
any high-frequency noise.
2. Explain the working principle of a TRIAC.
"Triac" is an abbreviation for three terminal ac switch. 'Tri'-indicates that the device
has three terminals and 'ac' indicates that the device controls alternating current or can
conduct in either direction. The triac is a device that is triggered into conduction when a low
energy signal is applied to its gate terminal. The triac conducts in either direction when
turned on. Either a positive or negative gate signal triggers it into conduction. Thus the triac
is a three terminal, four layer bidirectional semiconductor device that controls ac power.
Because of its bidirectional conduction property, the triac is widely used in the field of power
electronics for control purposes.
Operation: Though the triac can be turned on without any gate current provided the supply
voltage becomes equal to the breakover voltage of the triac but the normal way to turn on the
triac is by applying a proper gate current. The larger the gate current, the smaller the supply
voltage at which the triac is turned on..Triac can conduct current irrespective of the voltage
polarity of terminals
MT1 and MT2 with respect to each other and that of gate and terminal MT2.
3. Draw the complete circuit of a dual voltage source using 7805 and 7905
A voltage regulator is a circuit that supplies a constant voltage regardless of changes in

load currents. Although voltage regulators can be designed using op-amps, it is quicker and
easy to use IC voltage regulators. Furthermore, IC voltage regulators are versatile and
relatively inexpensive and are available with features such as a programmable output,
current/voltage boosting, thermal shutdown and floating operation for high voltage
applications. IC voltage regulators are of the following types
1. Fixed Output Voltage Regulators

a. Positive Voltage Regulators – IC 7800 Series
b. Negative Voltage Regulators – IC 7900 Series
2. Adjustable Output Voltage Regulators

a. Positive Voltage Regulators – IC LM317 Series
b. Negative Voltage Regulators – IC LM337 Series
Voltage regulators are commonly used for on-card regulation and laboratory-type
power supplies.
Typical performance parameters for voltage regulators are
• Line regualtion
• Load regulation
• Temparature stability
• Ripple rejection
Line or input regulation is defined as the change in output voltage for a change in the
input voltage and is usually expressed in milli volts or as a percentage of output voltage.
Load regulation is the change in output voltage for a change in load current and is also
expressed in milli volts or as a percentage of output voltage.
Temperature stability or average temperature coeffiecient of output voltage is the

change in output voltage per unit change in temperature and is expressed in milli volts/oC.
Ripple rejection is the measure of regulators ability to reject ripple voltages. It is

usually expressed in decibels.
The smaller the values of line regualtion, load regulation, and temperature stability,
the better the regulator.
Fixed Voltage Regulators

Positive voltage regulator series with seven voltage options – IC 7800 Series
1 3
78XX
Input Vin Output Vo
2
Ground
The 7800 series consists of three – terminal positive voltage regulators with seven
voltage options. The last two numbers “00” represents the output voltage of the regulator.
These ICs are designed as fixed voltage regulators and with adequate heat sinking can deliver
output currents in excess of 1A. These ICs also have internal thermal overlaod protection and
internal short-circuit current limiting.As shown in figure, proper operation requires a
common ground between input and output voltages. In addition, the difference between input
and output voltages (Vin - Vo), called dropout voltage, must be typically 2.0 V.
7800 Series Voltage Options

Device Type Output Voltage V0 Maximum
Input
Voltage Vin
7805 5.0
7806 6.0
7808 8.0
35
7812 12.0
7815 15.0
7818 18.0
7824 24.0 40
Figure: IC 7805 – Circuit Representation
The output voltage Vo with respect to ground is
Vo = VR + VL
VR = IR * RR and VL = IL * RL
Vin = V0 + VDropout Voltage
= V0 + 2V
Negative Voltage Regulator series with Nine voltage options – IC 7900 Series
1 3
79XX
Ground Output Vo
2
Input Vin
The IC 7900 series of fixed output negative voltage regulators are complements to the
7800 series devices. These negative regulators are available in the same seven voltage options
as the 7800 devices.In addition two extra voltage options, -2V and -5.2V, are also available in
the negative 7900 series.
IC 7900 Series Voltage Options

Device Type Output Voltage V0 Maximum
Input
Voltage Vin
7902 2.0
7905 5.0
7905.2 5.2
7906 6.0
35
7908 8.0
7912 12.0
7915 15.0
7918 18.0
7924 24.0 40
4. Explain the working principle of an opto coupler
When it is necessary to block the voltage between one electronic circuit and another,
and transfer the signal at the same time, an amplifier coupling capacitor is often used as
shown in figure given below. Although this method of coupling does block dc between the
circuits, voltage isolation is not complete.
Figure - Dc blocking with a coupling capacitor
A newer method, making use of optoelectronic devices to achieve electrical isolation,

is the optical coupler, shown in figure given below. The coupler is composed of an LED and
a photodiode contained in a light-conducting medium. As the polarity signs in figure show,
the LED is forward biased, while the photodiode is reverse biased. When the input signal
causes current through the LED to increase, the light produce by the LED increases. This
increased light intensity causes current flow through the photodiode to increase. In this way,
changes in input current produce proportional changes in the output, even though the two
circuits are electrically isolated.
Figure - Optical coupler.
The optical coupler is suitable for frequencies in the low megahertz range. The
photodiode type shown above can handle only small currents; however, other types of
couplers, combining phototransistors with the SCR, can be used where more output is
required. Optical couplers are replacing transformers in low-voltage and low-current
applications. Sensitive digital circuits can use the coupler to control large current and
voltages with low-voltage logic levels
5. With the help of the structures explain LCD.
A liquid crystal display (LCD) is a thin, flat display device made up of any number of
color or monochrome pixels arrayed in front of a light source or reflector. It is prized by
engineers because it uses very small amounts of electric power, and is therefore suitable for
use in battery-powered electronic devices.
Each pixel (picture element) consists of a column of liquid crystal molecules

suspended between two transparent electrodes, and two polarizing filters, the axes of polarity
of which are perpendicular to each other. Without the liquid crystals between them, light
passing through one would be blocked by the other. The liquid crystal twists the polarization
of light entering one filter to allow it to pass through the other.
The molecules of the liquid crystal have electric charges on them. By applying small
electrical charges to transparent electrodes over each pixel or subpixel, the molecules are
twisted by electrostatic forces. This changes the twist of the light passing through the
molecules, and allows varying degrees of light to pass (or not pass) through the polarizing
filters.
Before applying an electrical charge, the liquid crystal molecules are in a relaxed
state. Charges on the molecules cause these molecules to align themselves in a helical
structure, or twist (the "crystal"). In some LCDs, the electrode may have a chemical surface
that seeds the crystal, so it crystallizes at the needed angle. Light passing through one filter is
rotated as it passes through the liquid crystal, allowing it to pass through the second polarized
filter. A small amount of light is absorbed by the polarizing filters, but otherwise the entire
assembly is transparent.
When an electrical charge is applied to the electrodes, the molecules of the liquid
crystal align themselves parallel to the electric field, thus limiting the rotation of entering
light. If the liquid crystals are completely untwisted, light passing through them will be
polarized perpendicular to the second filter, and thus be completely blocked. The pixel will
appear unlit. By controlling the twist of the liquid crystals in each pixel, light can be allowed
to pass though in varying amounts, correspondingly illuminating the pixel.
Many LCDs are driven to darkness by an alternating current, which disrupts the
twisting effect, and become light or transparent when no current is applied.
Figure: Reflective twisted nematic liquid crystal display.
1. Vertical filter film to polarize the light as it enters.

2. Glass substrate with ITO electrodes. The shapes of these electrodes will determine the
dark shapes that will appear when the LCD is turned on. Vertical ridges are etched on
the surface so the liquid crystals are in line with the polarized light.
3. Twisted nematic liquid crystals.
4. Glass substrate with common electrode film (ITO) with horizontal ridges to line up
with the horizontal filter.
5. Horizontal filter film to block/allow through light.
6. Reflective surface to send light back to viewer.
6. Explain how LEDs are arranged in a seven segment display
The illustration given below shows the basic layout of the segments in a seven-
segment display. The segments themselves are identified with lower-case letters "a" through
"g," with segment "a" at the top and then counting clockwise. Segment "g" is the center bar.
Most seven-segment digits also include a decimal point ("dp"), and some also include
an extra triangle to turn the decimal point into a comma. This improves readability of large
numbers on a calculator, for example. The decimal point is shown here on the right, but some
display units put it on the left, or have a decimal point on each side.
Seven-segment displays can be constructed using different technologies. The three most
common methods are
1. fluorescent displays (used in many line-powered devices such as microwave ovens

and some clocks and clock radios)
2. liquid crystal displays (used in many battery-powered devices such as watches and
many digital instruments)and
3. LEDs (used in either line-powered or battery-powered devices).
Schematic Diagram of LED based System
As shown in the two schematic diagrams above, the LEDs in a seven-segment display
are not isolated from each other. Rather, either all of the cathodes, or all of the anodes, are
connected together into a common lead, while the other end of each LED is individually
available. This means fewer electrical connections to the package, and also allows us to easily
enable or disable a particular digit by controlling the common lead. There is no advantage of
the common-cathode seven-segment unit over the common-anode version, or vice-versa.
Each type lends itself to certain applications, configurations, and logic families.
7. Explain, with the help of structure, the working of UJT? List its applications
One of the oddest semiconductor devices in use is the unijunction transistor (UJT). As
its name suggests, this is a three-terminal device, which nevertheless has only one PN
junction. It cannot amplify an applied signal, but it nevertheless can be used as the active
element in an oscillator circuit.
Above figure shows the physical construction of a typical UJT. It consists of a bar of
N-type silicon with electrical connections at either end, plus an aluminum wire bonded to a
point along the length of the silicon bar. At the bonding point, the aluminum creates a P-type
region in the silicon bar, thus forming a PN junction.
Because there's only one junction, it's not reasonable to use the terms anode or
cathode, so designations are taken instead from transistor notations. The P-type connection is
known as the "Emitter," while the two N-type connections are designated "Base 1" and "Base
2." For this reason, the device is sometimes called a "double-base diode."
The schematic symbol for the UJT.
In use, an appropriate bias voltage is applied between the two bases, with B2 made
positive with respect to B1. Because the N-type bar is resistive, a relatively small current will
flow through it, and the applied voltage will be distributed evenly along its length. If we start
with the Emitter grounded, the junction will be reverse biased and there will be no emitter
current. As the emitter voltage increases, there is no change until the junction suddenly
becomes forward biased.
At this point, the emitter injects holes into the silicon bar, greatly reducing the
effective resistance of the bar between E and B1. This will lower the emitter voltage required
to keep the junction forward biased, and will sustain a heavy emitter current. This condition
will continue as long as the circuit connected to the emitter can sustain the heavier current
flow. The UJT thus behaves like a variation of the SCR, as suggested by the equivalent
circuit shown to the right.
The unijunction transistor(UJT) is a three terminal device with characteristics very

different from the conventional 2 junction, bipolar transistor. It is a pulse generator with the
trigger or control signal applied at the emitter . This trigger voltage is a fraction (n) of
interbase voltage, Vbb.The UJT circuit symbol, junction schematic, and characteristic curve
are shown below.
The emitter terminal does not inject current into the base region until its voltage
reaches Vp. Once Vp is reached the base circuit conducts and a postive pulse appears at the
B1 terminal and a negative pulse at B2. The UJT incorporates a negative resistance region, a
low emitter current, and a high output pulse current at terminals B1 and B2, making it an
ideal pulse trigger. A simple RC timer circuit using a UJT is shown below.
The very basic specifications of a UJT are:
Vbb(max) - The maximum interbase voltage that can be applied to the UJT
(b) Rbb-the interbase resistance of the UJT
(c) n - The intrinsic standoff ratio which defines Vp.
(d) Ip - The peakpoint emitter current
8. Draw the basic structure of an SCR and the common circuit symbol
The SILICON CONTROLLED RECTIFIER, usually referred to as an SCR, is one of

the families of semiconductors that include transistors and diodes. A drawing of an SCR and
its schematic representation is shown in views A and B of figure given below. Not all SCRs
use the casing shown, but this is typical of most of the high-power units.
Figure B. - Silicon controlled rectifier.
Although it is not the same as either a diode or a transistor, the SCR combines features of
both.
The basic purpose of the SCR is to function as a switch that can turn on or off small
or large amounts of power. It performs this function with no moving parts that wear out and
no points that require replacing. There can be a tremendous power gain in the SCR; in some
units a very small triggering current is able to switch several hundred amperes without
exceeding its rated abilities.
The SCR is an extremely fast switch. It is difficult to cycle a mechanical switch

several hundred times a minute; yet, some SCRs can be switched 25,000 times a second. It
takes just microseconds (millionths of a second) to turn on or off these units. Varying the
time that a switch is on as compared to the time that it is off regulates the amount of power
flowing through the switch. Since most devices can operate on pulses of power (alternating
current is a special form of alternating positive and negative pulse), the SCR can be used
readily in control applications. Motor-speed controllers, inverters, remote switching units,
controlled rectifiers, circuit overload protectors, latching relays, and computer logic circuits
all use the SCR.
The SCR is made up of four layers of semiconductor material arranged PNPN. The
construction is shown in view figure A. In function, the SCR has much in common with a
diode, but the theory of operation of the SCR is best explained in terms of transistors.
Figure - SCR structure.
The rectifier circuit (anode-cathode) has a low forward resistance and a high reverse
resistance. It is controlled from an off state (high resistance) to the on state (low resistance)
by a signal applied to the third terminal, the gate. Once it is turned on it remains on even after
removal of the gate signal, as long as a minimum current, the holding current, Ih, is
maintained in the main or rectifier circuit. To turn off an SCR the anode-cathode current must
be reduced to less than the holding current, Ih. The characteristic curve is as shown below.
Notice the reverse characteristics are the same as discussed previously for the rectifier
or diode, having a break over voltage with its attending avalanche current; and a leakage
current for voltages less than the break over voltage. However, in the forward direction with
open gate, the SCR remains essentially in an off condition (notice though that there is a small
forward leakage) up until the forward break over voltage is reached. At that point the curve
snaps back to a typical forward rectifier characteristic. The application of a small forward
gate voltage switches the SCR onto its standard diode forward characteristic for voltages less
than the forward break over voltage.
Obviously, the SCR can also be switched by exceeding the forward break over
voltage, however this is usually considered a design limitation and switching is normally
controlled with a gate voltage. One serious limitation of the SCR is the rate of rise of voltage
with respect to time, dV/dt. A large rate of rise of circuit voltage can trigger an SCR into
conduction. This is a circuit design concern. Most SCR applications are in power switching,
phase control, chopper, and inverter circuits.
9. What is meant by regulation?
The output of most power supplies should be a constant voltage. Unfortunately, this is
difficult to achieve. There are two factors that can cause the output voltage to change.
• Change in AC Line Voltage
• Change in Load Resistance
First, the ac line voltage is not constant. The so-called 46 volts ac can vary from about
36 volts ac to 56 volts ac. This means that the peak ac voltage to which the rectifier responds
can vary from about 40 volts to 50 volts. The ac line voltage alone can be responsible for
nearly a 20 percent change in the dc output voltage.
The second factor that can change the dc output voltage is a change in the load
resistance. In complex electronic equipment, the load can change as circuits are switched in
and out. In a television receiver, the load on a particular power supply may depend on the
brightness of the screen, the control settings, or even the channel selected. These variations in
load resistance tend to change the applied dc voltage because the power supply has a fixed
internal resistance. If the load resistance decreases, the internal resistance of the power supply
drops more voltage. This causes a decrease in the voltage across the load.
Many circuits are designed to operate with a particular supply voltage. When the
supply voltage changes, the operation of the circuit may be adversely affected. Consequently,
some types of equipment must have power supplies that produce the same output voltage
regardless of changes in the load resistance or changes in the ac line voltage. This constant
output voltage may be achieved by adding a circuit called the VOLTAGE REGULATOR at
the output of the filter. There are many different types of regulators in use today.
10. Explain the working of LEDs
OPTOELECTRONIC devices either produce light or use light in their operation. The first of
these, the light-emitting diode (LED), was developed to replace the fragile, short-life
incandescent light bulbs used to indicate on/off conditions on panels. A LIGHT-EMITTING
DIODE is a diode which, when forward biased, produces visible light. The light may be red,
green, or amber, depending upon the material used to make the diode. Figure shows an LED
and its schematic symbol. The LED is designated by a standard diode symbol with two
arrows pointing away from the cathode. The arrows indicate light leaving the diode. The
circuit symbols for all optoelectronic devices have arrows pointing either toward them, if they
use light, or away from them, if they produce light. The LED operating voltage is small, about 1.6
volts forward bias and generally about 10 mill amperes. The life expectancy of the LED is
very long, over 100,000 hours of operation.
Figure : LED.
The atomic structure of the LED is carefully designed so that as free electrons cross
the junction from the N-type side to the P-type side, the amount of energy each electron
releases as it drops into a nearby hole corresponds to the energy of a photon of some
particular color. Therefore, that photon is released as a visible photon of that color.
Gallium Arsenide (GaAs) crystal has the interesting property of radiating significant
amounts of infrared radiation from the junction. By adding Phosphorus to the equation, they
shortened the wavelength of the emitted radiation until it became visible red light. Further
refinements have given yellow and green LEDs. More recently, blue LEDs have been
produced, by putting nitrogen into the crystal structure. This makes full-color flat-screen LED
displays possible.
LEDs are used widely as "power on" indicators of current and as displays for pocket
calculators, digital voltmeters, frequency counters, etc. For use in calculators and similar
devices, LEDs are typically placed together in seven-segment displays.
11. Explain the working of a photo – transistor with a sketch
A second optoelectronic device that conducts current when exposed to light is the
PHOTOTRANSISTOR. A phototransistor, however, is much more sensitive to light and
produces more output current for a given light intensity that does a photodiode. Figure given
below shows one type of phototransistor, which is made by placing a photodiode in the base
circuit of an NPN transistor. Light falling on the photodiode changes the base current of the
transistor, causing the collector current to be amplified. Phototransistors may also be of the
PNP type, with the photodiode placed in the base-collector circuit.
Figure : Photo Transistor
Figure - Phototransistor.
Figure shown below illustrates the schematic symbols for the various types of
phototransistors. Phototransistors may be of the two-terminal type, in which the light
intensity on the photodiode alone determines the amount of conduction. They may also be of
the three-terminal type, which have an added base lead that allows an electrical bias to be
applied to the base. The bias allows an optimum transistor conduction level, and thus
compensates for ambient (normal room) light intensity.

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S O LI D S T A TE E L E CT R O N I CS

MODULE - I Students of S3 – IT & CS (2004)

..:: QUESTION BANK ::..

Division of Computing Sciences

Division of Computing Sciences

1. What is meant by thermal runaway in a transistor? Explain.

ICEO = (1+B) ICBO.

In practice, thermal runaway is prevented by the use of stabilization circuitry. For

For maximum efficiency the heat sink should

1. Be in good thermal contact with the transistor case.

Solid State Electronics Question Bank for Third Semester CS & IT 3

VB=R2/ (R1+R2) * VCC

The voltage across the emitter resistor RE

Then the emitter current is

Since collector current is approximately equal to emitter current

4. A transistor in a fixed bias amplifier circuit was replaced by another transistor of

The collector current becomes

Solid State Electronics Question Bank for Third Semester CS & IT 4

5. What are the advantages and disadvantages of a R-C coupled amplifier.

6. What are the applications of a R-C coupled amplifier.

7. Give an account on the operation of the R-C coupled amplifier.

8. Write a short note on the frequency response of a R-C coupled amplifier.

Solid State Electronics Question Bank for Third Semester CS & IT 6

9. What are the different types of coupling in amplifiers?

The coupling between stages of amplifications may also be used to classify

Direct-coupled Amplifiers : The following figure shows a direct-coupled amplifier

Figure : Direct coupled amplifiers

Resistance-capacitance (RC)-coupled Amplifiers : The following figure illustrates the

Solid State Electronics Question Bank for Third Semester CS & IT 7

Figure : RC-coupled Amplifier.

Impedance-coupled Amplifiers : The figure shows how an impedance-coupled circuit

Figure : Impedance-coupled Amplifier.

Transformer-coupled Amplifiers : The figure illustrates another type of coupling often

Solid State Electronics Question Bank for Third Semester CS & IT 8

10. What is meant by amplification?

• Voltage Amplifier - an amp that boosts the voltage of an input signal

P=VxI (where I = current, note that the symbol changes in a formula)

Output Impedance : The output impedance of an amplifier is a measure of the impedance or

Solid State Electronics Question Bank for Third Semester CS & IT 9

11. Give applications of emitter follower

The emitter follower has the following principal applications:

1. To provide current amplification with no voltage gain

Solid State Electronics Question Bank for Third Semester CS & IT 10

voltage across R2,

voltage across RE,

13. For the emitter follower circuit, find input impedance

voltage across R2,

voltage across RE,

effective external emitter resistance,

Zin(base) (r'e +R'E )

input impedence of the emitter follower

Zout= r'e + R'in

16. Explain about ‘Darlington Amplifier’?

DARLINGTON AMPLIFIER : A CC stage followed by another CC stage has an input

Solid State Electronics Question Bank for Third Semester CS & IT 14

17. Briefly discuss about ‘Cascaded Amplifier’ using a diagram?

By cascading a CE stage followed by an emitter-follower (CC) stage, a good voltage

18. Explain about ‘Emitter Follower’?

Solving these equations, we can get, IB, IE and VCC.

Solid State Electronics Question Bank for Third Semester CS & IT 16

AC small-signal equivalent circuit:

We assume and therefore can be ignored, and have

As , is smaller than but approximately equal to