IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. IA-16, NO.

4, JULY/AUGUST 1980 513

Farhad Nozari (S'74-M'76) was born in Arak,
Iran, on February 4, 1945. He received the
B.S.E.E. degree from the University of Teheran
in 1967, the M.S.E.E. degree from the Uni-
versity of Southern California, Los Angeles, in
1971, and the Ph.D. degree from Purdue Uni-
versity, Lafayette, IN, in 1976.
He has had about five years experience in
design of power distribution systems and more
than eight years research experience in different
aspects of power system. He has been on the
faculties of the University of Michigan and Purdue University, was a
Research Assistant at the University of Southern California and Purdue,
and was a Design Engineer in several consulting firms in California and
Iran. He is presently an Application Engineer in the Electric Utility
System Engineering Department, General Electric Company, being in-
volved in projects concerning applications of dc transmission and static
var systems. His areas of interest include modeling and analysis of power
system components, development of new mathematical software, and
modern control theory.
Dr. Nozari is a member of IEEE Power Engineering Society, the IEEE
Control System Society, and the Scientific Research Society of Sigma Xi.

Selection of Snubbers and Clamps to Optimize the Design

of Transistor Switching Converters
WILLIAM McMURRAY, FELLOW, IEEE

Abstract-In power transistor switching circuits, shunt snubbers R

(dv/dt limiting capacitors) are often used to reduce the turn-off

switching loss or prevent reverse-biased second breakdown. Simi- ~E'
larly, series snubbers (di/dt limiting inductors) are used to reduce the
S ONN COFF
turn-on switching loss or prevent forward-biased second breakdown. e i
In both cases energy is stored in the reactive element of the snubber (a) tq Ii
and is dissipated during its discharge. If the circuit includes a
transformer, a voltage clamp across the transistor may be needed to 0
absorb the energy trapped in the leakage inductance. The action of |TURN
ON
TURN
OFF
these typical snubber and clamp arrangements is analyzed and
applied to optimize the design of a flyback converter used as a battery (b) It E
charger.
Fig. 1. Transistor switching a resistive load (a) Linear rise and fall.
(b) Exponential rise and fall. (The shaded areas represent the switch-
TRANSISTOR SWITCHING A RESISTIVE LOAD ing losses.)
THIS SIMPLE CASE is reviewed to establish a baseline Transistor current:
for the further analysis of switching behavior and to show
that an effective switching time can be defined in terms of the E-e t
switching loss. The circuit and switching waveforms are shown i= =I -,
in Fig. 1, with two alternative ideal switching characteristics R ts
postulated for the transistor. In Fig. 1(a) the voltage is assumed where
to fall linearly during turn-on, and the current is assumed to
fall linearly during turn-off. The circuit equations in the turn- E
J= -.
on interval are as follows. R
Transistor voltage (assumed): Transistor power dissipation:
e=E I -J for 0< t <t'
ts/ p = ei = EI-1
Paper SPCC 79-27, approved by the Static Power Converter Com-
mittee of the IEEE Industry Applications Society for presentation at Total turn-on switching loss:
the 1979 Power Electronics Specialists Conference, San Diego, CA,
June 19-21. This work was supported in part by the Department of
Energy, Washington DC, under contract DE-AC03-79CS51294 for
I
W= EIt
ftspdt=-. (1)
Phase II of the Near-Term Electric Vehicle Program. Manuscript released o 6
for publication April 9, 1980.
The author is with the General Electric Company, Corporate Re-
search and Development, P. O. Box 43, Schenectady, NY 12301. During turn-off the time-dependent factors in the voltage
0093-9994/80/0700-0513$00.75 © 1980 IEEE
 514 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. IA-16, NO. 4, JULY/AUGUST 1980

and current equations are interchanged, but they result in ts

the same expressions for the power dissipation and total turn-
off loss, though switching time t, will generally be different.
If the transistor is assumed to switch exponentially withi a
time constant T, as shown in Fig. 1(b), then the turn-on equa- 09E
tions become the following.
Transistor voltage (assumed): O)I E
.,- Is,
t 17r
e E exp (
Fig. 2. Haversine switching characteristic and linear equivalent.

Transistor current: simnilar results for

i-I [1-exp QI)] I + cos 7Tr \

e=E(\- t±sm)
\ 2 /
Total turn-on switching loss:
Elt7T EIt '
W =
8
=
4.72 (5)
W= f eidt= El (2)
0 ' where
Again, the turn-off loss calculation will result in the same func-
tion (2), but the value of the time constant will generally be ts -sin- (0.8)t,.
different.
It can be seen from (1) and (2) that linear switching behav-
ior will produce the same total loss as exponential behavior Since analysis is simplified by assuming a linear switching char-
if tS = 3r. For purposes of specification, the switching time of acteristic, it is more convenient to define an equivalent linear
a transistor is conventionally defined as the interval between
switching time ts 1.25 tSa, as indicated in Fig. 2, such that
the resistive load switching loss is given by (1).
the 90 and 10 percent points of the voltage or current range.
With linear switching, this interval tI is
TRANSISTOR SWITCHING AN INDUCTIVE LOAD
ts = 0.8 tS, The three basic types of dc/dc converter (buck, boost
and buck/boost) are drawn in Fig. 3 in a manner to elnplhas-
and the loss equation (1) can be written ize that they are essentially equivalent in the switching duty
EIts' imposed on the transistor and the associated diode rectifier.
Consequently, the same approach can be used in the design
4.8 (3) of snubbers for any of these converter configurations. The
essential elements for switching analysis are shown in Fig. 4,
With exponential switching including typical shunt and series snubbers [11. The dc filter
choke Ld acts as a source of current I, at least during the
/ 0.9\ switching interval, if we assumiie the continuous-current mode
t T'rlog of operation. An effective voltage source E appears across the
series string comprising the transistor, diode, and di/dt induct-
ance. Alternative connections of the snubbers that do not
and (2) can be written alter thieir effective operation are possible. For example, the
capacitor may be connected to the positive pole of the voltage
EIts' source, and the transistor terminal of the inductance may
4.4 connect to the current soLurce, as indicated by dashed lines in
Fig. 5.
This conventional definition of switching time is adop- It should be noted that the snubber designed to reduce the
ted, because transistor switching characteristics do not gen- transistor duty during one type of switching tends to increase
erally follow an ideal curve. However, as seen in (3) and (4), the duty during switching of the opposite type. That is, dis-
it can be used in a formula for estimating the switching loss charge of the shunt capacitor increases the turn-on current,
that depends little on the shape of the curve. As a further and disclharge of the series inductor increases the turn-off
example, an assumed haversine characteristic, Fig. 2, yields voltage. These undesirable effects can be mnitigated by associat-
McMURRAY: SNUBBERS AND CLAMPS FOR CONVERTERS 515

r-- e- E2
~
(a)~~
E, T -
0D 5 Ld

I
E R L

(b) E29 E -E 2 E
Fig. 5. Snubbers with common discharge resistor and diode. (Dashed
lines indicate alternative connections.)

f---T 1 2 ~E2
(c) E -E1.E2

F ig. 3. The three basic types of dc/dc converters requiring the transis-
tor to switch inductive load. (a) Buck (voltage step down). (b) Boost
(voltage step up). (c) Buck/boost (voltage step up or step down).

TURN TURN
ON IOFF
Fig. 6. Voltage (solid lines) and current (dashed lines) waveforms for
transistor switching an inductive load. (a) No snubbers. (b) Small
snubbers. (c) "Normal" snubbers. (d) Large snubbers.
Fig. 4. Snubbers to assist transistor in switching an inductive load.
(Dashed lines indicate optional reactances associated with discharge switching time ts remains the same with the more severe
resistors.)
inductive duty, a condition which may not be true.
With the addition of snubbers, the effect of interaction
ing appropriate reactances with the discharge resistors, as indi- between the transistor device and the external circuit will be
cated in Fig. 4, in accordance with the principle of duality. If assumed to be as follows.
the turn-on and turn-off switching requirements are favorably
balanced, a common discharge arrangement can be used for * During turn-on, the voltage fall is a linear time function
both snubbers, as shown in Fig. 5. For the present simplified completely determined by the transistor characteristics,
analysis, it will be assumed that the shunt discharge impedance while the current rise is determined by the resulting action
is high and the series discharge impedance is low, so that their of the series snubber.
effects can be neglected. * During turn-off, the current fall is a linear time function
Ideal waveforms for a transistor switching an inductive load completely determined by the transistor characteristics,
are sketched in Fig. 6. The case with no snubbers is seen in while the voltage rise is determined by the resulting action
Fig. 6(a). During turn-on, the transistor is forced to switch of the shunt snubber.
from zero current to the full value I (time t, ) before its volt-
age can begin to fall from the full value E (time t2). Simi- This oversimplification of the transistor switching action is
larly, during turn-off, the voltage must complete its rise beforemade necessary by the lack of detailed knowledge regarding
the current can begin its fall. Assuming linear switching in all the differential equations governing the transient behavior of
instances, the general formula for switching loss W is seen to the device. The results to be derived must be regarded as
be merely qualitative. In particular, it is expected that the switch-
ing tirne ts should be a function of the snubber size and not
constant, as has been assumed.
EIts = With this idealization, the switching waveforms with small,
9(6)
2 normal, and large snubbers are sketched in Fig. 6(b), (c), and
(d), respectively. The voltage and current scales have been se-
where ts = t1 + t2 and may differ between turn-on and turn- lected so that E and I are represented by the same height,
off. Thus, the inductive load switching loss (6) is three times which emphasizes the duality between the behavior of the
the resistive load switching loss (1), assuming that the total series and shunt snubbers: the voltage waveform during turn-
516 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. IA-16, NO. 4, JULY/AUGUST 1980

off is similar in shape to the current waveform during turn-on. TABLE I

GENERAL SNUBBER EQUATIONS
A "normal" sized series snubber is defined to be that which
allows the transistor current to reach the level I at the same Turn-on Turn-off
time as the voltage reaches zero, as indicated in Fig. 6(c). A (Series snubber L) (Shunt snubber C)
"small" series snubber allows the current to rise faster, wllile Transistor action: e ( :t 1
t
a "large" snubber slows the current rise such that it reaches
e = 1- 1--.(7)
the full value I before or after, respectively, the time of zero
voltage. The size of a shunt snubber is similarly defined in
terms of the voltage rise time that it allows. Note that these Snubber action: f (t ) ft
terms are relative: "normality" pertains to particular values of
E, I and ts, and so it will change with operating conditions.
L Jo
E
e) dt C 0Zi dt
To again demonstrate the duality of turn-on and turn-off E {t t I t
action, the equations for the two cases are placed side-by-side -- f dt =-CJf -dt
L Jots ts
in Tables I-Ill. It may be noted that paired equations have the
same mathematical form. Et2 It2
The energy loss parameters (15)-(17), (24), and (25) rela- (8)
tive to the loss with no snubber (6) are plotted as functions of 2L ts 2CtS
the snubber size in Fig. 7. These results are similar to those of "Normal" snubber i I when t = ts e = E when t ts
Calkin and Hamilton [2]. It is seen that certain values of capac- definition: Et It
itance and inductance (26) will minimize the total switching Ln -

2I
22E (9)
(9)
losses, including losses in the transistor and the dissipation of
TABLE II
EQUATIONS FOR LARGE SNUBBERS

Turn-on Turn-off
(Series snubber L) (Shunt snubber C)
"Large" snubber definition: L > L, C > C,1.

At t = ts Ets It
i = Is - e = Es
2L 2C

L C (10)

Fort > tS di E de I
dt L dt C

Time tr to complete I-Is E-LS

commutation: tr -d
/ tr
dildt de/dt

=(_ t)s = (- I - (1

Total commutation
time tc ts +tr (L ) 2 (Cr ) t 12
t.
time = t~ + t,.
t+ (12)

Transistor power E2 / t t2 ( tst

2
I2
tSt
t2
dissipation, p ei
(O < t < ts): p \ t1t~p
I
- (13)
2L t ts2C tst
Peak power p Pm
when t/ts = 2/3:
2 E2ts 2 12 t
s
P -- p =
27 L 27 C
4 Ln 4 Cn El.
= * - *1tI = - * - *
27 L 27 C (14)
McMURRAY: SNUBBERS AND CLAMPS FOR CONVERTERS 51

TABLE 11 (Continued)
Turn-on Turn-off
(series snubber L) (series snubber C)

Transistor energy loss, E2t2 22

rts W= W=
W p dt 24L 24C
EIts Ln Elts Cn
12 L 12 C (15)

Energy Ws stored 2
in snubbers: LI CE2
2 S 2
EIts L EIts C
4 Ln 4 Cn (16)

Total Circuit Energy

WT= W+ Ws
WT
EIt5
-s
(
-
. +-
Ln IL\ WT
EIts(I Cn IC'
- _. + .
(7
(17)
2 6L 2 Ln 2 6 C 2 Cn

TABLE III
EQUATIONS FOR SMALL SNUBBERS

Turn-on Turn-off
(Series snubber L) (Shunt snubber C)
"Small" snubber definition: L <Ln C< Cn
At time tI (see Fig. 6(b)) put i = I in (8) left put e = E in (8) right.
Solve for tl: LIts CEt

tI-
i
LE IC
--Ln- t nll Cn (18)

Transistor power Equations (13) remain valid in range 0 < t < tl. If tl/ts > 2/3,
dissipation, p = ei: then (14) remains valid for the peak power Pm.
Transistor energy loss 2 3 4 2 3 4
up to time t1 ,E i ti 1 j ti4
rtj 2L 3ts 4ts2 2C 3ts 4ts2

J° [~~~~~~~~~~~~~~ ~ ~ 3 ts 4 (ts )2(9

Transistor power p = eI [e from (7) left p = Ei [i from (7) right

dissipation in range
t1 < t < ts/ t
= EI EI (I-) (20)

Peak power at t = tI
it tl/ts < 2/3:
PI= EI(1--) Pm = EJ (1 --

(EI vIE) = EI(

(21)
518 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. IA-16, NO. 4, JULY/AUGUST 1980

TABLE III (Continued)

Trurn-on Turn-oft
(Series snubber L) (Shunt snubber C)

Transistor energy loss

between t1 and ts, Wi2 SEI ( -
dt
ts
W2 = pdt:
p E Is ;:t 1
Il = _ 1- 1
(1
-
(22)

Total transistor energy

loss, W= WI + W2:
W _ _s[1-
1 ) + -(I)] (23)

Etts l 4 L EItsl 4 C I CX
IV =- I 1- + L_n) It, = - I1 +
2 Cn, ^ (24)
-
2\ 3 Ln 2 3 Cn
Total circuit energy
WT= W+ Ws: VIts( 4 / L EIts 7 4 / C\
_ +-_ (25)
2 3 L,n Ln
, T 3 c c,1
Condition for L 4 c 4
minimum energy WT: (26)
Ln 9 C,l 9

Minimum energy: 5 EItt

WIlT.
min (=2-
9 2 (27)

Distribution of I EIts
minimum energy (27): in the transistor W
3 2

2 EIts
in the snubber W., =---
9 2 (28)

SOF r~rv 1l erationi of second breakdown may make the peak transistor
power (14) or (21), shown by the dashed line in Fig. 7, a
1- t more imnportant criterion for snubber design.
TOTAL

SNUBBER DISCHARGE
SNUBBER
LOSS
The previously neglected effects of snubber discharge will
- TRANSISTOR
LOSS
now be investigated. For simplicity, only the case of relatively
0.1 f --
PEAK POWER
IN TRANSISTOR
large snubbers will be considered, such that the transistor has
005 Ll comipletely switched before the discharge begins. The circuit
01 0510 5.0 using a common discharge resistor and polarizing diode, Fig. 5,
SNUBBER SIZE -L OR C
Ln cn producing waveformns such as shown in Fig. 8, will be studied.
Fig. 7. Relative switching losses and peak transistor power dissipation After turn-on, the shunt snubber capacitor discharges via
as a function of snubber size. the transistor in the series C-R-L loop. Discharge begins when
the freewheeling or flyback diode D blocks, and the discharge
the energy stored in the snubbers. With this optimum snubber current io is superimposed over the load current I already
selection the transistor loss (28) is reduced to one third of its transferred to the transistor. Assuming the oscillatory case, the
value without snubbers (6), or the same as for the case of equations for the current io and the capacitor voltage ec are
resistive load (1), assuming that the total switching time E wo
remains the same for all conditions. Larger snubbers will fur- 10 = - exp (-at) sin (cot) (29)
ther reduce the transistor switching loss, but at the expense of X(?
a greater increase in the stored energy. However, it can be seen
in Fig. 7 that the total loss is relatively insensitive to variations (i0
e. = E- exp (-alt) cos (ct - ) (30)
in snubber size in the region near the minimiiumn. Also, cotnsid-
McMURRAY: SNUBBERS AND CLAMPS FOR CONVERTERS 519

where
e,~~~~~~4-
_

I R
xo = -' coo = a =-, (a)E I
C 2L 0
TURN ON TURN OFF
INDUCTOR CURRENT CAPACITOR VOLTAGE
C =f _sin1 j,, ^, ec
co
(b)
Dp CONDUCTS Dp BLOCKS
The peak discharge current is attained when cot = rr/2 - -, and
it has the value Fig. 8. Switching waveforms for circuit of Fig. 5, including discharge
of snubbers (drawn for R = \/TO). (a) Transistor voltage and cur-
E [a/7r\ rent. (b) Snubber voltage and current.
Imax = exp 2 (31)
and the duality is complete, as illustrated by waveforms in
The capacitor voltage reaches zero when cot = 7r/2 + k, at Fig. 8. By adjusting the parameters, reduced overvoltage can
which time the snubber polarizing diode Dp begins to con- be achieved at the expense of increased overcurrent, or vice
duct, and the remaining overcurrent in the L-R loop decays versa. If a satisfactory compromise cannot be found, then it
exponentially. would be better to separate the snubber discharge networks,
as in Fig. 4.
After turn-off, the series snubber inductor begins to dis- It may be desirable to improve the converter efficiency by
charge when the diode D conducts. The discharge voltage eo is recovering some of the energy trapped in the snubbers if
superimposed over the source voltage E already present across power involved becomes significant, as in high-power the
the transistor and shunt snubber capacitor. The discharge net- frequency high-
operation. For example, a secondary winding on the
work is the effectively parallel branches LIRIC. Again, assum- series inductor
can be connected to the voltage source via a
ing the oscillatory case, the equations for the voltage e0 and
polarizing diode. This will limit the level of the overvoltage,
the inductor current iL are
depending on the turns ratio, as well as discharge the inductive
energy into the source. Other arrangements can be made to
eo = IXo- exp (-at) sin cot (32) recover the shunt snubber energy partially[2] .

PARASITIC "SNUBBERS"
iL - exp (-at) cos (cot - 5), (33)
co
It has, so far, been assumed that the snubbers are lumped
where the parameters are the same as in (29) and (30), except reactances intentionally inserted in the circuit to improve the
switching loci of the power transistors. Some converter cir-
cuits, such as the buck/boost ("flyback") converter with
ae 1 transformer-coupled output, Fig. 9, include parasitic elements
2CR that have an effect on circuit operation similar to snubbers.
The leakage inductance of the transformer plus stray induct-
The peak discharge voltage is attained when wt = rr/2 - and
ance in the input and output loops is in the same path as a
has the value
series snubber. Unfortunately, the amount of leakage induct-
ance is generally much larger than the optimum value for di/dt
limiting and, being distributed, is inaccessible for connection
of the usual discharge resistor. Therefore, other means for lim-
iting the resulting high-voltage overshoot during turn-off are
The inductor current reaches zero when ct = 7r/2 + 0, at necessary.
which time the snubber polarizing diode Dp blocks, and the This voltage spike can be suppressed by increasing the shunt
remaining overvoltage in the C-R source loop decays expo- snubber capacitance, but its discharge loss may become exces-
nentially. sive. Alternatively, the transistor voltage can be clamped to a
The duality of the equations describing the two types of predetermined level by connecting its collector to a voltage
discharge is apparent. If the common discharge resistor is selec- sink Vk via a diode, as shown in Fig. 9. If a voltage source of
ted to have the value R = XO, then the damping factor a will suitable value (Vk > E) is available, this method is simple and
be the same in both cases, 0 = 300, and the exponential term loss free. Another simple, but lossy, method is to connect an
in (3 1) and (34) has the value 0.546. Furthermore, if the tran- avalanche or Zener diode across the transistor. Generally an
sistor turn-off time is equal to its turn-on time and the snub- artificial voltage sink must be created, consisting of a capacitor
bers are equally sized (relative to "normal"), then and discharge resistor, which must dissipate the energy trapped
in the leakage inductance plus additional losses required to
L LC maintain the voltage level of the clamp. An analysis in the next
E ,,n E
section yields a criterion for the conditions under which use of
C I Ln c ts, off I'(5 such a clamp is more efficient than a large shunt snubber.
52410 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. IA-16, NO. 4, JULY/AUGUST 1980

WINDING OUJTPUT
CAPACITANCE
LEAKAGE
INDUCTANCE
STRAY
CURRENT INDUCTANCE
CLAMP $ $ I- 1
TRANSFORMER
VOLTAGE INPUT
CLAMP T Vk T
e
Fig. 9. Transformer-coupled flyback converter showing parasitic ele-
ments, with ideal clamps to limit their effect on the transistor. V0

The dual of transformer leakage inductance is its distributed

winding capacitance, which becomes significant in a converter tk,
having a high-voltage step-up ratio [3]. Such parasitic capaci- (b)
tance is equivalent to a large shunt snubber but is inaccessible Operation of voltage clamp. (a) Equivalent circuit. (b) Wave-
Fig. 10.
for connection of the usual discharge resistor and so can result forms during clamping interval, where shaded area represents charge
in a high current pulse during turn-on. In this case, the use of a fed into clamp.
current clamping arrangement would be appropriate. The dual
of an ideal voltage clamp would be a current source Ik across a
D E
diode in series with the transistor, as indicated in Fig. 9. A Rd

more practical version for transient clamping would be an Cd N2~~~~~~~~E

ampere-turn biased reactor designed to unsaturate when the N5
transistor current attempts to exceed 'k.
VOLTAGE CLAMPS 0 E

The equivalent circuit for analyzing the action of a voltage SHUNT VOLTAGE
clamp in discharging an effective series snubber inductance L ISNUBBER I L
CLAMP j
is depicted in Fig. 10(a). Waveforms during the clamping inter-
11. Transformer-coupled flyback converter for charging accessory
val are sketched in Fig. 10(b), assuming that the transistor Fig. battery, including a shunt snubber and a voltage clamp.
turns off rapidly and no shunt snubber is required. When the
transistor turns off its voltage rises to the clamp level Vk, both
tance Ck should be large enough to absorb the charge delivered
flyback diode D and clamp diode Dk conduct, and the induct- during. the clamping interval with little rise in voltage, but its
ance discharges against the difference between Vk and the
value is otherwise not critical. The negative terminal of the
effective source voltage E. The inductor current falls linearly capacitor should be connected to the emitter of the transistor
from its initial value I to zero in a time tk, as given by that it protects, thereby minimizing the loop inductance
di Vk-E through diode Dk. The resistance Rk is selected to maintain
the voltage Vk at a safe level for the transistor under the worst-
dt L case operating conditions. A design criterion can be obtained
LI by equating the average current input to Ck via Dk to the aver-
tk = E (36) age current output from Ck via Rk. Neglecting the effect of
Vk - the shunt snubber in Fig. 11, the input to the clamp is similar
to Fig. 1O(b). At an operating frequency f, the current balance
The energy Wk absorbed by the clamp is equal to the charge condition is
delivered in this interval times the voltage
Wk - 1 Itk Vk 2 Itkf= Rk

I1 L2 Vk (37)
2 Vkk-E which yields
Note that if the voltage sink Vk can be replaced by a sink 2(Vk -E )(Vk -E)
kR =--LI2f
V0 = Vk-E, located as shown by dashed lines in Fig. 10(a),
(38)
then only the trapped inductive energy LI2 /2 is involved, and
the sink loss is a minimum. Thus, the dissipative element of an For worst-case design, the maximum values of E1, E, I, and f
artificial voltage sink should be connected from the cathode of should be substituted in (38). In particular, I should include
diode Dk to the level E, or as close to that voltage as possible. the peak ripple.
In a transformer-isolated flyback converter, Fig. 11, a volt- In the circuit of Fig. 11,
age of level E is not available, so the clamp discharge resistor
Rk is connected to the source voltage E1. The clamp capaci- E= El +E2',
McMURRAY: SNUBBERS AND CLAMPS FOR CONVERTERS 521

where E2' is the output voltage E2 referred to the primary side

of the transformer
N1
(a) I Vk
EI+ E2
.T
E2 = - E2.
_

N2 H t5 to - tk -
tb

The transient overvoltage VO on the transistor, above the (b)

I
i
SNUBBER-
OVERCHARGE
SNUBBER
steady "off' level E, is '' ''T 'f '\' '-
' ~\\ q
CHARGE INTO CLAMP

VO= Vk -E. Fig. 12. Waveforms following transistor turn-off, illustrating action of
voltage clamp combined with relatively large shunt snubber. (a)
Transistor voltage and current. (b) Current in equivalent inductance
The power dissipation Pk in the resistor Rk is given by of parasitic elements in series with transistor, where shaded areas
represent charge absorbed by capacitors.
Pk =
(k -E )2 L2f
Vk -E,
Rk 2 Vk -E during interval tb after clamping. Equation (39) for the power
in the clamp resistor Rk is modified to become
LI2f (1 +E2
)
I
=
(39) p (Vo +E 1)2 = l (LI2-CV2)f Vo2
VO Pk
Rk i V0
(42)
This may be compared with the loss incurred by a shunt
snubber designed to limit the overvoltage to the same value This leads to the following equation for the overvoltage V0 in
V,. In this case, there is little damping during the voltage rise, terms of fixed parameters and operating conditions
so that
=(E2 )2 + 2LI2fRk -E2'
2 +fCRk
(43)
Vo = INfL ,
and the required value of snubber capacitance is DESIGN OF FLYBACK CONVERTER FOR
BATTERY CHARGER
The principles developed in the previous sections were
C=L (-) applied to optimize the design of a transformer-coupled
flyback converter, Fig. 11, used to charge the accessory
battery in an electric automobile being built by General
Then, the total snubber power loss Pc, which will be dissipated
in its discharge resistor R, is given by
Electric for the U.S. Department of Energy. The source
El is the main propulsion battery of the vehicle, which varies
over the range 60-160 V, depending on its state of charge. The
p= (LI2 +CE2
load E2 is the 12 V (nominal) battery used to supply the acces-
sory electrical equipment on the automobile. A maximum out-
LI2f [l +( )] (40) put current of 36 A is required. Considering the state of charge
of the accessory battery and temperature extremes, the output
A voltage clamp will be more efficient than a shunt snubber in voltage can vary over the range 13.5-15.3 V.
limiting the overvoltage if Pk < PC, or if Operation of the converter, neglecting the nonideal switch-
ing transients previously discussed, is illustrated in Fig. 13 for
E2 two values of input voltage but approximately the same out-
vo <,
E2
put, conditions typical of the present application. The transis-
tor and diode conduction times TQ and TD, respectively, have
a constant sum of 50 ps at the selected operating frequency 20
kHz. Balance of the transformer flux-linkage excursions in
( E2')(1 steady-state operation requires that
It can be seen from (41) that a clamp will be more efficient E1TQ =E2TD (44)
unless the transistor is rated to withstand very high overvoltage
transients. However, it is desirable to include a shunt snubber The control circuit regulates the output voltage and current by
sized to reduce the turn-off switching loss, as previously dem- adjusting the transistor conduction time. The power P con-
onstrated. With the combination of a voltage clamp and shunt trolled by the converter can be written in the following alter-
snubber, the waveforms during discharge of the series induct- native forms, neglecting losses,
ance become as shown in Fig. 12. The shunt capacitor absorbs
1TDI
energy CVJ2/2 from the inductantance during the interval ta T E1TQI
= + E2
TQ E1E2,
T45+I
prior to clamping, which energy is dissipated in resistor R TQ+TD TQ±TD E1±E2'()
522 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. IA-16, NO. 4, JULY/AUGUST 1980

TABS SOLDERED TOGETHER

O
L-- I START FINISH
(a) 1TO To (a)
0o6h

~F4I
0

0 (b) (c)
(b) To TD- Fig. 14. Transformer construction for low leakage inductance. (a)

0
I~ i1 Secondary winding, unwound, viewed from outside. (b) One coiled
layer of secondary winding. (c) Dimensions of double-E ferrite core.
Fig. 13. Ideal waveforms in a flyback converter in heavy current mode
neglecting details of switching transients. (Heavy solid lines in-
where Ip and Iv are the peak and valley values of current, re-
dicate transistor voltage and current, and heavy dashed lines indicate
spectively, as indicated in Fig. 13. Note that in the previous
output diode current, referred to input side of transformer.) (a)
High input voltage. (b) Low input voltage. sections, the peak current Ip should be used in equations per-
taining to turn-off, while lv prevails at turn-on. While a small
The approximate power rating required in the transistor, value of Lm, such that Iv = 0 and Ip-=2I, will minimize the
defined as the product of its "off" voltage and "on" current, transformer size, it will increase the duty of the transistor,
neglecting switching transients, is given in terms of the power shunt snubber,; and voltage clamp. Thus a compromise is neces-
Pby sary, and Lm 300 pH was selected in the present design.
The leakage inductance L of the transformer should be as
small as possible to minimize the trapped energy during turn-
off and the consequent losses, mainly in the voltage clamp
EI = (El E2 )2 p= ( P (46) according to (42). To achieve the desired high efficiency for
EIE2 _2 the converter, special coil winding techniques were necessary,
El including interleaving of the primary and secondary windings.
The primary winding, of 0.25-in wide copper braid, consists of
This has a minimum value of 4 P when E2' = E1 and increases four layers having nine turns each.
to 4.5 P when E2'/E1 = 2 or 1/2. It can be seen that the tran- One-turn sections of the secondary conductor, cut from
sistor rating EI will be minimized for operation over a range of copper sheet 0.02 -in
thick, are wrapped over each layer of the
input and output voltages if one extreme value of the ratio primary winding before continuing with the next primary
E2'/E1 is made of equal to the reciprocal of the other extreme layer, with 0.01-in thick insulation between layers. Start and
value as follows: finish tabs projecting from each of the four secondary sections
outside the body of the coil are soldered to connect the sec-
E't2,max = Ei,max tions in series. To aid in visualizing this construction, the sec-
L ,min t;2,min ondary winding would appear as sketched in Fig. 14 if un-
wound. The completed coil was placed on the center leg of a
This implies that the transformer turns ratio should be made double-E ferrite
equal to the geometric mean voltage ratio core, with air gaps to obtain the desired value
of LM,. With this construction a leakage inductance L t
3.6 pH was achieved, referred to the primary winding. Stray
N, i,min E1 max inductance in the input and output loops increased the total
N2 E2min E2,max parasitic inductance to about S ,H.
Other components of the converter are as follows:
In the present instance, (47) yields
Transistor: Motorola MJI0005 (400 V, 20 A).
N1 60X 160 Output diode: TRW SD-51 Schottky (35 V, 60 A).
=6.82. Snubber and clamp diodes: GE Al 1 5M (600 V, 5 A,
N2 13.5X 15.3 fast recovery).
Of course, the actual value must be ratio of integers and may
a
Output filter capacitor: five Sprague 604D103G016JT6
need adjustment to match the capability of available transis- (50 000 pF total, 16 Vdc).
tors. A turns ratio of 36/4 was selected.
Shunt snubber: C = 0.022 gF, 600 V; R = 100 Qi, 25 W.
The transformer magnetizing inductance Lm is the param- Voltage clamp: Ck = I pF, 600 V; Rk = 1500 Q, 50 W.

eter that limits the current ripple according to Diode snubber: Cd = 0.22 pF, 50 V; Rd I Q, 10 W,
noninductive.
E TQE21TD
I EIF2' The shunt snubber and voltage clamp were designed according
Ip IV = Q~-
(48)
Lm Lm E1 E2' fLm' to the theory presented here, while the diode snubber design
VcMURRAY: SNUBBERS AND CLAMPS FOR CONVERTERS
Fig. 15. Typical oscillogram of transistor current and voltage.
Upper trace: current, 5 A/division.
Lower trace: voltage, 100 V/division.
Time: 10ps/division.
Input voltage: 60 V.
Output current: 13 A.
Note the 300-V 3,us clamping interval following turn-off.
follows the principles presented in [4]. An ordinary induc-
tively wound resistor is best for discharging the shunt snubber,
but the diode snubber resistor should be noninductively wound.
Typical oscillograms of the transistor current and voltage are
presented in Fig. 15.
CONCLUSION
The basic action of typical shunt and series snubber config-
urations has been reviewed in a manner to emphasize the dual-
ity of their behavior; that is, the equations have the same
mathematical form, but voltage and capacitance in the shunt
snubber are replaced by current and inductance, respectively,
in the series snubber. The results show that certain values of
snubber capacitance and inductance will minimize the total
switching losses, including losses in the transistor and the
eventual dissipation of energy stored in the snubbers. While
this conclusion is derived from a simplified analysis, assuming
that the transistors have a linear switching characteristic inde-
pendent of the snubber size, it remains qualitatively valid when
the snubbers have a significant effect on the transistor switch-
ing action.
To further advance the understanding of snubber action
and design optimization, an improved representation of the
dynamic behavior of switching power transistors is needed.
Some studies using relatively simple equivalent circuits to
model the transistor have been reported [5], [6]. A more
accurate model for switching dynamics will probably involve
nonlinear differential equations, perhaps simplified and par-
tially empirical, such as have been used for thyristors and
diodes 17]. These equations can be incorporated with the dif-
ferential equations for the external circuit, including snubbers,
in a computer program and solved numerically.
It may be noted that all the equations for transistor switch-
ing loss involve the switching time as a directly proportional
factor. If the switching time can be reduced sufficiently, such
523
as by operating high-speed devices in the nonsaturated conduc-
tion mode, then it is possible to reduce the switching loss to
such a low value that snubbers become unnecessary and very
high frequency (e.g., 500 kHz) operation can be achieved [8].
Under these conditions, distributed circuit impedances become
more significant and can act in a fashion similar to snubbers.
At lower frequencies, distributed impedances generally
associated with transformers can hinder efficient switching
action. Usually the transformer leakage inductance is most
critical, since it traps energy at the time of transistor turn-off.
An analysis of voltage clamps to absorb this energy without
excessive overvoltage on the transistor has been presented here,
and clamps are shown to be more efficient than large shunt
snubbers.
As an example of the application of these aids to transistor
switching performance, the design of a transformer-coupled
flyback converter for the accessory battery charger of an
electric vehicle has been outlined. Of particular interest is
the design of the transformer to minimize its leakage induct-
ance as well as selection of the turns ratio and magnetizing
inductance to optimize converter performance within the
constraints of the available power transistor and Schottky
diode devices. Both a shunt snubber and voltage clamp are
used to control the switching transients.
REFERENCES
[I] S. K. Rao and K. Bauman, "Design of buck type switched-mode
power supplies using non-ideal components," in Conf. Rec. Power
Electronics Specialists Conf., 1975, pp. 126-137.
[2] E. T. Calkin and B. H. Hamilton, "Circuit techniques for im-
proving the switching loci of transistor switches in switching
regulators,'' IEEE Trans. Ind. Appli., vol. IA-12, no. 4, pp. 364-
369, July/Aug. 1976.
[3] R. P. Massey and E. C. Snyder, "High voltage single-ended DC-
DC converter," in Conf. Rec. Power Electronics Specialists Conf.,
977, pp. 156-159.
[4] W. McMurray, "Optimum snubbers for power semiconductors,"
IEEE Trans. Ind. Appli., vol. IA-8, no. 5, pp. 593-600 Sept./Oct.
1972.
[5] D. D. Bahler, H. A. Owen, Jr., and T. G. Wilson, "Predicting
performance of power converters operating with switching fre-
quencies in the vicinity of 100 kHz," in Conf. Rec. Power
Electronics Specialists Conf., 1978, pp. 148-157.
[6] K. Harada, T. Ninomiya, and M. Kohno, "Optimum design of an
RC snubber for a switching regulator by means of the root locus
method," in Conf. Rec. Power Electronics Specialists Conf., pp.
158-167.
[7] 1. L. Somos and D. E. Piccone, "Temperature excursion in
thyristors due to short current pulses during forward conduction and
reverse recovery phase," in Conf. Rec. 1974 Ind. Appl. Soc.
Annual Meeting, Pt. 1, pp. 495-506.
[8] R. P. Severns, "High frequency switching regulator techniques,"
Conf. Rec. Power Electronics Specialists Conf., 1978, pp. 290-
298.
William McMurray (M'50-SM'60-F'80), for a biography and photo-
graph, please see page 5 of the January/February issue of this
TRANSACTIONS.