Yeditepe University

Department of Computer Engineering

CSE 323 - Computer Organization

Midterm 1
11th November 2020
(Open 1-page Help Sheet)

Q.1. (20 points). Computer A has 2GHz processor. Number of cycles for each instruction type is given in the table. Program P
with the following instruction mix is run on computer A. Answer the following questions. Show all calculations.

Number of Cycles per

Instruction type instructions in Instruction type instruction on
program P Computer A
Integer arithmetic 300,000 Integer arithmetic 2
Floating-point arithmetic 200,000 Floating-point arithmetic 4
Data transfer 400,000 Data transfer 3
Control transfer 100,000 Control transfer 1
Total 1,000,000

Answer the following questions. Show all calculations.

a. Calculate the cycle time of computer A.

b. Calculate the average CPI for computer A.

c. Calculate the execution time of program P on computer A. Give your result in milliseconds.

d. Calculate the MFLOPS rate of computer A for program P.

Q.2. (20 points) A computer has the following memory and cache characteristics:
- 1 GB main memory
- 256 KB cache
- The cache is 4-way set associative
- There are 16 words in a block
- Each word is 4 bytes

Answer the following questions. Show all calculations.

a. How many bits are there in a main memory address?

b. How many blocks are there in the main memory?

c. How many sets are there in the cache?

d. Show the tag, set and word fields of the memory addresses. How many bits are there in each field?
tag set word

Q.3. (20 points) A computer system has a level 1 cache (L1) and a level 2 cache (L2). For a given program with 1 million
instructions, L1 cache miss rate is 20% and L2 cache miss rate is 10%. Average instruction execution time is 20 ns. For the
misses, time to take a block from main memory into L2 cache is 300ns and time to take a block from L2 cache into L1 cache is
50ns.
Calculate the time to execute this program. Give your result in milliseconds. Show all calculations.
Q.4. (20 points) In a computer system, main memory addresses are 12 bits. The cache is two-way set associative with 4 sets. Tag,
set and word fields are as follows:
Tag Set Word
Main memory address 8 bits 2 bits 2 bits

Memory read/write operations are performed in the following order:

STORE 23AH
LOAD 34AH

For LOAD and STORE operations, assume that all memory locations between addresses 000-5FFH contain AAH and accumulator
contains CCH respectively.
For questions (a)-(c) following cache contents are given. Assume that write policy is write-back (with write allocate).
Replacement policy is least recently used (LRU).

Line 0 Line 1

Set tag Data Valid Update Set tag Data Valid Update
index bit bit index bit bit
40 A1
41 A2
0 00 42 1 1 0 42 A3 1 1
43 A4
44 A5
45 A6
1 EC 46 1 0 1 23 A7 1 0
47 A8
48 A9
49 B0
2 23 50 1 0 2 0E B1 1 0
51 B2
52
53
3 42 54 1 0 3 0 0
55

a. Write the tag set and word fields for STORE 23AH instruction. Where will it be placed in the cache? Is it a hit or a miss? Is
the main memory updated due to the write-back policy? Explain.

b. LOAD 34AH instruction is executed after STORE 23AH.

Write the tag set and word fields for LOAD 34AH instruction. Where will it be placed in the cache? Is it a hit or a miss? Is
the main memory updated due to the write-back policy? Explain.

c. What is the hit ratio?

Q.5. (20 points) A computer has a virtual memory system. The virtual address space has 4096 pages. Page size is 16 words. Main
memory has 8 page frames.

a. Draw the formats of the virtual address and the physical address, showing the page and offset fields. How many bits are there
in each field?

Logical address

Physical address

b. Current contents of the page table and TLB are given as follows. Virtual address 2E60 H is referenced. Is it a page hit or a page
fault? If it is a hit write its physical address in main memory. If it is a page fault, place it in the main memory, update the page
table and TLB, and write its physical address.

Page Table
Virtual memory Main memory TLB
page number page frame number Physical address
0AC 4 E60 2
E60 2 A1B 1
016 0 D3A 3
2D3 5 0AC 4
A1B 1
2E6 6
D3A 3