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TITLE : MV270FHM-N40
Preliminary Product Specification
Rev. P5
REVISION HISTORY
(●)preliminary specification
( )Final specification
Revision No. Page Description of changes Date Prepared
Rev.P0 Initial Release Nov.27.2017 Zhang Minghui
Update timing Freq. for
Rev.P1 14 Dec.22.2017 Zhang Shaofei
special resolution
Update Product Label Template
Rev.P2 23 Dec.29.2017 Wang Yaohui
And Product Serial Number
Add LVDS specification & Power
Rev.P3 16/20 Jan.5.2018 Zhang Shaofei
sequence note
Contents
LVDS
G1
Pair #1
Timing
Controller TFT-LCD Panel
LVDS
(1920×1080×RGB pixels)
CN1 Pair #2
(30pin)
G1080
RGB
mini- S1 S1920
+5V Power Circuit LVDS
Block Source Driver Circuit
VLCD
1.2 Features
1.3 Application
Note : 1) Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39 OC max. and no condensation of water.
(39,90)
100
90
Relative Humidity (%RH)
80
(50,50)
60
O p e ra tin g R a n g e
(60,30)
40
20
S to ra g e R a n g e
5
-2 0 0 20 40 60 80
T e m p e ra tu re (C̊ )
VIH=100mV,
Differential input common mode voltage Vcm 1.0 1.2 1.5
VIL=-100mV
Notes : 1. The supply voltage is measured and specified at the interface connector of LCM.
The current draw and power consumption specified is for VDD=5.0V, Frame rate=75Hz. Test Pattern of power
supply current
a) Typ : Color Bar pattern
b) Max : Vertical Subline pattern
Θ3 85 89 - Deg.
Horizontal
Θ9 85 89 - Deg.
Viewing Angle
CR > 10 Note 1
range
Θ12 85 89 - Deg.
Vertical
Θ6 85 89 - Deg.
Bx -
Blue
By -
Response
GTG Tg 14 20 ms Note 6
Time
Note :
1. Viewing angle is the angle at which the contrast ratio is greater than 10. The viewing are
determined for the horizontal or 3, 9 o’clock direction and the vertical or 6, 12 o’clock
direction with respect to the optical axis which is normal to the LCD surface.
2. Contrast measurements shall be made at viewing angle of = 0 and at the center of the LCD
surface. Luminance shall be measured with all pixels in the view field set first to white, then
to the dark (black) state. (See FIGURE 1 shown in Appendix) Luminance Contrast Ratio (CR)
is defined mathematically.
3. Center Luminance of white is defined as the LCD surface. Luminance shall be measured with
all pixels in the view field set first to white. This measurement shall be taken at the locations
shown in FIGURE 2 for a total of the measurements per display.
4. The White luminance uniformity on LCD surface is then expressed as :
ΔY = ( Minimum Luminance of 9points / Maximum Luminance of 9points ) * 100
(See FIGURE 2 shown in Appendix).
5. The color chromaticity coordinates specified in Table 5. shall be calculated from the spectral
data measured with all pixels first in red, green, blue and white. Measurements shall be made
at the center of the panel.
6. Response time Tg is the average time required for display transition by switching the input
signal as below table and is based on Frame rate fV =60Hz to optimize.
Each time in below table is defined as appendix Figure 3and shall be measured by switching
the input signal for “any level of gray(bright)”and “any level of gray(dark)”.
7. Cross-Talk of one area of the LCD surface by another shall be measured by comparing the
luminance (YA) of a 25mm diameter area, with all display pixels set to a gray level, to the
luminance (YB) of that same area when any adjacent area is driven dark. (See FIGURE 4
shown in Appendix).
R G B B G B R G B R G B
1 Pixel = 3 Dots
R G B
R G B R G B R G B R G B
Input spread
SSr -3 - +3 %
LVDS spectrum ratio
Receiver
clock Spread spectrum
modulation FSSM - - 300 kHz
frequency
Note 1 : 1). This DCLK range at last line of V-blanking should be set in 0~987.
2). The Vsync Frequency maximum can reach 77Hz when the resolution is applied @
1152*900, 1280*1024.
tRIP1
RXz +/- Rx3 Rx2 Rx1 Rx0 Rx6 Rx5 Rx4 Rx3 Rx2 Rx1 Rx0
* Z = 0, 1, 2,3
LVDS-
|VID |
LVDS+
VCM
VIN_Min VIN_Max
0V
|VID|=|(LVDS+)-(LVDS-)|
VCM={(LVDS+)+(LVDS-)}/2
H-Sync
Th
DE
R7 ~ R0
G7 ~ G0 Invalid Data x,1 x,2 x,y x,1080 Invalid Data x+1,1
B7 ~ B0
Th
Thd
MCLK
Tc
DE
RA7 ~RA0
GA7 ~GA0
BA7 ~BA0 D1 D2 Dn D1078 D1079 D1080 Invalid Data D1 D2 D3
Tch Tcl
2.0V
MCLK 1.5V
0.8V
Tds Tdh
2.0V
Data Valid Data
0.8V
Tes
DE 2.0V
8.0 INPUT SIGNALS, BASIC DISPLAY COLORS & GRAY SCALE OF COLORS
0.9VDD 0.9VDD
Power Supply 0.1VDD 0.1VDD
0V
T1
T3 T4
T2
T7
Valid
Interface Signal
0V
T5 T6
Back- light 0V
● 0.5 ms ≤ T1 10 ms
● 0 T2 50 ms
● 0 ≤ T3 50 ms
● 1 sec T4
● 200 ms T5
● 200 ms T6
Notes:
1. When the power supply VDD is 0V, keep the level of input signals on
the low or keep high impedance.
2. Do not keep the interface signal high impedance when power is on.
3. Back Light must be turn on after power for logic and interface signal are valid.
4. T7 decreases smoothly, there is none re-bouncing voltage.
5. The above power sequence should be satisfied at these case
-. DC power ON/OFF
-. Mode Change(Resolution, frequency, timing, sleep mode, color depth change etc.)
If not to follow power sequence, there is a risk of abnormal display.
6. If T3=0ms, there is a risk of flicker when power ON/OFF.
7. If T6=0ms, there is a risk of abnormal display when power off.
FIGURE 5 (located in Appendix) shows mechanical outlines for the model MV270FHM-N40.
Other parameters are shown in Table 8.
10.2 Mounting
The surface of the LCD has an anti-glare coating to minimize reflection and a coating to reduce
scratching.
There shall not be visible light from the back-lighting system around the edges of the screen as
seen from a distance 50cm from the screen with an overhead light level of 350lux.
Gravity 50G
Shock test
8 Pulse width 11msec, sine wave
(non-operating)
± X, ± Y, ± Z
Direction
Once for each
Air : 150 pF, 330Ω, 15 KV
9 Electro-static discharge test
Contact : 150 pF, 330Ω, 8 KV
1 2 3 4 5 6 7
X X X X X X X X X X X X X X X X X X
14.0 Packing
14.1 Packing Order
Put 1 EPO bottom in Put each module into a PE bag. Put 1 EPO cover in
to the inner box. Insert 7 Pcs MDL into each box. and seal the box.
Packing Box 7pcs/Box 687(L)× 289W)× 461(H) 23 with panel & cushion
MV270FHM-N40 7
0000000000000 20XX.X.XX
5940
15.0 APPENDIX
Figure 1. Measurement Set Up
(L = 50cm )
(D/4, W/4)
L31 YB(7D/8,W/2)
(3D/4, 3W/4)
(D, W) (D, W)
YA (7D/8,W/2)
L0
YB - YA
Cross-Talk (%) = × 100
YA