COURTNEY DZERE

M225084
2.1
HCS 224: ASSIGNMENT 1

QUESTION 1
a) Compare the CPU architectures:
I. CISC and RISC [5]

CISC (Complex Instruction Set Computer) RISC (Reduced Instruction Set

Computer)

Characteristics Instructions are complex and can perform Instructions are simple and can only
multiple operations in a single instruction perform a single operation in a single
instruction

Instructions are typically encoded in Instructions are typically encoded in

variable-length formats fixed-length formats

instructions are often optimized for code instructions are often optimized for
size, making them more compact execution speed, making them more
efficient

Code size More compact Less compact

Execution speed Less efficient More efficient

ii. von-Neumann and Harvard-Von Neumann Architecture. [5]

Von-Neumann architecture Harvard-Von Neumann

Architecture

Characteristics Memory is shared between Memory is separate for

instructions and data instructions and data

Instructions and data are Instructions and data are

fetched from memory using fetched from memory using

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 the same bus separate buses

This architecture is simple This architecture is more

and easy to implement complex than the Von
Neumann architecture, but
it can be more efficient

c) Write a program to sort an array of 10 numbers in ascending order.

[10]
Python
def sort array (array):
for i in range(len(array)):
for j in range(i + 1, len(array)):
if array[i] > array[j]:
array[i], array[j] = array[j], array[i]

array = [5, 2, 4, 1, 3,10,13,7,15,6]

sort array(array)
print(array)

QUESTION 2

a) Draw the detailed architecture of 8051 microcontroller. [5]

8051 Microcontroller

CPU (8-bit)

Program Memory (ROM)

(4KB)

Data Memory (RAM) (128

bytes)

2
 Serial Port

Timer/Counter 0

Timer/Counter 1

Interrupt Control

4 I/O Ports (8 bits each)

The 8051 microcontroller is an 8-bit microcontroller that was designed by Intel in 1981. It is
a Harvard architecture microcontroller, which means that it has separate memory spaces for
program memory (ROM) and data memory (RAM). The 8051 microcontroller has a CPU, 4KB
of ROM, 128 bytes of RAM, two 16-bit timer/counters, a serial port, an interrupt controller,
and four 8-bit I/O ports.

The CPU is the heart of the microcontroller. It is responsible for executing instructions,
fetching data from memory, and storing data to memory. The CPU has an 8-bit ALU
(arithmetic logic unit) and an 8-bit accumulator. The ALU is responsible for performing
arithmetic and logic operations, while the accumulator is a general-purpose register that can
be used to store data.

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The program memory (ROM) stores the instructions that the CPU executes. The data
memory (RAM) stores data that is used by the program. The serial port allows the
microcontroller to communicate with other devices. The timer/counters can be used to
generate time delays or count events. The interrupt controller allows the microcontroller to
respond to external events. The I/O ports allow the microcontroller to interact with the
outside world.

b) Explain subroutine CALL and RET instructions in 8085. [5]’

CALL Instruction
The CALL instruction is used to call a subroutine. A subroutine is a piece of code that can be
called from multiple places in a program. When a CALL instruction is executed, the steps
followed are:
The address of the next instruction after the CALL instruction is pushed onto the stack.
The address of the subroutine is then loaded into the program counter (PC).
The program execution begins at the subroutine.

RET Instruction
The RET instruction is used to return from a subroutine. When a RET instruction is executed,
the steps followed are:
The address of the instruction that was interrupted by the CALL instruction is popped from
the stack.
The popped address is then loaded into the program counter (PC).
The program execution continues at the instruction that was interrupted by the CALL
instruction.

c) Explain different types of registers in 8086 microprocessor architecture.

[10]

The 8086-microprocessor architecture utilizes various types of registers to facilitate data

storage, instruction execution, and system control. These registers play a crucial role in the
efficient operation of the microprocessor. The different types of registers in the 8086
architectures are:

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General-Purpose Registers:
General-purpose registers, also known as data registers, are the most frequently used
registers in the 8086 microprocessors. They are 16-bit wide and can store various types of
data, including integers, memory addresses, and operands. The 8086 has eight general-
purpose registers, named AX, BX, CX, DX, SI, DI, SP, and BP.

Segment Registers:
Segment registers play a crucial role in memory management within the 8086 architectures.
They are 16-bit wide and hold the starting addresses of segments, which are larger blocks of
memory. The 8086 has four segment registers, named CS (Code Segment), DS (Data
Segment), SS (Stack Segment), and ES (Extra Segment). These registers define the memory
space accessible by the processor for instructions, data, stack operations, and additional
data, respectively.

Index Registers:
Index registers are specifically designed for addressing elements within arrays or strings.
They are 16-bit wide and can be used along with base registers to indirectly access data in
memory. The 8086 has two index registers, named SI (Source Index) and DI (Destination
Index).

Instruction Pointer (IP):

The instruction pointer (IP) is a crucial register that holds the address of the next instruction
to be executed by the microprocessor. It is 16-bit wide and points to the memory location
where the next instruction is stored. As the processor executes instructions, the IP is
incremented to point to the subsequent instruction.

Flag Register:
The flag register is a 16-bit register that stores various status flags indicating the outcome of
recent operations. These flags are used by the processor to control conditional branching
and other operations. The 8086 has nine flag bits, each representing a specific condition,
such as the carry flag (CF), zero flag (ZF), and sign flag (SF).

Control Registers:
Control registers are used to control the overall operation of the microprocessor. They are
responsible for managing interrupt handling, enabling or disabling specific features, and
configuring system parameters. The 8086 has several control registers, including the

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interrupt control register (ICW), the interrupt vector register (IVT), and the control and
status register (CR).

QUESTION 3
a) Explain features of 8279-Programmable Keyboard controller. [8]’

The 8279 Programmable Keyboard Controller (PKC) is an integrated circuit designed to

interface a keyboard with a microcomputer system. It provides a standardized interface for
keyboards of various sizes and layouts to simplifying the communication between the
keyboard and the computer. The features are:

Keyboard Scanning and Encoding: The 8279 PKC scans the keyboard matrix to detect key
presses and generates the corresponding ASCII or other encoding for each key. This
encoding allows the microcomputer to interpret the keystrokes and take appropriate
actions.

N-key Rollover: The 8279 PKC supports N-key rollover, which means that it can recognize
multiple keys being pressed simultaneously. This feature is particularly useful for gaming
and other applications where multiple key combinations are common.

FIFO Buffer: The 8279 PKC incorporates an eight-byte first-in-first-out (FIFO) buffer to store
keystroke codes. This buffer prevents data loss when the microcomputer is unable to
process keystrokes immediately.

Interrupt Handling: The 8279 PKC can generate interrupts to signal the microcomputer
when new keystroke data is available. This interrupt-driven approach allows the
microcomputer to respond to key presses without constantly polling the keyboard status.

Programmable Mode: The 8279 PKC can be programmed to operate in two modes: scanned
sensor mode and scanned keyboard mode. In scanned sensor mode, the 8279 PKC behaves
as a general-purpose input device, allowing it to interface with various sensors and switches.
In scanned keyboard mode, the 8279 PKC operates as a dedicated keyboard interface.

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Status Reporting: The 8279 PKC provides status information to the microcomputer,
indicating its current state and any errors that may have occurred. This status information
allows the microcomputer to monitor the keyboard interface and take corrective actions if
necessary.

Single Supply Voltage: The 8279 PKC operates on a single +5V power supply, making it easy
to integrate into various microcomputer systems.

DIP Package: The 8279 PKC is available in a 40-pin dual-in-line package (DIP), providing a
standard form factor for easy integration into printed circuit boards.

b) Write an ALP in 8051 to divide two numbers and store the result in memory locations
4500 and 4501. [8]
START
MOV A, #40; Load the dividend into accumulator A
MOV B, #41; Load the divisor into register B
DIV AB; Divide A by B
MOV @4500, A; Store the quotient in memory location 4500
MOV @4501, B; Store the remainder in memory location 4501
HLT; Stop the program
STOP

c) Explain priority interrupts of 8085. [4]

Priority interrupts are a crucial aspect of the 8085 microprocessor's architecture, enabling it
to handle multiple asynchronous requests efficiently. When an interrupt occurs, the 8085
temporarily halts the current program execution, saves the program counter (PC) and other
relevant information, and jumps to the corresponding interrupt service routine (ISR)
address. The ISR handles the interrupt request and then returns control back to the
interrupted program. The priority scheme ensures that critical interrupts are serviced
immediately, preventing them from being delayed by lower-priority interrupts. This
prioritization is essential for ensuring the stability and responsiveness of the system.

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 There are five 8085 interrupt inputs: TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR, each with a
fixed priority level.

TRAP (highest priority): The TRAP interrupt is the highest priority interrupt, typically used for
non-maskable interrupts (NMIs) that must be serviced immediately, regardless of the
current program execution. Examples include power failures, memory protection faults, and
critical system errors.

RST 7.5 (second highest priority): This interrupt is used for high-priority tasks that require
immediate attention, such as handling external device requests or time-critical events.

RST 6.5 (third highest priority): This interrupt is typically used for routine tasks that require
prompt attention but are not as urgent as RST 7.5 interrupts.

RST 5.5 (fourth highest priority): This interrupt is used for general-purpose tasks that can be
handled with a moderate priority level.

INTR (lowest priority): The INTR interrupt is the lowest priority interrupt, typically used for
low-priority tasks that can be handled when other interrupts are not active.