Department of ECE

23EC1202
DIGITAL DESIGN & COMPUTER ARCHITECTURE
Session – 23

Operands, Instruction formats,

Addressing modes
 AIM OF THE SESSION

To familiarize students with the basic concept of Operands, Addressing modes, Instruction formats.

INSTRUCTIONAL OBJECTIVES
This Session is designed to:
1. Demonstrate the basic concept of operands.
2. Describe Addressing modes.
3. List out the Operands, Addressing modes, and Instruction formats.
4. Describe the Instruction formats

LEARNING OUTCOMES

At the end of this session, you should be able to:

1. Define the basic concept of operands.
2. Describe Addressing modes.
3. Summarize the Operands, Addressing modes, and Instruction formats.
 Instruction Formats

➢ Instruction format refers to the layout or structure of a binary instruction in machine language.

➢ The instruction format is crucial for understanding how a computer operates at the lowest level.

➢ There are several components to an instruction, and different architectures may have different
formats.

➢ Common elements include the opcode (operation code), operand(s), addressing mode,
and sometimes a specifier for the instruction length or additional operation specifics.
 Operands

Definition Example Significance

Operands are values used in In the operation x = y + z, y Choosing the right operand
arithmetic or logical and z are the operands. The type can greatly impact
operations. Common types computer retrieves their program speed and efficiency.
include integers, floating values from memory, Understanding operand types
point numbers, and performs the addition, and is key to optimizing program
booleans. stores the result in x. performance.
 Instruction Formats

1. Zero Address Instruction Op-Code

2. One Address Instruction Op-Code Address

3. Two Address Instruction Op-Code Address-1 Address-2

4. Three Address Instruction Op-Code Address-1 Address-2 Address-3

Utilization of Instructions Addresses
 Zero Address Instructions

➢ Instructions with zero-address format lack explicit

specification of operands or addresses. Instead,
they manipulate data contained within registers
or memory locations implicitly referenced by the
instruction.

➢ In the table, ADD and MUL are classified as zero-

address instructions when operating with the
stack, while PUSH and POP are categorized as
one-address instructions.
 One Address Instructions

➢ Each of these instructions designates a single operand or

address, often indicating a memory location or register. LOAD A A C <- M [ A ]
ADD B A C <- A C + M [ B ]
➢ The instruction then manipulates the data stored in that
specified operand, with the resulting outcome potentially STORE T M [ T ] <- A C
stored in the same location or a different one.
LOAD C A C <- M [ C ]
ADD D A C <- A C + M [ D ]
MUL T A C <- A C • M [ T ]
STORE X M [ X ] <- A C
 Two Address Instructions

➢ Each of these instructions defines a pair of operands or MOV R1 , A R 1 <-- M [ A ]

addresses, which can denote either memory locations or
registers.
ADD R1 , B R 1 <-- R 1 + M [ B ]
➢ The instruction then performs operations utilizing the data
stored within both operands, and the resultant output may MOV R2 , C R 2 <-- M [ C ]
be retained in either the same location or an alternative
one. ADD R2 , D R 2 <-- R 2 + M [ D ]

MUL R1 , R2 R 1 <-- R 1 * R 2

MOV X , R1 M [ X ] <-- R 1
 Three Address Instructions

➢ Each of these instructions delineates three operands or

addresses, which can represent either memory locations or ADD R1 , A , B R 1 <-- M [ A ] + M [ B ]
registers.
ADD R2 , C , D R 2 <-- M [ C ] + M [ D ]
➢ The instruction subsequently performs operations involving
the data stored within all three operands, and the resulting
MUL X , R1 , R2 M [ X ] <-- R 1 * R 2
outcome may be preserved in either the same location or an
alternate one.
 Addressing Modes

➢ The term addressing modes refers to the way in which the operand of an instruction is specified.
➢ The most common addressing techniques are:
• Immediate
• Direct
• Indirect
• Register
• Register Indirect
• Displacement
• Stack
 Notation of Addressing Modes

➢ The following notations are employed to elucidate the addressing modes.

A = contents of an address field in the instruction that refers to a memory

R = contents of an address field in the instruction that refers to a register
EA = actual (effective) address of the location containing the referenced operand
(X) = contents of location X
 Immediate Addressing Mode

➢ In Immediate addressing mode the source operand is always data.

Eg: MOV AX, 2000H
ADD AL,45H
 Direct Addressing Mode

➢ A very simple form of addressing is direct addressing, in which the address field contains the
effective address of the operand: EA = A
➢ It requires only one memory reference and no special calculation.
➢ Eg: MOV AX, [1592H]
MOV BL, [0300H]
 Indirect Addressing Mode

➢ In Direct Addressing, the length of the address field is usually less than the word length, thus limiting the address range.
➢ One solution is to have the address field refer to the address of a word in memory, which in turn contains a full-length
address of the operand. This is known as indirect addressing.
EA = (A)
➢ Eg: MOV AX, @2005H
LOAD R1, (1345H)
 Register Addressing Mode

• Register addressing is similar to direct addressing. The only difference is that the address field refers to a register
rather than a main memory address.
EA = R
• The advantages of register addressing are that only a small address field is needed in the instruction and no
memory reference is required.
• The disadvantage of register addressing is that the address space is very limited.
Eg: MOV AX,BX
ADD R1,R2
 Register Indirect Addressing Mode

• Register indirect addressing is similar to indirect addressing, except that the address field refers to
a register instead of a memory location.
• It requires only one memory reference and no special calculation.
EA = (R)
Eg: ADD AL, [BX]
MOV AX, [BX]
 Displacement Addressing Mode

➢ A very powerful mode of addressing combines the capabilities of direct addressing and register
indirect addressing, which is broadly categorized as displacement addressing.
EA = A + (R)
➢ Displacement addressing requires that the instruction have two address fields, at least one of
which is explicit. The value contained in one address field (value = A) is used directly. The other
address field, or an implicit reference based on opcode, refers to a register whose contents are
added to A to produce the effective address.
➢ Eg: SUB AX, [BX+30H]
MUL AX, [CX+50H]
Displacement Addressing Mode
 Stack Addressing Mode

• The stack mode of addressing is a form of implied addressing. The machine instructions need not include a memory
reference but implicitly operate on the top of the stack.
• The stack itself is a memory location in RAM where data is stored and accessed in a last-in-first-out (LIFO) manner. It's a
fundamental data structure used for managing subroutine calls, local variables, and other temporary data within programs.
• The Stack Pointer (SP) is a register in a processor that keeps track of the current top of the stack.
• The content of the SP register changes whenever data is pushed onto the stack or popped off the stack. This ensures that
the SP always points to the topmost element of the stack.
• In a push operation, the stack operates in a "decrement then store" style. Initially, the SP is decremented, followed by
storing the information onto the stack.
• Conversely, during a pop operation, the stack operates in a "use then increment " style. Initially, the information is retrieved
from the top of the stack, and then the SP is incremented.
 Stack Addressing Mode (Cont.)

• The order of PUSHs and POPs must be opposite of each other in order to retrieve information
back into its original location.
PUSH B
PUSH D
...
POP D
POP B
• Reversing the order of the POP instructions will result in the exchange of the contents of BC and
DE.
Addressing Modes (Recap)
Advantages & Disadvantages of Basic Addressing Modes
 SELF-ASSESSMENT QUESTIONS
1. What is an addressing mode in computer architecture?

A. A configuration for the CPU's power management.

B. A method for organizing instruction sets.
C. The way in which the operand of an instruction is specified.
D. The mode in which the CPU addresses the control unit.

2. In immediate addressing mode, where is the operand located?

A. In a CPU register.
B. In the instruction itself.
C. In the main memory.
D. In a cache memory.
 SELF-ASSESSMENT QUESTIONS
3. What is an instruction format in computer architecture?

A. A method to store data in memory.

B. A set of rules that defines how an instruction is encoded.
C. The algorithm used by the CPU to execute instructions.
D. The layout of the CPU's control unit.

4. Which component of an instruction specifies the operation to be performed?

A. Operand
B. Opcode
C. Address field
D. Flag register
 REFERENCES FOR FURTHER LEARNING OF THE SESSION

Reference Books:
1. Computer Organization by Carl Hamacher, Zvonko Vranesic and Saftwat Zaky.
2. Computer System Architecture by M. Morris Mano
3. Computer Organization and Architecture by William Stallings

Sites and Web links:

1. https://www.geeksforgeeks.org/addressing-modes/
2. https://www.geeksforgeeks.org/computer-organization-instruction-formats-zero-one-two-three-
address-instruction/
 THANK YOU

Team – Digital Design & Computer Architecture