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+91-7095202444
kanitareddy@gmail.com
www.linkedin.com/in/anita-reddy-kaja-vlsi-industry
Advanced VLSI Desing and Verification Worked as Assistant Professor in Newton' s College of
Engineering & Technology, Macherla, Guntur (Dt)from
Course June 2009 to May 2011.
Institute : Maven Silicon, Bengaluru
Duration : June 2022 to Present Worked as Assistant Professor in Malineni Lakshmaiah
Womens Engineering College, Pulladigunta, Guntur(Dt)
from June 2012 to May 2016.
HOBBIES & INTERESTS
Cooking
EDUCATION
Art & Crafts
M.Tech -VLSI & Embedded Systems| 2013
Travelling St.Ann's College of Engineering & Technology.
Chirala,Andhra Pradesh,India.
Listening to music
CGPA: 7.25 | Percentage: 72.57%
DESIGN SKILLS
DIGITAL ELECTRONICS
Combinational & Sequential circuits, FSM
VERILOG PROGRAMMING
Data types, Operators, Processes, BA & NBA, Delays in Verilog, begin - end & fork join blocks,
looping & branching construct, System tasks & Functions, compiler directives, FSM coding,
Synthesis issues, Races in simulation, pipelining RTL & TB Coding.
VERIFICATION SKILLS
UVM
UVM Objects & Components, UVM Factory & overriding methods, Stimulus Modelling, UVM
Phases, UVM Configuration, TLM,UVM Sequence, Virtual sequence & sequencer, Introduction to
RAL.
SYSTEM VERILOG
Interface and clocking block, Inheritance and Polymorphism, HVL Constraint randomization -
Inline, Distribution, Conditional, Soft and static constraints. Mailbox and semaphores,
Functional coverage, CRCDV and regression testing.
DECLARATION
I hereby declare that above information provided is true to best of my knowledge and belief.
Date:
Place: ANITA REDDY KAJA