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Eee225 Problem Sheets
Eee225 Problem Sheets
2. The resistivity of intrinsic silicon at 27℃ is 3000Ω m. Assuming 𝜇𝜇𝑒𝑒 = 0.17𝑚𝑚2 𝑉𝑉 −1 𝑠𝑠 −1 and 𝜇𝜇ℎ =
0.035𝑚𝑚2 𝑉𝑉 −1 𝑠𝑠 −1 , calculate the intrinsic carrier density ni at this temperature.
3. A current density of 103 A m-2 flows through an n-type germanium crystal of resistivity 0.05Ω m.
Calculate the time taken for electrons to travel 5 × 10-5 m, if the mobility is 𝜇𝜇𝑒𝑒 = 0.39𝑚𝑚2 𝑉𝑉 −1 𝑠𝑠 −1 .
4. Compare the drift velocity of an electron moving in a field of 10000V m-1 in pure germanium, with the
final velocity of an electron that has moved through a distance l0mm in the same field in a vacuum. The free
electron mass is 9.11 × 10-31kg, and the mobility 𝜇𝜇𝑒𝑒 = 0.39𝑚𝑚2 𝑉𝑉 −1 𝑠𝑠 −1 in germanium.
5. A rod of p-type germanium 6mm long, 1mm wide and 0.5mm thick has an electrical resistance of l20Ω.
What is the impurity concentration? What proportion of the conductivity is due to electrons in the
conduction band? (Take 𝜇𝜇ℎ = 0.19𝑚𝑚2 𝑉𝑉 −1 𝑠𝑠 −1 , 𝜇𝜇𝑒𝑒 = 0.39𝑚𝑚2 𝑉𝑉 −1 𝑠𝑠 −1 , and ni = 2.5 × 1019 m-3.)
6. Calculate the faction of electrons in the conduction band at room temperature for (a) pure Germanium (Eg
= 0.72eV), (b) pure Silicon (Eg = 1.10eV) and (c) pure diamond (Eg = 5.6eV), and comment on the results.
7. Pure silicon has resistivity 2000Ω m at room temperature, and the density of conduction electrons is 1.4 ×
1016m-3. Calculate the resistivities of two other, doped, samples containing acceptor concentrations of 1021m-3
and 1023m-3 respectively. Assume that the hole mobility remains the same as in pure silicon and that it is equal
to 0.26 times the electron mobility.
Numerical Answers
1. 1.16kA m-2
2. 1.02 × 1016m-3
3. 2.5μs
4. 3.9 × 103 m s-1 in Ge; 5.93 × 106 m s-1 in vacuum. Note the effect of the crystal lattice in Ge.
5. 3.29 × l021m-3; 1 in 8.4 × 103
6. 10-6, 10-9.3, 10-47
7. 0.135Ω m and 0.00135Ω m
EEE225 Semiconductors for Electronics and Devices
Problem Sheet 2
1. Germanium has a band gap of 0.7eV and, for pure material, the Fermi level lies near the middle
of the gap. What is the probability that a state in the upper band is occupied at 0K, 300K, and
500K? Explain the physical significance of these results. What other property of the band
structure, other than the probability of occupancy of states, influences the electrical properties
of the material?
2. A thermistor made from intrinsic silicon is to be used to control the current surge in a projector
when it is switched on. The thermistor has a resistance of 100Ω at room temperature (17°C).
When it is connected in series with the projector lamp, at what temperature will its resistance
fall to 1.0Ω? Assume that the energy gap for silicon is 1.08eV and that the carrier mobilities do
not vary appreciably over the operating range of temperatures. Comment on the result.
3. Intrinsic germanium has a gap energy of 0.72eV and its conductivity is 2.13 S m-1 at 300K.
What is its conductivity at 400K? Comment on the result. Would the conductivities at each of
these temperatures be changed if the semiconductor received radiation of wavelength (a) 1μm
and (b) 2μm?
4. A particular semiconductor, which is initially intrinsic with an energy gap, Eg, of 1.1eV, is doped
very slightly n-type, in such a manner that the Fermi level is displaced by 10% of the gap energy
from its intrinsic position. Compare the conductivities at 20°C before and after doping,
assuming carrier mobilities of μh = 0.05m2 V-1s-1 and μe = 0.13 m2 V-1s-1, commenting on the
result.
6 In a certain semiconductor the ratio of electron mobility, μe, to hole mobility, μh, is equal to 10,
the number density of free holes is p = 1020m-3, and the number density of free electrons is n =
1019 m-3. The measured conductivity is 0.455 S m-1. Calculate the mobilities.
7 A sample of germanium doped with 1020 donor atoms per cubic meter and 7 × 1019 acceptor
atoms per cubic metre. At the same temperature as the sample, the resistivity of intrinsic
germanium is 0.6Ω m. Find the total current density when an electric field of 200V m-1 is
applied. The electron and hole mobilities in germanium may be assumed to be 0.38 m2 V-1s-1
and 0.18 m2 V-1s-1 respectively.
9 A 10mm ×10mm × 10mm cube of silicon at room temperature has 1019m-3 of gallium (p-type)
impurities and 1.5 × 1019m-3 of arsenic (n-type) impurities in the material. Determine the
resistance of the cube between any two faces, assuming: ni = 1.5 × 1016 m-3; μe = 0.12 m2 V-1s-
1
; and μh = 0.05 m2 V-1s-1
Numerical Answers
1. The current at room temperature (20°C) in a certain p-n junction is 2 × 10-7A when a
large reverse bias is applied. Calculate the current flow for a forward bias of 0.1 V.
2. An ideal silicon p-n junction diode has a reverse saturation current of 30μA at a
temperature of l25°C. Find the dynamic (slope) resistance of the diode for a voltage
0.2V applied in (a) the forward direction, and (b) the reverse direction. Comment on
the results.
3. A p-n junction diode has an observed saturation current of 1μA at room temperature.
Find the junction voltage corresponding to a forward current of (a) 1mA, and (b) l0mA.
The diode is constructed with material of conductivity 2000S/m on the p-type side and
500S/m on the n-type side. The diode is 2mm long (with the junction at the centre of
this length) and 1 × 0.5mm2 in cross-section. Find the total voltages applied
corresponding to currents (a) and (b) above, including the resistive drops in the n- and
p-type regions, comment of the results.
4. A certain germanium rectifier has a reverse saturation current of 1μA compared with
l0-8A for a similar-sized rectifier made of silicon. Compare the theoretical forward
voltages dropped across the two rectifiers when each carries a current of l00mA at
room temperature. By how much would an effective bulk resistance of 1Ω increase the
forward voltage drop in each case?
6. A Schottky diode passes a forward current of l0mA when a bias of 0.25V is applied at
room temperature (300K). What voltage is required to double this current? Also,
estimate the maximum reverse current for reverse bias voltages less than the
breakdown voltage.
7. The dynamic (slope) resistance of a Schottky diode at 300K is measured when forward
biased with 0.25V. What applied forward voltage would double the slope resistance?
Numerical Answers
1. 10μA
2. 3.5Ω, 388kΩ
3. (a) 0.175V: (b) 0.233V; (a) 0.18V; (b) 0.283V
4. Ge: 288mV; Si: 403mV; due to R, ɅVR = 100mV
5. 650Ω
6. 0.268V; 0.64pA
7. 0.23V
8. 2.16μA
Page 2
Department of Electronic and Electrical Engineering
EEE225 Semiconductors for Electronics and Devices
Problem Sheet4
1. A certain germanium p-n junction diode has a conductivity of 104S m-1 in the bulk n-type region and
102 S m-1 in the p-type region. Find the “built-in” voltage drop across the junction in equilibrium at
300K, assuming electron and hole mobilities of 0.36m2 V-1s-1 and 0.17m2 V-1s-1 respectively and an
intrinsic carrier density of 2.5 × 1019m-3.
2. Assuming the formula 𝑔𝑚 = 𝜇𝑒 𝐶𝑔 𝑉𝑑,𝑠 /𝑙2 , where the symbols have their usual meaning, calculate the
saturation-region transconductance of an induced n-channel MOST having the following properties:
3. An induced-channel MOS transistor can be used as a linear resistor in an integrated circuit, where the
effective value of resistance between source and drain is controlled by the gate-source voltage, 𝑉𝑔 .
1
Assuming the usual formula 𝐼𝑑 = 𝜇𝑒 𝐶𝑔 (𝑉𝑔 − 𝑉𝑇 − 2 𝑉𝑑 ) 𝑉𝑑 /𝑙2 , show that, provided the drain voltage is
much smaller than the difference between 𝑉𝑔 and the turn-on voltage (𝑉𝑇 ), a MOS transistor behaves as
a linear resistor with resistance given by 𝑅 = 𝑙2 /[𝜇𝑒 𝐶𝑔 (𝑉𝑔 − 𝑉𝑇 ], where 𝑙 is the length of the channel, 𝐶𝑔
is the gate capacitance, and 𝜇𝑒 is the mobility of majority carriers in the channel.
A certain MOS transistor is to be used to simulate a 2000Ω resistor, and has a gate capacitance of 1pF,
channel length 5μm, turn-on voltage 3V, and the mobility of electrons in the channel is 0.02m2 V-1s-1.
What gate voltage is necessary to achieve the required resistance? Are there any disadvantages in using
this arrangement in an integrated circuit?
4. Assuming the usual expression for the drain current of an induced-channel MOS transistor operated in
the unsaturated region, 𝐼𝑑 = 𝜇𝑒 𝐶𝑔 (𝑉𝑔 − 𝑉𝑇 − 12 𝑉𝑑 ) 𝑉𝑑 /𝑙2, show that the saturation-region transconductance
of a MOS transistor is proportional to the square root of its drain current. A certain n-channel MOS
transistor has a transconductance of 2mS at a drain current of 5mA. Estimate the gate capacitance,
assuming a channel length of 10μm and an electron mobility of 0.13 m2 V-1s-1.
Numerical Answers
1. 0.358V
2. 7.34 × 10-3S
3. 3.63V
4. 0.31pF
1
The objective with the small signal derivations is to show which components
are in control of certain circuit parameters, therefore the final form of the answer
should be manipulated to reveal this information as clearly as possible. Arranging
equations in a way that reveals certain underlying relationships in the circuit
parameters is something computers are not very good at, this sort of work is best
done by hand.
2. Find the DC conditions again but taking into consideration the base current.
Perform your calculations for the full range of hFE . Find the range of hFE
from the Fairchild Semiconductor BC549 datasheet.
3. Explain (briefly, using bullet points for example) the job of each component
in the circuit.
4. Explain (in words) why the emitter resistor, RE acts to reduce the gain of
the circuit unless it is decoupled by CE .
5. Draw and label the small signal equivalent circuit for Figure 1.
7. Show that the mid-band voltage gain of the common emitter circuit shown
in Figure 1 is given by (1).
8. Show that the mid-band output resistance of the amplifier circuit in Figure 1
is given by (2).
9. Show that the mid-band input resistance of the amplifier circuit in Figure 1
is given by (3).
11. Find an expression for the transresistance vo /ii of the amplifier stage shown
in Figure 1.
12. Draw and label the small signal equivalent circuit for Figure 1 if CE is open
circuit at all frequencies of interest, all other capacitors may be considered
short circuit.
2
13. Assuming CE is open circuit at all frequencies of interest, derive the input
resistance, output resistance, voltage gain and current gain of the amplifier.
The final solutions take the forms shown in (5) - (8).
14. Given your solution for the small signal properties of the stage without
emitter decoupling, determine what components are in control of the voltage
gain, current gain, input resistance and output resistance. Comment on the
effect of emitter degeneration on the small signal parameters. For example,
which components are in control of the voltage gain? Which components
dominate input resistance? What are the main components which reduce
current gain?
15. State the numerical values of voltage gain, current gain, power gain, input
resistance and output resistance with and without emitter decoupling over
the range of hFE given in the datasheet.
vo gm RL0
=− (1)
vi 1 gm
Rs RB + β + 1
vo
ro = = RC (2)
it
vi 1
ri = = 1 gm (3)
ii RB
+ β
3
io RB β
=β or (4)
ii RB + rbe 1 + gmβRB
vo gm RL0
=− (5)
vi R 1
+ gm
+ 1
+ (β+1)
RE gm 1
+ 1
S RB β RS β RB RS
β
1+ gm RE (β+1)
ri = 1 1 β
(6)
RB
+ RE (β+1)
+ gm RE RB (β+1)
ro = RC (7)
io β
=− (8)
ii β 1
+ RE
+ RE
+1
gm RB RB RB
4
9. Derive an expression for the current gain. Solution: (12).
11. Practical transistors have a physical resistance between the active part of
the base region and the transistor package leg. This is partly made from the
ohmic bond-wire resistance inside the package and partly made from the
ohmic resistance of the semiconductor between the position at which the
bond wire is attached to the semiconducor and the position of the active
part of the base material. Draw the small signal equivalent circuit assuming
that this base spreading resistance, rb , appears in series with the base leg.
C1 is still short circuit at all frequencies of interest.
12. Re-derive your small signal results so far assuming taking into account the
base spreading resistance. The results are shown in (14) - (17).
13. Reflect on and then qualitatively describe (i.e. in words) the effect of the
base spreading resistance on the stage’s small signal parameters. Comment
on the similarity of the feedback provided by lifting the base node in the
common base circuit with the effects of degenerating the emitter in the
common emitter circuit.
14. State the numerical values of the small signal metrics of performance with
and without the base spreading resistance over the range of β. You may
assume that the amplifier is operated at a low frequency and therefore
β = hF E
ve 1
= gm 1 (9)
iin β
+ gm + RE
vo
= RC (10)
io
vo gm RL0
= gm 1 (11)
iin β
+ gm + RE0
β
rbe
1 β 1
≈α (12)
rbe
+ rbe
+ RE0
vo gm RL0
= (13)
vi 1
+ gm + 1
+ 1
rbe Rs RE
ve rb 1
≈ + (14)
iin β gm
5
vo RL0
= 1+β 1 rb
(15)
iin β
+ 0
gm RE
+ 0 β
RE
io 1
= 1+β 1 rb
(16)
iin β
+ 0
gm RE
+ 0 β
RE
vo gm RL0
= (17)
vin Rs gβm + 1
+ gm rb
+ gm + 1
+ gm rb
Rs β Rs RE β RE
6
voltage, is half way between the power supply and ground, thereby providing
the largest possible output voltage swing.
2. Find the DC conditions again but taking into consideration the base current.
Perform your calculations for the full range of hFE . Find the range of hFE
from the On Semiconductor MJ15003 datasheet.
3. Explain (briefly, using bullet points for example) the purpose of each com-
ponent in the circuit.
4. Sketch the output characteristic (VCE vs IC as a function of VBE or IB ), add
the operating point and the load line. On secondary axes, sketch the time
dependent sinusoidal waveforms showing how the operating point moves
according to the input signal, Vin and the output signal, VL that results
from this input.
5. Draw and label the small signal equivalent circuit for Figure 3.
6. Calculate the small signal transconductance, gm , and base emitter resis-
tance, rbe at the operating point for the range of hFE given in the On
Semiconductor datasheet. You may assume that the transistor stage will
be operated at low frequencies and therefore β = hFE . Calculate the gm and
rbe at the maximum and minimum collector current based on the amplitude
of the input waveform. Describe the effect will the variation of gm and rbe
have over the course of one cycle on the shape of the voltage and current
waveforms in the circuit. To simplify your discussion you may assume β
has no IC dependence and that neither β nor gm depend on temperature
(or that the transistor will not get hot - same thing).
7. Based on the size of the input signal, the DC conditions you’ve calculated
and your knowledge of electronic circuits, how valid is the small signal
assumption in this case?
8. Assuming C1 is short circuit at all frequencies of interest, show that the
input resistance of the amplifier circuit in Figure 3 is given by (18). Com-
ment on the size of Rs compared to the input resistance, what would you
expect to find when evaluating the voltage gain of this stage.
9. Assuming C1 is short circuit at all frequencies of interest, show that the
output resistance of the amplifier circuit in Figure 3 is given by (19).
10. Assuming C1 is short circuit at all frequencies of interest, show that the
voltage gain of the circuit shown in Figure 3 is approximately unity.
11. Develop an expression for the current gain, determine its maximum value
and the conditions required to reach that maximum.
7
12. Calculate the quiescent power dissipation in Q1 and RE .
13. Calculate the average power dissipated in the loudspeaker, RL in one cycle
if Rs = 0.1 Ω and if Rs = 600 Ω. Qualitatively, do these figures relate to
the earlier input resistance derivation?
14. Derive an expression for the instantaneous power dissipation in the tran-
sistor, Q1 . You may assume that the power dissipated in the transistor is
the product of IC and VCE which will both vary approximately sinusoidally
given a sinusoidal input. Hint: this involves some integration of sines and
cosines.
15. Using your derivation find the input signal amplitude which results in the
highest power dissipation in the transistor.
16. Show that the highest possible efficiency of this circuit is 25%. You may
neglect losses in R1 and R2 .
17. What is the conduction angle of Q1 ? What class of operation is this stage
operating in?
rin ≈ RB (18)
8
where RB = R1 ||R2 .
1 RB
ro ≈ + (19)
gm β
9
Figure 4: A Widlar current mirror circuit.
3. Draw the small signal equivalent circuit for the mirror, ensure you include
rce .
5. Derive the output resistance when emitter degeneration resistors are in-
cluded.
IS hF E + 2
= (20)
IRL hF E
10
Figure 5: A current mirror circuit with helper transistor.
2. Estimate the gain, vo1 /vi , of the differential amplifier assuming that rce of
Q1 is very large compared to R1 . Remember to include the effects of Q3
(ie, its input resistance) in your calculation.
3. Estimate the gain, va /vo1 , of the voltage gain stage assuming that rce of Q3
and the input resistances of Q4 and Q5 are very large compared to RV A .
4. Use your results from parts 2 and 3 to estimate the overall gain vo4 /vi .
What have you assumed in this calculation?
5. Using your powers of reasoning, identify which stage gain would be signifi-
cantly improved if the small signal current gain of each transistor increased
to 500.
11
Figure 6: Simplified operational amplifier circuit.
12
Question 7: Push Pull Emitter Follower
1. Concisely describe the cause of crossover distortion in class B push-pull
amplifiers.
3. Sketch a circuit diagram of a voltage amplifier and push pull stage which
largely overcomes the problems of crossover distortion and describe the
operation of your circuit.
5. Calculate the average power dissipated in the load resistor of your circuit.
6. Derive expressions for the instantaneous power dissipation in one of the out-
put transistors. You may assume that the power dissipated in a transistor is
the product of IC and VCE which will both vary approximately sinusoidally
given a sinusoidal input. Hint: this involves some integration of sines and
cosines.
7. Using your derivation find the signal voltage amplitude across the output
which results in the highest power dissipation in the transistor.
10. For each class of operation above, what angle of current conduction exists
in each class and what approximate range of voltages must exist between
the bases of the output transistors?
13
Question 8: Common Base Transimpedance
Amplifier with DC servo
Download the journal paper at http://dx.doi.org/10.1088/0957-0233/23/
12/125901. You may need VPN, see http://www.shef.ac.uk/cics/vpn for
details. Describe how the transimpedance amplifier in Figure 6 of this paper
works. Develop the DC conditions and the small signal parameters of the common
base stage driven by the photodiode.
2. Calculate the DC conditions (currents through and voltages across all com-
ponents (except C3 ). Assume that for the JFET ID = 10 mA at VGS =
0 V. Assume the small signal current gain of all the BJTs is 100.
4. What is C3 ’s job in this circuit? It may help to think about the input
as being short duration pulses of current sepperated by long periods of
nothing. This would represent an x-ray generating a number of electron
hole pairs as it passes through the detector, these become the pulse. The
input impedance is very large so pushing current onto the gate will have to
charge up or discharge some capacitors (including those internal to Q1 ) the
change in gate voltage will act to turn Q1 on or off somewhat. This signal
will propogate through the amplifier until it reaches the output (which is
also the right hand side of C3 ). Another way to look at it is to ask what
will happen if I keep putting charge onto the gate and it doesn’t leave. The
amplifier will saturate, so how can I avoid this?
14
+15 V
R1
680 Ω
R2 R8
20 kΩ 20 kΩ
Q2 Q2
Q1
In C6
R7 C1 R3 R9
3.9 kΩ 100 nF 10 kΩ 50 Ω 100 nF
Q4 Q5 Out
15
Q3
R4
C2 5.1 kΩ
100 nF R5
R6 10 kΩ
1000 Ω
-15 V
C3
0.2 pF
In Q1 Q3
C1
47 µF
R9 C3
C2
20 kΩ 1500 µF
R3 100 µF
20 kΩ R4 R6 R8
1 kΩ 18 Ω 32 Ω
R5
R7
4 kΩ
820 Ω
0V
2. approximate the input resistance (do not derive it, use your engineering
brain to make a single calculation that leads you to a value with +/-10%
accuracy).
3. What is the gain at DC (It is AC coupled but that does not mean there is
no gain at DC).
4. What is the gain in the midband (AC gain, all capacitors short circuit).
16
5. list the major problems with the circuit and explain how they arrise. Why
are real amplifiers not made like this? Think about input and output
impedance, gain, distortion etc.
6. If you could only change one thing to improve the performance of the circuit
what would it be?
9. Since you’ve got Grey open...probably around page 583 if you’re in the 5th
edition. Teach yourself how to use signal flow graphs to analyse circuits
with feedback. Apply the technique to the circuit in this question.
10. Replace the input transistor with a JFET, 2N3819. Re-design the circuit
to perform the same function. The input stage biasing resistors can be
removed and the gate of the JFET can float at 0 V.
11. Use LTSPICE to compare the input impedance of the two circuits.
12. Use the LoopGain2.asc example file in the “Educational” directory of LT-
SPICE to assess the open loop gain of this amplifier. Add compensation
between collector and base of Q2 observe the effects of changing the domi-
nant pole frequency on the open loop gain for several values of capacitor (try
100 pF to start). Inspect the open loop gain and phase margins, compensate
it to ensure stability.
17
The University of Sheffield
Department of Electronic and Electrical Engineering
Operational Amplifiers
R2
Q2 Derive an expression for the gain-bandwidth R1
product of the circuit of figure 2. (You should find vi
that this inverting amplifier connection behaves
Av vo
slightly differently from the non-inverting case
covered in the lecture notes.)
Figure 2
1 T2252/RCT 11-13
Q3 In medical impedance imaging systems small voltages on the surface of a body are sensed by
buffer amplifiers with a very high input impedance. If an op-amp voltage follower circuit is to
be used as a sense amplifier which must not introduce a phase error greater than 0.1o at a
frequency of 50 kHz, what gain-bandwidth product is required of the op-amp? (28.6MHz) (remem-
ber that the buffer will be a first order system so you can write down its transfer function straight
away.)
Q4 A particular op-amp for which you have no data is observed to have a step response of the form
6
k 1 e t e 2.8u10 when wired to give a non-inverting gain of 250 V/V.
(i) What is the gain-bandwidth product of the op-amp? (14.2MHz)
(ii) What 3dB bandwidth would you expect for a non-inverting gain of 10V/V?
(1.42MHz)
(iii) What circuit risetime would you expect for the non-inverting gain of 10V/V?
(246ns)
Q5 A non-inverting amplifier circuit with a gain of 10 V/V uses an op-amp with a slew rate of
25 V/Ps and a gain-bandwidth product of 15 MHz.
(i) Evaluate ~gain~ and phase shift of the amplifier at a frequency of 5 MHz. (2.87,
o
-73 )
(ii) What is the maximum frequency at which a 20 V pk-pk sinusoidal output can be
supported in undistorted (ie purely sinusoidal) form? (398kHz)
(iii) At what amplifier circuit gain would the exponential shape of the rising and
falling edges of a 15 V pk-pk "square wave" output begin to be affected by the
amplifier’s slew rate capabilities? Would the exponential shape of the edges be
affected by a gain of half this value? (56, Yes)
(iv) Why is the answer to part (iii) independent of the fundamental frequency of the
square wave? (assume that you can observe enough of the exponential response
to identify its aiming level.)
R R
C R
Figure 6
T2252/RCT 11-13 2
Q7 Demonstrate that the finite gain defect of the op-amp in figure 7a can be represented by the
equivalent circuit of figure 7b where the op-amp is ideal. (This process expresses the effects of
finite Av in terms of normal circuit elements and thus makes them easier to interpret.) Hint:
approach the problem by showing that both circuits have the same transfer function.
R(1+ Av)
C
R R(1+ 1/Av)
C
vi vi
Av vo f vo
Figure 7a Figure 7b
3 T2252/RCT 11-13
The University of Sheffield
Department of Electronic and Electrical Engineering
Noise
In all questions the noise generated by a noisy resistor is 4kTR V2 Hz-1 where k 1.38 x 10-23
JK-1 and T 300 K.
vn
Q2 In the circuit of figure 2, RS is a noisy resistance of 10 k:,
vn is a noise source of 15 nV Hz 1/2 and in is a noise source RS in von
with a mean squared value of 2.25 x 10 24 A2 Hz 1. Find the
rms output noise, von. (24.8 nV Hz1/2)
Figure 2
Q3 In the circuit of figure 3, only the 20 V source is noise free.
(i) What is the noise voltage across the diode in terms of V Hz-1/2 ? (868pVHz-1/2)
(ii) What is the Thevenin equivalent resistance
from which that noise comes ? (91:) 68 k:
+
(iii) What is the effective noise temperature of the
resistance calculated in part (ii)? (150K) 20 V von
-
(iv) If the output is loaded by a 10 pF capacitor,
what is the total rms noise voltage at the out- Figure 3
put? (14.4PV)
The noise generated by a diode is 2eI A2 Hz-1 where e 1.6x10-19 C. (Hint: Remember that
the diode has a slope or incremental resistance rd kT/eI where I is the dc bias current through
the diode. This resistance will affect the noise but will not itself contribute to it)
Q4 In the circuit of figure 4, in 6 pA Hz 1/2. Find the total
R1 30 k: R3
rms noise voltage across C. (This question involves quite a lot
10 k: in
of careful circuit analysis so leave this it until you have done C
all the others.)
50 pF
R2
15 k: 10 k: R4
Q5 A particular amplifier has a noise free input resistance of
50k: and equivalent input noise voltage and current gener-
Figure 4
ators of 12 nV Hz-1/2 and 0.6 pA Hz-1/2 respectively. The
amplifier gain is 100 V/V. The amplifier is fed from a signal
source with a noisy Thevenin equivalent internal resistance of
20 k:
(i) What is the output noise voltage in terms of V Hz-1/2? (1.43PVHz-1/2)
(ii) What is the signal to noise ratio at the amplifier output if the input signal level is
50 PV rms and the amplifier noise bandwidth is 10 kHz? (402 or 26 dB)
(iii) What is the noise factor of the amplifier? (1.87)
Q6 Your boss asks you to characterise the noise performance of a new amplifier with infinite
input resistance and a gain of 50 V/V by using two equivalent input noise generators, vn and in.
When you connect a true rms voltmeter with a noise bandwidth of 5 kHz to the amplifier output
you find that when the input is short circuited to ground the meter reads 30 PV and when the
input is connected to ground via a 3 k: resistor, the meter reads 50 PV.
(i) Draw the noise equivalent circuit of the whole measurement system.
1/2 1/2
(ii) Calculate the values of vn and in? (8.49 nV Hz , 2.95 pA Hz )
Q7 A wideband amplifier in a matched 50 : system is made from two thin film amplifier
modules with gains of 25 dB and 15 dB and noise figures of 4.50 dB and 7.00 dB respectively
such that the overall amplifier bandwidth, 'f, is 1000 MHz.
(i) What is the gain of the series combination? (40dB)
(ii) What is the noise factor of each amplifier module? (2.82 and 5.01)
(iii) What is the noise figure of the combination if the higher gain module is at the
input end of the amplifier? (4.53dB)
(iv) What is the total added noise power delivered to the load? (76.2nW)
(v) What is the signal to noise ratio at the amplifier output if the input signal power
is 10 pW? (-0.7dB)
(vi) What is the effective noise temperature of the 50: source resistance? (851K)
The maximum available noise power is kT'f W where 'f is as defined in the question. This
question uses the notation (noise figure) = 10 log (noise factor).
T2253 2/13
EEE225 Transistor Amplifier Circuit
Analysis Problem Sheet Solutions
This problem sheet builds on the analysis of the two transistor amplifier cir-
cuits EEE118. It should prepare students well to tackle general problems in-
volving transistors in analogue circuits. The circuits used in questions 1, 2 & 3
are not directly examinable, nor are questions 8 – 10. The techniques needed to
solve the first few questions are the standard techniques of circuit analysis with
active devices. These techniques were first introduced in EEE118 and are further
developed in EEE225. If you can solve questions 1 – 3 confidently you’ll have no
problem at all with questions 4 – 7 which are examinable. Question 7 is quite
similar to the sort of questions that come up in EEE223, and some parts of it to
do with crossover distortion are in EEE225 as well.
1
The objective with the small signal derivations is to show which components
are in control of certain circuit parameters, therefore the final form of the answer
should be manipulated to reveal this information as clearly as possible. Arranging
equations in a way that reveals certain underlying relationships in the circuit
parameters is something computers are not very good at, this sort of work is best
done by hand.
2. Find the DC conditions again but taking into consideration the base current.
Perform your calculations for the full range of hFE . Find the range of hFE
from the Fairchild Semiconductor BC549 datasheet.
3. Explain (briefly, using bullet points for example) the job of each component
in the circuit.
4. Explain (in words) why the emitter resistor, RE acts to reduce the gain of
the circuit unless it is decoupled by CE .
5. Draw and label the small signal equivalent circuit for Figure 1.
7. Show that the mid-band voltage gain of the common emitter circuit shown
in Figure 1 is given by (1).
8. Show that the mid-band output resistance of the amplifier circuit in Figure 1
is given by (2).
9. Show that the mid-band input resistance of the amplifier circuit in Figure 1
is given by (3).
11. Find an expression for the transresistance vo /ii of the amplifier stage shown
in Figure 1.
12. Draw and label the small signal equivalent circuit for Figure 1 if CE is open
circuit at all frequencies of interest, all other capacitors may be considered
short circuit.
2
13. Assuming CE is open circuit at all frequencies of interest, derive the input
resistance, output resistance, voltage gain and current gain of the amplifier.
The final solutions take the forms shown in (5) - (8).
14. Given your solution for the small signal properties of the stage without
emitter decoupling, determine what components are in control of the voltage
gain, current gain, input resistance and output resistance. Comment on the
effect of emitter degeneration on the small signal parameters. For example,
which components are in control of the voltage gain? Which components
dominate input resistance? What are the main components which reduce
current gain?
15. State the numerical values of voltage gain, current gain, power gain, input
resistance and output resistance with and without emitter decoupling over
the range of hFE given in the datasheet.
vo gm RL0
=− (1)
vi 1 gm
Rs RB + β + 1
vo
ro = = RC (2)
it
vi 1
ri = = 1 gm (3)
ii RB
+ β
3
io RB β
=β or (4)
ii RB + rbe 1 + gmβRB
vo gm RL0
=− (5)
vi R 1
+ gm
+ 1
+ (β+1)
RE gm 1
+ 1
S RB β RS β RB RS
β
1+ gm RE (β+1)
ri = 1 1 β
(6)
RB
+ RE (β+1)
+ gm RE RB (β+1)
ro = RC (7)
io β
=− (8)
ii β 1
+ RE
+ RE
+1
gm RB RB RB
Question 1 part 1
This part is asking for the DC conditions when IB is ignored. I like to solve
this circuit by inspection as it is reasonably easy. Technically I do (Kirchhoff’s
Voltage Law) around the RE , VBE , VB loop, and KCL (Kirchhoff’s Current Law)
at the base node and at the collector node, but generally speaking I don’t write
out any algebraic loop or node equations. I just look at the circuit and draw on
the voltages and currents as I go along. Any method of solution is fine as long as
it works consistently. The components that set up the DC or quiescent conditions
are shown in Figure 2.
VS R2 15 · 20
VB = = =2V (9)
R1 + R2 130 + 20
VE 1.3 V
IE = = = 1 mA (11)
RE 1.3 kΩ
IE = IC ∵ IB = 0 (12)
VC = IC RC = 1 mA · 5 kΩ = 5 V (13)
∴ VCE + VE = 15 − 5 = 10 V (14)
15 V
I1 = = 100 µA (15)
130 kΩ + 20 kΩ
4
Figure 2: The common emitter amplifier circuit of question 1 showing only the
components which affect the DC (quiescent) conditions. This figure assumes that
the base current, IB , can be ignored.
Question 1 part 2
Part 2 of Question 1 asks for the same analysis as part one but making no
assumptions about IB . It also requires us to do the analysis twice once for the
minimum hFE and once with the maximum hFE that the Fairchild datasheet
specifies. We should expect the minimum hFE to require the largest IB and
we should design the circuit (if we were designing it as opposed to just analysing
someone else’s design) to use biasing resistors which will accommodate this higher
value of IB . The higher numerical value of IB computed by using the lowest value
of hFE is, in fact, the minimum IB we should design for. This is the value which
will allow any transistor of this type to work in the circuit.
It will probably be necessary to write out some node equations for this cir-
cuit, which is shown with base current in Figure 3. From the Fairchild BC549
Datasheet hFE(min) is 110 and hFE(max) is 800. Starting with KVL around the base
– emitter loop.
VB = VE + VBE (16)
KCL on the base node,
(I1 − IB ) R2 = (IC + IB ) RE + 0.7 (17)
IC = hFE IB (18)
(I1 − IB ) R2 = IB (hFE + 1) RE + 0.7 (19)
KVL around the biasing loop and power supply
VS = (I1 − IB ) R2 + I1 R1 (20)
5
IE = IC + IB (21)
Figure 3: The common emitter amplifier circuit of question 1 showing only the
components which affect the DC (quiescent) conditions without making assump-
tions about the base current.
Having developed (16) to (21) from the circuit using KVL and KCL we can
proceed by several methods and with several end goals in mind. We may choose
to solve for IB or I1 and then use this solution with another equation to find a
consistent solution for all unknown variables. We can choose to eliminate or use
substitution to solve the equations. A solution involving matrices is also possible
and favoured by some. To eliminate I1 , we could multiply (19) by (1 + R1/R2)
then add the result of this multiplication to (20) and then solve for IB . Another
possibility is to solve (20) for IB and then substitute the result into (19) to solve
for I1 . I used the substitution method and found (22).
VS (1 + hFE ) RE + R2 (VS − VBE )
I1 = (22)
(1 + hFE ) (R1 + R2 ) RE + R1 R2
Of course the form of your equation may be different to mine, and you may choose
to factorise it differently. Next we need to relate IB and I1 by transposing (20).
I1 R1 − VS
IB = + I1 (23)
R2
We need to relate IC to IB . Use IC = hFE IB in conjunction with (23) to yield,
I1 R1 − VS
IC = + I1 hFE (24)
R2
6
hFE 800 110
I1 [µA] 100.164 101.072
IB [µA] 1.228 8.043
IC [µA] 982.399 884.718
VC [V] 4.912 4.424
VL [V] 10.088 10.576
Table 1: DC conditions for the common emitter amplifier circuit of question 1 for
the extremes of hFE . Notice how the wide variation in hFE doesn’t upset the DC
conditions very much. This will hold as long as hFE is much greater than unity
and is a sign of a good circuit topology.
I1 R1 − VS
VC = + I1 hFE RC (25)
R2
The voltage on the collector node with respect to ground (this is different to VC
which is the voltage across the collector resistor, RC ) is,
I1 R1 − VS
VL = VS − + I1 hFE RC (26)
R2
The quiescent (DC) conditions for the common emitter amplifier circuit of
question 1 are listed in Table 1.
Question 1 part 3
• VS is the DC power supply. It supplies the current and voltage (and hence
power) to run the transistor. The transistor effectively modulates the DC
supply voltage with a (hopefully amplified) copy of the input waveform.
• vin and RS represent the Thévenin equivalent voltage and resistance of the
circuit or system driving our transistor amplifier.
• C1 blocks the biasing voltage on the base node from flowing into the source
and also blocks any DC component that the source may have from upsetting
the biasing conditions of the amplifier.
7
• R1 & R2 set up the biasing voltage on the base of Q1
Question 1 part 4
RE allows us to make the circuit operation somewhat independent of the transis-
tor hFE by providing feedback in the form of a voltage which subtracts from VBE
in proportion to the size of IE (which in turn is proportional to IC and IB ). This
negative feedback will happen for DC and AC signals and so reduces the gain
of the amplifier. The effects of temperature change, either due to environmental
conditions or due to power dissipation in the transistor, will also be stabilised as
increasing temperature increases IC for a given VBE which in turn increases VE
leaving less voltage for VBE , turning the transistor off somewhat and so reducing
IC .
Question 1 part 5
The small signal model for the common emitter amplifier of Figure 1 in the mid-
band (where all capacitors are short circuit) is shown in Figure 4.
Question 1 part 6
The transconductance of a BJT is given by taking the gradient of the trans-
fer characteristic at the operating point. The transfer characteristic is given by
(27). If we assume that the exponential term is much larger than unity while
the diode is conducting we can approximate the expression for IC to (28) differ-
entiating with respect to VBE yields (29). Looking at (29) it may be apparent
that everything inside the square braces is actually just (28). This shouldn’t be
too surprising as we know that differentiating an exponential always yields an
exponential multiplied by a coefficient. Substituting (28) into (29) provides the
standard result (30).
8
Figure 4: The small signal model of the common emitter amplifier circuit of
question 1 assuming all capacitors are short circuit at signal frequencies. RB is
the parallel combination of R1 and R2 . RL 0 is the parallel combination of RL and
RC .
q VBE
IC = IS exp −1 (27)
kT
q VBE
IC = IS exp (28)
kT
q q VBE
IS exp (29)
kT kT
q IC
gm = (30)
kT
We can also determine the relationship between the small signal resistance
looking into the base towards the emitter, rbe and gm and the current gain, β. The
current gain, hF E , which is equal to β at low frequencies is defined as d IC /d IB .
We can therefore write (31).
d VBE d IC d VBE β
rbe = = · = (31)
d IB d IB d IC gm
The small signal transistor parameters are given approximately in Table 2.
9
Question 1 part 7
To obtain the mid-band voltage gain we can use the small signal circuit shown in
Figure 4. Looking at the collector – emitter circuit we obtain (32).
rbe ||RB
vbe = vi (33)
RS + RB ||rbe
Substituting (35) into (32) and solving for vo /vi yields (36)
vo −g R 0
= m L (36)
vi g
RS βm + R1B + 1
Question 1: part 8
The output resistance of the circuit can be found by injecting a test current into
the output and measuring the voltage that the current source produces across
itself to ensure the desired test current flows. Dividing this voltage by the test
current yields the resistance looking into the output. A small signal model of this
situation is shown in Figure 5. By inspection of Figure 5 it may be evident that
the gm vbe controlled current source will pass no current as both vbe and ib are zero
while the input is grounded. The input is grounded when we consider the output
resistance as we’re interested on the effect of driving the output to see what effect
a signal experiences looking inwards. Input and output resistance are examples of
driving point impedances which are a useful tool in the analysis of many analogue
and microwave circuits and systems. Another way of thinking about what should
10
happen to the input signal source when we are determining the resistance looking
into the output is to imaging we are conducting an analysis using superposition.
Since the output driving current source, it , is the source we’re interested in, all
the other independent sources will be removed and replaced with their internal
impedances, hence vin becomes short circuit and RS remains to represent the
internal impedance of vin . Bearing all this in mind, inspection of Figure 5, should
show that ro = RC without the need for algebra.
Figure 5: The small signal model for the output resistance of the common emitter
amplifier in question 1. Note that RL is the input resistance of the circuit attached
to the output of our amplifier and therefore doesn’t count towards the output
resistance of this amplifier stage.
Question 1: part 9
The input resistance of the circuit can be found in a similar way to the output
impedance except that we drive the input not the output. It is possible to drive
the input with a current or voltage but since Figure 4 shows a voltage at the input
we will use it and find the input current, iin that flows due to the input voltage,
vin . We will then apply Ohm’s law to vin and iin to yield ri . Remember that RS
is the output resistance of the vin source and therefore does not contribute to the
input resistance of this amplifier. Buy inspection of the circuit we can write (37)
for the input resistance.
ri = rbe ||RB (37)
The parallel symbol is not a real mathematical operator so we would like to
remove it. It is desirable to remove rbe in my opinion as we can then see what
effect running at higher quiescent current will have (due to its influence on gm )
we can also see what effect a change in β would have.
1 1
ri = 1 1 = gm 1 (38)
rbe
+ RB β
+ RB
11
Equation (38) shows the relationship between DC conditions, β and the input
resistance. Generally speaking RB is made quite large in order to maintain as
higher input resistance as possible. gm can be made small too but gm also appears
in the numerator of the voltage gain expression so care must be taken when
deciding what advantage can be obtained in one metric of performance at the
expense of equal or worse disadvantage in performance of another metric. Having
obtained the input resistance, careful observation of the voltage gain equation (36)
will reveal that it can be re-written as (39) which may be helpful in illuminating
the relationship between voltage gain and input resistance when deciding a value
for gm . Don’t forget of course that changing gm means changing the quiescent
voltage on the collector which may limit the available voltage swing unless RL 0
is changed as well and this would change the gain too.
vo −gm RL 0
= RS (39)
vi ri
+1
One way to look at (38) is to argue that the circuit cannot work without the
biasing resistors. Let us assume that the transistor is perfect, in that case as
β → ∞, ri → RB . We can then see why RB is made large, it is essentially setting
the maximum input resistance. Of course the resistors that make up RB must
pass somewhat more than (≈ 10x) the DC base current in order to effectively
bias the transistor. For a given collector current higher hF E will yield a lower
I1 and hence permit larger RB . In terms of small signals the gm /β term in the
denominator will decrease the input resistance as gm (and therefore IC ) increases.
ri will increase with increasing β, up to the limit of RB .
Question 1: part 10
The current gain is found by solving for io /ii . We could change the input source
to a Norton source if we wished, but I believe the solution is easier if we keep
the Thévenin source. By inspection of Figure 4 we can see that the input current
is divided into RB and rbe . Remembering that RS is part of the source we have
(40).
ii RB
ib = (40)
rbe + RB
Looking at the collector side we can write (41)
io = β ib (41)
Substitution should be fairly straight forward. We might like to remove rbe to see
what effect changing gm or β will have. Substituting rbe = β/gm appropriately
leads to (4).
12
Question 1: part 11
The transresistance can be derived directly from the small signal model of Figure 4
using the same techniques as for the other small signal parameters. Alternatively
it can be produced by noting that vo /ii = vo /vi · vi /ii . In other words the voltage
gain multiplied by the input resistance. Assuming room temperature a numerical
value between 430 kΩ and 1.68 MΩ is believable, depending on the value of β.
The transresistance increases as β increases.
Question 1: part 12
Making CE open circuit means RE is no longer decoupled from the signal’s per-
spective and feedback can exist between output and input. This is clearly depicted
in the new small signal model of Figure 6.
Figure 6: The small signal model for the common emitter amplifier in question 1
when assuming that RE is not decoupled by CE .
Question 1: part 13
Part 14 asks for a re-derivation of all the small signal parameters assuming RE is
not decoupled. The addition of a component which allows the input and output
to depend on each other complicates the analysis somewhat. I will only show the
voltage gain here. The proof of (6) – (8) are left to the reader, the methods are
the same as shown for the degenerated case. To obtain the voltage gain, we can
do KCL at the base and emitter nodes and KVL around the rbe , RB and RE loop.
13
These lead to (42) – (44).
vi − vbe − ve vb vbe
= + (42)
RS RB rbe
ve vbe
= (β + 1) (43)
RE rbe
vb = vbe + ve (44)
A number of approaches are possible to solve these equations, and these are not
the only equations which can be used to solve the circuit. Any valid method is
acceptable. We proceed by substituting (44) into (42) to remove vb .
vi − vbe − ve vbe + ve vbe
= + (45)
RS RB rbe
We could then transpose (43) to make ve the subject to yield (46).
vbe
ve = (β + 1) RE (46)
rbe
Substitution of (46) into (45) removes ve to leave (47) which is an expression
relating vi to vbe .
vbe vbe
vi − vbe − rbe
(β + 1) RE vbe + vbe
rbe
(β + 1) RE
= (47) +
RS RB rbe
Having related the output control parameter of our choice, vbe , (we could have
chosen to use ib instead) to the input, vi , we seek a relationship between the
output variable vo and the control variable vbe . Use KCL at the collector node.
vo = −gm vbe RL 0 (48)
where RL 0 is the parallel combination of RC and RL . We need to transpose (47) to
make vbe the subject. This is a little tiresome but only takes five lines of algebra,
less if you can do multiple steps at once, however you get there the result is (49).
vi
vbe = (49)
1 1 1 (g m rbe +1) RE 1 1
RS RB + rbe + RS + rbe
· RS
+ RB
To obtain the final result substitute (49) into (48) to yield (50).
vo −gm RL 0
= (50)
vi RS R1B + 1
+ 1
+ (gm rbe +1) RE
· 1
+ 1
rbe RS rbe RS RB
All that remains is to use rbe = β/gm if it is appropriate to show the effects of
changing gm and β more clearly and to demonstrate which components are in
control of the circuit metric. There is no ideal form for this expression but I like
(51).
vo gm RL0
=− (51)
vi R 1
+ gm + 1 + (β+1) R g 1
+ 1
S RB β RS β E m RB RS
14
Question 1: part 14
When looking at the equations that describe the metrics of the circuit’s small
signal performance we might ask what components would be in control if β was
very large. Ideally we would like the transistor not to be in control of the metrics
but for us to be able to set them using resistors. If this is possible it means that the
particular transistor is not important for the circuit operation. This is significant
because we have no control over β, but we would like our circuit to behave
(more or less) the same whatever transistor we use. The method to determining
what’s important is to think about what’s big compared to everything else in
the numerator and denominator. Taking the voltage gain equation, (51) as an
example, we can look at the terms in the denominator in turn. The first three
terms RS /RB , (RS gm ) /β and 1 are not going to be large. RS will probably not
be as big as RB because we want to make RB big for input resistance reasons
and Thévenin sources are more ideal when RS is small. (RS gm ) /β will be less
than unity with sensible numbers and RS /RS is unity. (β + 1)/β is more or
less 1 if β >> 1 and RS /RB + RS /RS ≈ 1 if RB >> RS which we already
said is quite likely. We can therefore reduce the last term in the denominator to
RE gm . Looking at the numerator we have gm RL 0. The input impedance of the
next circuit should be much higher than the output impedance of this amplifier
(which is RC ) so we may presume that RL 0 ≈ RC . The gm term in the numerator
and denominator cancel leaving (52)
vo gm RL0 RC
=− ≈ − (52)
vi R 1
+ gm
+ 1
+ (β+1)
RE gm 1
+ 1 RE
S RB β RS β RB RS
We can see this is true for the numbers in this question by comparing the exact
answer with the simplification. The exact answer for β = 800 is approximately
−3.629 and the simplification provides approximately −3.846. This represents
about 5% error. The error with β = 110 is around 7%. Considering that all
resistors have some tolerance, the level of error is quite acceptable in most cases
especially considering the simplification it allows us to use.
Similar arguments can be made to show which circuit elements control the
input resistance and current gain and a diligent student will attempt these ex-
planations as they provide deep insight as to what the controlling factors are in
these circuits. To provide some guidance ri → RB as β → ∞ and io /ii ≈ RB /RE .
Question 1: part 15
The numerical parameters are given in Table 3.
15
hFE vo /vi io /ii ri [kΩ] ro [kΩ]
non-degenerated 800 −161.243 −340.411 2.713 5.000
degenerated 800 −3.629 −12.813 17.077 5.000
non-degenerated 110 −140.002 −92.777 10.356 5.000
degenerated 110 −3.590 −11.564 15.508 5.000
Table 3: Numerical solutions for the small signal properties amplifier of question 1
with and without emitter degeneration.
2. Find the DC conditions again but taking into consideration the base current.
Perform your calculations for the full range of hFE . Find the range of hFE
from the On Semiconductor MJE340 datasheet.
3. Explain (briefly, using bullet points for example) the job of each component
in the circuit.
4. Draw and label the small signal equivalent circuit for Figure 7.
6. Assuming the capacitors are short circuit at all frequencies of interest, show
that the input resistance of the amplifier circuit in Figure 7 is given by (53).
7. Assuming the capacitors are short circuit at all frequencies of interest, show
that the output resistance of the amplifier circuit in Figure 7 is RC .
8. Assuming the capacitors are short circuit at all frequencies of interest, show
that the transresistance (output voltage / input current) gain of the com-
mon base circuit shown in Figure 7 is given by (55).
16
11. Practical transistors have a physical resistance between the active part of
the base region and the transistor package leg. This is partly made from the
ohmic bond-wire resistance inside the package and partly made from the
ohmic resistance of the semiconductor between the position at which the
bond wire is attached to the semiconductor and the position of the active
part of the base material. Draw the small signal equivalent circuit assuming
that this base spreading resistance, rb , appears in series with the base leg.
C1 is still short circuit at all frequencies of interest.
12. Re-derive your small signal results so far assuming taking into account the
base spreading resistance. The results are shown in (58) - (61).
13. Reflect on and then qualitatively describe (i.e. in words) the effect of the
base spreading resistance on the stage’s small signal parameters. Comment
on the similarity of the feedback provided by lifting the base node in the
common base circuit with the effects of degenerating the emitter in the
common emitter circuit.
14. State the numerical values of the small signal metrics of performance with
and without the base spreading resistance over the range of β. You may
assume that the amplifier is operated at a low frequency and therefore
β = hF E
ve 1
= gm 1 (53)
iin β
+ gm + RE
vo
= RC (54)
io
vo gm RL0
= gm 1 (55)
iin β
+ gm + RE0
β
rbe
1 β 1
≈α (56)
rbe
+ rbe
+ RE0
vo gm RL0
= (57)
vi 1
+ gm + 1
+ 1
rbe Rs RE
ve rb 1
≈ + (58)
iin β gm
vo RL0
= 1+β 1 rb
(59)
iin β
+ 0
gm RE
+ 0 β
RE
17
io 1
= 1+β 1 rb
(60)
iin β
+ 0
gm RE
+ 0 β
RE
vo gm RL0
= (61)
vin Rs gβm + 1
+ gm rb
+ gm + 1
+ gm rb
Rs β Rs RE β RE
Question 2: part 1
Since the circuit topology for this common base amplifier is similar to the common
emitter from question 1 we can proceed along similar lines. The base current is
ignored in part 1 so we can probably solve by inspection. The voltage on the base
is a potentially divided version of the supply voltage,
VS R2 30 · 2.8
VB = = = 5.676 V (62)
R1 + R2 12 + 2.8
VE 4.976
IE = = = 9.95 mA (64)
RE 500
IE = IC ∵ IB = 0 (65)
18
∴ VCE + VE = 30 − 11.942 = 18.058 V (67)
30
I1 = = 2.027 mA (68)
12 + 2.8
Question 2: part 2
Part 2 of question 2 asks for the same analysis as part one but making no assump-
tions about IB . It also requires us to do the analysis twice once for the minimum
hFE and once with the maximum hFE that the On Semiconductor datasheet spec-
ifies. We should expect the minimum hFE to require the largest IB and we should
design the circuit (if we were designing it as opposed to just analysing someone
else’s design) to use biasing resistors which will accommodate this higher value
of IB . The higher numerical value of IB computed by using the lowest value of
hFE is, in fact, the minimum IB we should design for. This is the value which
will allow any transistor of this type to work in the circuit.
It will probably be necessary to write out some node equations for this circuit.
Eagle eyed readers will note that from a DC conditions perspective this circuit
shape is identical to the common emitter circuit shape which is shown with base
current in Figure 3. Another way of expressing this is to observe that the decision
to call an amplifier common emitter or common base is really just an expression
of where its input and output are positioned and which terminal is common to
both. We can use the same equations for this problem as in part 2 of question
1. From the On Semi datasheet hFE(min) is 30 and hFE(max) is 240. Starting with
KVL around the base – emitter loop.
VB = VE + VBE (69)
IC = hFE IB (71)
(I1 − IB ) R2 = IB (hFE + 1) RE + 0.7 (72)
KVL around the biasing loop and power supply
VS = (I1 − IB ) R2 + I1 R1 (73)
IE = IC + IB (74)
Having developed (69) to (74) from the circuit using KVL and KCL we can
proceed by several methods and with several end goals in mind. We may choose
to solve for IB or I1 and then use this solution with another equation to find a
19
consistent solution for all unknown variables. We can choose to eliminate or use
substitution to solve the equations. A solution involving matrices is also possible
and favoured by some. To eliminate I1 , we could multiply (72) by (1 + R1/R2)
then add the result of this multiplication to (73) and then solve for IB . Another
possibility is to solve (73) for IB and then substitute the result into (72) to solve
for I1 . I used the substitution method and found (75).
Of course the form of your equation may be different to mine, and you may choose
to factorise it differently. Next we need to relate IB and I1 by transposing (73).
I1 R1 − VS
IB = + I1 (76)
R2
We need to relate IC to IB . Use IC = hFE IB in conjunction with (76) to yield,
I1 R1 − VS
IC = + I1 hFE (77)
R2
I1 R1 − VS
VC = + I1 hFE RC (78)
R2
The voltage on the collector node with respect to ground (this is different to VC
which is the voltage across the collector resistor, RC ) is,
I1 R1 − VS
VL = VS − + I1 hFE RC (79)
R2
The quiescent (DC) conditions for the common emitter amplifier circuit of
question 1 are listed in Table 4.
Question 2 part 3
Since the circuit topologies are similar for question 1 and question 2 we may
presume that the purpose of many of the components are similar too. In Figure 7,
• VS is the DC power supply. It supplies the current and voltage (and hence
power) to run the transistor. The transistor effectively modulates the DC
supply voltage with a (hopefully amplified) copy of the input waveform.
• iin and RS represent the Norton equivalent current source and resistance of
the circuit or system driving our transistor amplifier.
20
hFE 240 30
I1 [mA] 2.0347 2.0800
IB [µA] 40.5283 280.0000
IC [mA] 9.7268 8.4000
VC [V] 11.6722 10.0800
VL [V] 18.3278 19.9199
Table 4: DC conditions for the common base amplifier circuit of question 2 for
the extremes of hFE . Notice how the wide variation in hFE doesn’t upset the DC
conditions very much. This will hold as long as hFE is much greater than unity
and is a sign of a good circuit topology.
• C1 is used to decouple the base node to ground such that an AC signal will
choose the low impedance of the C1 over the moderate resistance of R1 and
R2 in order to get to ground. The result is that from the signal’s point
of view, R1 and R2 do not exist and therefore can not provide feedback.
The existence of C1 does not change the effect of R1 and R2 on the DC or
thermal conditions however.
• C2 and C3 couple the input and output signals into the amplifier while
preventing the DC component of both the source and the transistor affect-
ing each-other in the case of C3 and preventing the transistor stage DC
conditions interfering with the operation of the next stage in the case of C2
• R1 & R2 set up the biasing voltage on the base of Q1 , but are also a source
of negative feedback at signal frequencies if they are not decoupled by C1 .
Question 2 part 4
The small signal model for the common base amplifier of Figure 7 in the mid-band
(where all capacitors are short circuit) is shown in Figure 8.
21
Figure 8: The small signal model of the common base amplifier circuit of ques-
tion 2 assuming all capacitors are short circuit at signal frequencies. RE 0 is the
parallel combination of RE and RS . RL0 is the parallel combination of RL and
RC .
Table 5: Small signal parameters for the common base amplifier circuit of ques-
tion 2 for the extremes of hFE .
Question 2 part 5
The small signal parameters are computed by the same method as question 1.
The results are shown in table 5.
Question 2 part 6
The analysis for the small signal metrics of performance of this amplifier, and
all low frequency linear circuits are developed by the same methods - Kirchhoff’s
laws and Ohm’s law. For the input resistance we can begin by using KCL on the
emitter node,
ib + gm vbe + iin = iE (80)
KCL on the collector node,
gm vbe = i0L (81)
and by KVL around the base emitter loop,
ve + vbe = 0 (82)
22
we know that rin is the driving point impedance looking into the emitter. If we
define the voltage on the emitter with respect to ground as ve we can write,
ve
rin = (83)
iin
from (80),
ve ve
− − gm ve + iin = (84)
rbe RE
collecting terms in ve ,
1 1
ve − − gm − = −iin (85)
rbe RE
dividing by iin ,
ve 1
=− 1 1 (86)
iin − rbe − gm − RE
Ideally we would like iin to flow into the emitter of the transistor rather than
through the emitter biasing resistor therefore RE should be much higher than rin
and the 1/RE term in the denominator is therefore not significant. 1/rbe = gm /β,
assuming β >> 1 the gm /β term in the denominator is insignificant compared to
the gm term. Therefore rin ≈ 1/gm .
Question 2 part 7
This is the same argument as for the output resistance of Question 1. The output
resistance for the common base and common emitter is only significantly affected
by the transistor if rce or ccb are included in the model. These are often needed to
properly analyse the effect of output impedance on a current source for example.
Question 2 part 8
This analysis follows similar lines as for the input resistance. This analysis is
performed using gm and vbe rather than β and ib , but the choice is yours. Start
by summing currents at the emitter node,
23
From (88),
−vbe vbe
+ gm vbe + iin + 0 = 0 (90)
rbe RE
Make vbe the subject,
iin
vbe = 1 1 (91)
rbe
+ gm + RE0
Question 2 part 9
Part 9 asks for the current gain. This analysis is almost identical for the tran-
simpedance except that the substitution in (89) of io = − Rvo0 is not made such
L
that io remains our output parameter and we seek io /iin . Therefore,
io −gm
= 1 1 (94)
iin rbe
− gm − RE0
which is,
β
rbe β rbe 1
(96)
rbe
+ rbe
+ RE0
0 0
If 1/RE is small compared to β (i.e. RE is large compared to β), (96) reduces to,
io β
= =α (97)
iin 1+β
24
Question 2 part 10
The voltage gain can be found by considering ve /iin while using a current source
input or by deriving the input impedance and then using a source transformation
on the current source to show that a Thévenin equivalent vin is potentially divided
between Rs and rin . A more “brute force” approach is to derive the voltage gain
using a Thévenin source directly, this is easier to understand but does involve
some unnecessary work. The new small signal circuit is shown in Figure 9.
Figure 9: Common base amplifier circuit small signal model for voltage gain.
25
making vbe the subject,
−vi
vbe = (102)
1 1 1
Rs rbe
+ gm + Rs
+ RE
substituting (102) into (103) and solving for the voltage gain,
vo gm RL0
= (104)
vi 1
+ gm + 1
+ 1
rbe Rs RE
Question 2 part 11
The small signal model including the base spreading resistance is shown in Fig-
ure 10.
Figure 10: Common base amplifier circuit small signal model with finite base
spreading resistance, rb .
Question 2 part 12
This part of the question asks for re-derivation of all of the small signal metrics
assuming rb is non-zero. The derivations are somewhat more involved than when
the base is ground, but they are instructive in showing the effect on negative
feedback of the signal in the common base amplifier. Only the transimpedance
and input resistance result is shown in full here. The methods to derive the other
results are similar.
26
For the transimpedance use Figure 10. Begin by summing currents at the
emitter,
iin + ib + β ib = ie (105)
Summing voltages around the base loop,
vb + vbe + ve = 0 (106)
summing currents on the collector node and using Ohm’s law on RL0 ,
vo = −β ib RL0 (108)
ib (rbe + rb )
iin + ib + β ib = − 0
(110)
RE
vo RL0
= 1+β rbe rb
(112)
iin β
+ β RE0 + 0 β
RE
27
The current gain derivation is very similar to the transimpedance derivation
but takes the form,
io 1
= 1+β 1 rb
(114)
iin β
+ g R 0 + 0
R β
m E E
This simplifies to io /iin = α by the same logic as used for the transimpedance
above. α is sometimes called the common base current gain just as β is sometimes
called the common emitter current gain.
The input impedance including rb is derived by the same method but we seek
rin = ve /iin . Begin by summing currents at the emitter, and note that ie = ve /RE .
Also recall that the source impedance does not form part of the input impedance
of an amplifier.
ve
iin = (β + 1) ib = (115)
RE
summing voltages around the base emitter loop
ib rb + ib rbe + ve = 0 (116)
isolate (115) for ib ,
ve
RE
− iin
ib = (117)
β+1
Substituting (117) into (116),
ve iin
− (rb + rbe ) + ve = 0 (118)
RE (β + 1) β + 1
after some manipulation,
rb +rbe
ve β+1
= rb +rbe (119)
iin RE (β+1)
+ 1
Looking at (119) if RE >> 1 and β >> 1 then the fraction in the denominator
is insignificant compared to the 1. and the input resistance reduces to,
rb + rb e
rin = (120)
β+1
using rbe = β/gm ,
β
rb + gm
rin = (121)
β+1
and if β >> 1,
rb 1
rin = + (122)
β gm
Therefore a non-zero rb increases the input impedance of amplifier. This is unde-
sirable as the common base is a current input amplifier and therefore rin should
be as low as possible. We can minimise the effect of rb by ensuring we choose a
transistor with a large β.
28
β vo /vi io /ii ri [Ω] ro [kΩ] vo /ii [V/A]
non-degenerated 240 11.7460 × 10−3 0.9906 2.635 1.200 1174.596
degenerated 240 11.7450 × 10−3 0.9905 3.282 1.200 1174.499
non-degenerated 30 11.4068 × 10−3 0.9620 2.963 1.200 1140.685
degenerated 30 11.3995 × 10−3 0.9614 3.289 1.200 1139.951
Table 6: Numerical solutions for the small signal properties of the common base
amplifier in question 2 with and without base degeneration.
Question 2 part 13
This question asks for a description the effect of rb as a feedback mechanism.
Essentially the effect of rb (or a lack of decoupling of the base node) is analogous
to the effect of a non-decoupled emitter resistor in the common emitter circuit.
It is a form of negative feedback which acts to lower the gain of the amplifying
stage. rb drops a voltage proportional to ib . ib is a function of iin and because
the voltage across rb will subtract from vbe , the larger rb the more vbe is reduced
and hence ic is reduced and so the output voltage is reduced.
Question 2 part 14
The various metrics of performance are computed by inserting the resistor values
and small signal parameters for the circuit of Figure 7. Numerical values are
shown in Table 6. One metric that we have not considered is the transconductance
(of the whole amplifier as opposed to the transconductance of the transistor).
However, since we like to think about the common base amplifier as being current
driven it is not very productive to ask about a metric which is io /vin , similarly it
is unlikely that one would quote the voltage gain of a common base amplifier.
29
Question 3: An Emitter Follower Circuit
This question is about a capacitively coupled emitter (common collector) follower
amplifier, shown in Figure 11. This emitter follower stage is used to drive a 16 Ω
loudspeaker represented by RE . The DC current biasing the stage also flows
through RE . This is often not practical but for the sake of making the question
easier we will assume that this is a magical speaker (from my office...) that doesn’t
mind having a large DC component of current flowing through it. Of course the
DC current dissipates power in the speaker but this would not be useful output
power (sound) it would be heat. It would also hold the voice coil away from the
center position but as we have said all these problems are ignored for the sake of
simplicity.
1. Find the DC conditions of the emitter follower circuit in Figure 11 assuming
the base current of Q1 can be ignored. Choose VB such that VL , the emitter
voltage, is half way between the power supply and ground, thereby providing
the largest possible output voltage swing.
2. Find the DC conditions again but taking into consideration the base current.
Perform your calculations for the full range of hFE . Find the range of hFE
from the On Semiconductor MJ15003 datasheet.
3. Explain (briefly, using bullet points for example) the purpose of each com-
ponent in the circuit.
4. Sketch the output characteristic (VCE vs IC as a function of VBE or IB ), add
the operating point and the load line. On secondary axes, sketch the time
dependent sinusoidal waveforms showing how the operating point moves
according to the input signal, Vin and the output signal, VL that results
from this input.
5. Draw and label the small signal equivalent circuit for Figure 11.
6. Calculate the small signal transconductance, gm , and base emitter resis-
tance, rbe at the operating point for the range of hFE given in the On
Semiconductor datasheet. You may assume that the transistor stage will
be operated at low frequencies and therefore β = hFE . Calculate the gm and
rbe at the maximum and minimum collector current based on the amplitude
of the input waveform. Describe the effect will the variation of gm and rbe
have over the course of one cycle on the shape of the voltage and current
waveforms in the circuit. To simplify your discussion you may assume β
has no IC dependence and that neither β nor gm depend on temperature
(or that the transistor will not get hot - same thing).
30
7. Based on the size of the input signal, the DC conditions you’ve calculated
and your knowledge of electronic circuits, how valid is the small signal
assumption in this case?
10. Assuming C1 is short circuit at all frequencies of interest, show that the
voltage gain of the circuit shown in Figure 11 is approximately unity.
11. Develop an expression for the current gain, determine its maximum value
and the conditions required to reach that maximum.
13. Calculate the average power dissipated in the loudspeaker, RL in one cycle
if Rs = 0.1 Ω and if Rs = 600 Ω. Qualitatively, do these figures relate to
the earlier input resistance derivation?
14. Derive an expression for the instantaneous power dissipation in the tran-
sistor, Q1 . You may assume that the power dissipated in the transistor is
the product of IC and VCE which will both vary approximately sinusoidally
given a sinusoidal input. Hint: this involves some integration of sines and
cosines.
15. Using your derivation find the input signal amplitude which results in the
highest power dissipation in the transistor.
16. Show that the highest possible efficiency of this circuit is 25%. You may
neglect losses in R1 and R2 .
17. What is the conduction angle of Q1 ? What class of operation is this stage
operating in?
rin ≈ RB (123)
where RB = R1 ||R2 .
1 RB
ro ≈ + (124)
gm β
31
Figure 11: Emitter Follower Amplifier Circuit
Question 3 part 1
This part of the question asks for the DC conditions. This should be famillier if
question 1 or question 2 has been attempted already. The question tells us that
the emitter is at 25 V with respect to ground so we know VB = 25.7 V. We also
know that IE = IC because the question requires us to ignore IB .
VL 25
IC = = = 1.5625 A (125)
RE 16
As long as we’re ignoring IB , R1 and R2 can be as big or small as you like but
they must form a potential divider with VS such that VB is at 25.7 V. Let’s choose
R2 = 39 Ω. The resason for the very low value will become apparent when we
attack part 2 in which IB is not neglected. The value for R1 is given by Ohm’s
law,
V 50 − (25 + 0.7)
R1 = = 25+0.7 = 36.87 Ω (126)
I 39
Question 3 part 2
Now IB is involved we must use a relationship between IC and IB , the large signal
common emmitter current gain hF E ,
IC 1.5625
IB = = = 62.5 mA (127)
hF E(min) 25
32
The rule of thumb for base current is that it should be ten times lower than the
current flowing in the biasing network. This is the reason for the very low choice
of R1 and R2 in part 1. Keeping our choice of R2 = 39 Ω and summing currents
at the base node.
VB 25 + 0.7
I1 − IB = = (128)
R2 39
I1 = 721.47 mA (129)
We can see that I1 is slightly more than ten times IB , so our rule of thumb is
intact.
50 − (25 + 0.7)
R1 = = 33.68 Ω (130)
I1
Choosing the other extreme of hF E
IC 1.5625
IB = = = 10.42 mA (131)
hF E(max) 150
VB 25 + 0.7
I1 − IB = = (132)
R2 39
I1 = 669.4 mA (133)
50 − (25 + 0.7)
R1 = = 36.30 Ω (134)
I1
The very low values of resistors in the biasing network pass a large DC current
from the supply to ground (but this is necessary to maintain correct bias in the
face of a range of hF E , they disipate a good deal of power and would get hot.
They also create a very low input resistance for this amplifier, which is highly
undesirable. This circuit is not practical as it stands, but it is instructive to
consider its faults and how we might ammeliorate them.
Question 3 part 3
This part asks for the purpose or “job” of each component in the circuit.
• There are several ways of thinking about the job of the transistor which are
all compatible with eachother. It modulates the supply voltage with the
input waveform to produce the correct waveshap accross RL . Alternatively
it controlls the current flowing in RL in order to produce the correct voltage
accross RL . It provides current gain to the base current waveform which
then flows in RL thereby increasing the capacity of the input signal to
deliver power to the load. It transforms the source resistance of VS to make
it possible to deliver the required power to RL . All these describe the action
of the transistor.
33
• The resistors R1 and R2 bias the transistors base (by providing a potential
divider of VS and in so doing control VE and thefore the quiescent current
in the load. They also provide the DC part of the base current required for
the transistor to be in the forward active region.
• The load resistor disipates wanted, signal (AC), and quiescent, DC power.
The AC component of this becomes music (programme material) the DC
part is converted to heat.
• C1 couples the input signal into the amplifier stage and prevents the DC
voltage on VB driving a DC current into the source.
• vin is the signal source i.e. music or programme material of some kind,
something that carries information in this case audio.
Question 3 part 4
This sketch is slightly different to the ones in the lecture notes and handouts
because the question asks you to use vin and VL . This requires some thought as
to how to properly represent everything because VCE is on the horizontal axis
of the characteristic is out of phase with the voltage across the load, VL . This
is because VCE + VL = VS . If VCE is rising VL must be falling (provided VS is
constant, which it is). It is not possible to calculate the values of VBE and IB .
They have been taken from a simulation (along with the output characteristic
curves). But everything else can be figured out with a pad and pen and some
thought. The diagram shown is linearised. This means that some liberty has
been taken to ensure that the signals are sinusoidal despite the fact that real
amplifiers have non-linearity. If one considers the VBE values: 659 mV - 499mV
= 160 mV (negative peak to average) but 659 mV + 160 mV = 819 mV not
793 mV which is the positive peak value of VBE . This discrepency is due to the
exponential relationship between VBE and IC which lies at the heart of transistor
opperation. The characteristic line for IB = 8.56 mA doesn’t quite meet the
input and output waveforms. This is another example of how the diagram has
been linearised, these points shold meet but this is only possible if the input and
output waveforms have some distortion.
34
A
IC [A] 3.5 6m
8.5
=
IB
3.0 V,
79 3m
=
41 V BE
2.5 0 mA
Input Voltage, vin + VB [V]
, I B
= 5 .2
mV
2.0 = 659
VBE
Time [ms]
25.7 1.5
1.0
I = 1.58 mA
VBE = 499 mV, B
10 0.5
0.5 1.0 1.5 2.0 2.5
VCE [V]
VBE or IB can be thought of as the input
40
35
30
25
20
15
10
VL [V]
Supply Voltage = 50 V
50 − 0
Load Line Resistance = = 16 Ω
3.125 − 0
0.5
β at the operating point: draw vertical line through
three lines of IB and compare change in IC with IB
1.0
gm of the transistor at the operating point: as for β but compare
change in IC with VBE
1.5
Time [ms]
Don’t forget that VBE 6= vin for this circuit.
Also IB 6= iin
Figure 12: Emitter Follower Amplifier Circuit characteristic plot showing Vin and VL , the transistor characteristics and
the load line of RE .
Question 3 part 5
The small signal model of Figure 11 is shown in Figure 13. Where the parallel
combination of R1 and R2 is shown as R1 ||R2 and is called RB for simplicity.
Figure 13: Small signal model of the emitter follower amplifier of Question 3.
Question 3 part 6
The transconductance is calculated by the usual method. To find it we need the
maximum and minimum collector current over one full cycle of the output wave-
form. The transconductance at the opperating point (under quiescent conditions)
is given by,
VL 25
ICQ = Q = = 1.5625 A (135)
RL 16
e ICQ 1.6 × 10−19 · 1.5625
gmQ = = = 60.386 A/V (136)
kT 1.38 × 10−23 · 300
β(min) 25
rbemin = = = 0.414 Ω (137)
gm 60.386
β(max) 150
rbemax = = = 2.484 Ω (138)
gm 60.386
For the minimum transconductance,
VL(min) 25 − 15
IC(min) = = = 0.625 A (139)
RL 16
e IC(min) 1.6 × 10−19 · 0.625
gm(min) = = = 24.155 A/V (140)
kT 1.38 × 10−23 · 300
β(min) 25
rbemin = = = 1.035 Ω (141)
gm 24.155
36
β(max) 150
rbemax = = = 6.210 Ω (142)
gm 24.155
For the maximum transconductance,
VL(max) 25 + 15
IC(max) = = = 2.5 A (143)
RL 16
e IC(max) 1.6 × 10−19 · 2.5
gm(min) = = = 96.618 A/V (144)
kT 1.38 × 10−23 · 300
β(min) 25
rbemin = = = 0.259 Ω (145)
gm 96.618
β(max) 150
rbemax = = = 1.553 Ω (146)
gm 24.155
The effect of gm changing (and so rbe also changing assuming β is constant)
will be a change in the input and output resistance of the amplifier over the
course of one cycle of the input waveform. This will lead to some distortion of
the waveform. For example as the output resistance increases some voltage will
be lost accross this internal resistance and the voltage accross the load, vL will
be slightly smaller than would be expected. Similar arguements hold for the
input resistance falling and loading the source somewhat (although the source
impedance in this queseiton is purpously made very small to avoid the effect).
The loading of the source would make the input voltage seem artificially small and
hence the output voltage would be depressed as well. Since these effects depend
on the part of the cycle that is presently passing into the amplifier the shape
of the output waveform will be changed compared to the input. These effects
can be interpreted as a change in voltage or current gain as well, but they are
ultimately driven by the same underlying process which is a dependence of gm on
the signal. The effect of this change in parameters is mitigated somewhat by the
large negative feedback which exists in this circuit. The circuit tries to keep the
output the same as the input less the transistor VBE . Even though the small signal
parameters are changing significantly over one cycle the distortion introduced by
the cirucit is quite small (about 0.15% for a 1 kHz fundemental when considering
the first 21 harmonics i.e. the audio bandwidth, ignoring temperature effects)
Question 3 part 7
The small signal assumption is not valid. Even though the distortion is not very
great gm is changing markedly over the course of one signal cycle. This is therefore
a large signal problem. This does not stop us using small signal techniques but
we must remember that the answers we get from small signal analysis will vary
with the signal.
37
Question 3 part 8
This is yet more small signal analysis, well done if you’ve done them all up to now,
but, don’t you have some other courses to work on as well? All of the analysis
for this circuit is tricky because there is always feedback between the output and
input. The input resistance is approximately equal to RB in Figure 13. Using
the small signal model shown in Figure 13 begin by summing voltages around the
input loop,
vin = ve + vbe (147)
Where ve is the voltage on the emitter node (= vL ). We can also sume currents
flowing into the base node,
iin = iB + ib (148)
where iin is the current flowing from the source into the circuit, IB is the current
flowing in RB = R1 ||R2 and ib is the current flowing in rbe . Lastly we can sum
currents flowing into the emitter node,
vbe
ie = gm vbe + (149)
rbe
where ie is the signal current flowing in RE . Use Ohm’s law on (149) and transpose
to obtain ve ,
vbe
ve = gm vbe + RE (150)
rbe
and substitute into (147),
1
vi = vbe 1 + gm + RE (151)
rbe
Now some transposition is required where all the terms in vin are arranged on one
side of the equality and all the terms in iin are on the other side. We will divide
38
vin by iin to obtain the input resistance rin . I’ve skipped four lines of working
and arrived at,
rbe rbe gm RE rbe RE rbe RE
vin 1 + + + = iin rbe + rbe gm RE + (155)
RB RB RB rbe rbe
dividing through,
r
vin rbe + rbe gm RE + berbeRE
rin = = (156)
iin 1 + RrbeB + rbe R
gm RE
B
rbe RE
+R B rbe
There are some obvious cancellations which are left in now for completeness. As
usual rbe will be replaced with β and gm to give,
β
gm
+ RE (β + 1)
rin = β RE
(157)
1+ gm RE
+ RB
(β + 1)
If we accept that the β/gm in the numerator is not very significant comapred to
RE β and that β >> 1 and that β/ (gm RE ) also doesn’t play a big part (put some
numbers in if you don’t like the idea of just getting rid of it). The expression
becomes,
RE β
rin ≈ RE (158)
RB
β
which simplifies to,
rin = RB (159)
Taking the operating point value for gm = 60.386 A/V, assuming β = 100 and
RB = 18.95 Ω the exact answer is rin = 18.73 Ω. The approximation (that rin
= RB ) represents an error of about 1.18%, which is likely to be acceptable under
most circumstances.
Question 3 part 9
The output resistnace may be found by injecting a current into the emitter and
observing the voltage that exists due to that current, while the input is replaced
by it’s internal impedance. The small signal model shown in Figure 14. Summing
currents flowing into the emitter,
ve
ib (β + 1) + ie − =0 (160)
RE
Note that in the diagaram RS appears in parallel with RB = R1 ||R2 therefore
RB can be re-defined as RB = R1 ||R2 ||Rs . This makes things easier in some
respects but if we wanted to know what effect an increase in Rs had on the
39
Figure 14: Small signal model of the emitter follower amplifier of Question 3 for
derivation of output resistance.
output resistance we would need to avoid this simplification. Using Ohm’s law,
the base current is given by,
ve
ib = − (161)
rbe + RB
substituting ib into (161),
ve (β + 1) ve
− + ie − =0 (162)
rbe + RB RE
All that remains is some transposition to finr ve /ie ,
β+1 1
− ve + = −ie (163)
rbe + RB RE
ve 1
= β+1 1
(164)
ie rbe +RB
+ RE
Assuming 1/RE is small compared to the other term in the denominator we have,
β
gm
+ RB
ro = (166)
β+1
40
then assuming β >> 1 this reduces to
β
gm RB
ro = + (167)
β β
simplifying,
1 RB
ro = + (168)
gm β
This is significant. Physically it means that when one looks into the emitter of
a transistor one sees the source impedance, RS (which is part of RB in this case
reduced by a factor of β. Looking at that another way it means the ability of the
source to drive current into a load has increased by a factor of β. If, as in the
next quesiton a darlington is involved, we can see intuetively that the βs could
“stack up” somehow. In fact you are asked to show this in question 4.
Question 3 part 10
The voltage gain can be derrived using the small signal model in Figure 13.
Hopefully it’s evident that the voltage gain is nearly unity. Summing currents at
the base node,
vin − vB vB − 0 vbe
= + (169)
RS RE rbe
summing currents at the emitter node,
vbe vL
+ gm vbe = (170)
rbe RE
Summing voltages around the input loop,
vB = vL + vbe (171)
An expression for vbe is needed to leave only vin , vL and resistors. We can trans-
pose (170),
1 vL
vbe + gm = (174)
rbe RE
41
substituting (174) into (173),
vL R1B + R1S + vin − R1S 1
vL
+ gm = (175)
− R1S − R1B − r1be rbe RE
This doesn’t at first glance appear to be equal to unity but working the usual
magic should help. Removing rb e in favor of gm and β,
1 gm
vL RS β
+ gm
= (177)
vin 1
+ 1 gm
+g + 1 1
+ 1
+ gm
RB RS β m RE RS RB β
gm
<< gm assuming β >> 1 so the bracket in the numerator and denominator
β
gm
β
+ gm is approximately gm . The bracket in the denominator which is multi-
plied by 1/RE will be small (put some numbers in if you’re not convinced). This
boils it down to,
1
vL RS
gm
= (178)
vin 1
+ 1
g
RB RS m
Ideally RB >> RS in order that this amplifier should not unduely load the source
that drives it (thereby effectivly reducing the input signal) therefore,
1 1 1
+ ≈ (180)
RB RS RS
and (179) reduces to,
1
RS
1 =1 (181)
RS
The exact value for the voltage gain is approximatley 0.997 V/V so the approx-
iation that it is unity only has an error of 0.3% in this case, which is quite
acceptable.
42
Question 3 part 11
The current gain of the transistor is just its β but the current gain of the circuit
as a whole is defined as the current into the load divided by the current entering
from the source. The small signal model of Figure 13 can be used and we begin
by summing currents flowing into the base node,
VB vbe
iin = + (182)
RB rbe
Summing currents at the emitter,
vbe
iL = + gm vbe (183)
rbe
summing voltages around the base emitter loop,
vB = vbe + vL (184)
and we also know that,
vL = iL RE (185)
Substituting (185) into (184) and the result into (182),
RE iL + vbe vbe
iin = + (186)
RB rbe
rbe must be removed from (186) and iL needs to be introduced somehow. trans-
pose (183) for vbe ,
iL
vbe = 1 (187)
rbe
+ gm
(187) into (186),
iL
iL RE + 1
rbe
+gm iL
iin = + (188)
RB 1
+ gm rbe
rbe
43
gm /β << gm if β >> 1. Similarly 1/ (1 + β) ≈ β if β >> 1. If we also assume
that RE gm >> 1 (which is probably true in most cases),
iL 1
= RE 1
(191)
iin RB
+ β
Question 3 part 12
This part asks for the quiescent power disipation of the transistor and the load.
For the transistor it’s the quescent VCE multiplied by the quiescent IC which is
2
25 · 1.5625 = 39.06 W. In the load it’s I 2 RE or RV E . 1.56252 · 16 = 39.06 W.
Question 3 part 13
This part asks for the power in the load for a given value of RS . The voltage
gain expression (177) will be required. The answer will depend on your value
for β. If β = 100 and RS = 0.1 Ω the voltage gain is 0.99367. meaning the
voltage appearing accross RE due to a 15 V peak input signal (15 V comes from
Figure 14) is 14.9051 V and the power disipaged in RE is given by,
2
14.9051
√
2
25 2
P RE = + = 46.01 W (192)
16 16
where the first term is the quiescent power disipation in RE and the sceond term
is the signal power. The second term is only approximatley 7 W so most of the
power disipation is not related to the signal i.e. the efficiency is low.
When the source resistance increases to 600 Ω things get considerably worse.
The voltage gain becomes 0.03024! The voltage appearing across the load due to
the source is then, 0.4536 V and the power in the load is,
2
0.4536
√
252 2
P RE = + = 39.0625 + 6.42978 × 10−3 W (193)
16 16
44
In other words, almost all of the power is quiescent and the signal provides ap-
proximately 6 mW of power. This is hopefully not too supprising. Looking back
at the simplified input resistance (159) which is 18.95 Ω it is clear that an unfa-
vorable potential divider is set up between RS and the input resistance such that
the amplifier stage heavily loads the source and power transfer from the source
to the amplifier is very weak. Much of the power available from the source is
lost in the source’s internal resistance and little is transferred to the input of the
amplifier. Hence the mizerly output from the amplifier and the apparent collapse
of its voltage gain.
Question 3 part 14
This part is quite taxing. It’s similar to analyses found in EEE223 and does not
feature in EEE225. The question asks for the instantaneous power disipation, i.e.
as a function of time in the transistor and in the load resistor. For the transistor
the power disipation is approximately VCE · IC , we can write VCE as,
Vp sin (ω t) VQ
IC = + (195)
RE RE
In this case VQ is the quiescent voltage across the load resistor, but as we have
noted it is the same as in (194) if the emitter is biased to the midpoint of the
supply. Multiplying,
Vp sin (ω t) VQ
P (t) = + (VS − Vp sin (ω t) − VQ ) (196)
RE RE
45
The terms in sin and the unity terms are not too hard but the sin2 term may be
frustrating. The half angle formula can be used which states,
sin (ω t)2 ≡ 1 − cos (2 ω t) (199)
Performing the integral and after several lines of tidying up,
−2 VQ2 + 2 VQ VS − Vp2
P =
2 RE
2
Vp cos (ω T ) sin (ω T ) + 4 Vp VQ cos (ω T ) − 2 Vp VS cos (ω T ) − 4 VQ Vp + 2 Vp VS
+
2 T RE ω
(200)
which is a bit nasty. The relation ω = 2Tπ is inserted and magically all the sin
and cos terms become either 1 or 0, leaving,
−2VQ2 + 2 VQ VS − Vp2
P = (201)
2 RE
Question 3 Part 15
Having derived the average power disipation in the transistor we are required to
find the signal voltage that heats the transistor the most. One possible method
is to plot the average power disipation as a function of Vp given some example
numbers. However we can also take the derivative and set it equal to zero to find
a turning point. Taking the second derivative would show that it is a maxima.
Taking the derivative of (201) with respect to Vp and setting the gradient equal
to zero,
−2VQ2 + 2 VQ VS − Vp2
d Vp
=− =0 (202)
d Vp 2 RE RE
transposing for Vp , yields,
Vp = 0 (203)
Meaning that the maximum power disipation in the transistor is when there is
no signal at all. If you’re not keen on this idea, plot P as a function of Vp for the
numbers in Figure 11 in Matlab/Maple/Mathcad etc.
Question 3 part 16
The efficiency is a bit of a trick question. As usual it’s useful power out over total
power, however one must be careful about the definition of useful power. The
power we’re interested in is the signal power in the load, not the quiescent power
in the load, that is “wasted” from our perspective.
1 Vp2
2
·
RE
η= −2VQ2 +2 VQ VS −Vp2 2 V 2 +V 2
(204)
2 RE
+ 12 QRE p
46
The numerator is the signal power in RE . Don’t forget that Vp is a peak value
(which is how the 1/2 comes into it). The left fraction in the denominator is
just (201) which is the power in the transistor and the right fraction in the
denominator is an expression for the total average power in the load (quiescent
and signal). It might seem like a good idea to differentiate this with respect to
Vp to find a maxima, but plotting it against Vp will show that there is only a
minima. With a bit of thought it should be possible to convince yourself that the
best efficiency will be when Vp is as big as it can be. Since the quiescent point,
VQ is VS /2 that’s as big as Vp can get without either the top or bottom of the
waveform being clipped off. You may also notice that RE cancels. Simplifying
(204)
1 Vp2
η= (205)
2 VQ VS
Substituting in our relation for VS and Vp , Vp = VS /2,
VS 2
2
η= (206)
VQ VS
Question 3 part 17
This part asks for the conduction angle. Well there is only one transistor and
the current in the load, given a sinusoidal input, should be sinusoidal as well.
Therefore the transistor must conduct for the full cycle (360◦ ). There is no
“proof” of this, one has to think about it. Ask yourself, ‘does the transistor ever
switch off?’
2. Design suitable component values to utilize the available rail voltage appro-
priately, include base current and the full range of hFE in your calculations.
47
4. Draw and label the small signal equivalent circuit for your circuit, you may
assume that RB = R1 ||R2 is very large compared to RS and can be ignored.
Question 4 part 1
The redrawn diagram could look something like Figure 15.
48
Question 4 part 2
The biasing conditions shouldn’t pose too much difficulty if any of the first three
quesitons have been mastered. The quiescent value of VL should still be VS /2
therefore, VB = 25 + 1.4. IE2 = VL /RE = 25/16 = 1.5625 A, as in question 3.
IE2 1.5625
IB2 (max) = = = 62.5 mA (207)
β2(min) 25
IE2 1.5625
IB2 (min) = = = 10.41 mA (208)
β2(max) 150
Note that IB2 = IE1 and IE1 = IB1 (1 + β1 ) so,
IB2 62.5 mA
IB1 (max) = = = 201.6 µA (209)
1 + β1(min) 1 + 30
IB2 10.41 mA
IB1 (min) = = = 43.2 µA (210)
1 + β1(max) 1 + 240
Therefore the worst case IB1 is 201.6 µA, and I1 should be ten times greater than
this value; approximately 2 mA.
25 + 1.4
R2 = ≈ 13.2 kΩ (211)
2 mA
50 − (25 + 1.4)
R1 = ≈ 11.8 kΩ (212)
2 mA
Question 4 part 3
The Darlington is a significant improvement because the input resistance and the
current gain are both significantly increased.
Question 4 part 4
The input resistance for the darlington can be found by drawing a small signal
model for both transistors and solving using the usual circuit analysis rules. How-
ever this is not a very inteligent way of attacking the problem. For example if we
had a circuit with ten transistors, would we need to draw it out as a small signal
model? How easy would it be to solve such a circuit? We can divide the problem
into two small signal models, one for each transistor. In Figure 16 the emitter
resistor rin2 represents the input resistance of the lower transistor (MJ15003)
while the upper transistor MJE340 is represented by the hybrid-π model. The
key point about this small signal model is that the same model can be used for
the lower transistor where rin2 takes the place of RS in this model. If it’s not
49
Figure 16: Partial small signal model for darlington pair input resistance
clear it may become clear as the analysis proceedes. We are asked to find the
input resistance. Summing currents flowing into the base,
vbe
iin = 1 (213)
rbe1
Summing voltages around the input loop,
VB = vbe1 + ve (214)
Summing currents flowing into the emitter,
vbe1
+ gm1 (215)
rbe1
Transposing (214) for ve ,
ve = VB − vbe1 (216)
Substituting (216) into (215) and transposing to make vbe1 the subject,
VB
vbe1 = (217)
1
rin2 rbe1
+ gm1 + 1
50
Figure 17: Partial small signal model for darlington pair input resistance, showing
the lower transistor only. The content of this model is contained within rin2 in
Figure 17.
This is a partial result as we still have no knowledge of rin2 . A small signal model
may help.
This model is (ignoring the lack of a source) the same as Figure 17. It should
therefore have the same input resistance,
β2
rin2 = RE (1 + β2 ) + (220)
gm2
rin = RE (1 + β2 ) (1 + β1 ) (222)
We can see now that the input resistance increases by a factor of approximately
β (if β >> 1). If we had a Darlington of three transistors, we would not need to
do any working out to know the input resisance. For the numbers in Question 3
and assuming the minimum β for both the MJ15003 and the MJE340 of 25 and
30 respectively the input resistance is approximately 12.9 kΩ. The value of R1
and R2 in parallel is also about 12 kΩ so we should expect an input resistance
including the biasing network of about 6 kΩ, which is about ten times the maxi-
mum source resistance of 600 Ω (in question 3), which is probably acceptable in
most situations.
51
Question 4 part 5
This question asks for the output resistance of the Darlington. If you’ve done
question 3 this should be quite easy as it has already been derrived in Question
3 part 9 where we had,
1 RB
ro = + (223)
gm β
In this situation RB is just RS as we’re not considering the biasing network (but
if we were it would just be a part of RB ). Applying the same principle as for the
input resistance we can deduce ro takes the form,
β1
+RS
β2 g m1
gm2
+ β1 +1
ro = (224)
β2 + 1
If you need to see the derivation it’s in the solution to question 3.
Question 4 part 6
The current gain falls along very similar lines to the input resistance. The same
small signal model can be used and the same partitioning approach is also pos-
sible. This time we’re interested, firstly, in the current flowing in rin2 due to iin ,
which is,
ie1 = (β1 + 1) iin (225)
Looking at the second partial small signal model ie2 is then,
Don’t forget that ie1 = ib2 . This can be seen on the circuit diagram in Figure 15.
Substituting,
ie2
= (1 + β2 ) (β1 + 1) (227)
iin
3. Draw the small signal equivalent circuit for the mirror, ensure you include
rce .
52
4. Derive the output resistance of the mirror.
5. Derive the output resistance when emitter degeneration resistors are in-
cluded.
7. Derive the relationship between IS and the load current in Figure 19.
IS hF E + 2
= (228)
IRL hF E
Question 5 part 1
This is the first of the current source/sink questions and is the most simple
of them. It often shows up on the exam. Part one requires the derivation of
the relationship between the setting current and the load current assuming both
transistors are identical. This is usually a fairly good approximation if the cirucit
is built in an IC process. There will also be good isothermal matching on the die
as well. If it’s a descrete circuit (made from individual transistors) there are some
tricks we can use to help. Lots of Tectronix oscilloscopes (the “dog kennel” kind)
from the early 1970’s to the late 1980’s (when digital scopes started to take over)
had several sets of two transistors in a plastic T092 package with the flat sides
53
Figure 19: A current mirror circuit with helper transistor.
facing eachother and a sprung copper band wrapped round them with thermal
paste between them. This was to try to keep them at the same temperature. It
seems likely that the people making these oscilloscopes would have used a curve
tracer to match the transistors prior to soldering them into the cirucit. In more
modern times matched pairs of transistors became available, including the well
known MAT-02 and LM394. However the MAT-02 is not in production and the
LM394 is only made by Texas Instruments for customers buying thousands of
parts. Luckily the NXP BCM846BS is a suitable matched pair. It is essentially
and IC of two transistors with all the electrodes going to package legs. To perform
the analysis we can sum currents flowing into the circuit nodes,
IRL = hF E IB (229)
IRL
IB = (230)
hF E
IS = IC + 2 IB (231)
= IB (hF E + 2) (232)
IRL
= (hF E + 2) (233)
hF E
2
IS = IRL 1 + (234)
hF E
54
Assuming hF E = 100,
IRL 100
= ≈ 0.9804 (235)
IS 102
Question 5 part 2
The datasheet for the 2N5551 doesn’t give a value for VCE(sat) for the conditions
we have. The nearest is IC = 10 mA, IB = 1 mA and VCE(sat) = 0.15 V. Therefore
apply Ohm’s law,
VS − VCE(sat)
RL = (236)
IL
The supply is 15 V below ground. The minimum hF E of the 2N5551 (from the
datasheet) is 80 for IC = 1 mA which is nearly where we’re working. The value
of IL is then,
hF E 80
IL = IS = 2 mA · = 1.951 mA (237)
hF E + 2 80 + 2
so,
VS − VCE(sat) 15 − 0.15
RL = = = 7.611 kΩ (238)
IL 1.951
Question 5 part 3
The small signal model is shown in Figure 20. Note that Q2 is essentially a diode
as its base and collector are connected together.
Question 5 part 4
The key thing to note is that the controlled current source can only change its
value if vbe1 changes, which it does not. The voltage on the output due to it is
vt = it rce1 and the output resistance is simply vt /it = rce1 .
The hybrid-π model is not the only way to look at the effects of output re-
sistance. Several authors prefer a discussion based on DC currents to deal with
the Early effect (Grey, Hurst Lewis and Meyer, “Analysis and Design of Analog
Integrated Circuits”, Chapter 4., 5th ed., John Wiley & Sons, 2009). Leach also
55
prefers a DC approach http://leachlegacy.ece.gatech.edu/ece3050/notes/
bjt/bjtmirr.pdf as do Analog Devices https://wiki.analog.com/university/
courses/electronics/text/chapter-11. However in this course the Early ef-
fect is not studdied in sufficient detail to warrent the level of description presented
in these sources. Interested readers may like to investigate on thier own.
Question 5 part 5
If emitter resistors are included the cirucit will become that of Figure 21. The
derivation of the output resistance including degeneration resistors can be quite
tricky but looking at the small signal model in Figure 22 it is very similar to the
output resistance of the degenerated common emitter amplifier from question 1.
56
Figure 22: Small signal model of Q1 in the current mirror with emitter degener-
ation.
substituting again,
vo = it (rbe ||RE ) + it rce (1 + gm (rbe ||RE )) (243)
Dividing by it ,
vt
ro = = rbe ||RE + rce (1 + gm (rbe ||RE )) (244)
it
The first term is small compared to the second term. Concentrating on the second
term and multiplying out the parallel combination,
gm RE rbe
ro ≈ rce +1 (245)
RE + rbe
Dividing through by rbe ,
!
gm RE
ro ≈ rce RE
+1 (246)
rbe
+1
replacing rbe with gm and β,
!
gm RE
ro ≈ rce gm RE
+1 (247)
β
+
There are two interesting conditions that (247) can reduce to. If gm RE >> β,
(247) becomes,
ro = rce (β + 1) (248)
If β >> gm RE then (247) bcomes,
ro = rce (gm RE + 1) (249)
57
Question 5 part 6
The β helper is an emitter follower added to reduce the “finite gain defect” of
the standard mirror – the current that is required to drive the bases making the
collector current and the set current different. It does not affect the output resis-
tance very much. It does increase the voltage required by the mirror potentially
reducing headroom.
Question 5 part 7
The analysis is very similar to part 1. The result is,
2
IS = IC1 1 + (250)
(hF E + 1) hF E
Compared with (234) the defect term has been reduced by a factor of (hF E + 1).
2. Estimate the gain, vo1 /vi , of the differential amplifier assuming that rce of
Q1 is very large compared to R1 . Remember to include the effects of Q3
(ie, its input resistance) in your calculation.
3. Estimate the gain, va /vo1 , of the voltage gain stage assuming that rce of Q3
and the input resistances of Q4 and Q5 are very large compared to RV A .
4. Use your results from parts 2 and 3 to estimate the overall gain vo4 /vi .
What have you assumed in this calculation?
5. Using your powers of reasoning, identify which stage gain would be signifi-
cantly improved if the small signal current gain of each transistor increased
to 500.
Question 6 part 1
Each conducting base – emitter junction has 0.7 V across it.
58
Figure 23: Simplified operational amplifier circuit.
59
• For IE , VE1 = VE2 = 0.7 V. The voltage drop across RE is therefore
(15 − 0.7) V which is 14.3 V. Ohm’s law then gives IE = 14.3/RE =
95.3 µA.
• For I3 , the current through RV A is given by Ohm’s Law as I3 = (15 − VA ) /RV A
= 1.00 mA
• For I1 , if VA = 0, neither Q4 or Q5 are conducting (since VBE = 0 V for
both transistors) so IC3 = I3 . IB3 = IC3 /hF E3 = 10 µA and the current
through R1 = 0.7/R1 = 50 µA. Using KCL, I1 = IR1 + IB3 = 60 µA.
• Leaving I2 = IE − I1 = 35.3 µA.
Question 6 part 2
For small signal gain calculations we must use the small signal equivalent circuit
that describes how the transistors in the circuit behave as far as signals are
concerned. The full small signal circuit is shown in Figure 24. For small signal
gain calculations we must use the small signal equivalent circuit that describes
how the transistors in the circuit behave as far as signals are concerned. The full
small signal circuit is shown in Figure 24. In Figure 24, Q2 is encircled by a box
showing that apart from ground there is only one connection between Q2 and
the rest of the circuit. This means that Q2 can be represented as an equivalent
resistance to ground. To find out what that resistance is we. In Figure 24, Q2 is
encircled by a box showing that, apart from ground, there is only one connection
between Q2 and the rest of the circuit. This means that Q2 can be represented
as an equivalent resistance to ground. In this situation Q2 can be thought of as a
common base amplifier. To find out what that resistance is we need to consider
the circuit of Figure 25. Here is is the current flowing into the emitter terminal of
Q2 and vs is the voltage imposed on the emitter of Q2 by the rest of the circuit.
The ratio vs /is is the effective resistance looking into Q2 as far as the rest of the
circuit is concerned. First sum currents at the emitter node,
or,
vbe2
+ gm2 vbe2 + is = 0 (252)
rbe2
Inspection of the circuit reveals that vs = −vbe2 and using this in the equation
above gives,
vs 1
= 1 (253)
is rbe2
+ gm2
which approximates to,
vs 1
= = re2 (254)
is gm2
60
since 1/rbe = gm /β and, for a small signal amplifier transistor β is often much
greater than unity.
The effect of the next (voltage amplification) stage, Q3 , is taken into account
by rbe3 , the input resistance of Q3 . Using re2 , the equivalent circuit simplifies to
that shown in Figure 26. In this circuit we need to find gm1 vbe1 i.e. vbe1 , in terms
of vi because vo1 is proportional to gm1 vbe1 . The approach is a nodal analysis at
the emitter node – sum currents at the emitter node – together with a voltage
sum around the input loop. The two resulting equations are,
and
vi = ve + vbe1 (256)
or
vbe1 ve vi − vbe1
+ gm1 vbe1 = = (257)
rbe1 (RE ||re2 ) (RE ||re2 )
Transposing,
vi
vbe1 = (258)
1 1
RE ||re2 rbe1
+ gm1 + RE ||re2
This expression can be simplified by recognising that gm1 >> 1/rbe1 because
61
Figure 25: Small signal model of Q2 in Figure 23 reduced from Figure 24.
Figure 26: Simplified differential stage and voltage amplifier input small signal
model.
62
β >> 1 and RE ||re2 ≈ re2 since RE >> re2 . The various parameter values are,
RE = 150 kΩ (259)
R1 = 14 kΩ (260)
e IC1
gm1 = = (60 µA/0.026 V) = 2.3 mA V−1 (261)
kT
β1
rbe1 = = 100/0.0023 = 43.5 kΩ (262)
gm1
kT
re2 = = (0.026 V/35.3 µA) = 737 Ω (263)
e IC2
β3
rbe3 = = 2.6 kΩ (264)
gm3
These values give values of vbe1 /vi of 0.371 and 0.370 for the simplified and
unsimplified forms of the equation respectively. The closeness of these results is
confirmation that the simplifications are appropriate. At the output,
since
io = gm1 vbe1 (266)
we have
vo1 /vbe1 = −gm1 (R1 ||rbe3 ) = −5.04 (267)
Therefore
vo1 vo1 vbe1
= · = −5.04 · 0.370 = −1.87 (268)
vi vbe1 vi
Question 6 part 3
To make this estimate a small signal equivalent circuit of Q3 is required. Q3 is
connected in a common emitter configuration so its equivalent behaviour is much
more straightforward than was the case for the differential amplifier stage. From
Figure 27,
va = io3 RV A = −gm3 vbe3 RV A = −gm3 vo1 RV A (269)
or
va
= −gm3 RV A = −0.0384 · 15kΩ = −577 (270)
vo1
The assumptions in the question do not make any difference to the complexity of
the small signal equivalent circuit of Figure 27, they simplify the collector circuit
of the transistor to one single resistor, RV A . In the absence of this simplification,
RV A would consist of a parallel combination of resistors, one static (RV A ) and
the rest incremental.
63
Figure 27: Voltage amplifier stage small signal model.
Question 6 part 4
The gain of stages 1 and 2 together is the product of their individual gains, i.e,
va va vo1
= · = (−577) · (−1.87) = 1079 (271)
vi vo1 vi
This equals the overall gain if the output stage gain is assumed to be very close
to unity – an assumption usually true for emitter follower circuits.
Question 6 part 5
This change of current gain would not affect the transistor gm values very much
because it would not affect the values of IC much except for a slight improve-
ment in the balance between Q1 and Q2 collector currents due to the reduced
IB requirement of Q3 . The biggest effects would be in the values of rbe of the
transistors and this would have the most significance for gain in terms of the
effect rbe3 has on first stage gain. rbe3 would change from 2.6 kΩ to 13 kΩ – you
can look at your answer to part 2 to see what effect this would have on first stage
gain.
3. Sketch a circuit diagram of a voltage amplifier and push pull stage which
largely overcomes the problems of crossover distortion and describe the
operation of your circuit.
64
5. Calculate the average power dissipated in the load resistor of your circuit.
6. Derive expressions for the instantaneous power dissipation in one of the out-
put transistors. You may assume that the power dissipated in a transistor is
the product of IC and VCE which will both vary approximately sinusoidally
given a sinusoidal input. Hint: this involves some integration of sines and
cosines.
7. Using your derivation find the signal voltage amplitude across the output
which results in the highest power dissipation in the transistor.
10. For each class of operation above, what angle of current conduction exists
in each class and what approximate range of voltages must exist between
the bases of the output transistors?
Question 7: part 1
Crossover distortion arises when conduction is transferred from one transistor to
the other in the output stage of a push pull class B amplifier. Notwithstanding
the 0.7 V across the base emitter required to enter the forward active region,
the problem is caused by the dependence of the device transconductance on the
collector (or drain) current which in turn leads to a change in output resistance
that is a function of the collector (or drain) current and hence output voltage.
This is similar to the arguements in question 3 part 6. In other words gm is not
constant but changes considerably over the course of one cycle of the waveform
changing all of the small signal parameters considerably as a function of or time.
In other words, analysis of this circuit requires the use of a large signal approach to
the transistor operation. Even if gm was independent of IC (ID ) there would still
be a problem because the output resistance would change during the crossover
region unless the biasing was perfect (i.e. output devices never off or on together).
Question 7: part 2
Figure 28 shows the shape of a crossover distorted sinusoidal waveform as the
components of the collector currents in the push-pull stage.
65
5
4 ICQ4
3 ICQ5
Current [mA]
2
1
0
−1
−2
−3
−4
−5
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Time [ms]
Question 7: part 3
In a real circuit the problem can be reduced to a point where it is no longer
significant by arranging for some overlap of conduction of the output devices in
the crossover region. A circuit that can achieve this is shown in Figure 29. R9 ,
R10 and Q10 act as a floating fixed voltage source which, in conjunction with RE4
and RE5 control the quiescent bias current in Q4 and Q5 and so control the angle
of conduction overlap.
Question 7: part 4
To calculate a numerical value for the quiescent power dissipation of an output
transistor one must make some choices about the circuit, specifically the power
supply voltage and the quiescent output stage current are needed however these
are not given so we may presume that an algebraic answer is required. Let the
power supply be VS+ , the voltage across the external load resistor be VL and the
quiescent current in the transistor’s collector be IQ . Also assume the base current
is negligible. The quiescent power dissipation in each output stage transistor is
then,
PQ = VS+ − VL IQ
(272)
Question 7: part 5
The calculation of average power dissipation does not feature in EEE225, but it is
often important in power electronic circuits, machine drives and power systems.
66
Figure 29: The circuit including the ‘amplified diode’ structure (Q10 , R9 and
R10 ) attempts to bias the base of Q4 and Q5 appropriately and maintain a small
quiescent current through Q4 ’s collector, RE4 , RE5 and Q5 ’s collector. The gm
of Q4 and Q5 still depends on their respective collector currents, so small signal
parameters such as input and output impedance of the stage are still a function
of these currents and change over the course of a signal cycle.
67
In many power electronic and machine drive applications the current and/or
voltage waveforms are not sinusoidal. Average power will be the product of RMS
(root mean square) current and RMS voltage. It is not meaningful to take the
RMS of a power waveform because RMS is simply a way of relating the heating
effect of a time dependent signal with an equivalent DC quantity i.e. one which
gives rise to the same heating effect. For the push-pull circuit in this question,
let us assume a sine wave voltage signal, V (t) = VP sin (ω t) across the external
load resistor, RL . Where VP is the peak magnitude of the sinusoidal waveform
across the load. The instantaneous power is given by the usual formula,
one can read this as “sine squared ω t” or “sine ω t squared”, they are the same.
Our average power integral is then,
Z T /2
1 VP2
PL (t) = T · 1 − cos (2 ω t) dt (275)
/2 RL 0
It is only necessary to integrate over half a period because the shape of the
load power waveform repeats every half period. It’s not so hard to see why this
might be. Consider the sine shape of the voltage across the load, now remember
that we squared it, effectively taking the absolute value and scaling by a factor.
Therefore there will be two regions of high peak power in every cycle of the
voltage waveform and these will be identical, therefore only half a voltage cycle
needs to be considered to capture a full cycle of the power waveform. Performing
the integral,
T /
1 VP2 t 2 ω sin (2 ω t) 2
PL (t) = T · − (276)
/2 RL 2 4ω 0
Inserting limits,
" # " #!
1 V2 T
/2 sin 2 ω T /2
PL = T · P − − 0 (277)
/2 RL 2 2
68
this leaves,
2 VP2 2 VP2 T
T sin (2 π)
PL = − = · (279)
T RL 4 2 T RL 4 2
because sin (2 π) = 0. Tidying up,
VP2
PL = (280)
2 RL
If you’re concerned by the 2 in the denominator, don’t forget that VP is the peak
value of the load voltage and that VP is squared. Many students will not need
to derive this result as it is widely remembered that for a sinusoidal voltage and
a purely resistive load P = V 2 /R, where V is measured in VRMS . Nevertheless
if the shape of the waveform is not sinusoidal a different answer will result. For
example similar analysis for a triangle wave whose rising edge is of the form,
2 VP
V (t) = (t − π /2 ) (281)
π
where VP is the maximum peak amplitude of the triangle yields,
1 4 VP 2 T 3 2 VP 2 T 2 VP 2 T
PL = − + (282)
T 3 π 2 RL π RL RL
Question 7: part 6
The dissipation in the transistors in a push-pull output stage follows a similar
principle as for the power in the load. It is also not considered in EEE225 but is
a good example of the sort of analysis that one often faces in power electronics
problems. One integrates the power waveform across one period in order to
find the average value. Since each transistor will conduct for half of the collector
current waveform period we can perform the integral across half a collector current
cycle and still yield the average power from both transistors simply by multiplying
our end result by 2.
Z T/
1 2
69
where VD is the maximum (i.e. peak) voltage amplitude across the power tran-
sistor (i.e. VCE ) and IP is the maximum current amplitude in both the transistor
and the external load resistor.
Z T /2
1
PD (t) = (VS − VP sin (ω t)) IP sin (ω t) dt (285)
T 0
where VS is the power supply voltage and VP is the peak voltage amplitude across
the external load resistor. If you don’t see why this is the case look at Figure 29,
we are ignoring the small voltage drop across RE4 and RE5 . The integral can be
multiplied out to yield,
T/
VP2
Z
1 2
VS VP
PD (t) = sin (ω t) − sin (ω t)2 dt (286)
T 0 RL RL
Using the “half angle formula” again the second part of the integral becomes,
T/ T/
V2 1 − cos (2 ω t)
Z Z
1 2
VS VP 2
1 − cos (2 ω t) dt (288)
2 T RL 0
Combining this result with the first part of the power integral,
T/ T /2 T /
VP2 VP2
sin (2 ω t) 2
Z
1 VS VP
2
PD (t) = sin (ω t) dt − t +
T 0 RL 2 T RL 0 2 T RL 2ω 0
(290)
Performing the remaining integral,
T /2 T /2 T /
VP2 VP2
VS VP cos (ω t) sin (2 ω t) 2
PD = − − t + (291)
T RL ω 0 2 T RL 0 2 T RL 2ω 0
2π
Inserting, ω = T
,
"
2π
#T /2 T /2 " #T / 2
VS VP cos T
t VP2 VP2 sin 2 2Tπ t
PD = − 2π − t + (292)
T RL T
2 T RL 0 2 T RL 2 2Tπ
0 0
70
Applying the limits of integration,
"
2π
T #
VS VP cos
T
2
2π
cos T 0 VP2
T
PD = − − − − 0
2π 2π
T RL T
T
2 T RL 2
"
#
2π
T
2
VP sin 2
T 2
2π
sin 2 T 0
+
− (293)
2π 2π
2 T RL 2T
2 T
This expression looks fairly horrid, but canceling appropriately it simplifies read-
ily to,
VS VP V2
PD = − P (294)
π RL 4 RL
Don’t forget that this result is for one transistor, double it for both transistors.
Question 7: part 7
The next part of the question asks for the load voltage which results in the highest
power dissipation in the output transistors. This voltage is not necessarily the
same as the load voltage which dissipates the highest power in the load. VP can
not exceed VS in fact VP can only approach VS in theory. In practical circuits
there is some headroom required which lowers the efficiency below the theoretical
maximum. This headroom required is often related to the driver stage (Q9 ) and
current source (IQ9 ). requirements. Looking at (294), the term in VP2 will begin
to dominate as VP increases and the terms are nearly equal in magnitude when
VP = VS . We may therefore expect a maximum value when VP is somewhere
around half of VS . Since we seek a maximum value we also seek a turning point
and therefore can differentiate to find an expression for the maximum power
dissipation in terms of the load voltage VP ,
dPD (t) VS 2 VP
= − =0 (295)
dVP π RL 4 RL
solving the derivative equal to zero yields,
2 VS
VP = (296)
π
The maximum average power dissipation in the transistor is found by substi-
tution of (296) into (294).
2 VS 2
VS 2 πVS
PMAX = − π (297)
π RL 4 RL
which simplifies to,
VS2
PDMAX = (298)
π 2 RL
71
Question 7: part 8
The efficiency is simply the desired output (load) power upon the total power
(load + device dissipation),
VP2
PL 2 RL
η= = VP2
VP2
(299)
P L + PD +2· VS VP
−
2 RL π RL 4 RL
It might be useful to plot a graph of this function to see that, over the range of
physically sensible parameters, there is no turning point. Instead we can deduce
that the highest efficiency will be when VP = VS . If you’re not happy with that,
plot the curve for some representative values (e.g. VS = 1, VP = 0 to 1) in
Matlab or similar. RL cancels so its value is not important. Inserting VP = VS
and canceling,
π
η = · 100 = 78.54% (300)
4
In practice the highest practically realizable efficiency is about 70%, principally
due to VCE(sat) and headroom requirements of the driver stage. This result only
holds with a sine wave and the maximum efficiency is only obtained when the
output voltage is maximized, which is not always desirable. Other waveforms
generate different results. However, the sinusoid, running at the VL which devel-
ops the maximum power in the output transistors is the worst case condition for
a given VS .
Question 7: part 9
Current waveforms representative of the different classes of operation graphs are
presented in the lecture notes but are shown in Figures 30 - 34 as well.
Question 7: part 10
The angle of conduction and the class of a stage are listed in Table 7. The biasing
voltages required are somewhat open to interpretation, the feature that identified
the class of an amplifier stage is the angle of current conduction. This could also
be expressed very approximately as a relationship between the load current and
quiescent current. However both the biasing voltages and the quiescent current
to max load current ratio are rough rules of thumb, not to be relied upon.
Questions 8 – 10
If you genuinely have a solution you want to discuss, email it to me. If you’re
making an serious attempt at answering these last three questions, you will prob-
ably not need my help as you will be in a position to help yourself should you get
stuck. Also you can call on Grey if you’re stuck.
72
5
4 ICQ4
3 ICQ5
Current [mA]
2
1
0
−1
−2
−3
−4
−5
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Time [ms]
Figure 30: Conduction angle < 180◦ . Class C. Heavy crossover distortion.
5
4 ICQ4
3 ICQ5
Current [mA]
2
1
0
−1
−2
−3
−4
−5
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Time [ms]
73
5
4 ICQ4
3 ICQ5
Current [mA]
2 I RL
1
0
−1
−2
−3
−4
−5
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Time [ms]
Figure 32: Conduction angle > 180◦ but < 360◦ . Class AB. Some crossover
distortion, The extended crossover region changes output resistance over a wider
range of the signal, increasing distortion.
5
4 ICQ4
3 ICQ5
Current [mA]
2 I RL
1
0
−1
−2
−3
−4
−5
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Time [ms]
Figure 33: Conduction angle 360◦ . Class A. No crossover distortion, but other
distortion mechanisms still exist. Output resistance still a function of collector
current.
74
10
8 ICQ4
6 ICQ5
Current [mA]
4 I RL
2
0
−2
−4
−6
−8
−10
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Time [ms]
Figure 34: Conduction angle 360◦ . Class A. No crossover distortion, and higher
bias compared to Figure 33 means the signal is a better approximation to a
small signal in this case than in Figure 33 therefore the change in small signal
parameters is less marked and distortion mechanisms are reduced further at the
expense of very poor efficiency.
Table 7: The relationship between current conduction angle and the class of an
amplifier stage. Also shown are rules of thumb for biasing of a push-pull stage
and for load to quiescent current relationships.
75