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Course Code: BECS201L
Course Title: Semiconductor Devices and Circuits
Pre-requisite: BEEE102L, BEEE102P
Course Instructor: Dr. Aravind C K, Associate Professor Senior/SELECT
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Course Objectives
To apply the knowledge of solid state devices
principles to analyze electronic circuits.
To demonstrate amplifiers under different
configurations and analyse their responses.
To impart the knowledge of analog circuit design for
various applications.
Dr. Aravind C K, [Link]., SELECT 3
Course Outcomes
On completion of this course, the students will be able to
Understand the behavior of semiconductor devices and
CO2
their applications.
Dr. Aravind C K, [Link]., SELECT 4
Dr. Aravind C K, [Link]., SELECT 5
Transistor(BJT) –both holes and electrons play a part in the conduction
process----it is called a bipolar transistor
Bipolar transistor has two principal disadvantages
• First, it has a low input impedance because of forward biased emitter junction.
• Secondly, it has considerable noise level.
Even though the low input impedance problem may be improved by careful
design and use of more than one transistor, yet it is difficult to achieve input
impedance more than a few megaohms
Dr. Aravind C K, [Link]., SELECT 6
MoSFET Characterises
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The metal-oxide semiconductor FET, or MOSFET, has a source, gate, and
drain. The MOSFET differs from the JFET, however, in that the gate is
insulated from the channel. Because of this, the gate current is even smaller
than it is in a JFET.
There are two kinds of MOSFETs, the depletion-mode type and the
enhancement-mode type.
The enhancement-mode MOSFET is widely used in both discrete and
integrated circuits.
Dr. Aravind C K, [Link]., SELECT 8
The Depletion-Mode MOSFET
depletion-mode MOSFET, a piece of n material with an insulated gate on the left
and a p region on the right. The p region is called the substrate. Electrons flowing
from source to drain must pass through the narrow channel between the gate
and the p substrate.
Dr. Aravind C K, [Link]., SELECT 9
A thin layer of silicon dioxide (SiO ) is deposited on the left side of the
2
channel.
Silicon dioxide is the same as glass, which is an insulator.
In a MOSFET, the gate is metallic. Because the metallic gate is insulated
from the channel, negligible gate current flows even when the gate voltage
is positive.
Dr. Aravind C K, [Link]., SELECT 10
The more negative the gate voltage, the smaller the drain current.
The more positive the gate voltage, the greater the conduction from source
to drain.
Dr. Aravind C K, [Link]., SELECT 11
D-MOSFET Characterstics
When VGS becomes positive, ID will increase following the square-law
equation
When VGS is negative, the D-MOSFET is operating in the depletion mode
When VGS is positive, the D-MOSFET is operating in the enhancement
mode.
Dr. Aravind C K, [Link]., SELECT 12
transconductance curve
IDSS is the drain current with the gate shorted to the source. IDSS is no longer
the maximum possible drain current.
The parabolic transconductance curve follows the same square-law relation
that exists with a JFET. As a result, the analysis of a depletion-mode MOSFET
is almost identical to that of a JFET circuit.
The major difference is enabling VGS
to be either negative or positive.
Dr. Aravind C K, [Link]., SELECT 13
There is also a p-channel D-MOSFET.
It consists of a drain-to-source p-channel, along with an n-type substrate.
Once again, the gate is insulated from the channel.
The action of a p-channel MOSFET is complementary to the n-channel
MOSFET.
Dr. Aravind C K, [Link]., SELECT 14
Output characterstics
Dr. Aravind C K, [Link]., SELECT 15
Depletion-Mode MOSFET
Amplifiers
A D-MOSFET has the values VGS(off) = −3 V and IDSS = 6 mA. What will
the drain current equal when VGS equals −1 V, −2 V, 0 V, +1 V, and +2 V?
Dr. Aravind C K, [Link]., SELECT 16
Dr. Aravind C K, [Link]., SELECT 17
The D-MOSFET amplifier shown in Fig. has VGS(off) = −2 V, IDSS = 4 mA,
and gmo = 2000 μS. What is the circuit’s output voltage?
Dr. Aravind C K, [Link]., SELECT 18
Enhancement-Mode MOSFET
The p substrate now extends all the way to the silicon dioxide.
Dr. Aravind C K, [Link]., SELECT 19
When the gate voltage is zero, the current between source and drain is
zero.
When the gate is positive, it attracts free electrons into the p region. The
free electrons recombine with the holes next to the silicon dioxide.
When the gate voltage is positive enough, all the holes touching the
silicon dioxide are filled, and free electrons begin to flow from the source
to the drain
Dr. Aravind C K, [Link]., SELECT 20
Drain curves and transconductance curve.
When VGS is less than VGS(th), the drain current is zero.
When VGS is greater than VGS(th), an n-type inversion layer connects the
source to the drain and the drain current can flow
Dr. Aravind C K, [Link]., SELECT 21
Drain-Source on Resistance
Dr. Aravind C K, [Link]., SELECT 22
Dr. Aravind C K, [Link]., SELECT 23
Dr. Aravind C K, [Link]., SELECT 24
Dr. Aravind C K, [Link]., SELECT 25
