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Multirate Processing of
Digital Signals: Fundamentals
VLSI Signal Processing
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Outline
Introduction
Sampling Rate Conversion
Multistage Implementation
Practice Structure
Polyphase Implementation
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Motivation
Definition
More than one sampling rate (clock) are used in a
system
Module 1
clock 1
clock 2
Module 2
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Conversion Approach
Analog approach
Digital approach (multirate DSP system)
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Analog Approach
y m xc t t mT
x n h mT nT
Advantages
Simple
Straightforward
Arbitrary sampling rate
Disadvantages
D/A & A/D converter are needed
Ideal (near perfect) lowpass filter is needed
Introduced noise and distortion
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Digital Approach
Sampling rate conversion
Interpolation
Increase the sampling rate
Decimation
Decrease the sampling rate
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Sampling Theory
If the highest frequency component in a signal is
fmax, then the signal should be sampled at the rate
of at least 2fmax for the samples to describe the
signal completely, i.e.,
Fs 2 f max
For Fs < 2fmax, alias occurs in the sampling
process.
Alias Distortion (aliasing)
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Aliasing
X(f)
f
-Fs
fmax
Fs
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Interpolation by L
x n
w m
h(m)
y m
Fs
Fs
Fs LFs
T 1 Fs
T
L Fs
H I
G,
L
0, otherwise
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Interpolation by L
x n
w m
y m
h(m)
Fs
Fs
x n
w m
y m
/L
/L
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Decimation by M
x n
h(m)
w m
y m
Fs
Fs
Fs Fs M
T
F
M s
T
Fs
1,
H I
M
0, otherwise
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Decimation by M
x n
h(m)
w m
y m
Fs
Fs
x n
w n
/M
y m
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T
L Fs
h1(m)
Fs
w m
h2(m)
L
F
Fs
M
'
s
F LFs
''
s
Interpolation by L
y m
Decimation by M
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w m
h (m)
F LFs
Fs
''
s
L, min ,
H I
L M
0,
otherwise
w' m
''
s
y m
L
M
Fs'
Fs
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Multistage Implementation
x n
w m
h(m)
Fs
x n
x n
L1
L1
y m
L Li
Fs
L2
h1(m)
i 1
LI
L2
h2(m)
h(m)
L1
y m
h1(m)
y m
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Multistage Implementation
Advantages
Reduce the complexity
Reduce storage devices (registers)
Simplify (relax) filter design problem
Reduce the finite wordlength effect
Disadvantages
Increase the control circuit
Difficulty in choosing I and best Lj for 1 i I
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G z
2 p
G z 2
Desired
2 s
Stretched filter
Required filter order is reduced to N/2.
Undesired
I z
Image suppresser
Required filter order is M.
Order (N/2+M) is needed to implement!
(N/2+M) << N for small M
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(a) G(z)
(a) G(z2)
(b) I(z)
(a) G(z2)I(z)
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Quantity
Compared
Conventional
Method
G(z)
I(z)
Total
Filter order
233
131
268
Number of
Multipliers
117
66
70
Number of
Adders
233
131
137
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x n
y n
y n
x n
z-1
z-1
z-1
z-1
z-1
z-1
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L
transposition
M
transposition
h(n)
h(n)
transposition
h(n)
h(n)
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Practical Structure
Decimation
h(n)
M
z-1
M
z-1
M
z-1
M
z-1
z-1
M
z-1
M
z-1
z-1
M
z-1
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Practical Structure
Interpolation
h(n)
L
z-1
L
z-1
z-1
L
z-1
z-1
z-1
L
z-1
z-1
z-1
L
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x n
E0(zM)
z-1
x n
h(n)
y n
E1(zM)
z-1
M 1
l 0
H z
H z
h
n
z
El z
El z M
e
n
z
l
e n h Mn l
l
z-1
EM-1(zM)
y n
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E (zM)
y n
x n
E (z)
y n
Noble identity
x n
E (zM)
y n
x n
E (z)
y n
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H (z)
E0(z3)
y n
z-1
E1(z3)
z-1
h0
z-1
z-1
z
z
-1
-1
z-1
E2(z3)
h0
h1
-3
h2
z-1
h3
h1
h3
h4
h5
z-1
z-3
h4
h2
z-3
h5
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z-1
3
z-1
h0
z-3
-3
E1(z)
E2(z)
h5
z-1
z-1
-1
h3
h1
h0
3
-1
h4
h2
-3
h3
h1
-1
3
z-1
E2(z3)
E0(z)
z-1
E1(z3)
-1
h4
h2
3
z-1
h5
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Structure Comparison
3
z
-1
3
z-1
3
z-1
3
z
-1
3
z
-1
h0
h0
h1
z-1
h2
-1
h1
h3
z-1
z-1
h4
Direct implementation
h4
h2
3
h5
h3
z-1
h5
Polyphase implementation