Professional Documents
Culture Documents
"
''
VERSION 0.8
1
.1
.2
C .3
ASSEMBLY .4
DIGITAL I/O PORTS .5
MSP430FG4618/F2013 Experimenters Board .6
System Reset .7
System Clocks .8
Timers/Counters .9
LCD Controller .10
A/D .11
D/A .12
2 UART .13
-
- ,
,
.
, . ,
- ,
, -
.
3
-
- TMS-1000
TI 1972 4
)programmable SoC (system-on-chip
4
TMS-1000
5
' .
,
. .
7
, ,
8
-
:
INPUT
OUTPUT
CPU
MEMORY
CLOCK -
9
-
10
- CPU
REGISTERS
ALU
CONTROL
11
/ RAM (Random Access
) - Memory 0200h MSP430
RAM
) ROM (Read Only Memory
CPU
PROM Programmable ROM ROM
.
.
12
EPROM Erasable PROM PROM
.
EPROM "
. EPROM
.
13
The 8749 with UV EPROM
14
EEPROM - E2PROM
ElectricallyErasable Programmable Read-
Only Memory
,
.
FLASH
/
15
,Byte Order
Endianness
,
:
Big Endian
MSB
Little Endian
LSB
16
Big/Little Endian
0x1234 : M.
Big Endian 12 M 34
M+1
Little Endian 34 M 12
M+1
Little Endian
17
-
-:
DSP
100 )MIPS) 100
18
-
MPU
DSP
4 32
1
I/O- Input/Output 8150
19
MSP430
- MSP430 16
0.1A RAM
0.8A )RTC (Real Time Clock
"250A/MIPS "
1.8-3.6V
1sec
20
MSP430
ADC (Analog to Digital 10/12/16
(Convereter
(Digital to Analog Converter) DAC 12
(Operational Amplifiers)
SVS (Supply Voltage
Supervisor)
21
Bit RISC CPU 16
Reduced Instruction Set Computing
, )(bit, byte & word
27 24
7
22
kB 256 FLASH /
)ISP (In-System Programmable Flash
100
USART, I2C, TIMERS
LCD
23
MSP430
24
RISC
Reduced Instruction Set Computing
-'
,opcode' ,
.
' 16" 32
25
Reduced Instruction Set Computing
)
(
)"
(
)
,
(
26
CISC
Complex instruction set computing
' ,
27
MSP430 CPU registers
CPU 16 16
4 R0, R1, R2, R3
12 R4R15
28
CPU Block Diagram
29
ALU
Arithmetic Logic Unit
, , ALU
(AND, OR, XOR)
SR R2 ALU
:(Status Register)
Overflow
Zero
Negative
Carry
30
)R0: Program Counter (PC
PC 16 R0
" CPU
PC
PC )IP (Instruction Pointer
31
)R1: Stack Pointer (SP
. STACK
"
) " PUSH
" (POP
"
) (COMPILER
)(
" PC
RET
32
)R1: Stack Pointer (SP
" ,
PC
) SR ,(TOS " RETI
SR
PC
33
)R2: Status Register (SR
.SR
34
)R2: Status Register (SR
SR
" CPU
.
(Zero Flag Z ):
, .1
(Sign Flag N ):
" ."2
, 1
35
)R2: Status Register (SR
( Carry C ):
carry borrow 1
(Overflow V ):
,
1
36
R2/R3: Constant Generator
)Registers (CG1/CG2
)(Source Register Address
) 6 (As
.
.'
"
.Constant Generator
37
R2/R3: Constant Generator
Registers (CG1/CG2)
38
R4 - R15: GeneralPurpose
Registers
:R4-R15
BYTE
WORD
39
RESET
)POR (Power On Reset
RESET
. ,
RST/NMI RESET
I/O INPUT
RESET
SR - RESET
40
RESET
Watchdog timer watchdog
PC RESET
) (0FFFEh .CPU.
41
Software Initialization
RESET :
SP" "" RAM
WD
RESET":
watchdog timer, oscillator fault, and flash
memory flags
42
Interrupts-
-
.
, .
,
.
43
Interrupt Priority
.
CPU/NMIRS
44
Interrupt Priority
45
" "
. "
" , :
" "" , " " ".
PC
-
, ,
46
" "
- MBR
-
MBR ,IR - Instruction Register
47
,
,
48
Interrupt Processing
GIE ISR.
.
49
Interrupt Acceptance
6
:
.1
PC .2
( )STACK
( SR .3 )STACK
50
Interrupt Acceptance
.4
)
(
.5 "
,
I/O :
SR .6 SCG0 .LPM,
.GIE=0
51
Interrupt Acceptance
.7 ,PC
52
Return From Interrupt
RETI
()return from an interrupt service routine
5
CPU :
SR .1 POP ,
(SR GIE,
')CPUOFF
53
Return From Interrupt
PC .2
POP
.
54
Interrupt nesting
GIE
) (
.
GIE .
55
Types of Interrupts
: 3
System Reset
maskable NMI)-Non(
Maskable
56
Reset/NMI Pin
Reset/NMI RESET
Reset/NMI LOW
RESET HIGH
HIGH CPU
RESET VECTOR
) 0FFFEh (3100h
57
)Maskable Interrupts (NMI)(-Non
NMI " GIE
()ACCVIE, NMIIE,OFIE
:NMI "
RST/NMI NMI
)(oscillator
FLASH
58
59
Operating Modes
MSP430
.
3 :
.1
.2
.3
60
Operating Modes
61
Operating Modes
LPM Low Power Mode SR
:
CPUOFF, OSCOFF, SCG0, SCG1
SR
.
SR
LPM.
LPM .
62
Operating Modes
CLOCK
LPM
.
I/O, RAM
.LPM
.
63
MSP430xG461x
MIXED SIGNAL MICROCONTROLLER
1.8-3.6V :
2.2V 400uA ACTIVE
1MHz
1.3uA STANDBY
0.22uA OFF
RAM
Low Power Mode (LPM) 5
64
MSP430xG461x
MIXED SIGNAL MICROCONTROLLER
ACTIVE STANDBY 6usec
RISC 16
3 )DMA (Direct Memory Access
A/D bit 12 ,
3 Operational Amplifiers
65
MSP430xG461x
MIXED SIGNAL MICROCONTROLLER
D/A Digital-to-Analog 2
3 bit 16 A Timer_A
CAPTURE/COMPARE
7 bit 16 B Timer_B
CAPTURE/COMPARE
On-Chip Comparator -
66
MSP430xG461x
MIXED SIGNAL MICROCONTROLLER
)Supply Voltage(SVS
Supervisor
) (...
)(USART1
USART
UART SPI
Basic Timer Real Time Clock
)(RTC
LCD 160
67
SEGMENTS
Segments 16
Segments 7
up to 160
segments
68
69
,
0 .9
10.
.
70
.
.
.
10
.
:
3571 = 3 x 103 + 5 x 102 + 7 x 101 + 1 x 100
71
/
.
,2
.
" ' '1 '
5.
' '0 ' 0.
72
,
.2
:
1011 = 1 x 23 + 0 x 22 + 1 x 21 + 1 x 20 = 11
)(BIT
MSB
Most Significant Bit
73
LSB
Least Significant Bit
,
.1
:
1011012 = 1 + 4 + 8 + 32 = 4510
74
,16
4
.
4 HEX 0 F:
A, B, C, D, E, F, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
1 0 0 0 1 1 1 1 0 1 0 0 0 1 1 1 :
4 ":
75
HEX
:
0111 = 1 + 2 + 4 = 7
0100 = 4
1111 = 1 + 2 + 4 + 8 = 1510 = F16
1000 = 8
" HEX8F4716 :
76
,
.
1
.
:
00011101 = 29
: 1 29 11100010
77
1
1 ,
,
11111111
MSB
0
1
:
( 7 ) 10 = ( 0111) 2
78
( -7 ) 10 = ( 1000 ) 2
1
/
0
( +0 ) 10 = ( 0000 ) 2
( -0 ) 10 = ( 1111) 2
1
)
(
79
1
: 12 5 = 7
12 = 00001100
-5 = 11111010 1 5
-----------------------
000001101 +
1
-----------------------
00000111 = +7
80
1
:5 12 = -7
5 = 00000101
-12 = 11110011 1 12
-----------------------
111110000 +
0
-----------------------
11111000 = -7
81
2
1
.1
2 .
:
29 = 00011101
1 11100010 29
+
1
----------------------
2 11100011 29
82
2
+29 -29 ) 0 (
29 = 00011101
-29 = 11100011
----------------------
00000000 1
0
2
2n- :
83
2
118- = 128 8 + 2 = (27-) + 8 + 2 = 10001010
:
'
)(118- 10001010
01110101 1
--------------------
01110110 118
84
MSB
MSB='1 '
MSB='0 '
:
1111 = - 7
1011 = - 3
0010 = +2
85
ASCII
- ASCII
American Standard Code for Information
Interchange
ASCII
), , (
.
86
ASCII
87
C Language
88
C
C .
,
,
89
Arithmetic operators
90
Relational operators
91
Other operators
92
Compact forms
93
Priority of operators
94
Masks
' (SET) '1
'(CLEAR) '0
:
95
Bitwise operators
96
Arithmetic Left-shift
)(with carry
LSB '
MSB )C (CARRY
:
64 = 2 >> 16
0x40 = 64 = 0000 0100 = 2 >> 0000 0001
97
Arithmetic Left-shift
)(with carry
1 2
64 =2*32 =1>> 32=2*16 = 1 >> 16
" 3 8
:
X << Y = X * 2Y
35 << 3 = 35 * 23 = 280
98
Arithmetic Right-shift
MSB
LSB
)C (CARRY
99
Arithmetic Right-shift
1 1/2
" 4
1/16
:
X >> Y = X / 2Y
64 >> 4 = 64 / 24 = 64 / 16 = 4
0100 0000 >> 4 = 000 00100
100
C coding tips
)
(RAM
unsigned
structures
unions
static const
structures, unions arrays
101
C coding tips
)(modulo
FOR
102
Principles for low power
applications
STANDBY
) (
) (
) (
103
Principles for low power
applications
.
.
104
,
.
) (Variable Type
.
).(bytes
C:
char, int, long, float, double
105
-128+127 1 char
0255 1 unsigned char
-32768+32767 2 int
065535 2 unsigned int
-2147483648+2147483648 4 long
04294967295 4 unsigned long
-3.4E-38+3.4E-38 4 float
-1.7E-308+1.7E+308 8 double
-3.4E-4932+3.4E+4932 16 long double
106
C 3 :
)(
)(
107
)( :
:
><type ; <identifier1> , identifier2> . . .
:
;char myAge = 21
108
:
109
.
:
>static <type ; <identifier1> , identifier2> . . .
:
;static int counter = 5
110
:
111
)(
.
112
)(
113
C )Structured
(Language ,
,
, '
.
114
:
if else
switch case
:
while
while do
for
:
go to
115
if
if
.
'
:if
) ( If
;
116
if
#include <stdio.h>
if (num < 0)
printf ("Negative\n");
if (num == 0)
printf ("Zero\n");
if (num > 0)
printf ("Positive\n");
}
119
if-else
.
) (if
)} {(
) (else
)} {(
:
)( If
; 1
else
120
; 2
#include <stdio.h>
if (num >= 0)
printf (Positive or Zero\n");
else
printf ("Negative\n");
}
121
' block -
:
)( If
{
; 1
; 2
..
}
else
{
; 1
; 2
..
}
122
:
- &&
- ||
:
If (num == 5 || num > 10)
printf (num equal to 5 or bigger than 10\n);
If (y == 3 && x < 15)
printf (y is 3 and x is smaller than 15\n);
123
if ) (nesting
:
;int a
;char num
)If (num == y
{
)if (a != 0
}
124
if else if
:
)If (n == a
;)printf (a\n
)else If (n == b
;)printf (b\n
)else If (n == c
;)printf (c\n
125
#include <stdio.h>
if (choose == 'a')
printf ("Add...\n");
else if (choose == 'd')
printf ("Delete...\n");
else if (choose == 'c')
printf ("Change...\n");
else if (choose == 'l')
printf ("Show List...\n");
else if (choose == 'q')
printf ("Quit...\n");
else
printf ("Wrong Choice !!!\n");
}
126
Assembly Language
127
Assembly
) (Assembly
, ,
, ,
,
128
Assembler
,
.
,
, )(Assembler
-
) ( ,
-
129
MSP430
>>command ><source>, <destination
:
mov
mov R6, R1
R6 R1
130
Instruction Set
:MSP430
27 )(Core Instructions
24 )(Emulated Instructions
16.
3 :
131
Instruction Set
)Opcode (Operation code
.
)S-Reg (Source Register
)D-Reg (Destination Register
132
Instruction Set
Ad
As
)B/W (Byte/Word
B/W=0
B/W=1
133
Single operand instructions
134
Double operand instructions
135
Program flow control - Jumps
136
Emulated instructions
Arithmetic instructions
137
Emulated instructions
Logical & register control instructions
138
Emulated instructions
Data instructions
139
Emulated instructions
Program flow control
140
Addressing Modes
141
Register Mode
R4-
R15 PC SR
:
R4 ,R5 R4
142
Indexed mode
X Rn
:
X(Rn) = X + Rn
:
F000h + R5
R4
143
Symbolic mode
. R6 LoopCtr
:
; mov.w LoopCtr , R6
144
Absolute mode
SYMBOLIC MODE &.
" XPT YPT
:
145
Indirect register mode
" Rn
:
R4 R5
146
Indirect auto increment mode
" Rn
Rn 2
:
R4 R5
147
Immediate mode
:
148
Source and destination operands,
addressing modes
149
Digital I/O Ports
150
Digital I/O Ports
MSP430 10
P1 P10
8/ )(I/O
I/O ) (INPUT
)(OUTPUT
)' '1 '('0
)' '1 '('0
151
Digital I/O Ports
P1 P2
P1/ P2
)(rising edge
)(falling edge
P1
P2
152
Digital I/O Ports
/ :
/
P1/ P2
153
Digital I/O Operation
/
8 /
P1P6 BYTE
P7/P8 P9/P10
16) WORD(
P7/P8 PA
P9/P10 PB
154
Digital I/O Operation
:
155
)Input Register PxIN (Read-Only
PxIN
:
BIT=0 LOW
BIT=1 HIGH
) (
156
Output Registers PxOUT
PxOUT
:
BIT=0 LOW
BIT=1 HIGH
157
Direction Registers PxDIR
PxDIR
) (INPUT ) (OUTPUT:
(BIT=0 )INPUT
(BIT=1 )OUTPUT
158
Pullup/Pulldown Resistor Enable
Registers PxREN
MSP430F47x3/4 MSP430F471xx
VCC
PxREN=1 PULLUP/PULLDOWN
PxREN=0
( (Pulldown
159
Function Select Registers PxSEL
I/O
PxSEL
I/O peripheral:
BIT=0 I/O
BIT=1 peripheral
PxSEL=1
, PxDIR
160
Function Select Registers PxSEL
:
PxSEL=1 P1 P2
P1IE/ P2IE
161
P1 and P2 Interrupts
P1 P2
PxIFG, PxIE PxIES
PxIFG
162
Interrupt Flag Registers P1IFG, P2IFG
PxIFGx
PxIES
PxIFGx
PxIE
GIE
163
Interrupt Flag Registers P1IFG, P2IFG
P1OUT, P1DIR, P2OUT
P1IFG ' 1' P2DIR
P2IFG
164
Length of I/O Pin
Interrupt Event
PORT
1.5 MCLK
165
Interrupt Edge Select Registers P1IES,
P2IES
PxIES
) (Falling Edge
) (Rising Edge:
BIT=0
BIT=1
166
Writing to PxIESx
P1IES/ P2IES
167
Interrupt Enable P1IE, P2IE
P1IE/ P2IE
:
BIT=0
BIT=1
168
Configuring Unused Port Pins
I/O OUTPUT
PxOUT
169
LED
MSP-EXP430FG4618
:
170
LED
LED1 P2.2
:
)P2DIR |= 0x04; // 00000100 (bit 2
)P2OUT |= 0x04; // 00000100 (bit 2
P2.2 OUTPUT 2, ''1
(|) OR
P2.2 ''1
171
LED
LED ' '0 P2OUT
P2.2:
;P2OUT &= ~0x04
)P2OUT &= 0xFB; // (~0x04 = 0xFB
AND 0xFB
0xFB = 11111011
172
PxIN
S1 P1.0
:
173
P1.0
''1
P1.0 ' '0:
))if (!(P1IN & 0x01
S1
174
MSP430FG4618/F2013
Experimenters Board
175
MSP-EXP430FG4618 -
MSP430FG4618/F2013
176
:
MSP430FG4618
MSP430F2013
2 1.5V AAA
MSP-FET430UIF
DEBUG MSP430
177
MSP430 Flash Emulation Tool
MSP-FET430UIF
178
JTAG
JTAG - Developed by Joint Test Action Group
PCB JTAG
: JTAG 2
MSP430FG4618 JTAG1
wire 4
MSP430F2013 JTAG2
Spy-Bi-wire wire 2
179
JTAG TAP Interface Signals
180
/
IAR Embedded Workbench
TI Code Composer Essentials (CCE)
181
:
FG4618 MSP430
F2013 MSP430
LCD
BUZZER
RS232
182
2 JTAG 2
MSP430FG4618
183
Experimenters Board Block Diagram
184
Hardware Installation
:
2 1.5V AAA
FET
- JUMPER
185
Jumper Settings for Power Selection
186
Mux LCD Display-4
)Momentary-On Push Buttons (S1 & S2
) Light Emitting Diodes (LEDs"" 4
. 3.. MSP430FG46181
MSP430FG4618
JUMPERS
187
Buzzer . digital I/O . ,
. jumper JP1
. Single-Touch Sensing Interface
" , 4 16 ,. .
MSP430F2013 (
)MSP430FG4618"
188
Chipcon Wireless Evaluation Module Interface
. " .
. Zigbee/802.15.4
MHz 868 GHz 2.4
CC2500EMK
2.4GHz
189
RS-232
RS232, 9 , PC
PC . PC
. . .
UART
190
I2C/SPI
. MSP430FG4618/ MSP430F2013
I2C/SPI
"
"
191
Analog Signal Chain
Microphone
MSP430FG4618 .
IO /
Analog Filters
Analog Output
192
System Clocks
CLOCK/
/
MSP430F2013 Clock Sources.
)VLO (Very Low Oscillator
. .12KHz.
)DCO (Digitally Controlled Oscillator
12MHz
193
System Clocks
MSP430FG4618 Clock Sources. -
. . . 32.768KHz
.
. . . 8MHz
. .
194
32.768KHz
195
32.768KHz
32.768KHz
15.
0x8000 = 32768 = 215
" / 15
32768 1.
196
197
198
JTAG
199
LED1, LED2
200
LED1=P2.2 , LED2=P2.1
201
LED4=P5.1
202
SW1, SW2
203
SW1=P1.0, SW2=P1.1
204
Buzzer = P3.5
205
LCD
206
RS232
207
UCA0TXD=P2.4, UCA0RXD=P2.5
208
32.768KHz
209
MSP430FG4618 Pin Access
210
RF
211
IAR Embedded Workbench
IAR
/ /
.
MSP430
http://supp.iar.com/Download/SW/?item
=EW430-EVAL
:
.1 30
.2 8KBytes
212
IAR
213
IAR
FET Debugger
USB
JTAG 14 JTAG1
.
IAR" :
Start->Programs->IAR Systems->IAR
Embedded->IAR Embedded Workbench
214
IAR
215
Project->Create New Project
216
Create New Project
217
toggleLed.ewp
218
toggleLed.ewp
219
Right Click & Options
220
Device->MSP430x4xx Family->MSP430FG->MSP430FG4618
221
Category->Debugger
Driver->FET Debugger
222
File->New->File
223
Type the code
224
225
File->Save
226
Right Click->Add->Addled.c
227
&
228
Right Click->Rebuild All
229
toggleLed.eww
230
errors:0
warning:0
231
Project->Download and Debug
232
Menu bar
Toolbar
Text editor
Workspace
window
Messages
window
Status
233
bar
System Reset
234
System Reset
:Reset MSP430
POR Hardware reset signal -
)Power On Reset(
PUC Software reset signal -
)Power Up Clear(
235
)POR (Power On Reset
:POR
) RESET (RST/NMI
RESET
),SVS (Supervisory Voltage System
PORON
236
)PUC (Power Up Clear
:PUC
PUC
),WDT (WatchDog Timer
WDT "" )supervision
(mode
FLASH
237
)POR (Power On Reset
HW RESET HIGH:
) SR (Status Register
) PC (Program Counter
0FFFEh
power-
up
238
)PUC (Power Up Clear
:
) SR (Status Register
) PC (Program Counter
) RESET (Reset Vector
PUC )
(RESET
239
)BOR (Brown Out Reset
MSP430 2xx 4xx
BOR POR
BOR RESET
+VB_IT
BOR RESET 2
CPU
-VB_IT
BOR RESET
240
Brownout Timing
241
System Clocks
242
)FLL+ (Frequency Locked Loop
" +FLL
))Frequency Locked Loop
+FLL -
) Resonator =
, (
243
)FLL+ (Frequency Locked Loop
: +FLL -
(LFXT1CLK )32.768kHz
450kHz8MHz
XT2CLK )(
450kHz8MHz
MSP430 16MHz
244
FLL+ (Frequency Locked Loop)
Digitally DCOCLK
RC Controlled Oscillator
VLOCLK
12kHz
245
FLL+ module
+FLL :4
ACLK - Auxiliary Clock LFXT1CLK,
VLOCLK
, ( ...)ADC, UART
ACLK/n ACLK 4, 2, 18
246
FLL+ module
MCLK - Master Clock
: LFXT1CLK,
VLOCLK, XT2CLK ) ( DCOCLK
MCLK 4, 2, 1 8FLL
SMCLK - Sub-Main Clock
: XT2CLK ) (
DCOCLK
SMCLK
247
ACLK/n
ACLK
MCLK
SMCLK
248
FLL+ Clock Module Operation
PUC MCLK SMCLK
DCOCLK 32 ACLK
ACLK 32.768kHz MCLK SMCLK
MHz 1.048576
x 32.768kHz = 1.048576 MHz 32
+FLL -
249
FLL+ Clock Module Operation
:
250
Internal Very Low-Power, Low-
Frequency Oscillator
)(VLO
12KHz .
VLO
251
LFXT1 Oscillator
32.768KHz
XIN XOUT
.
1
8
252
XT2 Oscillator
XT2
LFXT1
253
)Digitally Controlled Oscillator (DCO
DCO Ring Oscillator
NOT :
254
)Frequency Locked Loop (FLL
FLL /
10
FLL DCO
SCFI0 SCFI1
255
FLL Operation from
Low-Power Modes
)(Interrupt Service Request
SCG1, CPUOFF OSCOFF
SET SCG0
" FLL
DCO
SCFI0 SCFI1
SCG0
FLL
256
FLL+ Fail-Safe Operation
:
257
Timers/Counters
258
Basic Timer1 Introduction
LCD
2 8
16
:
)RTC (Real Time Clock
259
Basic Timer1 Introduction
:
2 8
16
LCD
260
Basic Timer1 Block Diagram
261
Basic Timer1 Operation
2
8
16 BTCTL
LCD
BTCNT1
262
Basic Timer1 Counter One
BTCNT1 /
ACLK
BTCNT1 BTHOLD
BTDIV
263
Basic Timer1 Counter Two
8
ACLK, SMCLK
BTCNT1
ACLK/256
BTSSEL
BTDIV
BTCNT2 HOLD
264
Basic Timer1 Counter Two
BTCNT2
BTIPx
265
Bit Counter Mode-16
/ 16
BTDIV
BTCNT1 ACLK
BTCNT2 ACLK/256
266
Basic Timer1 Operation: Signal fLCD
BTCNT1 fLCD LCD
32768Hz BTCNT1 ACLK
LCD
BTFRFQx fLCD
:
ACLK/256, ACLK/128, ACLK/64, or ACLK/32
267
Basic Timer1 Operation: Signal fLCD
LCD
:
fLCD = 2 mux fFrame
30 FRAME MUX 3 LCD :
: 100
268
Basic Timer1 Interrupts
SFR
BTIFG )
(
BTIE
269
/
BTCNT1/ BTCNT2
BTCNT1/ BTCNT2
270
IE2 IFG2
271
BTCTL,
Basic Timer1 Control Register
272
Timer_A Introduction
Timer_A / 16
( )COMPARE
( )CAPTURE
Timer_A 3 5capture/compare
PWM
) (overflow capture/compare
273
Timer_A Introduction
:Timer_A
/ 16 4
3 5 capture/compare
PWM
Timer_A
274
Timer_A Block Diagram
275
Timer_A Operation
Timer_A
TAR 16
TAR
TAR /
)(overflow
276
Timer_A Operation
TAR
TACLR ( )CLOCK DIVIDER
/
:
)
(
277
Clock Source Select and Divider
ACLK, SMCLK
TACLK INCLK
TASSELx
)(clock divider
Idx 4 ,2 8
TACLR "
278
Starting the Timer
:
MCx > 0
UP UP/DOWN
TACCR0 0
TACCR0 0
) (0
279
Timer Mode Control
4
MCx:
280
Timer Mode Control
Up Mode
0FFFFh
0
TACCR0
' TACCR0+1
281
Up Mode Flag Setting
TACCR0 CCIFG
''1
TAIFG ' '1 TACCR0 0
282
Changing the Period Register TACCR0
TACCR0 /
/ TACCR0
TACCR0 0
283
Continuous Mode
0FFFFh
284
Continuous Mode Flag Setting
0 0FFFFh ' 1' TAIFG
285
Use of the Continuous Mode
continuous mode
(Timer_A3) 3 (Timer_A5) 5
capture/compare
286
Continuous Mode Time Intervals
287
Up/Down Mode
0FFFFh
TACCR0
,0 TACCR0
288
Up/Down Mode
.
TACLR
289
Up/Down Mode Flag Setting
CCIFG CCR01
TAIFG 1h 0h
"
290
Changing the Period Register TACCR0
TACCR0
,down
TACCR0
up /
291
Use of the Up/Down Mode
) (dead time
)(overload condition
: H-Bridge
292
Output Unit in Up/Down Mode
:
293
Capture/Compare Blocks
Capture CAP=1
/
CAPTURE CCIxA CCIxB
CCISx
CMx
CAPTURE
294
Compare Mode
CAP=0 COMPARE
PWM
TAR TACCRx
:
CCIFG ''1
EQUx=1
295
Compare Mode
EQUx
CCI SCCI
296
Output Unit
OUTMODx
OUTx
0
297
298
Output ExampleTimer in Up Mode
TACCRx OUTx
299
Timer_A Interrupts
:
TACCR0 TACCR0 CCIFG
TAIV CCIFG TAIFG
300
301
302
303
304
Timer_B
Timer_B Timer_A
:
B ,10 ,8
12 16
TBCCRx
B high-
impedance
SCCI B (Synchronized
)capture/compare input
305
LCD Controller
306
LCD Controller Introduction
LCD
LCD ac segment
common voltage signals
LCD,static, 2-mux :
mux, 4-mux-3
FRAME
307
LCD Controller Introduction
,LCD static, 2-mux: 4
mux, 4-mux-3
308
LCD Controller Introduction
309
LCD Controller Operation
LCD SET
310
LCD Controller Operation
LCD LCDSON
) AND
(
LCD fLCD Basic
Timer1
COMMON SEGMENT LINE
fLCD LCD
) (LCD
311
LCD Voltage Generation
R33, R23, LCD
R03 R13
312
LCD Voltage Generation
LCD VCC R33
LCD) CONTRAST ( R03
313
D/A
314
DAC12 Introduction
D/A, D2A, DtoA, DAC
DAC
)" (
DAC 8/12
2
1.5V/2.5V
315
316
DAC12 Core
DAC12RES
8 12 DAC
DAC12IR FULL
SCALE ((x1 )(x3
317
DAC12 Core
DAC12_xDAT 8
0FFh
DAC12_xDAT 12
0FFFh
DAC
ADC
DAC12AMPx
) (
318
DAC12 Amplifier Setting
319
Updating the DAC12
Voltage Output
DAC12LSELx
DAC12CALON
DAC
DAC12GRP
320
321
322
323
A/D
324
A/D Analog To Digital Converter
A/D, A2D, AtoD, ADC
ADC )"
(
ADC 12
KSPS 200
Timer_A/Timer_B
1.5V/2.5V
325
A/D Introduction
12 A/D MSP430FG461x
:
AVcc
326
A/D Introduction
:
'
'
/ ADC
/
16 16/
327
328
Bit ADC Core-12
-VR +VR
NADC
:
1 212 = 4095 12
1 210 =1023 10
1 - 28 =255 8
329
ADC12 Inputs & Multiplexer
:
break-before-make
T-switch
crosstalk
330
Analog Port Selection
ADC MUX
:
331
Voltage Reference Generator
ADC 1.5V
2.5V
REFON=1 REF2_5V=1 V2.5
REF2_5V=0 1.5V
17
332
Conversion Time
:
ADC12SC
Timer_A 1
Timer_B 0
Timer_B 1
13
333
Conversion Time
334
Conversion Memory
16 16
ADC12MCTLx
CONSEQx :
335
ADC12 Interrupts
18 :
16 ADC12IFG0-
ADC12IFG15
ADC12OV ADC12MEMx-
ADC12TOV
336
337
338
339
340
341
342
343
UART
Universal Asynchronous
Receiver/Transmitter
344
:
8
,
345
/
) (
.
SPI/I2C :
.
.
RS232/RS485/RS422 :
346
-
:Start Bit
" ,"0
.
" " "1
"" 0
:Stop Bit
" ."1
347
-
:Parity Bit
,
.
:Even " "1
.
:Odd " "1
.
Parity: None
348
-
)Baud Rate (baud/second :
.
)Bits
.(per Second ,
.
:
) (character 7 ASCII
11 , 4
.
349
Baud & bps
351
UART DATA
352
GSM MODEM
GPS
RF MODULE
Bootloader
.
353
UART & RS232
RS232
() Data Terminal Equipment ,DTE
( Data Circuit Equipment,
).DCE
354
UART & RS232
UART RS232
MARK "1" 3.3/5V -3-15V
SPACE "0" 0 +3+15V
355
UART & MSP430
7 8
PARITY/
PARITY
" " "0
" "1 LPM
Baud Rate
356
Block Diagram MSP430
357
Baud Rate
:
N = fBRCLK/16xBaudrate
Or: N = fBRCLK/1xBaudrate
UCBRx = INT(N)
UCBRSx = round( ( N INT(N) ) 8 )
UCBRFx = 0
:
358
UART
POLLING
INTERRUPT
359
UCAxCTL0
360
UCAxCTL1
361
UCAxBR0, UCAxBR1, UCAxMCTL
362
UCAxBR0, UCAxBR1, PRESCALER VALUE
363
UCAxRXBUF, UCAxTXBUF, IE2
UCAxRXBUF, USCI_Ax Receive Buffer Register
UCAxTXBUF, USCI_Ax Transmit Buffer Register
IE2, Interrupt Enable Register 2
364
IFG2
365
RS232
Start->Programs->Accessories-
>Communications->HyperTerminal
:
366
HyperTerminal
OK
COM ,COM1 :
OK
367
HyperTerminal
flow control bps, data bits, parity
OK
368
HyperTerminal
:
369
!
370