Priority Interrupt Control (PIC)

8259/8259A
8086
8259A
Architecture of 8259A
These signals are used to interface with 8086
This part handles all the external interrupt request
Accepts and stores interrupt request from the
interrupting devices
 Identifies all the interrupts that are currently
being serviced by the processor

Works as a buffer between IRR and 8086

It acts as a JIDGE

Determines the priorities of the bits set in the IRR

It allows to mask and unmask any IR input line
Allows cascading multiple 8259 in a Master-Slave configuration

It allows upto 64 interrupts to be connected

How 8086 and 8259 are Connected

8 8
0 2
8 5
6 9