Professional Documents
Culture Documents
source:
http://en.wikipedia.org/
wiki/Adder_(electronics)
Very brief introduction on several existing
adders:
ripple carry adders
carry skip adders
carry look ahead adders
tree structured adders
Brent-Kung
Spanning Tree
Ling
Han-Carlson
Kogge-Stone
Very brief introduction on several existing
adders:
ripple carry adders
carry skip adders
carry look ahead adders
tree structured adders
Brent-Kung
Spanning Tree
Ling
Han-Carlson
Kogge-Stone
Propagation Delay
Basically, the performance of adders are
evaluated with propagation delay (in this
paper)
Propagation Delay: also called gate delay, the
time difference between the change of input and
output signals.
source:
http://www.seas.upenn.e
du/~ese201/lab/CarryLo
okAhead/CarryLookAh
eadF01.html
Ripple Carry Adders
Goal: the adder should be able to compute
the sum of more than 1 bits
Idea: just chain several adders together
source:
http://en.wikipedia.org/
wiki/Adder_(electronics)
Pros & Cons
Pros:
straight forward, easy to implement
low power consumption, low resource
source:
http://en.wikipedia.org/
wiki/Adder_(electronics)
Carry look ahead adders
proposed by Weinberger and Smith in 1958
source:
http://en.wikipedia.org/
wiki/Carry_look-
ahead_adder
carry look ahead adders work by creating
“Propagate” and “Generate” signals for each
bit
Propagate: controls whether a carry is propagated
from lower bits to higher bits
Generate: controls whether a carry is generated
a 4-bits carry look ahead adder
source:
http://www.seas.upen
n.edu/~ese201/lab/Ca
rryLookAhead/Carry
LookAheadF01.html
Pros & Cons
Pros:
faster than ripple-carry adders, since some
computation can be done in advance
Han-Carlson Adder
Brent-Kung Adder
source: http://www.acsel-
lab.com/Projects/fast_adder/a
dder_designs.htm
Introduction to Adders & Problem
Statement
Spanning Tree Adders
Result & Conclusion
Spanning Tree Adder (STA)
Spanning tree adder
use minimum number of multi-input gates
Hybrid adder
Manchester Carry Chain (MCC)
use ripple carries
Propagate rapidly
MCC
Size of MCC
is a trade of
# of inputs
# of levels
32-bit STA
STA based on MCC
Gi:j=MCC2(Gi:k-1, Gk:j, Pi:k-1, Pk:j)
Gi:j=MCC3(Gi:k-1, Gk:m-1, Gm:j, Pi:k-1, Pk:m-1, Pk:j)
Ci=G0:i-1
Carry Select Adder (CSA)
Two sum outputs:
Assumed carry input as 0
Assumed carry input as 1
# of MCC level is
decided by the size of
final stage CSA carry select adder
m-bits wide CSA
Require Cm, C2m, C3m…
Final stage adder:
if m is large
carry select adder takes more time
if m is mall
need more MCC levels