Micom Alstom P642, P643, P645 Transformer Protection and Monitoring Ieds

MiCOM ALSTOM P642, P643, P645
Transformer Protection and Monitoring IEDs
Sharaf Hosseini
Product Manager
December 2010
MiCOM ALSTOM P642, P643, P645
APPLICATIONS
Auxiliary
transformers Autotransformers
Two/Three
Generators Winding
Transformers
Ring Bus Fed

Motors
Windings
Short
Reactors
Interconnectors
Transformer Protection, and Monitoring IEDs – Nov 2010 - P 2

© ALSTOM 2010. All rights reserved. Information contained in this document is provided without liability for information purposes
only and is subject to change without notice. No representation or warranty is given or to be implied as to the completeness of
information or fitness for any particular purpose. Reproduction, use or disclosure to third parties, without express written authority,
is strictly prohibited.
Conventional Two Winding Transformer
MiCOM Alstom P642
HV+LV
P642

Conventional Three/Two Winding Transformer
MiCOM Alstom P643
HV+LV+TV
HV+LV
P643
P643

Two Current Inputs per Winding
MiCOM Alstom P645
HV+LV+TV

P645
Current Input Selection
HV+LV
P645
Differential Protection
Feature P642 P643 P645

Transformer Phase   
Differential:
Three slope biased   
characteristic
Ratio Correction   
CT Polarity Inversion   
Vector Correction   
Zero sequence filter   
2nd harmonic inrush restraint   
5th harmonic overflux   
CT trouble alarm (circuitry fault   
alarm)
CT saturation and no gap   

detection
Internal/External Fault detection   
Restricted Earth Fault Protection

LowZ REF: 2 3 3
characteristic
Ratio correction   
LowZ REF for   
Autotransformers:
characteristic
Ratio correction   
HighZ REF 2 3 3

Thermal Protection and Monitoring Features
P642 P643 P645

Thermal Protection:   
Ambient Compensation Option Option Option
(RTD or CLI (RTD or CLI (RTD or CLI
required) required) required)
Top oil temperature compensation Option Option Option
(RTD or CLI (RTD or CLI (RTD or CLI
required) required) required)
Four Cooling modes available   

Top oil temperature 3 stages 3 stages 3 stages
Hot spot temperature 3 stages 3 stages 3 stages
Pre-trip alarm   
Loss of life statistics   
Through-Fault Monitoring   
CLIO Protection 4CLI 4CLI 4CLI
4CLO 4CLO 4CLO
RTD Protection 10 10 10
Overcurrent Protection

Overcurrent: 2-4stages 3-4 stages 3-4 stages
Directional(1)/Non-directional   
Voltage controlled(1) 1-2stages 1-2stages 1-2stages
Stub bus(3)   
Breaker Failure   
Earth Fault: 2-4stages 3-4 stages 3-4 stages
Negative phase sequence(2): 2-4stages 3-4 stages 3-4 stages
Notes:
(1) 3Φ VT option fitted in P643/P645 and additional 1Φ VT option fitted in P642
(2) IDMT characteristics available for stages 1 and 2 of NPS elements
(3) PSL configuration required

Voltage and Frequency Protection

V/f Overfluxing 1-4stages 1-4stages 1-4stages
or or
2-4stages(1) 2-4stages(1)
Undervoltage NA 1-2stages 1-2stages
Overvoltage NA 1-2stages 1-2stages
Negative phase sequence overvoltage 1-1stage 1-1stage 1-1stage
Residual Overvoltage NA 1-2stages 1-2stages
Overfrequency(2) 1-2stages 1-2stages 1-2stages
Underfrequency(2) 1-4stages 1-4stages 1-4stage
Notes:
(1) Requires 3Φ VT option
(2) Frequency protection may use voltage or current signals
NA = not available

Measurements, Recording and Supervision

CT Supervision 2 3 5
VT Supervision(1)   
Trip circuit Supervision   

Measurements   
PSL   
Event Recording   
Fault Recording   
Disturbance Recording   
Notes:
(1) 3Φ VT option fitted in P643/P645 and additional 1Φ VT option fitted in P642

Analogue Inputs

2 x 3 sets Phase CT inputs 
2 neutral CT inputs 
3 neutral CT inputs  
1 VT input for overfluxing   

1 Single phase VT input Option
1 Three phase VT input Option Option

SIGNAL PROCESSING
•24 Samples per cycle

•One cycle fourier filter extracts the fundamental sine and cosine components
of each signal channel, and the second and fifth harmonic sine and cosine
components of every phase differential current.
8 times/cycle 4 times/cycle
2 times cycle 1 time/cycle

SIGNAL PROCESSING
Function Execution rate
(times/cycle)
•24 Samples per cycle
Frequency tracking 8
Bias differential
•One cycle fourier filter extracts the fundamental sine and cosine components
CTS
of each signal channel, and the second and fifth harmonic sine and cosine
componentscrossing
Zero of everydetection
phase differential current.
CT saturation detection
No gap detection
High impedance REF 4

Low impedance REF
VTS
Poledead
Circuit breaker failure
Phase overcurrent, negative phase overcurrent, 2
standby overcurrent, under/overvoltage, residual
overvoltage, voltage controlled overcurrent, negative
sequence overvoltage
CLIO, RTD, overflux, through fault monitoring, thermal 1
overload

SIGNAL PROCESSING
• Frequency tracking algorithm:
• Determines the power system frequency
• Adjusts the sampling clock to exact multiples of the power system
frequency.
• Frequency tracking range

• 45 to 66 Hz
• Frequency tracking channel order
• VA, VB, VC, VX, IA1, IB1, IC1, IA2, IB2, IC2, IA3, IB3, IC3, IA4, IB4, IC4, IA5,
IB5, IC5
• The voltage channels have the priority.
• If a voltage channel is not available, a current channel is used. If a

current channel is being used and a voltage channel becomes available,
the frequency tracking will automatically switch to the voltage channel.
However, if neither a voltage channel nor IA1 are on hand, IB1 would be
used. If IA1 becomes available and no voltage channel is available, the
frequency tracking algorithm will continue using IB1.
SIGNAL PROCESSING
Frequency Tracking
Frequency
Voltage No track channel
signal
order: IA1, IB1,
available
IC1,...IC5
Yes No
Frequency
track Voltage
Yes signal
channel
order: VA, available
VB, VC, Vx
Yes
Voltage
signal No
available

Differential Protection
87T

Transformer Differential (87T)
P64x Transformer Biased Differential Characteristic
Biased differential characteristic
Characteristic
equations: Idiff/Inom
v 0  Ibias  Is1 Is-HS2

K1
Iop  Is1
Is-HS1
Restraint region
:
K2
v Is1
 Ibias  Is2 Operating region
K1
Is-CTS K-cctfail
Iop  K1  Ibias K1
Is1
Is-cctfail
v Ibias  Is2 Is1/K1 Is2 Ibias/Inom
Iop  K1  Is2  K 2 Ibias  Is2 

Logic I diff 5H
5th harmonic Block
overfluxing
detection
I diff 2H
2nd harmonic Block
mag inrush
detection
I d biased I d biased Trip
delay
Differential
Biased AND
Change Is1 to Characteristic
Is_CTS in I diff HS1
Id biased
CT restraint mode Trip Idiff Trip
K2 Start OR
Supervision
Is1 K1
Is2
AND
First High Set element Low-set diff protection:

Idiff >
Is_HS1 The protection trips on a
count of 2, it increases to
Second High Set element
4 if the differential current
is within 0.5Is1.
I diff HS2 Trip
Idiff >
Is_HS2
Is-HS1 Trip

Inrush stabilisation (second harmonic blocking)
Any phase Idiff
(2 fn)/Idiff (fn) > Counter = 0
Settings No
Yes
Counter += 1
Counter
>= 2
Yes
Drop off
Block single
phase low-set diff
No
Cross Yes Block three
block phase low-set
setting diff
No
Transformer Protection, and Monitoring IEDs – Nov 2010 - PReturn

22
Transformer differential
Second Harmonic Blocking

Vector Group, Ratio Mismatch and Zero-
Sequence Compensation (1)
Power transformer
Ratio
P640 correction
Scheme
Vectorial
correction
Zero Seq.
87T trap
Software Compensation
Software Compensation
Fifth harmonic restraint
Any phase No
Idiff (5 fn)/Idiff (fn) Counter = 0
> Settings
Yes
Counter +=1
Counter
>=2
Yes
Drop off
Block single
phase low-set diff
No
Transformer Protection, and Monitoring IEDs – Nov 2010 - P 25 Return

Vector Group, Ratio Mismatch and Zero-
Sequence Compensation (2)
HV 12 Setting Wizard
O'clock LV
+ Hour(s)
C
C
B
B
A
A
• Enter reference power (Sn): MVA

• Enter line voltage for each winding
• Enter CT primary and secondary current ratings
• Enter Vector Group (Clock Notation) for LV and TV windings
• Set which windings are grounded. The relay applies a zero
sequence filter (“Delta trap”) if the winding is grounded.
All you have to do: Set Transformer Nameplate Data, and CT
Ratios
Vector Group, Ratio Mismatch and Zero-Sequence
Compensation (3)
Interposing CTs NOT REQUIRED
90MVA
132kV/33kV
Yd9
400:1 2000:1
a
A
b
B
c
C
1:3
Grounding
transformer
inside the
protected zone
a a a a a
B B
b b b b b
B B
c c c c c
B B
3:1
D D D
Ydy0 software Yd3 software

P642
interposing CT interposing CT

External AN Fault
Current Distribution
Yd1
1:3
A
Grounding transformer
AN external I1 inside the protected
fault
zone I3
I2
a a a a a
I7 B B
I4
b b b b
B B
I5 b
c c c c c
B B
I6
D D D
3:1
Ydy0 software interposing CT Yd11 software interposing CT

P64x
NOTE:
I1 = INOM Ð180° I4 = I5 + I6
I2 = INOM × KWYE/3KDELTA Ð0° I5 = I6 = |I2|/3
I3 = INOM × KWYE/3KDELTA Ð180° I7 = |I1|/3
IA1 IA2 Ia1 Ia2

IA0 IB0 IC0 30° 30°
Ic1 Ic2
IC1 IB1 IB2 IC2

Ib1 Ib2
IA = IA1 + IA2 + IA0 = 3IA0 Ia = Ia1 + Ia2 = 3Ia1

IB = IB1 + IB2 + IB0 = 0 Ib = Ib1 + Ib2 = -3Ia1
Transformer Protection, and Monitoring
IC IEDs – Nov
= IC1 2010
+ IC2 - P =280
+ IC0 Ic = Ic1 + Ic2 = 0
Calculation of bias current
Further stability for external faults:
• Delayed bias:
Ibias,y(n) = Maximum [Ibias,y(n), Ibias,y (n-1),..., Ibias,y (n –
7)]
• Maximum bias:
The bias quantity used per phase for the percentage bias
characteristic is the maximum “delayed” bias current
calculated from all three phases.
Ibias,max = Maximum [IbiasA, IbiasB, IbiasC]
• Transient bias:
Introduced when a sudden increase in the mean-bias
measurement occurs.
New
Stability in the Presence of CT Saturation
Transient Bias
► Stability must be maintained for external fault with

saturation
► Mismatched samples during saturation must not cause
tripping
► Bias transiently increased to improve through fault
stability
► Transient bias is removed after the relay has tripped
and when Ibias is less than Is1

Transient Bias Logic Calculate latest bias current = Ibiasn
Calculate delta bias current = DIbias = Ibiasn – Ibiasn-1
No Differential trip Yes

OR
Ibiasn < Is1
No
Idiff peak < Is-HS1
Transient bias = 0
Yes
Ibiasn < Is2 No
Yes
New transient bias New transient bias New transient bias

Itbiasn = DIbias ´ A Itbiasn  DIbias ´ B Itbiasn= DIbias ´ C
DIbias > 0.2 ´ In

AND
Ibiasn > Ibiasn-1 No Transient No
AND bias < Is1
Itbiasn > Transient bias
Yes
Yes
Transient bias = 0 Transient bias = transient bias ´ e-t/t

Transient bias = New transient bias
Return
only and is subject to change without notice. No representation or warranty is givenNote: The constants
or to be implied A, B,ofC and
as to the completeness t where determined by test. In is the nominal current.
Transient Bias
25.0
20.0
15.0
Idiff (pu)
10.0 charact_maxbias
charct_transientbias_A
charact_transientbias_B
5.0 charact_transientbias_C
0.0
0.0 5.0 10.0 15.0 20.0 25.0 30.0
Ibias (pu)

Inrush Current - Theory
+ m
V

Im
Steady state
- m
Im
2 m
 Switch on at voltage
V zero - No residual flux
Component DC 2nd H 3rd H 4th H 5th H 6th H 7th H

55% 63% 26.8% 5.1% 4.1% 3.7% 2.4%
Stability for Magnetising Inrush Current
• Magnetising inrush current flows into the energised winding at

switch on
• This current is not represented as outfeed on other windings
• A method of restraint is required to avoid trips on closure of
the breaker:
− Inrush current is rich in harmonics: 2nd, 5th etc.
− Use 2nd harmonic as the basis to detect inrush
− (Triplen harmonics 3rd, 6th etc are not recommended in
case a drop-in retrofit is made in a delta-connected CT
application, which filters all harmonic multiples of 3)
• Low set differential element is conditioned to check that the
differential current is not inrush
• High set differential elements do not wait for the inrush
calculation

Application Example
Autotransformer Differential Protection
175/145/30 MVA
230/115/13.8 kV
230kV YNynd1
+5%/-15%
19 taps 2000:5
1200:5 A 800:5 a
A
B b
B
C c
C
Grounding
transformer
inside the
protection zone
a a a a a
B B
b b b b b
B B
c c c c c
B B
Yd11 software
Ydy0 software
interposing CT
interposing CT
a a a
b b b
c c c
B
D D D
Ydy0 software
interposing CT P645
Application Example
►Use the mid tap position for the HV nominal voltage:

(5  15)
100 
Mid tap position  2 ´ 230  218.5kV
100
Application Example

Application Example
►Calculation of Full Load Currents:
175 ´ 106 175 ´ 106

IFLC,HV   462.41A IFLC,LV   878.58 A
3 ´ 218.5 ´ 103 3 ´ 115 ´ 103
175 ´ 106
IFLC,TV   7321 .47 A
3 ´ 13.8 ´ 10 3
►Calculation of ratio correction factors:
Inom,HV 800 Inom,LV 1200

K amp,HV    1.730 K amp,LV    1.366
IFLC,HV 462.41 IFLC,LV 878.58
Inom,LV 2000
K amp,TV    0.273
IFLC,LV 7321 .47
Application Example
►No mal-operation due to tap changer errors:
2.5
Bias characteristic
CT and tap changer errors

2
nominal MVA, tap 1
nominal MVA, tap 19

1.5
Idiff/Inom
66.7% of nominal MVA, tap 1
66.7% of nominal MVA, tap 19
0.5
0
0 0.5 1 1.5 2 2.5 3 3.5 4
Ibias/Inom

Application Example
Stub Bus Protection
►Stub Bus Activation Logic:
CB1 CB2
Consider the LV side: Auxiliary contacts from
the LV side isolator are connected to an opto input
configured as LV StubBus En (DDB 645).
If this input is asserted (LV isolator open) and
the LV Undercurrent (DDB 1694) is also
asserted, then the LV StubBus Act (DDB 648) HV side isolator
would be declared.
Autotransformer
As a result, the bias currents 4 and 5 are not 230/115/13.8 kV
Auxiliary
considered in the differential calculation. services
Also, the CTS of current inputs 4 and 5 would be LV side isolator

Auxiliary contacts
internally blocked.
In addition, in a transformer application, the CB4 CB5

REF protection associated to the winding
whose currents are not considered in
the differential calculation would be
internally blocked. Bias 4 Bias 5
Finally, the CB Fail of breakers 4 Opto input

P64x
and 5 are not initiated by any general overall trip.
Note: The HV stub bus can be applied similarly.
The Stub Bus (area in the red rectangle)

may be protected by an instantaneous overcurrent
Transformer
and Protection, and Monitoring
the appropriate IEDs – Nov 2010 - P 40
PSL configuration.
Application Example
Stub Bus Protection
LVstub/Idiff blck
Idiff Trip 100

DDB #902 & Dw ell
Output R5
DDB #004
0
LV stub bus trip
LV I>3 Trip 100
LV UndCurrent
DDB #984 & Dw ell
Output R3
DDB #002
DDB #1694
& S
Q LV StubBus Act
DDB #648
0
R
LV isolatior aux. contact
Input L2 LV StubBus Enabl
DDB #065 DDB #645
•Stub Bus Trip:

− The stub bus can be protected by a non-directional DT phase
overcurrent element with a delay time set to zero seconds
•Idiff Trip Blocked:
− The breakers associated to a particular winding do not trip due to
Idiff trip if the stub bus for that winding is activated (ring bus and
breaker and a half arrangements).
− A lockout relay (86) per circuit breaker is required.

VTS and
Differential CTS (CT Supervision)

P64x Differential CTS (1)
Patent Number US7279905
•The ratio of Negative (I2) to Positive (I1) sequence current is
measured for each CT input.
− Ratio is zero (or small) => CT is unloaded OR balanced
load is flowing, OR a three phase system fault is present.
− Ratio is non-zero => An unbalanced fault exists, OR there
is unbalanced loading, OR there is a CT problem.
− Ratio is non-zero at two (or more ends) simultaneously =>
Almost certainly a genuine fault condition & unlikely to be
a CT problem.
I2/I1 CT1 CTS I2/I1>2 &

I2/I1 CT2 CTS I2/I1>1
The output of the AND gate is HIGH only if CTS I2/I1>2 of CT1 is high and I2/I1 ratio in all
the other current inputs is below the standing unbalance of the system.

P64x Differential CTS (2)
•If I2/I1 ratio is high at one end only, the output from the AND gate A
highlighted in red is asserted.
•The relay uses I1 to distinguish between a CT problem and a single end
fed fault condition:
− If I1 is detected at more than one end, it must be a CT problem and
CTS is allowed to operate
− If I1 is detected at only one end, it is either inrush condition or single
end fed internal fault. Therefore, the CTS operation is blocked
I1 CT1
I1 CT2
I1 CT3 ≥2
I1 CT4 OR
I1 CT5
Inrush Detector CT Fail

Inhibit CTS CTS BLK Alarm
OR Timer
I2/I1 CT1 CTS I2/I1>2 & &

CTS I2/I1>1 CTS CT1
I2/I1 CT2
I2/I1 CT5 CTS I2/I1>1 A
Differential CTS - Principles (3)
Simplified Logic Diagram
I1 CT1
I1 CT2
I1 CT3 ≥2
I1 CT4
I1 CT5
OR Typical settings:
Inrush Detector CTS BLK
Inhibit CTS
OR Timer CT Fail Alarm
►CTS I2/I1>2 = 40%
I2/I1 CT1
I2/I1 CT2
CTS I2/I1>2
CTS I2/I1>1
& &
CTS CT1
►CTS I2/I1>1 = 20%
&
►CTS I1 = 10%
CTS CT2
CTS I2/I1>1
&
CTS I2/I1>2
CTS I2/I1>1 ►CTS time delay = 1sec
CTS I2/I1>1
CTS I2/I1>1
&
CTS I2/I1>1
& CTS CT3
CTS I2/I1>1
CTS I2/I1>2
CTS I2/I1>1
CTS I2/I1>1
CTS I2/I1>1
& &
CTS I2/I1>1
CTS CT4
CTS I2/I1>1
CTS I2/I1>2
CTS I2/I1>1
CTS I2/I1>1
& &
CTS I2/I1>1
CTS CT5
CTS I2/I1>1
CTS I2/I1>1
CTS I2/I1>2
Patented CT Supervision (3)
Option: Indication or Restrain

Idiff/In
Operating region K2
Is-CTS
Is1 K1
Restraint
region
Is1/K1 Is2 Ibias/In
CTS impact on 87T depends on setting:
Alarm Mode: Indication only
Restrain Mode: Is-CTS de-sensitise to avoid a trip on max. load
VT Supervision (1)
A
B
C
1 and 2
logic
3 on load
logic
Alarms
VTS Event record
3 on Blocking
energisation
logic Adaptive setting
MCB digital
input
P64x detects all VT circuit problems: 1ph, 2ph or 3ph.

VT Supervision (2)
Loss of all 3 phase voltages

under load
P64x
I VTS alarm
VTS block
& LCD
Voltage Event records
collapse
P64x detects all VT circuit problems: 1ph, 2ph or 3ph.

VT Supervision (3)
Loss of all 3 phase voltages

upon line energization
P64x
VTS I>
Inhibit VTS alarm
VTS block
& LCD
No Event records
Voltage
P64x detects lack of fuselinks/open MCB on CB closure too

Restricted Earth Fault
REF

Restricted Earth Fault Protection:
Enhanced Ground Fault Sensitivity
C C
B B
A A
0 ... x ... 1
87T
{IA, IB, IC}

IY
REF

Limitation of Earth Fault Current
Primary Secondary
A a
V2 V1
B b
C c
V1
x The earthing resistor is rated to pass full load current  IFLC
3R
Assuming that V1 = V2 then:
V 1  T 1
V 2  T 2
T2:T1 V1 3  V 1 3 T 1
3:1  
V2 V 2 T2
3 T 1
1  T 2  3 T 1
T2
x.V1
For a fault at x pu distance from the neutral If is If 
3R
The secondary fault current referred to the primary is
x  V1 x  T1
I primary 
3R T2
1
 x 2  IFLC
3

Limitation of Earth Fault Current
1.0
IF F
Current I
(x full load) Source IS
IS
0.2 R
0.2 1.0 R
Fault position from neutral (x)
87T Differential setting % of Star winding protected
10% 58%
20% 41%
30% 28%
40% 17%
50% 7%
• 41% Means 59% of the winding near the star point is unprotected, and REF
can be applied to enhance sensitivity
•
REF can also be used for Delta windings, where it is sometimes termed
“balanced
Transformer Protection, earthIEDsfault”
and Monitoring (BEF).
– Nov 2010 - P 53
P64x REF Protection
P64x Low Impedance REF
• Biased element per winding IREF Diff
• Applicable in 1.5 CB
arrangements
• CTm and CTn are the current Operating
inputs associated to a Region
particular winding K2
• High sensitivity (5%)
C1 = CTm ratio / CTn ratio Restraint

Region
C2 = Neutral CT ratio / CTn ratio Is1 K1
Is2 IREF Bias
Bias current (x In)
1 
 
    
Ibias  max IACTn  C1 ´ IACTm , IBCTn  C1 ´ IBCTm , ICCTn  C1 ´ ICCTm
2
   C 2 ´ IN 
Differential current (x In)


    
Idiff  IACTn  IBCTn  ICCTn  C1 ´ IACTm  C1 ´ IBCTm  C1 ´ ICCTm  C2 ´ IN 
Application Example
REF
• Consider a 90MVA transformer solidly earthed whose star winding
is protected by the REF function in the P64x. Consider 400:1 line
CTs and a 200:1 neutral CT.
• Is1 Set is set to 10% of the winding nominal current:
90 ´ 106 39
Is1 Set  0.1´  39A prim   0.098A sec
3 ´ 132 ´ 103 400
• Is2 is set to the rated current of the transformer:

90 ´ 10 6 390
Is2 Set   390 A prim   1A sec
3 ´ 132 ´ 10 3
400
• Set K1 to 0% (maximum sensitivity)
• Set K2 to 150% (adequate restraint for external faults)
• Scaling factor calculated by the relay:
Neutral CTratio 200
scaling factor    0.5
Transformer Protection, and Monitoring IEDs – NovLine
2010 - PCTratio
55 400
Transient Bias Logic - 1 breaker arrangement Calculate latest bias current = Ibiasn
Differential trip
OR Yes
Ibiasn < 0.5 ´ Is1
No Transient bias = 0
Ibiasn < Is2 No
Yes
New transient bias New transient bias
Itbiasn = DIbias ´ D Itbiasn  DIbias ´ E
DIbias > 0.2 ´ In

AND
AND bias< 0.5 x
Itbiasn > Transient bias Is1
Yes
Yes
Transient bias = New transient bias = Itbiasn Transient bias = 0 Transient bias = transient bias ´ e-t/t
Return
only and is subject to change without notice. Note:
No representation or warranty isD,
The constants given
E orandto betimplied
whereasdetermined
to the completeness of
by test. In is the nominal current.
Transient Bias Logic - 1.5 breaker arrangement Calculate latest bias current = Ibiasn
Differential trip
OR Yes
Ibiasn < 0.5 ´ Is1
No Transient bias = 0
Ibiasn < Is2 No No

Ibiasn < 4 x In
Yes Yes
New transient bias New transient bias New transient bias
Itbiasn = DIbias ´ F Itbiasn  DIbias ´ G Itbiasn  DIbias ´ H
DIbias > 0.2 ´ In

AND
AND bias< 0.5 x
Itbiasn > Transient bias Is1
Yes
Yes
Transient bias = New transient bias = Itbiasn Transient bias = 0 Transient bias = transient bias ´ e-t/t
Return
© ALSTOM 2010. All rights reserved. Information contained in Note:
this document is provided without
The constants F, G,liability
H and for information purposes
t where determined by test. In is the nominal current.
NEW
Thermal Overload and Loss of Life

Thermal Overload Protection
Oil exponent
Top oil
time constant
Ratio of load loss
tTO n
to no load loss
Top oil TO
Temperature
Coolant (oil/air)
H R Temperature a
I2t m
Hot spot w
a
Temperature
Winding time Winding

Square of current exponent
constant
Thermal overload protection based on IEEE C57.91-1995

Thermal overload trip:

►Top oil temperature, TO. Calculated or measured (CLIO or RTD)
    D
TO A TO
The calculation of DTO, top oil rise over ambient, considers:

An oil time constant, tTO
The ratio of load loss at rated load to no load loss, R
An oil exponent, n
top oil rise over ambient temperature at rated load, DTO,R
►Hot spot temperature, H. It is a calculated value only.

    D
H TO H
The calculation of DH, hot spot over top oil, considers:
A winding time constant, tw
Winding hottest spot rise over top oil temperature at rated load. DH,R
Winding exponent, m
RMS current values are used to replicate winding hottest

spot
Transformer Protection, andtemperature
Monitoring IEDs – Nov 2010 - P 60
• Thermal protection with Time to Trip countdown

− Pre-trip Alarm facility
• Ambient or Top Oil compensation from PT100 probe or CLIO
supported
• Reset of thermal memory – maintenance operation after
injection testing
• Quantities available in Measurement 3 column:
− Top oil temperature
− Hot spot temperature
− Ambient temperature
− Pre-trip time left

Setting Guidelines:
• Set monitor winding to HV, LV, TV or biased current.
• Set the ambient temperature to average or measured
(CLIO or RTD)
• Set top oil temperature as calculated or measured.
• IB is the load in pu. Set it to rated load, i.e. 1.0pu.
• The thermal characteristics are given by the
transformer manufacturer. An example of such
parameters are provided in the next table.
• Three hot spot and three top oil stages are available.

Thermal Characteristic
735 MVA 300 kV +7% to -18% / 23kV ODWF cooled
generator transformer
No load losses (core losses) 340kW
Load losses at nominal tap 1580kW
Load losses at maximum current tap 1963kW
Oil time constant 135 min
Oil exponent 1.0
Top oil rise over ambient temperature at rated 33.4°C
load
Winding time constant at hot spot location 14 mins
Winding hottest spot rise over top oil 30.2°C
temperature at rated load
Winding exponent 2.0
CLIO (Current Loop Input Output)
Connection IO Blocks Connection
Outputs
0-10/ 0-20/ 4-20mA channel 1
• Same connectors as
0-1mA channel 1
Screen channel 1
Common return channel 1
Screen channel 2
0-10/ 0-20/ 4-20mA channel 2
0-1mA channel 2
RTD board
Screen channel 3
0-10/ 0-20/ 4-20mA channel 3
0-1mA channel 3
• One board per relay
Screen channel 4
0-10/ 0-20/ 4-20mA channel 4
0-1mA channel 4
• 0 - 1mA (separate
connection)
Inputs
0-10/ 0-20/ 4-20mA channel 1

• 0 - 10mA / 0 - 20mA /
Screen channel 1
0-1mA channel 1
Common channel 1
4 - 20mA
Screen channel 2
0-10/ 0-20/ 4-20mA channel 2 (software selection)
0-1mA channel 2
Common channel 2
0-10/ 0-20/ 4-20mA channel 3

0-1mA channel 3
Screen channel 3
Common channel 3
0-10/ 0-20/ 4-20mA channel 4

Screen channel 4
0-1mA channel 4
Transformer Protection, and Monitoring IEDs – Nov 2010 - P 64channel 4
Common
CLIO (Current Loop Input Output)
• 4 analogue inputs (current loop inputs)

− Menu selectable 0-1mA/0-10mA/0-20mA/4-20mA
− Time delayed alarm and trip for each input
− Each Alarm/Trip can be set as Over/Under
• 4 analogue outputs (current loop outputs)
− Menu selectable 0-1mA/0-10mA/0-20mA/4-20mA
− Wide range of output parameters
• Current, voltage, RTD, f, CLI
• RMS, sequence components…

Loss of Life
Transformer Insulation Life
10000
1000
Per Unit Life
100
10
1
0.1
0.01
0.001
0.0001
0 50 100110 150 200 250
Hottest Spot Temperature (°C)
• Temperature principal variable that affects thermal life
• This curve applies for distribution and power
transformers
Loss of Life
Ageing Acceleration Factor (relative to 110°C)
Ageing Acceleration Factor
10000
1000
100
10
1
0.1
0.01
0.001
0.0001
110
0 50 100 150 200 250
Hottest Spot Temperature (°C)
• Temperature principal variable that affects thermal life
• This curve applies for distribution and power
transformers
Loss of Life
• Frequent excesses of transformer rated current or operation at

elevated temperatures will shorten the life expectancy of the
transformer
• The part operating at the highest temperature undergoes the
greatest deterioration. Hot spot temperature is considered in loss of
life statistics
• Two one-stage definite time delay alarm based on aging
acceleration factor (FAA) or loss of life (LOL) are available
• Model used for loss of life statistics:
LOL  L( )  L ( ) H ,r res H ,r
− LOL = loss of life

− L(H,r) = life hours at reference winding hottest-spot
temperature.
− Lres(H,r) = residual life hours at reference winding hottest-spot
temperature
Loss of Life
• If a 65°C average winding rise transformer is considered, the

equation for FAA is as follows:
 B B 
 383    273 
FAA  e  H 
• If a 55°C average winding rise transformer is considered, the

equation for FAA is as follows:
 B B 
 368    273 
FAA  e  H 
− H = hottest-spot temperature as calculated in

thermal overload protection
− B = constant B from life expectancy curve. IEEE Std.
C57.91-1995 recommends a B value of 15000.
Loss of Life
• The P64x range maintain secure statistics related to

loss of life:
− According to Std. IEEE C57.91-1995
− Daily writing into non-volatile memory:
• Loss of life status (LOL) measurement in hrs
• Residual life at reference hottest spot temperature in
hrs
• Rate of loss of life (ROLOL) measurement in %
• Aging acceleration factor (FAA) measurement in hrs
• Mean aging acceleration factor (FAA,m) in hrs
• Residual life hours at FAA,m (Lres(FAA,m))
− FAA and LOL Alarms are available
− Statistics may be reset if a device is relocated to
monitor another transformer

Loss of Life
Setting Guidelines:
• Set the life hours at reference hottest spot temperature (“Life Hours at HS”).
The normal insulation life at the reference temperature in hours or years must be
arbitrarily defined (IEEE Std. C57.91-1995).
Normal Insulation Life
Basis
Hours Years
50% retained tensile strength of insulation 65000 7.42
(former IEEE Std C57.92-1981 criterion)
25% retained tensile strength of insulation 135000 15.41
200 retained degree of polymerisation in 150000 17.12
insulation
Interpretation of distribution transformer 180000 20.55
functional life test data (former IEEE Std.
C57.91-1981)
NOTES:
1.Tensile strength or degree of polymerisation (D.P.) retention values were
determined by sealed tube aging on well-dried insulation samples in oxygen-free
oil.
2.Refer to I.2 in annex I of the IEEE Std. C57.91-1995 for discussion of the effect
of higher values of water and oxygen and also for the discussion on the basis
given above.
Loss of Life
• Set “Designed HS temp” to 110°C for a transformer rated

65°C average winding rise.
• Set “Designed HS temp” to 95°C for a transformer rated 55°C
average winding rise.
• As recommended by IEEE Std. C57.91-1995, set “Constant B
Set” 15000 based on modern experimental data.
• If the ageing acceleration factor calculated by the relay is
greater than the setting “FAA> Set” and the time delay “tFAA>
Set” has elapsed, the FAA alarm would be activated.
• If the loss of life calculated by the relay is greater than the
setting “LOL> Set” and the time delay “tLOL> Set” has
elapsed, the FAA alarm would be activated.

Application Example

Through-Fault Monitoring
• A through-fault event is generated for any current
flowing in excess of an I> trigger threshold. Set “TF I>
trigger” greater than the overload capability (typically
greater than 3.5 pu IEEE Std C57.109-1993.
• Designed to track repetitive through fault occurrences
which may have caused insulation heat degradation at
winding hotspots, or mechanical forces to displace
cores or windings.
• Alarm available for  I2t above setting. Set “TF I2t>
Alarm” taking into consideration IEEE Std. C57.109-
1993 for transformers built beginning
in the early 1970s.
x

Overfluxing (Volts per Hertz)

Over Fluxing
Basic Theory
• When overfluxing occurs, the transformer core becomes

partially saturated and the resultant magnetising current
waveforms increase in magnitude and become
harmonically distorted. Such waveforms have a
significant 5th harmonic content, which can be extracted
and used as a means of identifying the abnormal
operating condition.
• IEEE Standard C37.91-2000 states that overexcitation
of a transformer can occur whenever the ratio of the per
unit voltage to per unit frequency (V/Hz) at the
secondary terminals of a transformer exceeds its rating
of 1.05 pu on transformer base at full load, 0.8 power
factor, or 1.1 pu at no load.
Over Fluxing
Basic Theory
V = kf  2m
Causes
► Low frequency
m
► High voltage
► Geomagnetic disturbances
Effects Ie
► Increase in mag. Current  Tripping of differential element
(Transient overfluxing)
► Increase in winding temperature
► overheating of laminations and metal parts
► Increase in noise and vibration

Damage to transformers (Prolonged overfluxing)

Overfluxing
HV+LV+TV
P645
• Overfluxing protection for up to two windings
• One single-phase VT input (Volts/Hz W2)
• One optional three-phase VT input (Volts/Hz W1)
• Ratio of phase-phase voltage, VAB, to frequency

Overfluxing
 5 stage element
t  1 DT alarm stage
 1 IDMT/DT + 3DT trip stages
V/f>>  HV and LV side measurement if
3Φ VT fitted
V/f>>>
1.00 1.10 1.20 1.30 1.40 1.50 1.60 V/f

(pu)
1.1 1.2
V/f (pu) 1.1 5 1.2 5 1.3 1.35 1.4 1.45 1.5
Minutes 65 7 2 0.8 0.4 0.22 0.13 0.09 0.06
Typical transformer withstand
Overfluxing
• During persistent geomagnetic overfluxing, with

normal system voltage and frequency, the 5th
harmonic differential current facility could be used
to initiate tripping after a long time delay.

5th Harmonic Restraint
25% Overvoltage condition
43% 5th Harmonic content
► Blocks differential element for transient overfluxing

Voltage, Frequency and Overcurrent
Protection

Overcurrent Protection:
I> (50/51), IN> (50/51N), I2> (46)
• Four stages of each function:

− HV, LV and TV independent settings for all 4
− 4 stage phase overcurrent
− 4 stage neutral or Iy overcurrent (choose Ia+Ib+Ic
derived neutral, or Iy CT measurement)
− 4 stage negative sequence overcurrent
• Two stages of each may be IDMT, up to 4 stage DT
• Stages may be directionalised if the 3Φ VT is fitted, and
for the side of the transformer where that VT is located.

Inverse Time Characteristics
Overcurrent and Earth Fault Elements
IEC Curves IEEE Curves

Operating Time (s) Operating Time (s)
US MI
1000 IEC SI 100
US VI
IEC VI US EI
IEC EI US I
IEC LTS US SI
100
10
10
1
1
0.1 0.1
1 10 100 1 10 100
Current (Multiples of Is) Current (Multiples of Is)
Inverse Time Characteristics
RI Curve (electromechanical)
Overcurrent and Earth Fault Elements
Operating Time (s) RI Curve
100
K = 10
IDG Curve
10 7
IDG Is setting range
6
5
4
3
1
2
K = 0.1 IDG Time setting range
1
0
1 10 100
0.1
1 10 100
Current (Multiples of Is)
Current Summation for Ring-Bus and
(1 ½ Breaker) Windings
• Overcurrent protection is per winding
• HV, LV and TV currents may be reconstructed via
current summation from the individual CT sets
which energise each winding
 +
HV Software
Summation
DT, IDMT
I>, IN>, I2>

Circuit Breaker Failure
Backtrip
• Two stage
• Fast reset (<20 ms)

undistorted current
Retrip
waveform
Trip
• External initiation
BF
INIT
From other device
One CB failure function, 2 stage, per each circuit breaker

Voltage Protection
Phase/Line and Residual Voltage
• Reasons for voltage deviations

− Regulation problems
− Load variation
− Fault conditions
• Requirements of protection depends upon application

− Line or phase voltage measurement
− Operation for all or any phase
− Alarm/Trip
• Relay offers: Two stage V>, Two stage V<, Two stage
VN>

MiCOM P643 and P645
Over-/Underfrequency Protection
Time Delayed Over-/Underfrequency
f
fnom t
Start
f
Trip
t
P642 Hardware Options
Hardware options
Standard – no options 1
IRIG-B only (modulated) 2
Fiber optic converter only 3
IRIG-B (modulated)& fiber optic converter 4
Ethernet with 100Mbit/s fibre-optic port 6
2nd Rear Comms Port (Courier EIA232/EIA485/k-bus) 7
2nd Rear Comms Port + IRIG-B (Courier EIA232/EIA485/k-bus) 8
Ethernet (100Mbit/s) + IRIG-B (modulated) A
Ethernet (100Mbit/s) + IRIG-B (de-modulated) B
IRIG-B (de-modulated) C
Product Specific
Size 8 (40TE) case, 8 optos + 8 relays A
Size 8 (40TE) case, 8 optos + 8 relays + RTD B
Size 8 (40TE) case, 8 optos + 8 relays + CLIO (mA I/O) C
Size 8 (40TE) case, 12 optos + 12 relays D
Size 8 (40TE) case, 8 optos + 12 relays (including 4 High Break) E

Hardware options
Product Specific
Size 12 (60TE) case, 16 optos + 24 relays E
Transformer Protection,
Size 12 and (60TE)
Monitoringcase,
IEDs – Nov
16 2010 - P+
optos 9320 relays (including 4 High Break) F
Hardware options
Product Specific
Size 12 (60TE) case, 16 optos + 24 relays E
Size 16 (80TE) case, 24 optos + 24 relays F
Size 16 (80TE) case, 24 optos + 24 relays + RTD G
Size 16 (80TE) case, 24 optos + 24 relays + CLIO (mA I/O) H
Size 16 (80TE) case, 24 optos + 24 relays + RTD + CLIO (mA I/O) J
Size 12 (60TE) case, 16 optos + 20 relays (including 4 high break) K
Size 16 (80TE) case, 24 optos + 20 relays (including 4 high break) L
Size 16 (80TE) case, 24 optos + 20 relays (including 4 high break) + RTD M
Size 16 (80TE) case, 24 optos + 20 relays (including 4 high break) + CLIO (mA I/O) N
Size 16 (80TE) case, 24 optos + 20 relays (including 4 high break) + RTD + CLIO (mA I/O) P
Size 16 (80TE) case, 16 optos + 24 relays (including 8 high break) Q
Size 16 (80TE) case, 16 optos + 24 relays (including 8 high break) + RTD R
Size 16 (80TE) case, 16 optos + 24 relays (including 8 high break) + CLIO (mA I/O) S
Size 16 (80TE) case, 16 optos + 24 relays (including 8 high break) + RTD + CLIO (mA I/O) T
MiCOM P64x Series Transformer Protection:
Summary
• Full protection, monitoring, measurements and recording in a single
IED solution
• Modern numerical platform built on long design pedigree of
transformer protection within AREVA
− DTH, MBCH, KBCH, PQ, P63x
• Equipped for up to three windings: HV, LV, TV
• With up to 5 bias inputs (CT sets)
• All main protection: 87T, REF, thermal
• And backup elements: I>, IN>, I2>….
− Directionalised where applicable
− Breaker fail
• Expandable hardware options
− VTs, CLIO, RTDs, IRIG-B, ethernet, user selectable I/O
• Intuitive software
− Settings minimised to reduce potential for error
− Settings wizards
www.alstom.com

Micom Alstom P642, P643, P645 Transformer Protection and Monitoring Ieds

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Micom Alstom P642, P643, P645 Transformer Protection and Monitoring Ieds

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MiCOM ALSTOM P642, P643, P645

Transformer Protection and Monitoring IEDs

Ring Bus Fed

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 2

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 3

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 4

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 5

Feature P642 P643 P645

CT saturation and no gap   

Feature P642 P643 P645

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 8

P642 P643 P645

Four Cooling modes available   

Feature P642 P643 P645

Negative phase sequence(2): 2-4stages 3-4 stages 3-4 stages

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 10

Feature P642 P643 P645

Undervoltage NA 1-2stages 1-2stages

Overvoltage NA 1-2stages 1-2stages

Negative phase sequence overvoltage 1-1stage 1-1stage 1-1stage

Residual Overvoltage NA 1-2stages 1-2stages

Overfrequency(2) 1-2stages 1-2stages 1-2stages

Underfrequency(2) 1-4stages 1-4stages 1-4stage

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 11

Feature P642 P643 P645

Trip circuit Supervision   

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 12

Feature P642 P643 P645

3 x 3 sets Phase CT inputs 

5 x 3 sets Phase CT inputs 

1 VT input for overfluxing   

1 Three phase VT input Option Option

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 13

•24 Samples per cycle

2 times cycle 1 time/cycle

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 14

High impedance REF 4

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 15

• Frequency tracking range

• The voltage channels have the priority.

• If a voltage channel is not available, a current channel is used. If a

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 17

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 18

v 0  Ibias  Is1 Is-HS2

v Ibias  Is2 Is1/K1 Is2 Ibias/Inom

Iop  K1  Is2  K 2 Ibias  Is2 

First High Set element Low-set diff protection:

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 21

Transformer Protection, and Monitoring IEDs – Nov 2010 - PReturn

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 23

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 25 Return

• Enter reference power (Sn): MVA

Ydy0 software Yd3 software

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 27

Ydy0 software interposing CT Yd11 software interposing CT

IA1 IA2 Ia1 Ia2

IC1 IB1 IB2 IC2

IA = IA1 + IA2 + IA0 = 3IA0 Ia = Ia1 + Ia2 = 3Ia1

► Stability must be maintained for external fault with

Transformer Protection, and Monitoring IEDs – Nov 2010 - P 30

Calculate delta bias current = DIbias = Ibiasn – Ibiasn-1

No Differential trip Yes

Ibiasn < Is2 No