Microprocessor Systems

Basic Course Outline:

• Register transfer and micro-operations
• Basic computer organization, design, & programming
• Central Processing Unit (CPU)
• 8051 microcontroller assembly/peripheral interfacing
• PIC18 microcontroller using C language

Dr. Memoon Sajid

Assistant Professor
Faculty of Electrical Engineering
GIK Institute of Engineering Sciences and Technology
Phone # +923468710421
Email : memoonsajid@gmail.com
Office Hours: As displayed on door
 General Instructions
• We will focus both on theory and practical applications and
implementation of what we are learning
• Students will be able to design complex systems controlled through
a digital circuit or a microcontroller
• Three text books will be followed:
1. Computer System Architecture M. Morris Mano 3rd Edition
2. The 8051 Microcontroller & Embedded Systems by Mazidi
3. PIC Microcontroller & Embedded Systems by Mazidi
• I will share related course material with students through dropbox
link sent to you via email
• There will be no compromise on discipline and attendance
• There will be both announced and surprise quizzes
 Mapping of CLOs & PLOs
CLOs, Course Learning Outcomes PLOs Blooms Taxonomy
  Be able to describe register transfer PLO-1 C 2 (Understanding)
CLO-1 language, micro-operations, basic computer
organization and design using block diagrams

  Be able to utilize the instruction set of the PLO-2 C 3 (Applying)

CLO-2 basic computer to illustrate techniques used
in assembly language programming. (8051)

  Students will be able to develop programs PLO-2 C 3 (Applying)

CLO-3 on 8051 microcontroller using loops, jumps,
arithmetic, and logic with different
addressing modes in Assembly language.

  Students will be able to design systems PLO-3 C 3 (Applying)

CLO-4 interfacing 8051 microcontroller to
peripheral control devices using timers,
serial, interrupts and external memory in
Assembly language

  Students will be able to develop programs PLO-2 C 3 (Applying)

CLO-5 on PIC microcontroller using loops, jumps,
arithmetic, and logic with different
addressing modes in C language.
 CLO Assessment Mechanism
Assessment Tools CLO-1 CLO-2 CLO-3 CLO-4 CLO-5
Quizzes 35% 35% 35% 35% 35%

Assignments 10% 10% 10% 10% 10%

Midterm 55% 40% 20% 0% 0%

Examination
Final Examination 0% 15% 35% 55% 55%

Assessment Tools Percentage

Quizzes 20%
Assignments 5%
Midterm Examination 30%
Final Examination 45%
 Total 100%
 Components of a digital system
• Registers
• Decoders
• Arithmetic elements
• Control Logic
• Interconnected with common data and control
paths to form a computer system
 Registers
• Locations with data (group of flip-flops &
control)

• Modules are defined by the registers they

contain and the operations that are
performed on the data stored in them
Bus and Memory Transfers 3
Three-State Bus Buffers, Memory Transfer
Sin and Sout are the Register Selection Bits of MUX
Three-state Buffers
High impedance enables outputs of multiple buffers
to be connected together on a single bus line without
endangering loading effects.
To ensure that only one control input is active at any
given instant of time, a decoder is used to select one
desired input to be buffered at the output
K
Simple RAM design
Memory Transfer 4
 Arithmetic Micro-operations
Binary Adder, Binary Adder-Subtracter, Binary Incrementer
• We can make a conditional NOT gate using XOR.
• One is control input ‘M’ and the second is data
input ‘B’. If M = 0, Out = B ; if M = 1, Out = B’
• Same control input ‘M’ can be given as the input
carry bit to perform the required initial increment
A+B’ = A+(B’+1)-1 = A-B-1 which is subtract with borrow

1111 = (0001)’+1 = 1110+1 => 1111 is 2’s complement of 0001 or 1 => it is equal to -1

When C = 1: D = A-1+1 = A => simple transfer operation

 Logic Micro-operations 5
List of Logic micro-operations, hardware implementation
 NOR

NAND

NOT
Transfer
NOT
Transfer
NAND

NOR
 Shift Micro-operations 6
List of shift micro-operations, hardware implementation
 Arithmetic Shift Right

• An arithmetic shift right leaves the sign bit unchanged as

the sign remains same after multiplication or division
• Sign bit is a flag/indicator that the number is negative
• The negative number itself is in 2’s complement form
• Right most least significant bit R0 is lost after shift
• Sign bit is copied to the most significant bit location
• Right shift is equivalent to division of the number by 2
• Result is always rounded off to smaller number after
division. In case of signed number, -5/2=-3 as -3<-2.
 Arithmetic Shift Left
• Shift left is equivalent to multiplication by 2
• Arithmetic shift left inserts a ‘0’ into the right most least
significant bit R0
• The sign bit is replaced by the previous most significant
bit of the number’s magnitude
• If the most significant bit and the sign bit were different,
the sign bit is lost after the shift operation
• This means that an overflow has occurred after a
multiplication by 2
• The overflow is detected by an XOR gate before shift
operation is performed and the output or XOR becomes 1
if the MSB and sign bit are different before operation
• The author has suddenly
reversed the convention
previously developed. To
avoid confusion, follow
the older one
Arithmetic Logic Shift Unit