BIPOLAR JUNCTION

TRANSISTOR (BJT)
 Introduction
• The BJT is constructed with three doped
semiconductor regions separated by two pn
junctions, as shown
• The three regions are called emitter, base,
and collector.
• The term bipolar refers to the use of both holes and
electrons as current carriers in the transistor structure.

• The pn junction joining the base region and the

emitter region is called the base-emitter junction

• The pn junction joining the base region and the

collector region is called the base-collector junction

• The base region is lightly doped and very thin

compared to the heavily doped emitter and the
moderately doped collector regions
Schematic Symbol of BJT
 Basic BJT Operation
• In order for a BJT to operate properly as an amplifier,
the two pn junctions must be correctly biased with
external dc voltages.

• Figure(next slide) shows a bias arrangement for both

npn and pnp BJTs for operation as an amplifier.

• In both cases the base-emitter (BE) junction is

forward-biased and the base-collector (BC) junction is
reverse-biased. This condition is called forward-
reverse bias.
• The heavily doped n-type emitter region has a very high
density of conduction-band (free) electrons.

• These free electrons easily diffuse through the forward

based BE junction into the lightly doped and very thin p-
type base region

• The base has a low density of holes

• A small percentage of the total number of free electrons

injected into the base region recombine with holes and
move as valence electrons through the base region and
into the emitter region as hole current
• When the electrons that have recombined with holes as valence electrons
leave the crystalline structure of the base, they become free electrons in the
metallic base lead and produce the external base current.

• Most of the free electrons that have entered the base do not recombine with
holes because the base is very thin.

• As the free electrons move toward the reverse-biased BC junction, they are
swept across into the collector region by the attraction of the positive collector
supply voltage

• The free electrons move through the collector region, into the external circuit,
and then return into the emitter region along with the base current, as shown
in the figure(next slide )

• The emitter current is slightly greater than the collector current because of the
small base current that splits off from the total current injected into the base
region from the emitter
 Transistor Currents
• The directions of the currents in an npn
transistor and its schematic symbol are as
shown in Figure
BJT CHARACTERISTICS AND PARAMETERS

• When a transistor is connected to dc bias

voltages, as shown in Figure for both npn and
pnp types, VBB forward-biases the base-emitter
junction, and VCC reverse-biases the base-
collector junction
to 200.
• The ratio of the dc collector current (IC) to the
dc emitter current (IE) is the dc alpha (αDC).
• The alpha is a less-used parameter than beta
in transistor circuits.

• Typically, values of αDC range from 0.95 to 0.99

or greater, but αDC is always less than 1. The
reason is that IC is always slightly less than IE by
the amount of IB
  
Relation Ship of &β(derivation on Board )

•  

IE=IC+IB ……………(i)
IE=βIB+IB
IE=(β+1)IB …………(ii)
As we know α=IC/IE&β=IC/IB , so Eq(iii) becomes by putting
value of IB
Example: Determine the dc current gain βDC and the emitter
current IE for a transistor where IB =50 µA and IC =3.65 mA.
 Transistor DC Model
• The input circuit is a forward-biased diode through which there is
base current.

• The output circuit is a dependent current source (diamond-shaped

element) with a value that is dependent on the base current, I B, and
equal to βDCIB
 BJT Circuit Analysis
• Consider the basic transistor bias circuit configuration in Figure

• Three transistor dc currents and three dc voltages can be

identified

• IB: dc base current

• IE: dc emitter current
• IC: dc collector current
• VBE: dc voltage at base with respect to emitter
• VCB: dc voltage at collector with respect to base
• VCE: dc voltage at collector with respect to emitter
 Transistor i-v characteristics
Transistor Voltages
Three different types of voltages are involved in
the description of transistors and transistor
circuits.
• Transistor supply voltages: VCC ,VBB
• Transistor terminal voltages: VB ,VC , VE
• Voltages across transistor junctions: VBE ,VCE , VCB
All of these voltages and their polarities are
shown in the next slide
• The most important characteristic of the BJT is
the plot of the collector current(IC) , versus the
collector-emitter voltage(VCE) , for various
values of the base current(IB) as shown on the
circuit
• Cutoff region
₋ Base-emitter junction is reverse biased. No current
flow
₋ VCE=VCC, IB=0
• Saturation region
₋ Base-emitter junction forward biased
₋ Collector-base junction is forward biased
₋ IC reaches a maximum which is independent of IB and
β.
₋ No control.
₋ VCE(sat)=VCC-IC(sat)RC
₋ VCE < VBE
• Active region
₋ Base-emitter junction forward biased
₋ Collector-base junction Reverse biased
₋ Control, IC = βIB (as can be seen from Figure
there is a small slope of IC with VCE
₋ VBE <VCE<VCC
• Breakdown region
⁻ IC and VCE exceed specifications damage to the
transistor
 THE BJT AS A SWITCH
• In part (a), the transistor is in the cutoff region because
the base-emitter junction is not forward-biased. In this
condition, there is, ideally, an open between collector
and emitter, as indicated by the switch equivalent
• In part (b), the transistor is in the saturation region
because the base emitter junction and the base-
collector junction are forward-biased and the base
current is made large enough to cause the collector
current to reach its saturation value. In this
condition, there is, ideally, a short between collector
and emitter, as indicated by the switch equivalent
Conditions in Cutoff

Conditions in Saturation
 THE BJT AS AN AMPLIFIER
• Amplification is the process of linearly increasing the
amplitude of an electrical signal and is one of the
major properties of a transistor.

• BJT exhibits current gain (called β). When a BJT is

biased in the active (or linear) region

• BE junction has a low resistance due to forward bias

and the BC junction has a high resistance due to
reverse bias
 DC Load Line
• Figure shows a dc load line
connecting the cutoff point and the
saturation point.

• The bottom of the load line is at

ideal cutoff where IC =0 and VCE
=VCC

• The top of the load line is at

saturation where IC =IC(sat) and VCE
=VCE(sat).

• In between cutoff and saturation

along the load line is the active
region of the transistor’s operation
•When a line is drawn joining the saturation and cut off points, such a line can
be called as Load line. This line, when drawn over the output characteristic
curve, makes contact at a point called as Operating point.
•This operating point is also called as quiescent point or simply Q-point.
•There can be many such intersecting points, but the Q-point is
selected in such a way that irrespective of AC signal swing, the transistor
remains in the active region.
•The following graph shows how to represent the operating point.
The operating point should not get disturbed as it should remain stable to
achieve faithful amplification. Hence the quiescent point or Q-point is the value
where the Faithful Amplification is achieved.

•Faithful Amplification
The process of increasing the signal strength is called as Amplification.
This amplification when done without any loss in the components of the signal, is called
as Faithful amplification.
Faithful amplification is the process of obtaining complete portions of input signal by
increasing the signal strength. This is done when AC signal is applied at its input.
•In the above graph, the input signal applied is completely amplified
and reproduced without any losses. This can be understood as Faithful
Amplification.
•The operating point is so chosen such that it lies in the active
region and it helps in the reproduction of complete signal without any
loss.
•If the operating point is considered near saturation point, then the
amplification will be as under.
If the operation point is considered near cut off point, then the
amplification will be as under.
Hence the placement of operating point is an important factor to
achieve faithful amplification. But for the transistor to function
properly as an amplifier, its input circuit (i.e., the base-emitter
junction) remains forward biased and its output circuit (i.e., collector-
base junction) remains reverse biased.
The amplified signal thus contains the same information as in the input
signal whereas the strength of the signal is increased.
AMPLIFIER CLASSES
Amplifiers are classified into classes according
to their construction and operating characteristics
.
They are :
1. Class A amplifiers
2. Class B amplifiers
3. Class AB amplifiers
4. Class C amplifiers
 Class A amplifiers :
•Class A amplifiers use just one output switching transistor (Bipolar,
FET etc) with in their amplifier design.
•This single output transistor is biased around the Q-point within the
middle of its load line and so is never driven into saturation or cut
off regions thus allowing it to conduct current over the full 360
degrees of the input cycle .
•Class A amplifiers are considered the best of amplifiers design due
to their excellent linearity , high gain and low signal distortion
levels when designed correctly .
•To achieve high linearity and gain , the output stage of amplifier is
biased “ON” conducting all the time , so it is constantly carrying
current , which repeats a continuous loss of power in the amplifier.
•Due to this continuous loss of power class A amplifiers create
tremendous amounts of heat adding to their very low efficiency at
around 30% , making them impractical for high power
applications .
• This push-pull design of amplifier is obviously more efficient
than class A , at about 50% , but the problem with the class B
amplifier design is that it can create distortion at the zero-crossing
point of the waveform due to the transistors dead band of the
input base voltages from -0.7 to +0.7.

•when the signal changes or “crosses-over” from one

transistor to the other at the zero voltage point it produces
an amount of “distortion” to the output wave shape. This
results in a condition that is commonly called Crossover
Distortion.
• Crossover Distortion produces a zero voltage “flat spot”
or “dead band” on the output wave shape as it crosses
over from one half of the waveform to the other. The
reason for this is that the transition period when the
transistors are switching over from one to the other,
does not stop or start exactly at the zero crossover point
thus causing a small delay between the first transistor
turning “OFF” and the second transistor turning “ON”.
This delay results in both transistors being switched
“OFF” at the same instant in time producing an output
wave shape as shown below.
 Making logic gates with BJTs :
1. AND GATE :

•The output state of a digital logic AND gate only returns “LOW” again
when ANY of its inputs are at a logic level “0”. In other words for a logic AND
gate, any LOW input will give a LOW output.
•The logic or Boolean expression given for a digital logic AND gate is that
for Logical Multiplication which is denoted by a single dot or full stop symbol,
( . ) giving us the Boolean expression of:  A.B = Q.
•Then we can define the operation of a digital 2-input logic AND gate as being:

•“If both A and B are true, then Q is true”

2-input Transistor AND Gate
A simple 2-input logic AND gate can be constructed using RTL Resistor-
transistor switches connected together as shown below with the inputs
connected directly to the transistor bases. Both transistors must be
saturated “ON” for an output at Q.
 
Logic AND Gates are available using digital circuits to produce the
desired logical function and is given a symbol whose shape represents
the logical operation of the AND gate.
 2. OR GATE :

•The output, Q of a “Logic OR Gate” only returns “LOW” again when ALL of

its inputs are at a logic level “0”. In other words for a logic OR gate, any
“HIGH” input will give a “HIGH”, logic level “1” output.
•The logic or Boolean expression given for a digital logic OR gate is that
for Logical Addition which is denoted by a plus sign, ( + ) giving us the
Boolean expression of:  A+B = Q.
•The output is true when both of its inputs are true (HIGH). Then we can
define the operation of a 2-input logic OR gate as being:
• 
•“If either A or B is true, then Q is true”
2-input Transistor OR Gate
A simple 2-input inclusive OR gate can be constructed using RTL
Resistor-transistor switches connected together as shown below,
with the inputs connected directly to the transistor bases. Either
transistor must be saturated “ON” for an output at Q.
 
Logic OR Gates are available using digital circuits to produce the
desired logical function and is given a symbol whose shape
represents the logical operation of the OR gate.
3. NOT GATE :

Inverting NOT gates are single input devices which have an output
level that is normally at logic level “1” and goes “LOW” to a logic level
“0” when its single input is at logic level “1”, in other words it “inverts”
(complements) its input signal. The output from a NOT gate only
returns “HIGH” again when its input is at logic level “0” giving us the
Boolean expression of:  A = Q.
Then we can define the operation of a single input digital logic NOT
gate as being:
 
“If A is NOT true, then Q is true”
Transistor NOT Gate

A simple 2-input logic NOT gate can be constructed using a RTL

Resistor-transistor switches as shown below with the input
connected directly to the transistor base. The transistor must be
saturated “ON” for an inverted output “OFF” at Q.
 
.
The Logic NOT Gate Truth Table
                        

Symbol Truth Table

A Q

0 1
Inverter or NOT Gate
1 0

Boolean Expression Q = not A Read as inverse

or A of A gives Q
Diode Logic OR gate (wired OR
connection)
•If one or both inputs are at logic “1” (5 volts), the current
 will flow through one or both diodes. This current passes
through the resistor and causes the appearance of a
voltage across its terminals, thereby obtaining logic “1” on
the output.
                                                       
•We only get logic “0” (0 volts) on
the output when both inputs are
in logic “0”. In this case, the
diodes do not conduct, there is no
current through the resistor R and
there is no voltage across its
terminals. As a result the voltage
at Vout is the same as ground (0
volts)
  
Diode Logic AND gate (wired AND
connection)
When both inputs are at logic “1″, the two diodes are reverse biased and
there is no current flowing to ground. Therefore the output is logic “1”
because there is no voltage drop across the resistor R.
If one of the inputs is logic “0”, the current will flow through the
                                      
corresponding diode and through the resistor. Thus the diode anode (the
output) will be logic “0”.