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Appendix B

The Basic of Logic Design

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B.3 Combinational Logic

Decoders:

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Multiplexors

2×1 Mux:

A 32-bit wide 2×1 Mux:

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B.5 Constructing a Basic Arithmetic Logic Unit

A 1-Bit ALU

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A 32-Bit ALU

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NOR
A 1-bit ALU that perform AND, OR,
addition and subtraction: a  b  a b

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Tailoring the 32-Bit ALU to MIPS
• slt

(a  b) 0  ((a  b)  b) (0  b)
 a b
that is, a 1 if a-b is negative and 0 if it’s positive  sign bit

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The final 32-bit ALU

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B.8 Register Files

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