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First Review Seminar Presentation Ethernet Verification Using OVM (Verilog) BY Chundi Chandrahasa Divya Shastry Sai Rakesh Bharadwaj P.S B.Srinivas
First Review Seminar Presentation Ethernet Verification Using OVM (Verilog) BY Chundi Chandrahasa Divya Shastry Sai Rakesh Bharadwaj P.S B.Srinivas
PRESENTATION
BY
CHUNDI CHANDRAHASA
DIVYA SHASTRY
SAI RAKESH BHARADWAJ P.S
B.SRINIVAS
CONTENTS
Introduction To Ethernet.
History of Ethernet.
Evolution of Ethernet.
Evolution of OVM.
Need for Verification.
Why Verilog as an OVM?
Applications of Ethernet.
OBJECTIVE
The verification of Ethernet is done by a step by step process called OVC by OVM. In
the late 50’s we used only transistors to build up the circuit but without any kind of
verification. As the technology started evolving the complexity of the circuits increased
due to which step by step verification and stimulation of the system became a
necessity. In 2007 Cadence and Mentor Graphics combined to produce OVM.
NEED FOR VERIFICATION
Why Verilog as an OVM?
GENERAL APPLICATIONS OF ETHERNET